meh
Fork of mbed by
TARGET_MTS_MDOT_F405RG/stm32f4xx_ll_usb.h@92:4fc01daae5a5, 2014-11-27 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Nov 27 13:33:22 2014 +0000
- Revision:
- 92:4fc01daae5a5
- Child:
- 99:dbbf35b96557
Release 92 of the mbed libray
Main changes:
- nRF51822: fixed pin assignment issues
- ST targets moving to the STM32Cube driver
- LPC1439: fixed serial interrupt issue
- first Cortex-A platform supported in mbed (RZ_A1H)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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bogdanm | 92:4fc01daae5a5 | 1 | /** |
bogdanm | 92:4fc01daae5a5 | 2 | ****************************************************************************** |
bogdanm | 92:4fc01daae5a5 | 3 | * @file stm32f4xx_ll_usb.h |
bogdanm | 92:4fc01daae5a5 | 4 | * @author MCD Application Team |
bogdanm | 92:4fc01daae5a5 | 5 | * @version V1.1.0 |
bogdanm | 92:4fc01daae5a5 | 6 | * @date 19-June-2014 |
bogdanm | 92:4fc01daae5a5 | 7 | * @brief Header file of USB Core HAL module. |
bogdanm | 92:4fc01daae5a5 | 8 | ****************************************************************************** |
bogdanm | 92:4fc01daae5a5 | 9 | * @attention |
bogdanm | 92:4fc01daae5a5 | 10 | * |
bogdanm | 92:4fc01daae5a5 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
bogdanm | 92:4fc01daae5a5 | 12 | * |
bogdanm | 92:4fc01daae5a5 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 92:4fc01daae5a5 | 14 | * are permitted provided that the following conditions are met: |
bogdanm | 92:4fc01daae5a5 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 92:4fc01daae5a5 | 16 | * this list of conditions and the following disclaimer. |
bogdanm | 92:4fc01daae5a5 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 92:4fc01daae5a5 | 18 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 92:4fc01daae5a5 | 19 | * and/or other materials provided with the distribution. |
bogdanm | 92:4fc01daae5a5 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 92:4fc01daae5a5 | 21 | * may be used to endorse or promote products derived from this software |
bogdanm | 92:4fc01daae5a5 | 22 | * without specific prior written permission. |
bogdanm | 92:4fc01daae5a5 | 23 | * |
bogdanm | 92:4fc01daae5a5 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 92:4fc01daae5a5 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 92:4fc01daae5a5 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 92:4fc01daae5a5 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 92:4fc01daae5a5 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 92:4fc01daae5a5 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 92:4fc01daae5a5 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 92:4fc01daae5a5 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 92:4fc01daae5a5 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 92:4fc01daae5a5 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 92:4fc01daae5a5 | 34 | * |
bogdanm | 92:4fc01daae5a5 | 35 | ****************************************************************************** |
bogdanm | 92:4fc01daae5a5 | 36 | */ |
bogdanm | 92:4fc01daae5a5 | 37 | |
bogdanm | 92:4fc01daae5a5 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 39 | #ifndef __STM32F4xx_LL_USB_H |
bogdanm | 92:4fc01daae5a5 | 40 | #define __STM32F4xx_LL_USB_H |
bogdanm | 92:4fc01daae5a5 | 41 | |
bogdanm | 92:4fc01daae5a5 | 42 | #ifdef __cplusplus |
bogdanm | 92:4fc01daae5a5 | 43 | extern "C" { |
bogdanm | 92:4fc01daae5a5 | 44 | #endif |
bogdanm | 92:4fc01daae5a5 | 45 | |
bogdanm | 92:4fc01daae5a5 | 46 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 47 | #include "stm32f4xx_hal_def.h" |
bogdanm | 92:4fc01daae5a5 | 48 | |
bogdanm | 92:4fc01daae5a5 | 49 | /** @addtogroup STM32F4xx_HAL |
bogdanm | 92:4fc01daae5a5 | 50 | * @{ |
bogdanm | 92:4fc01daae5a5 | 51 | */ |
bogdanm | 92:4fc01daae5a5 | 52 | |
bogdanm | 92:4fc01daae5a5 | 53 | /** @addtogroup USB_Core |
bogdanm | 92:4fc01daae5a5 | 54 | * @{ |
bogdanm | 92:4fc01daae5a5 | 55 | */ |
bogdanm | 92:4fc01daae5a5 | 56 | |
bogdanm | 92:4fc01daae5a5 | 57 | /* Exported types ------------------------------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 58 | |
bogdanm | 92:4fc01daae5a5 | 59 | /** |
bogdanm | 92:4fc01daae5a5 | 60 | * @brief USB Mode definition |
bogdanm | 92:4fc01daae5a5 | 61 | */ |
bogdanm | 92:4fc01daae5a5 | 62 | typedef enum |
bogdanm | 92:4fc01daae5a5 | 63 | { |
bogdanm | 92:4fc01daae5a5 | 64 | USB_OTG_DEVICE_MODE = 0, |
bogdanm | 92:4fc01daae5a5 | 65 | USB_OTG_HOST_MODE = 1, |
bogdanm | 92:4fc01daae5a5 | 66 | USB_OTG_DRD_MODE = 2 |
bogdanm | 92:4fc01daae5a5 | 67 | |
bogdanm | 92:4fc01daae5a5 | 68 | }USB_OTG_ModeTypeDef; |
bogdanm | 92:4fc01daae5a5 | 69 | |
bogdanm | 92:4fc01daae5a5 | 70 | /** |
bogdanm | 92:4fc01daae5a5 | 71 | * @brief URB States definition |
bogdanm | 92:4fc01daae5a5 | 72 | */ |
bogdanm | 92:4fc01daae5a5 | 73 | typedef enum { |
bogdanm | 92:4fc01daae5a5 | 74 | URB_IDLE = 0, |
bogdanm | 92:4fc01daae5a5 | 75 | URB_DONE, |
bogdanm | 92:4fc01daae5a5 | 76 | URB_NOTREADY, |
bogdanm | 92:4fc01daae5a5 | 77 | URB_NYET, |
bogdanm | 92:4fc01daae5a5 | 78 | URB_ERROR, |
bogdanm | 92:4fc01daae5a5 | 79 | URB_STALL |
bogdanm | 92:4fc01daae5a5 | 80 | |
bogdanm | 92:4fc01daae5a5 | 81 | }USB_OTG_URBStateTypeDef; |
bogdanm | 92:4fc01daae5a5 | 82 | |
bogdanm | 92:4fc01daae5a5 | 83 | /** |
bogdanm | 92:4fc01daae5a5 | 84 | * @brief Host channel States definition |
bogdanm | 92:4fc01daae5a5 | 85 | */ |
bogdanm | 92:4fc01daae5a5 | 86 | typedef enum { |
bogdanm | 92:4fc01daae5a5 | 87 | HC_IDLE = 0, |
bogdanm | 92:4fc01daae5a5 | 88 | HC_XFRC, |
bogdanm | 92:4fc01daae5a5 | 89 | HC_HALTED, |
bogdanm | 92:4fc01daae5a5 | 90 | HC_NAK, |
bogdanm | 92:4fc01daae5a5 | 91 | HC_NYET, |
bogdanm | 92:4fc01daae5a5 | 92 | HC_STALL, |
bogdanm | 92:4fc01daae5a5 | 93 | HC_XACTERR, |
bogdanm | 92:4fc01daae5a5 | 94 | HC_BBLERR, |
bogdanm | 92:4fc01daae5a5 | 95 | HC_DATATGLERR |
bogdanm | 92:4fc01daae5a5 | 96 | |
bogdanm | 92:4fc01daae5a5 | 97 | }USB_OTG_HCStateTypeDef; |
bogdanm | 92:4fc01daae5a5 | 98 | |
bogdanm | 92:4fc01daae5a5 | 99 | /** |
bogdanm | 92:4fc01daae5a5 | 100 | * @brief PCD Initialization Structure definition |
bogdanm | 92:4fc01daae5a5 | 101 | */ |
bogdanm | 92:4fc01daae5a5 | 102 | typedef struct |
bogdanm | 92:4fc01daae5a5 | 103 | { |
bogdanm | 92:4fc01daae5a5 | 104 | uint32_t dev_endpoints; /*!< Device Endpoints number. |
bogdanm | 92:4fc01daae5a5 | 105 | This parameter depends on the used USB core. |
bogdanm | 92:4fc01daae5a5 | 106 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
bogdanm | 92:4fc01daae5a5 | 107 | |
bogdanm | 92:4fc01daae5a5 | 108 | uint32_t Host_channels; /*!< Host Channels number. |
bogdanm | 92:4fc01daae5a5 | 109 | This parameter Depends on the used USB core. |
bogdanm | 92:4fc01daae5a5 | 110 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
bogdanm | 92:4fc01daae5a5 | 111 | |
bogdanm | 92:4fc01daae5a5 | 112 | uint32_t speed; /*!< USB Core speed. |
bogdanm | 92:4fc01daae5a5 | 113 | This parameter can be any value of @ref USB_Core_Speed_ */ |
bogdanm | 92:4fc01daae5a5 | 114 | |
bogdanm | 92:4fc01daae5a5 | 115 | uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA. */ |
bogdanm | 92:4fc01daae5a5 | 116 | |
bogdanm | 92:4fc01daae5a5 | 117 | uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. |
bogdanm | 92:4fc01daae5a5 | 118 | This parameter can be any value of @ref USB_EP0_MPS_ */ |
bogdanm | 92:4fc01daae5a5 | 119 | |
bogdanm | 92:4fc01daae5a5 | 120 | uint32_t phy_itface; /*!< Select the used PHY interface. |
bogdanm | 92:4fc01daae5a5 | 121 | This parameter can be any value of @ref USB_Core_PHY_ */ |
bogdanm | 92:4fc01daae5a5 | 122 | |
bogdanm | 92:4fc01daae5a5 | 123 | uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */ |
bogdanm | 92:4fc01daae5a5 | 124 | |
bogdanm | 92:4fc01daae5a5 | 125 | uint32_t low_power_enable; /*!< Enable or disable the low power mode. */ |
bogdanm | 92:4fc01daae5a5 | 126 | |
bogdanm | 92:4fc01daae5a5 | 127 | uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */ |
bogdanm | 92:4fc01daae5a5 | 128 | |
bogdanm | 92:4fc01daae5a5 | 129 | uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */ |
bogdanm | 92:4fc01daae5a5 | 130 | |
bogdanm | 92:4fc01daae5a5 | 131 | uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */ |
bogdanm | 92:4fc01daae5a5 | 132 | |
bogdanm | 92:4fc01daae5a5 | 133 | }USB_OTG_CfgTypeDef; |
bogdanm | 92:4fc01daae5a5 | 134 | |
bogdanm | 92:4fc01daae5a5 | 135 | typedef struct |
bogdanm | 92:4fc01daae5a5 | 136 | { |
bogdanm | 92:4fc01daae5a5 | 137 | uint8_t num; /*!< Endpoint number |
bogdanm | 92:4fc01daae5a5 | 138 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
bogdanm | 92:4fc01daae5a5 | 139 | |
bogdanm | 92:4fc01daae5a5 | 140 | uint8_t is_in; /*!< Endpoint direction |
bogdanm | 92:4fc01daae5a5 | 141 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
bogdanm | 92:4fc01daae5a5 | 142 | |
bogdanm | 92:4fc01daae5a5 | 143 | uint8_t is_stall; /*!< Endpoint stall condition |
bogdanm | 92:4fc01daae5a5 | 144 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
bogdanm | 92:4fc01daae5a5 | 145 | |
bogdanm | 92:4fc01daae5a5 | 146 | uint8_t type; /*!< Endpoint type |
bogdanm | 92:4fc01daae5a5 | 147 | This parameter can be any value of @ref USB_EP_Type_ */ |
bogdanm | 92:4fc01daae5a5 | 148 | |
bogdanm | 92:4fc01daae5a5 | 149 | uint8_t data_pid_start; /*!< Initial data PID |
bogdanm | 92:4fc01daae5a5 | 150 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
bogdanm | 92:4fc01daae5a5 | 151 | |
bogdanm | 92:4fc01daae5a5 | 152 | uint8_t even_odd_frame; /*!< IFrame parity |
bogdanm | 92:4fc01daae5a5 | 153 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
bogdanm | 92:4fc01daae5a5 | 154 | |
bogdanm | 92:4fc01daae5a5 | 155 | uint16_t tx_fifo_num; /*!< Transmission FIFO number |
bogdanm | 92:4fc01daae5a5 | 156 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
bogdanm | 92:4fc01daae5a5 | 157 | |
bogdanm | 92:4fc01daae5a5 | 158 | uint32_t maxpacket; /*!< Endpoint Max packet size |
bogdanm | 92:4fc01daae5a5 | 159 | This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ |
bogdanm | 92:4fc01daae5a5 | 160 | |
bogdanm | 92:4fc01daae5a5 | 161 | uint8_t *xfer_buff; /*!< Pointer to transfer buffer */ |
bogdanm | 92:4fc01daae5a5 | 162 | |
bogdanm | 92:4fc01daae5a5 | 163 | uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address */ |
bogdanm | 92:4fc01daae5a5 | 164 | |
bogdanm | 92:4fc01daae5a5 | 165 | uint32_t xfer_len; /*!< Current transfer length */ |
bogdanm | 92:4fc01daae5a5 | 166 | |
bogdanm | 92:4fc01daae5a5 | 167 | uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */ |
bogdanm | 92:4fc01daae5a5 | 168 | |
bogdanm | 92:4fc01daae5a5 | 169 | }USB_OTG_EPTypeDef; |
bogdanm | 92:4fc01daae5a5 | 170 | |
bogdanm | 92:4fc01daae5a5 | 171 | typedef struct |
bogdanm | 92:4fc01daae5a5 | 172 | { |
bogdanm | 92:4fc01daae5a5 | 173 | uint8_t dev_addr ; /*!< USB device address. |
bogdanm | 92:4fc01daae5a5 | 174 | This parameter must be a number between Min_Data = 1 and Max_Data = 255 */ |
bogdanm | 92:4fc01daae5a5 | 175 | |
bogdanm | 92:4fc01daae5a5 | 176 | uint8_t ch_num; /*!< Host channel number. |
bogdanm | 92:4fc01daae5a5 | 177 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
bogdanm | 92:4fc01daae5a5 | 178 | |
bogdanm | 92:4fc01daae5a5 | 179 | uint8_t ep_num; /*!< Endpoint number. |
bogdanm | 92:4fc01daae5a5 | 180 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
bogdanm | 92:4fc01daae5a5 | 181 | |
bogdanm | 92:4fc01daae5a5 | 182 | uint8_t ep_is_in; /*!< Endpoint direction |
bogdanm | 92:4fc01daae5a5 | 183 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
bogdanm | 92:4fc01daae5a5 | 184 | |
bogdanm | 92:4fc01daae5a5 | 185 | uint8_t speed; /*!< USB Host speed. |
bogdanm | 92:4fc01daae5a5 | 186 | This parameter can be any value of @ref USB_Core_Speed_ */ |
bogdanm | 92:4fc01daae5a5 | 187 | |
bogdanm | 92:4fc01daae5a5 | 188 | uint8_t do_ping; /*!< Enable or disable the use of the PING protocol for HS mode. */ |
bogdanm | 92:4fc01daae5a5 | 189 | |
bogdanm | 92:4fc01daae5a5 | 190 | uint8_t process_ping; /*!< Execute the PING protocol for HS mode. */ |
bogdanm | 92:4fc01daae5a5 | 191 | |
bogdanm | 92:4fc01daae5a5 | 192 | uint8_t ep_type; /*!< Endpoint Type. |
bogdanm | 92:4fc01daae5a5 | 193 | This parameter can be any value of @ref USB_EP_Type_ */ |
bogdanm | 92:4fc01daae5a5 | 194 | |
bogdanm | 92:4fc01daae5a5 | 195 | uint16_t max_packet; /*!< Endpoint Max packet size. |
bogdanm | 92:4fc01daae5a5 | 196 | This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ |
bogdanm | 92:4fc01daae5a5 | 197 | |
bogdanm | 92:4fc01daae5a5 | 198 | uint8_t data_pid; /*!< Initial data PID. |
bogdanm | 92:4fc01daae5a5 | 199 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
bogdanm | 92:4fc01daae5a5 | 200 | |
bogdanm | 92:4fc01daae5a5 | 201 | uint8_t *xfer_buff; /*!< Pointer to transfer buffer. */ |
bogdanm | 92:4fc01daae5a5 | 202 | |
bogdanm | 92:4fc01daae5a5 | 203 | uint32_t xfer_len; /*!< Current transfer length. */ |
bogdanm | 92:4fc01daae5a5 | 204 | |
bogdanm | 92:4fc01daae5a5 | 205 | uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer. */ |
bogdanm | 92:4fc01daae5a5 | 206 | |
bogdanm | 92:4fc01daae5a5 | 207 | uint8_t toggle_in; /*!< IN transfer current toggle flag. |
bogdanm | 92:4fc01daae5a5 | 208 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
bogdanm | 92:4fc01daae5a5 | 209 | |
bogdanm | 92:4fc01daae5a5 | 210 | uint8_t toggle_out; /*!< OUT transfer current toggle flag |
bogdanm | 92:4fc01daae5a5 | 211 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
bogdanm | 92:4fc01daae5a5 | 212 | |
bogdanm | 92:4fc01daae5a5 | 213 | uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */ |
bogdanm | 92:4fc01daae5a5 | 214 | |
bogdanm | 92:4fc01daae5a5 | 215 | uint32_t ErrCnt; /*!< Host channel error count.*/ |
bogdanm | 92:4fc01daae5a5 | 216 | |
bogdanm | 92:4fc01daae5a5 | 217 | USB_OTG_URBStateTypeDef urb_state; /*!< URB state. |
bogdanm | 92:4fc01daae5a5 | 218 | This parameter can be any value of @ref USB_OTG_URBStateTypeDef */ |
bogdanm | 92:4fc01daae5a5 | 219 | |
bogdanm | 92:4fc01daae5a5 | 220 | USB_OTG_HCStateTypeDef state; /*!< Host Channel state. |
bogdanm | 92:4fc01daae5a5 | 221 | This parameter can be any value of @ref USB_OTG_HCStateTypeDef */ |
bogdanm | 92:4fc01daae5a5 | 222 | |
bogdanm | 92:4fc01daae5a5 | 223 | }USB_OTG_HCTypeDef; |
bogdanm | 92:4fc01daae5a5 | 224 | |
bogdanm | 92:4fc01daae5a5 | 225 | /* Exported constants --------------------------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 226 | |
bogdanm | 92:4fc01daae5a5 | 227 | /** @defgroup PCD_Exported_Constants |
bogdanm | 92:4fc01daae5a5 | 228 | * @{ |
bogdanm | 92:4fc01daae5a5 | 229 | */ |
bogdanm | 92:4fc01daae5a5 | 230 | |
bogdanm | 92:4fc01daae5a5 | 231 | /** @defgroup USB_Core_Mode_ |
bogdanm | 92:4fc01daae5a5 | 232 | * @{ |
bogdanm | 92:4fc01daae5a5 | 233 | */ |
bogdanm | 92:4fc01daae5a5 | 234 | #define USB_OTG_MODE_DEVICE 0 |
bogdanm | 92:4fc01daae5a5 | 235 | #define USB_OTG_MODE_HOST 1 |
bogdanm | 92:4fc01daae5a5 | 236 | #define USB_OTG_MODE_DRD 2 |
bogdanm | 92:4fc01daae5a5 | 237 | /** |
bogdanm | 92:4fc01daae5a5 | 238 | * @} |
bogdanm | 92:4fc01daae5a5 | 239 | */ |
bogdanm | 92:4fc01daae5a5 | 240 | |
bogdanm | 92:4fc01daae5a5 | 241 | /** @defgroup USB_Core_Speed_ |
bogdanm | 92:4fc01daae5a5 | 242 | * @{ |
bogdanm | 92:4fc01daae5a5 | 243 | */ |
bogdanm | 92:4fc01daae5a5 | 244 | #define USB_OTG_SPEED_HIGH 0 |
bogdanm | 92:4fc01daae5a5 | 245 | #define USB_OTG_SPEED_HIGH_IN_FULL 1 |
bogdanm | 92:4fc01daae5a5 | 246 | #define USB_OTG_SPEED_LOW 2 |
bogdanm | 92:4fc01daae5a5 | 247 | #define USB_OTG_SPEED_FULL 3 |
bogdanm | 92:4fc01daae5a5 | 248 | /** |
bogdanm | 92:4fc01daae5a5 | 249 | * @} |
bogdanm | 92:4fc01daae5a5 | 250 | */ |
bogdanm | 92:4fc01daae5a5 | 251 | |
bogdanm | 92:4fc01daae5a5 | 252 | /** @defgroup USB_Core_PHY_ |
bogdanm | 92:4fc01daae5a5 | 253 | * @{ |
bogdanm | 92:4fc01daae5a5 | 254 | */ |
bogdanm | 92:4fc01daae5a5 | 255 | #define USB_OTG_ULPI_PHY 1 |
bogdanm | 92:4fc01daae5a5 | 256 | #define USB_OTG_EMBEDDED_PHY 2 |
bogdanm | 92:4fc01daae5a5 | 257 | /** |
bogdanm | 92:4fc01daae5a5 | 258 | * @} |
bogdanm | 92:4fc01daae5a5 | 259 | */ |
bogdanm | 92:4fc01daae5a5 | 260 | |
bogdanm | 92:4fc01daae5a5 | 261 | /** @defgroup USB_Core_MPS_ |
bogdanm | 92:4fc01daae5a5 | 262 | * @{ |
bogdanm | 92:4fc01daae5a5 | 263 | */ |
bogdanm | 92:4fc01daae5a5 | 264 | #define USB_OTG_HS_MAX_PACKET_SIZE 512 |
bogdanm | 92:4fc01daae5a5 | 265 | #define USB_OTG_FS_MAX_PACKET_SIZE 64 |
bogdanm | 92:4fc01daae5a5 | 266 | #define USB_OTG_MAX_EP0_SIZE 64 |
bogdanm | 92:4fc01daae5a5 | 267 | /** |
bogdanm | 92:4fc01daae5a5 | 268 | * @} |
bogdanm | 92:4fc01daae5a5 | 269 | */ |
bogdanm | 92:4fc01daae5a5 | 270 | |
bogdanm | 92:4fc01daae5a5 | 271 | /** @defgroup USB_Core_Phy_Frequency_ |
bogdanm | 92:4fc01daae5a5 | 272 | * @{ |
bogdanm | 92:4fc01daae5a5 | 273 | */ |
bogdanm | 92:4fc01daae5a5 | 274 | #define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0 << 1) |
bogdanm | 92:4fc01daae5a5 | 275 | #define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1 << 1) |
bogdanm | 92:4fc01daae5a5 | 276 | #define DSTS_ENUMSPD_LS_PHY_6MHZ (2 << 1) |
bogdanm | 92:4fc01daae5a5 | 277 | #define DSTS_ENUMSPD_FS_PHY_48MHZ (3 << 1) |
bogdanm | 92:4fc01daae5a5 | 278 | /** |
bogdanm | 92:4fc01daae5a5 | 279 | * @} |
bogdanm | 92:4fc01daae5a5 | 280 | */ |
bogdanm | 92:4fc01daae5a5 | 281 | |
bogdanm | 92:4fc01daae5a5 | 282 | /** @defgroup USB_CORE_Frame_Interval_ |
bogdanm | 92:4fc01daae5a5 | 283 | * @{ |
bogdanm | 92:4fc01daae5a5 | 284 | */ |
bogdanm | 92:4fc01daae5a5 | 285 | #define DCFG_FRAME_INTERVAL_80 0 |
bogdanm | 92:4fc01daae5a5 | 286 | #define DCFG_FRAME_INTERVAL_85 1 |
bogdanm | 92:4fc01daae5a5 | 287 | #define DCFG_FRAME_INTERVAL_90 2 |
bogdanm | 92:4fc01daae5a5 | 288 | #define DCFG_FRAME_INTERVAL_95 3 |
bogdanm | 92:4fc01daae5a5 | 289 | /** |
bogdanm | 92:4fc01daae5a5 | 290 | * @} |
bogdanm | 92:4fc01daae5a5 | 291 | */ |
bogdanm | 92:4fc01daae5a5 | 292 | |
bogdanm | 92:4fc01daae5a5 | 293 | /** @defgroup USB_EP0_MPS_ |
bogdanm | 92:4fc01daae5a5 | 294 | * @{ |
bogdanm | 92:4fc01daae5a5 | 295 | */ |
bogdanm | 92:4fc01daae5a5 | 296 | #define DEP0CTL_MPS_64 0 |
bogdanm | 92:4fc01daae5a5 | 297 | #define DEP0CTL_MPS_32 1 |
bogdanm | 92:4fc01daae5a5 | 298 | #define DEP0CTL_MPS_16 2 |
bogdanm | 92:4fc01daae5a5 | 299 | #define DEP0CTL_MPS_8 3 |
bogdanm | 92:4fc01daae5a5 | 300 | /** |
bogdanm | 92:4fc01daae5a5 | 301 | * @} |
bogdanm | 92:4fc01daae5a5 | 302 | */ |
bogdanm | 92:4fc01daae5a5 | 303 | |
bogdanm | 92:4fc01daae5a5 | 304 | /** @defgroup USB_EP_Speed_ |
bogdanm | 92:4fc01daae5a5 | 305 | * @{ |
bogdanm | 92:4fc01daae5a5 | 306 | */ |
bogdanm | 92:4fc01daae5a5 | 307 | #define EP_SPEED_LOW 0 |
bogdanm | 92:4fc01daae5a5 | 308 | #define EP_SPEED_FULL 1 |
bogdanm | 92:4fc01daae5a5 | 309 | #define EP_SPEED_HIGH 2 |
bogdanm | 92:4fc01daae5a5 | 310 | /** |
bogdanm | 92:4fc01daae5a5 | 311 | * @} |
bogdanm | 92:4fc01daae5a5 | 312 | */ |
bogdanm | 92:4fc01daae5a5 | 313 | |
bogdanm | 92:4fc01daae5a5 | 314 | /** @defgroup USB_EP_Type_ |
bogdanm | 92:4fc01daae5a5 | 315 | * @{ |
bogdanm | 92:4fc01daae5a5 | 316 | */ |
bogdanm | 92:4fc01daae5a5 | 317 | #define EP_TYPE_CTRL 0 |
bogdanm | 92:4fc01daae5a5 | 318 | #define EP_TYPE_ISOC 1 |
bogdanm | 92:4fc01daae5a5 | 319 | #define EP_TYPE_BULK 2 |
bogdanm | 92:4fc01daae5a5 | 320 | #define EP_TYPE_INTR 3 |
bogdanm | 92:4fc01daae5a5 | 321 | #define EP_TYPE_MSK 3 |
bogdanm | 92:4fc01daae5a5 | 322 | /** |
bogdanm | 92:4fc01daae5a5 | 323 | * @} |
bogdanm | 92:4fc01daae5a5 | 324 | */ |
bogdanm | 92:4fc01daae5a5 | 325 | |
bogdanm | 92:4fc01daae5a5 | 326 | /** @defgroup USB_STS_Defines_ |
bogdanm | 92:4fc01daae5a5 | 327 | * @{ |
bogdanm | 92:4fc01daae5a5 | 328 | */ |
bogdanm | 92:4fc01daae5a5 | 329 | #define STS_GOUT_NAK 1 |
bogdanm | 92:4fc01daae5a5 | 330 | #define STS_DATA_UPDT 2 |
bogdanm | 92:4fc01daae5a5 | 331 | #define STS_XFER_COMP 3 |
bogdanm | 92:4fc01daae5a5 | 332 | #define STS_SETUP_COMP 4 |
bogdanm | 92:4fc01daae5a5 | 333 | #define STS_SETUP_UPDT 6 |
bogdanm | 92:4fc01daae5a5 | 334 | /** |
bogdanm | 92:4fc01daae5a5 | 335 | * @} |
bogdanm | 92:4fc01daae5a5 | 336 | */ |
bogdanm | 92:4fc01daae5a5 | 337 | |
bogdanm | 92:4fc01daae5a5 | 338 | /** @defgroup HCFG_SPEED_Defines_ |
bogdanm | 92:4fc01daae5a5 | 339 | * @{ |
bogdanm | 92:4fc01daae5a5 | 340 | */ |
bogdanm | 92:4fc01daae5a5 | 341 | #define HCFG_30_60_MHZ 0 |
bogdanm | 92:4fc01daae5a5 | 342 | #define HCFG_48_MHZ 1 |
bogdanm | 92:4fc01daae5a5 | 343 | #define HCFG_6_MHZ 2 |
bogdanm | 92:4fc01daae5a5 | 344 | /** |
bogdanm | 92:4fc01daae5a5 | 345 | * @} |
bogdanm | 92:4fc01daae5a5 | 346 | */ |
bogdanm | 92:4fc01daae5a5 | 347 | |
bogdanm | 92:4fc01daae5a5 | 348 | /** @defgroup HPRT0_PRTSPD_SPEED_Defines_ |
bogdanm | 92:4fc01daae5a5 | 349 | * @{ |
bogdanm | 92:4fc01daae5a5 | 350 | */ |
bogdanm | 92:4fc01daae5a5 | 351 | #define HPRT0_PRTSPD_HIGH_SPEED 0 |
bogdanm | 92:4fc01daae5a5 | 352 | #define HPRT0_PRTSPD_FULL_SPEED 1 |
bogdanm | 92:4fc01daae5a5 | 353 | #define HPRT0_PRTSPD_LOW_SPEED 2 |
bogdanm | 92:4fc01daae5a5 | 354 | /** |
bogdanm | 92:4fc01daae5a5 | 355 | * @} |
bogdanm | 92:4fc01daae5a5 | 356 | */ |
bogdanm | 92:4fc01daae5a5 | 357 | |
bogdanm | 92:4fc01daae5a5 | 358 | #define HCCHAR_CTRL 0 |
bogdanm | 92:4fc01daae5a5 | 359 | #define HCCHAR_ISOC 1 |
bogdanm | 92:4fc01daae5a5 | 360 | #define HCCHAR_BULK 2 |
bogdanm | 92:4fc01daae5a5 | 361 | #define HCCHAR_INTR 3 |
bogdanm | 92:4fc01daae5a5 | 362 | |
bogdanm | 92:4fc01daae5a5 | 363 | #define HC_PID_DATA0 0 |
bogdanm | 92:4fc01daae5a5 | 364 | #define HC_PID_DATA2 1 |
bogdanm | 92:4fc01daae5a5 | 365 | #define HC_PID_DATA1 2 |
bogdanm | 92:4fc01daae5a5 | 366 | #define HC_PID_SETUP 3 |
bogdanm | 92:4fc01daae5a5 | 367 | |
bogdanm | 92:4fc01daae5a5 | 368 | #define GRXSTS_PKTSTS_IN 2 |
bogdanm | 92:4fc01daae5a5 | 369 | #define GRXSTS_PKTSTS_IN_XFER_COMP 3 |
bogdanm | 92:4fc01daae5a5 | 370 | #define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5 |
bogdanm | 92:4fc01daae5a5 | 371 | #define GRXSTS_PKTSTS_CH_HALTED 7 |
bogdanm | 92:4fc01daae5a5 | 372 | |
bogdanm | 92:4fc01daae5a5 | 373 | #define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_PCGCCTL_BASE) |
bogdanm | 92:4fc01daae5a5 | 374 | #define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_HOST_PORT_BASE) |
bogdanm | 92:4fc01daae5a5 | 375 | |
bogdanm | 92:4fc01daae5a5 | 376 | #define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)((uint32_t )USBx + USB_OTG_DEVICE_BASE)) |
bogdanm | 92:4fc01daae5a5 | 377 | #define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)((uint32_t)USBx + USB_OTG_IN_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE)) |
bogdanm | 92:4fc01daae5a5 | 378 | #define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)((uint32_t)USBx + USB_OTG_OUT_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE)) |
bogdanm | 92:4fc01daae5a5 | 379 | #define USBx_DFIFO(i) *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_FIFO_BASE + (i) * USB_OTG_FIFO_SIZE) |
bogdanm | 92:4fc01daae5a5 | 380 | |
bogdanm | 92:4fc01daae5a5 | 381 | #define USBx_HOST ((USB_OTG_HostTypeDef *)((uint32_t )USBx + USB_OTG_HOST_BASE)) |
bogdanm | 92:4fc01daae5a5 | 382 | #define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)((uint32_t)USBx + USB_OTG_HOST_CHANNEL_BASE + (i)*USB_OTG_HOST_CHANNEL_SIZE)) |
bogdanm | 92:4fc01daae5a5 | 383 | |
bogdanm | 92:4fc01daae5a5 | 384 | /* Exported macro ------------------------------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 385 | #define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__)) |
bogdanm | 92:4fc01daae5a5 | 386 | #define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__)) |
bogdanm | 92:4fc01daae5a5 | 387 | |
bogdanm | 92:4fc01daae5a5 | 388 | #define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__)) |
bogdanm | 92:4fc01daae5a5 | 389 | #define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__)) |
bogdanm | 92:4fc01daae5a5 | 390 | |
bogdanm | 92:4fc01daae5a5 | 391 | /* Exported functions --------------------------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 392 | HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init); |
bogdanm | 92:4fc01daae5a5 | 393 | HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init); |
bogdanm | 92:4fc01daae5a5 | 394 | HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx); |
bogdanm | 92:4fc01daae5a5 | 395 | HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx); |
bogdanm | 92:4fc01daae5a5 | 396 | HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_OTG_ModeTypeDef mode); |
bogdanm | 92:4fc01daae5a5 | 397 | HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed); |
bogdanm | 92:4fc01daae5a5 | 398 | HAL_StatusTypeDef USB_FlushRxFifo (USB_OTG_GlobalTypeDef *USBx); |
bogdanm | 92:4fc01daae5a5 | 399 | HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num ); |
bogdanm | 92:4fc01daae5a5 | 400 | HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); |
bogdanm | 92:4fc01daae5a5 | 401 | HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); |
bogdanm | 92:4fc01daae5a5 | 402 | HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); |
bogdanm | 92:4fc01daae5a5 | 403 | HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); |
bogdanm | 92:4fc01daae5a5 | 404 | HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); |
bogdanm | 92:4fc01daae5a5 | 405 | HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); |
bogdanm | 92:4fc01daae5a5 | 406 | HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); |
bogdanm | 92:4fc01daae5a5 | 407 | void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); |
bogdanm | 92:4fc01daae5a5 | 408 | HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); |
bogdanm | 92:4fc01daae5a5 | 409 | HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); |
bogdanm | 92:4fc01daae5a5 | 410 | HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address); |
bogdanm | 92:4fc01daae5a5 | 411 | HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx); |
bogdanm | 92:4fc01daae5a5 | 412 | HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx); |
bogdanm | 92:4fc01daae5a5 | 413 | HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx); |
bogdanm | 92:4fc01daae5a5 | 414 | HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx); |
bogdanm | 92:4fc01daae5a5 | 415 | HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup); |
bogdanm | 92:4fc01daae5a5 | 416 | uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx); |
bogdanm | 92:4fc01daae5a5 | 417 | uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx); |
bogdanm | 92:4fc01daae5a5 | 418 | uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx); |
bogdanm | 92:4fc01daae5a5 | 419 | uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx); |
bogdanm | 92:4fc01daae5a5 | 420 | uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum); |
bogdanm | 92:4fc01daae5a5 | 421 | uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx); |
bogdanm | 92:4fc01daae5a5 | 422 | uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum); |
bogdanm | 92:4fc01daae5a5 | 423 | void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt); |
bogdanm | 92:4fc01daae5a5 | 424 | |
bogdanm | 92:4fc01daae5a5 | 425 | HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg); |
bogdanm | 92:4fc01daae5a5 | 426 | HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq); |
bogdanm | 92:4fc01daae5a5 | 427 | HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx); |
bogdanm | 92:4fc01daae5a5 | 428 | HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state); |
bogdanm | 92:4fc01daae5a5 | 429 | uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx); |
bogdanm | 92:4fc01daae5a5 | 430 | uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx); |
bogdanm | 92:4fc01daae5a5 | 431 | HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, |
bogdanm | 92:4fc01daae5a5 | 432 | uint8_t ch_num, |
bogdanm | 92:4fc01daae5a5 | 433 | uint8_t epnum, |
bogdanm | 92:4fc01daae5a5 | 434 | uint8_t dev_address, |
bogdanm | 92:4fc01daae5a5 | 435 | uint8_t speed, |
bogdanm | 92:4fc01daae5a5 | 436 | uint8_t ep_type, |
bogdanm | 92:4fc01daae5a5 | 437 | uint16_t mps); |
bogdanm | 92:4fc01daae5a5 | 438 | HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma); |
bogdanm | 92:4fc01daae5a5 | 439 | uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx); |
bogdanm | 92:4fc01daae5a5 | 440 | HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num); |
bogdanm | 92:4fc01daae5a5 | 441 | HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num); |
bogdanm | 92:4fc01daae5a5 | 442 | HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx); |
bogdanm | 92:4fc01daae5a5 | 443 | |
bogdanm | 92:4fc01daae5a5 | 444 | /** |
bogdanm | 92:4fc01daae5a5 | 445 | * @} |
bogdanm | 92:4fc01daae5a5 | 446 | */ |
bogdanm | 92:4fc01daae5a5 | 447 | |
bogdanm | 92:4fc01daae5a5 | 448 | /** |
bogdanm | 92:4fc01daae5a5 | 449 | * @} |
bogdanm | 92:4fc01daae5a5 | 450 | */ |
bogdanm | 92:4fc01daae5a5 | 451 | |
bogdanm | 92:4fc01daae5a5 | 452 | #ifdef __cplusplus |
bogdanm | 92:4fc01daae5a5 | 453 | } |
bogdanm | 92:4fc01daae5a5 | 454 | #endif |
bogdanm | 92:4fc01daae5a5 | 455 | |
bogdanm | 92:4fc01daae5a5 | 456 | |
bogdanm | 92:4fc01daae5a5 | 457 | #endif /* __STM32F4xx_LL_USB_H */ |
bogdanm | 92:4fc01daae5a5 | 458 | |
bogdanm | 92:4fc01daae5a5 | 459 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |