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TARGET_DISCO_F746NG/stm32f7xx_ll_fmc.h@107:4f6c30876dfa, 2015-09-16 (annotated)

Committer:
Kojto
Date:
Wed Sep 16 15:32:31 2015 +0100
Revision:
107:4f6c30876dfa
Child:
116:c0f6e94411f5
Release 107  of the mbed library



Changes:

- new platforms - DISCO_F746NG, DISCO_L476VG, NUCLEO_L476RG

- KL43Z - bugfix RTC init function

- K20 - SPI mode fix

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 107:4f6c30876dfa 1 /**
Kojto 107:4f6c30876dfa 2 ******************************************************************************
Kojto 107:4f6c30876dfa 3 * @file stm32f7xx_ll_fmc.h
Kojto 107:4f6c30876dfa 4 * @author MCD Application Team
Kojto 107:4f6c30876dfa 5 * @version V1.0.1
Kojto 107:4f6c30876dfa 6 * @date 25-June-2015
Kojto 107:4f6c30876dfa 7 * @brief Header file of FMC HAL module.
Kojto 107:4f6c30876dfa 8 ******************************************************************************
Kojto 107:4f6c30876dfa 9 * @attention
Kojto 107:4f6c30876dfa 10 *
Kojto 107:4f6c30876dfa 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 107:4f6c30876dfa 12 *
Kojto 107:4f6c30876dfa 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 107:4f6c30876dfa 14 * are permitted provided that the following conditions are met:
Kojto 107:4f6c30876dfa 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 107:4f6c30876dfa 16 * this list of conditions and the following disclaimer.
Kojto 107:4f6c30876dfa 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 107:4f6c30876dfa 18 * this list of conditions and the following disclaimer in the documentation
Kojto 107:4f6c30876dfa 19 * and/or other materials provided with the distribution.
Kojto 107:4f6c30876dfa 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 107:4f6c30876dfa 21 * may be used to endorse or promote products derived from this software
Kojto 107:4f6c30876dfa 22 * without specific prior written permission.
Kojto 107:4f6c30876dfa 23 *
Kojto 107:4f6c30876dfa 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 107:4f6c30876dfa 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 107:4f6c30876dfa 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 107:4f6c30876dfa 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 107:4f6c30876dfa 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 107:4f6c30876dfa 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 107:4f6c30876dfa 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 107:4f6c30876dfa 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 107:4f6c30876dfa 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 107:4f6c30876dfa 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 107:4f6c30876dfa 34 *
Kojto 107:4f6c30876dfa 35 ******************************************************************************
Kojto 107:4f6c30876dfa 36 */
Kojto 107:4f6c30876dfa 37
Kojto 107:4f6c30876dfa 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 107:4f6c30876dfa 39 #ifndef __STM32F7xx_LL_FMC_H
Kojto 107:4f6c30876dfa 40 #define __STM32F7xx_LL_FMC_H
Kojto 107:4f6c30876dfa 41
Kojto 107:4f6c30876dfa 42 #ifdef __cplusplus
Kojto 107:4f6c30876dfa 43 extern "C" {
Kojto 107:4f6c30876dfa 44 #endif
Kojto 107:4f6c30876dfa 45
Kojto 107:4f6c30876dfa 46 /* Includes ------------------------------------------------------------------*/
Kojto 107:4f6c30876dfa 47 #include "stm32f7xx_hal_def.h"
Kojto 107:4f6c30876dfa 48
Kojto 107:4f6c30876dfa 49 /** @addtogroup STM32F7xx_HAL_Driver
Kojto 107:4f6c30876dfa 50 * @{
Kojto 107:4f6c30876dfa 51 */
Kojto 107:4f6c30876dfa 52
Kojto 107:4f6c30876dfa 53 /** @addtogroup FMC_LL
Kojto 107:4f6c30876dfa 54 * @{
Kojto 107:4f6c30876dfa 55 */
Kojto 107:4f6c30876dfa 56
Kojto 107:4f6c30876dfa 57 /** @addtogroup FMC_LL_Private_Macros
Kojto 107:4f6c30876dfa 58 * @{
Kojto 107:4f6c30876dfa 59 */
Kojto 107:4f6c30876dfa 60 #define IS_FMC_NORSRAM_BANK(BANK) (((BANK) == FMC_NORSRAM_BANK1) || \
Kojto 107:4f6c30876dfa 61 ((BANK) == FMC_NORSRAM_BANK2) || \
Kojto 107:4f6c30876dfa 62 ((BANK) == FMC_NORSRAM_BANK3) || \
Kojto 107:4f6c30876dfa 63 ((BANK) == FMC_NORSRAM_BANK4))
Kojto 107:4f6c30876dfa 64
Kojto 107:4f6c30876dfa 65 #define IS_FMC_MUX(__MUX__) (((__MUX__) == FMC_DATA_ADDRESS_MUX_DISABLE) || \
Kojto 107:4f6c30876dfa 66 ((__MUX__) == FMC_DATA_ADDRESS_MUX_ENABLE))
Kojto 107:4f6c30876dfa 67
Kojto 107:4f6c30876dfa 68 #define IS_FMC_MEMORY(__MEMORY__) (((__MEMORY__) == FMC_MEMORY_TYPE_SRAM) || \
Kojto 107:4f6c30876dfa 69 ((__MEMORY__) == FMC_MEMORY_TYPE_PSRAM)|| \
Kojto 107:4f6c30876dfa 70 ((__MEMORY__) == FMC_MEMORY_TYPE_NOR))
Kojto 107:4f6c30876dfa 71
Kojto 107:4f6c30876dfa 72 #define IS_FMC_NORSRAM_MEMORY_WIDTH(__WIDTH__) (((__WIDTH__) == FMC_NORSRAM_MEM_BUS_WIDTH_8) || \
Kojto 107:4f6c30876dfa 73 ((__WIDTH__) == FMC_NORSRAM_MEM_BUS_WIDTH_16) || \
Kojto 107:4f6c30876dfa 74 ((__WIDTH__) == FMC_NORSRAM_MEM_BUS_WIDTH_32))
Kojto 107:4f6c30876dfa 75
Kojto 107:4f6c30876dfa 76 #define IS_FMC_ACCESS_MODE(__MODE__) (((__MODE__) == FMC_ACCESS_MODE_A) || \
Kojto 107:4f6c30876dfa 77 ((__MODE__) == FMC_ACCESS_MODE_B) || \
Kojto 107:4f6c30876dfa 78 ((__MODE__) == FMC_ACCESS_MODE_C) || \
Kojto 107:4f6c30876dfa 79 ((__MODE__) == FMC_ACCESS_MODE_D))
Kojto 107:4f6c30876dfa 80
Kojto 107:4f6c30876dfa 81 #define IS_FMC_NAND_BANK(BANK) ((BANK) == FMC_NAND_BANK3)
Kojto 107:4f6c30876dfa 82
Kojto 107:4f6c30876dfa 83 #define IS_FMC_WAIT_FEATURE(FEATURE) (((FEATURE) == FMC_NAND_WAIT_FEATURE_DISABLE) || \
Kojto 107:4f6c30876dfa 84 ((FEATURE) == FMC_NAND_WAIT_FEATURE_ENABLE))
Kojto 107:4f6c30876dfa 85
Kojto 107:4f6c30876dfa 86 #define IS_FMC_NAND_MEMORY_WIDTH(WIDTH) (((WIDTH) == FMC_NAND_MEM_BUS_WIDTH_8) || \
Kojto 107:4f6c30876dfa 87 ((WIDTH) == FMC_NAND_MEM_BUS_WIDTH_16))
Kojto 107:4f6c30876dfa 88
Kojto 107:4f6c30876dfa 89 #define IS_FMC_ECC_STATE(STATE) (((STATE) == FMC_NAND_ECC_DISABLE) || \
Kojto 107:4f6c30876dfa 90 ((STATE) == FMC_NAND_ECC_ENABLE))
Kojto 107:4f6c30876dfa 91
Kojto 107:4f6c30876dfa 92 #define IS_FMC_ECCPAGE_SIZE(SIZE) (((SIZE) == FMC_NAND_ECC_PAGE_SIZE_256BYTE) || \
Kojto 107:4f6c30876dfa 93 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_512BYTE) || \
Kojto 107:4f6c30876dfa 94 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_1024BYTE) || \
Kojto 107:4f6c30876dfa 95 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_2048BYTE) || \
Kojto 107:4f6c30876dfa 96 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_4096BYTE) || \
Kojto 107:4f6c30876dfa 97 ((SIZE) == FMC_NAND_ECC_PAGE_SIZE_8192BYTE))
Kojto 107:4f6c30876dfa 98
Kojto 107:4f6c30876dfa 99 #define IS_FMC_SDMEMORY_WIDTH(WIDTH) (((WIDTH) == FMC_SDRAM_MEM_BUS_WIDTH_8) || \
Kojto 107:4f6c30876dfa 100 ((WIDTH) == FMC_SDRAM_MEM_BUS_WIDTH_16) || \
Kojto 107:4f6c30876dfa 101 ((WIDTH) == FMC_SDRAM_MEM_BUS_WIDTH_32))
Kojto 107:4f6c30876dfa 102
Kojto 107:4f6c30876dfa 103 #define IS_FMC_WRITE_PROTECTION(__WRITE__) (((__WRITE__) == FMC_SDRAM_WRITE_PROTECTION_DISABLE) || \
Kojto 107:4f6c30876dfa 104 ((__WRITE__) == FMC_SDRAM_WRITE_PROTECTION_ENABLE))
Kojto 107:4f6c30876dfa 105
Kojto 107:4f6c30876dfa 106 #define IS_FMC_SDCLOCK_PERIOD(__PERIOD__) (((__PERIOD__) == FMC_SDRAM_CLOCK_DISABLE) || \
Kojto 107:4f6c30876dfa 107 ((__PERIOD__) == FMC_SDRAM_CLOCK_PERIOD_2) || \
Kojto 107:4f6c30876dfa 108 ((__PERIOD__) == FMC_SDRAM_CLOCK_PERIOD_3))
Kojto 107:4f6c30876dfa 109
Kojto 107:4f6c30876dfa 110 #define IS_FMC_READ_BURST(__RBURST__) (((__RBURST__) == FMC_SDRAM_RBURST_DISABLE) || \
Kojto 107:4f6c30876dfa 111 ((__RBURST__) == FMC_SDRAM_RBURST_ENABLE))
Kojto 107:4f6c30876dfa 112
Kojto 107:4f6c30876dfa 113 #define IS_FMC_READPIPE_DELAY(__DELAY__) (((__DELAY__) == FMC_SDRAM_RPIPE_DELAY_0) || \
Kojto 107:4f6c30876dfa 114 ((__DELAY__) == FMC_SDRAM_RPIPE_DELAY_1) || \
Kojto 107:4f6c30876dfa 115 ((__DELAY__) == FMC_SDRAM_RPIPE_DELAY_2))
Kojto 107:4f6c30876dfa 116
Kojto 107:4f6c30876dfa 117 #define IS_FMC_COMMAND_MODE(__COMMAND__) (((__COMMAND__) == FMC_SDRAM_CMD_NORMAL_MODE) || \
Kojto 107:4f6c30876dfa 118 ((__COMMAND__) == FMC_SDRAM_CMD_CLK_ENABLE) || \
Kojto 107:4f6c30876dfa 119 ((__COMMAND__) == FMC_SDRAM_CMD_PALL) || \
Kojto 107:4f6c30876dfa 120 ((__COMMAND__) == FMC_SDRAM_CMD_AUTOREFRESH_MODE) || \
Kojto 107:4f6c30876dfa 121 ((__COMMAND__) == FMC_SDRAM_CMD_LOAD_MODE) || \
Kojto 107:4f6c30876dfa 122 ((__COMMAND__) == FMC_SDRAM_CMD_SELFREFRESH_MODE) || \
Kojto 107:4f6c30876dfa 123 ((__COMMAND__) == FMC_SDRAM_CMD_POWERDOWN_MODE))
Kojto 107:4f6c30876dfa 124
Kojto 107:4f6c30876dfa 125 #define IS_FMC_COMMAND_TARGET(__TARGET__) (((__TARGET__) == FMC_SDRAM_CMD_TARGET_BANK1) || \
Kojto 107:4f6c30876dfa 126 ((__TARGET__) == FMC_SDRAM_CMD_TARGET_BANK2) || \
Kojto 107:4f6c30876dfa 127 ((__TARGET__) == FMC_SDRAM_CMD_TARGET_BANK1_2))
Kojto 107:4f6c30876dfa 128
Kojto 107:4f6c30876dfa 129 /** @defgroup FMC_TCLR_Setup_Time FMC TCLR Setup Time
Kojto 107:4f6c30876dfa 130 * @{
Kojto 107:4f6c30876dfa 131 */
Kojto 107:4f6c30876dfa 132 #define IS_FMC_TCLR_TIME(__TIME__) ((__TIME__) <= 255)
Kojto 107:4f6c30876dfa 133 /**
Kojto 107:4f6c30876dfa 134 * @}
Kojto 107:4f6c30876dfa 135 */
Kojto 107:4f6c30876dfa 136
Kojto 107:4f6c30876dfa 137 /** @defgroup FMC_TAR_Setup_Time FMC TAR Setup Time
Kojto 107:4f6c30876dfa 138 * @{
Kojto 107:4f6c30876dfa 139 */
Kojto 107:4f6c30876dfa 140 #define IS_FMC_TAR_TIME(TIME) ((TIME) <= 255)
Kojto 107:4f6c30876dfa 141 /**
Kojto 107:4f6c30876dfa 142 * @}
Kojto 107:4f6c30876dfa 143 */
Kojto 107:4f6c30876dfa 144
Kojto 107:4f6c30876dfa 145 /** @defgroup FMC_Setup_Time FMC Setup Time
Kojto 107:4f6c30876dfa 146 * @{
Kojto 107:4f6c30876dfa 147 */
Kojto 107:4f6c30876dfa 148 #define IS_FMC_SETUP_TIME(TIME) ((TIME) <= 254)
Kojto 107:4f6c30876dfa 149 /**
Kojto 107:4f6c30876dfa 150 * @}
Kojto 107:4f6c30876dfa 151 */
Kojto 107:4f6c30876dfa 152
Kojto 107:4f6c30876dfa 153 /** @defgroup FMC_Wait_Setup_Time FMC Wait Setup Time
Kojto 107:4f6c30876dfa 154 * @{
Kojto 107:4f6c30876dfa 155 */
Kojto 107:4f6c30876dfa 156 #define IS_FMC_WAIT_TIME(TIME) ((TIME) <= 254)
Kojto 107:4f6c30876dfa 157 /**
Kojto 107:4f6c30876dfa 158 * @}
Kojto 107:4f6c30876dfa 159 */
Kojto 107:4f6c30876dfa 160
Kojto 107:4f6c30876dfa 161 /** @defgroup FMC_Hold_Setup_Time FMC Hold Setup Time
Kojto 107:4f6c30876dfa 162 * @{
Kojto 107:4f6c30876dfa 163 */
Kojto 107:4f6c30876dfa 164 #define IS_FMC_HOLD_TIME(TIME) ((TIME) <= 254)
Kojto 107:4f6c30876dfa 165 /**
Kojto 107:4f6c30876dfa 166 * @}
Kojto 107:4f6c30876dfa 167 */
Kojto 107:4f6c30876dfa 168
Kojto 107:4f6c30876dfa 169 /** @defgroup FMC_HiZ_Setup_Time FMC HiZ Setup Time
Kojto 107:4f6c30876dfa 170 * @{
Kojto 107:4f6c30876dfa 171 */
Kojto 107:4f6c30876dfa 172 #define IS_FMC_HIZ_TIME(TIME) ((TIME) <= 254)
Kojto 107:4f6c30876dfa 173 /**
Kojto 107:4f6c30876dfa 174 * @}
Kojto 107:4f6c30876dfa 175 */
Kojto 107:4f6c30876dfa 176
Kojto 107:4f6c30876dfa 177 #define IS_FMC_BURSTMODE(__STATE__) (((__STATE__) == FMC_BURST_ACCESS_MODE_DISABLE) || \
Kojto 107:4f6c30876dfa 178 ((__STATE__) == FMC_BURST_ACCESS_MODE_ENABLE))
Kojto 107:4f6c30876dfa 179
Kojto 107:4f6c30876dfa 180 #define IS_FMC_WAIT_POLARITY(__POLARITY__) (((__POLARITY__) == FMC_WAIT_SIGNAL_POLARITY_LOW) || \
Kojto 107:4f6c30876dfa 181 ((__POLARITY__) == FMC_WAIT_SIGNAL_POLARITY_HIGH))
Kojto 107:4f6c30876dfa 182
Kojto 107:4f6c30876dfa 183 #define IS_FMC_WAIT_SIGNAL_ACTIVE(__ACTIVE__) (((__ACTIVE__) == FMC_WAIT_TIMING_BEFORE_WS) || \
Kojto 107:4f6c30876dfa 184 ((__ACTIVE__) == FMC_WAIT_TIMING_DURING_WS))
Kojto 107:4f6c30876dfa 185
Kojto 107:4f6c30876dfa 186 #define IS_FMC_WRITE_OPERATION(__OPERATION__) (((__OPERATION__) == FMC_WRITE_OPERATION_DISABLE) || \
Kojto 107:4f6c30876dfa 187 ((__OPERATION__) == FMC_WRITE_OPERATION_ENABLE))
Kojto 107:4f6c30876dfa 188
Kojto 107:4f6c30876dfa 189 #define IS_FMC_WAITE_SIGNAL(__SIGNAL__) (((__SIGNAL__) == FMC_WAIT_SIGNAL_DISABLE) || \
Kojto 107:4f6c30876dfa 190 ((__SIGNAL__) == FMC_WAIT_SIGNAL_ENABLE))
Kojto 107:4f6c30876dfa 191
Kojto 107:4f6c30876dfa 192 #define IS_FMC_EXTENDED_MODE(__MODE__) (((__MODE__) == FMC_EXTENDED_MODE_DISABLE) || \
Kojto 107:4f6c30876dfa 193 ((__MODE__) == FMC_EXTENDED_MODE_ENABLE))
Kojto 107:4f6c30876dfa 194
Kojto 107:4f6c30876dfa 195 #define IS_FMC_ASYNWAIT(__STATE__) (((__STATE__) == FMC_ASYNCHRONOUS_WAIT_DISABLE) || \
Kojto 107:4f6c30876dfa 196 ((__STATE__) == FMC_ASYNCHRONOUS_WAIT_ENABLE))
Kojto 107:4f6c30876dfa 197
Kojto 107:4f6c30876dfa 198 /** @defgroup FMC_Data_Latency FMC Data Latency
Kojto 107:4f6c30876dfa 199 * @{
Kojto 107:4f6c30876dfa 200 */
Kojto 107:4f6c30876dfa 201 #define IS_FMC_DATA_LATENCY(__LATENCY__) (((__LATENCY__) > 1) && ((__LATENCY__) <= 17))
Kojto 107:4f6c30876dfa 202 /**
Kojto 107:4f6c30876dfa 203 * @}
Kojto 107:4f6c30876dfa 204 */
Kojto 107:4f6c30876dfa 205
Kojto 107:4f6c30876dfa 206 #define IS_FMC_WRITE_BURST(__BURST__) (((__BURST__) == FMC_WRITE_BURST_DISABLE) || \
Kojto 107:4f6c30876dfa 207 ((__BURST__) == FMC_WRITE_BURST_ENABLE))
Kojto 107:4f6c30876dfa 208
Kojto 107:4f6c30876dfa 209 #define IS_FMC_CONTINOUS_CLOCK(CCLOCK) (((CCLOCK) == FMC_CONTINUOUS_CLOCK_SYNC_ONLY) || \
Kojto 107:4f6c30876dfa 210 ((CCLOCK) == FMC_CONTINUOUS_CLOCK_SYNC_ASYNC))
Kojto 107:4f6c30876dfa 211
Kojto 107:4f6c30876dfa 212
Kojto 107:4f6c30876dfa 213 /** @defgroup FMC_Address_Setup_Time FMC Address Setup Time
Kojto 107:4f6c30876dfa 214 * @{
Kojto 107:4f6c30876dfa 215 */
Kojto 107:4f6c30876dfa 216 #define IS_FMC_ADDRESS_SETUP_TIME(__TIME__) ((__TIME__) <= 15)
Kojto 107:4f6c30876dfa 217 /**
Kojto 107:4f6c30876dfa 218 * @}
Kojto 107:4f6c30876dfa 219 */
Kojto 107:4f6c30876dfa 220
Kojto 107:4f6c30876dfa 221 /** @defgroup FMC_Address_Hold_Time FMC Address Hold Time
Kojto 107:4f6c30876dfa 222 * @{
Kojto 107:4f6c30876dfa 223 */
Kojto 107:4f6c30876dfa 224 #define IS_FMC_ADDRESS_HOLD_TIME(__TIME__) (((__TIME__) > 0) && ((__TIME__) <= 15))
Kojto 107:4f6c30876dfa 225 /**
Kojto 107:4f6c30876dfa 226 * @}
Kojto 107:4f6c30876dfa 227 */
Kojto 107:4f6c30876dfa 228
Kojto 107:4f6c30876dfa 229 /** @defgroup FMC_Data_Setup_Time FMC Data Setup Time
Kojto 107:4f6c30876dfa 230 * @{
Kojto 107:4f6c30876dfa 231 */
Kojto 107:4f6c30876dfa 232 #define IS_FMC_DATASETUP_TIME(__TIME__) (((__TIME__) > 0) && ((__TIME__) <= 255))
Kojto 107:4f6c30876dfa 233 /**
Kojto 107:4f6c30876dfa 234 * @}
Kojto 107:4f6c30876dfa 235 */
Kojto 107:4f6c30876dfa 236
Kojto 107:4f6c30876dfa 237 /** @defgroup FMC_Bus_Turn_around_Duration FMC Bus Turn around Duration
Kojto 107:4f6c30876dfa 238 * @{
Kojto 107:4f6c30876dfa 239 */
Kojto 107:4f6c30876dfa 240 #define IS_FMC_TURNAROUND_TIME(__TIME__) ((__TIME__) <= 15)
Kojto 107:4f6c30876dfa 241 /**
Kojto 107:4f6c30876dfa 242 * @}
Kojto 107:4f6c30876dfa 243 */
Kojto 107:4f6c30876dfa 244
Kojto 107:4f6c30876dfa 245 /** @defgroup FMC_CLK_Division FMC CLK Division
Kojto 107:4f6c30876dfa 246 * @{
Kojto 107:4f6c30876dfa 247 */
Kojto 107:4f6c30876dfa 248 #define IS_FMC_CLK_DIV(DIV) (((DIV) > 1) && ((DIV) <= 16))
Kojto 107:4f6c30876dfa 249 /**
Kojto 107:4f6c30876dfa 250 * @}
Kojto 107:4f6c30876dfa 251 */
Kojto 107:4f6c30876dfa 252
Kojto 107:4f6c30876dfa 253 /** @defgroup FMC_SDRAM_LoadToActive_Delay FMC SDRAM LoadToActive Delay
Kojto 107:4f6c30876dfa 254 * @{
Kojto 107:4f6c30876dfa 255 */
Kojto 107:4f6c30876dfa 256 #define IS_FMC_LOADTOACTIVE_DELAY(__DELAY__) (((__DELAY__) > 0) && ((__DELAY__) <= 16))
Kojto 107:4f6c30876dfa 257 /**
Kojto 107:4f6c30876dfa 258 * @}
Kojto 107:4f6c30876dfa 259 */
Kojto 107:4f6c30876dfa 260
Kojto 107:4f6c30876dfa 261 /** @defgroup FMC_SDRAM_ExitSelfRefresh_Delay FMC SDRAM ExitSelfRefresh Delay
Kojto 107:4f6c30876dfa 262 * @{
Kojto 107:4f6c30876dfa 263 */
Kojto 107:4f6c30876dfa 264 #define IS_FMC_EXITSELFREFRESH_DELAY(__DELAY__) (((__DELAY__) > 0) && ((__DELAY__) <= 16))
Kojto 107:4f6c30876dfa 265 /**
Kojto 107:4f6c30876dfa 266 * @}
Kojto 107:4f6c30876dfa 267 */
Kojto 107:4f6c30876dfa 268
Kojto 107:4f6c30876dfa 269 /** @defgroup FMC_SDRAM_SelfRefresh_Time FMC SDRAM SelfRefresh Time
Kojto 107:4f6c30876dfa 270 * @{
Kojto 107:4f6c30876dfa 271 */
Kojto 107:4f6c30876dfa 272 #define IS_FMC_SELFREFRESH_TIME(__TIME__) (((__TIME__) > 0) && ((__TIME__) <= 16))
Kojto 107:4f6c30876dfa 273 /**
Kojto 107:4f6c30876dfa 274 * @}
Kojto 107:4f6c30876dfa 275 */
Kojto 107:4f6c30876dfa 276
Kojto 107:4f6c30876dfa 277 /** @defgroup FMC_SDRAM_RowCycle_Delay FMC SDRAM RowCycle Delay
Kojto 107:4f6c30876dfa 278 * @{
Kojto 107:4f6c30876dfa 279 */
Kojto 107:4f6c30876dfa 280 #define IS_FMC_ROWCYCLE_DELAY(__DELAY__) (((__DELAY__) > 0) && ((__DELAY__) <= 16))
Kojto 107:4f6c30876dfa 281 /**
Kojto 107:4f6c30876dfa 282 * @}
Kojto 107:4f6c30876dfa 283 */
Kojto 107:4f6c30876dfa 284
Kojto 107:4f6c30876dfa 285 /** @defgroup FMC_SDRAM_Write_Recovery_Time FMC SDRAM Write Recovery Time
Kojto 107:4f6c30876dfa 286 * @{
Kojto 107:4f6c30876dfa 287 */
Kojto 107:4f6c30876dfa 288 #define IS_FMC_WRITE_RECOVERY_TIME(__TIME__) (((__TIME__) > 0) && ((__TIME__) <= 16))
Kojto 107:4f6c30876dfa 289 /**
Kojto 107:4f6c30876dfa 290 * @}
Kojto 107:4f6c30876dfa 291 */
Kojto 107:4f6c30876dfa 292
Kojto 107:4f6c30876dfa 293 /** @defgroup FMC_SDRAM_RP_Delay FMC SDRAM RP Delay
Kojto 107:4f6c30876dfa 294 * @{
Kojto 107:4f6c30876dfa 295 */
Kojto 107:4f6c30876dfa 296 #define IS_FMC_RP_DELAY(__DELAY__) (((__DELAY__) > 0) && ((__DELAY__) <= 16))
Kojto 107:4f6c30876dfa 297 /**
Kojto 107:4f6c30876dfa 298 * @}
Kojto 107:4f6c30876dfa 299 */
Kojto 107:4f6c30876dfa 300
Kojto 107:4f6c30876dfa 301 /** @defgroup FMC_SDRAM_RCD_Delay FMC SDRAM RCD Delay
Kojto 107:4f6c30876dfa 302 * @{
Kojto 107:4f6c30876dfa 303 */
Kojto 107:4f6c30876dfa 304 #define IS_FMC_RCD_DELAY(__DELAY__) (((__DELAY__) > 0) && ((__DELAY__) <= 16))
Kojto 107:4f6c30876dfa 305 /**
Kojto 107:4f6c30876dfa 306 * @}
Kojto 107:4f6c30876dfa 307 */
Kojto 107:4f6c30876dfa 308
Kojto 107:4f6c30876dfa 309 /** @defgroup FMC_SDRAM_AutoRefresh_Number FMC SDRAM AutoRefresh Number
Kojto 107:4f6c30876dfa 310 * @{
Kojto 107:4f6c30876dfa 311 */
Kojto 107:4f6c30876dfa 312 #define IS_FMC_AUTOREFRESH_NUMBER(__NUMBER__) (((__NUMBER__) > 0) && ((__NUMBER__) <= 16))
Kojto 107:4f6c30876dfa 313 /**
Kojto 107:4f6c30876dfa 314 * @}
Kojto 107:4f6c30876dfa 315 */
Kojto 107:4f6c30876dfa 316
Kojto 107:4f6c30876dfa 317 /** @defgroup FMC_SDRAM_ModeRegister_Definition FMC SDRAM ModeRegister Definition
Kojto 107:4f6c30876dfa 318 * @{
Kojto 107:4f6c30876dfa 319 */
Kojto 107:4f6c30876dfa 320 #define IS_FMC_MODE_REGISTER(__CONTENT__) ((__CONTENT__) <= 8191)
Kojto 107:4f6c30876dfa 321 /**
Kojto 107:4f6c30876dfa 322 * @}
Kojto 107:4f6c30876dfa 323 */
Kojto 107:4f6c30876dfa 324
Kojto 107:4f6c30876dfa 325 /** @defgroup FMC_SDRAM_Refresh_rate FMC SDRAM Refresh rate
Kojto 107:4f6c30876dfa 326 * @{
Kojto 107:4f6c30876dfa 327 */
Kojto 107:4f6c30876dfa 328 #define IS_FMC_REFRESH_RATE(__RATE__) ((__RATE__) <= 8191)
Kojto 107:4f6c30876dfa 329 /**
Kojto 107:4f6c30876dfa 330 * @}
Kojto 107:4f6c30876dfa 331 */
Kojto 107:4f6c30876dfa 332
Kojto 107:4f6c30876dfa 333 /** @defgroup FMC_NORSRAM_Device_Instance FMC NORSRAM Device Instance
Kojto 107:4f6c30876dfa 334 * @{
Kojto 107:4f6c30876dfa 335 */
Kojto 107:4f6c30876dfa 336 #define IS_FMC_NORSRAM_DEVICE(__INSTANCE__) ((__INSTANCE__) == FMC_NORSRAM_DEVICE)
Kojto 107:4f6c30876dfa 337 /**
Kojto 107:4f6c30876dfa 338 * @}
Kojto 107:4f6c30876dfa 339 */
Kojto 107:4f6c30876dfa 340
Kojto 107:4f6c30876dfa 341 /** @defgroup FMC_NORSRAM_EXTENDED_Device_Instance FMC NORSRAM EXTENDED Device Instance
Kojto 107:4f6c30876dfa 342 * @{
Kojto 107:4f6c30876dfa 343 */
Kojto 107:4f6c30876dfa 344 #define IS_FMC_NORSRAM_EXTENDED_DEVICE(__INSTANCE__) ((__INSTANCE__) == FMC_NORSRAM_EXTENDED_DEVICE)
Kojto 107:4f6c30876dfa 345 /**
Kojto 107:4f6c30876dfa 346 * @}
Kojto 107:4f6c30876dfa 347 */
Kojto 107:4f6c30876dfa 348
Kojto 107:4f6c30876dfa 349 /** @defgroup FMC_NAND_Device_Instance FMC NAND Device Instance
Kojto 107:4f6c30876dfa 350 * @{
Kojto 107:4f6c30876dfa 351 */
Kojto 107:4f6c30876dfa 352 #define IS_FMC_NAND_DEVICE(__INSTANCE__) ((__INSTANCE__) == FMC_NAND_DEVICE)
Kojto 107:4f6c30876dfa 353 /**
Kojto 107:4f6c30876dfa 354 * @}
Kojto 107:4f6c30876dfa 355 */
Kojto 107:4f6c30876dfa 356
Kojto 107:4f6c30876dfa 357 /** @defgroup FMC_SDRAM_Device_Instance FMC SDRAM Device Instance
Kojto 107:4f6c30876dfa 358 * @{
Kojto 107:4f6c30876dfa 359 */
Kojto 107:4f6c30876dfa 360 #define IS_FMC_SDRAM_DEVICE(__INSTANCE__) ((__INSTANCE__) == FMC_SDRAM_DEVICE)
Kojto 107:4f6c30876dfa 361 /**
Kojto 107:4f6c30876dfa 362 * @}
Kojto 107:4f6c30876dfa 363 */
Kojto 107:4f6c30876dfa 364
Kojto 107:4f6c30876dfa 365 #define IS_FMC_SDRAM_BANK(BANK) (((BANK) == FMC_SDRAM_BANK1) || \
Kojto 107:4f6c30876dfa 366 ((BANK) == FMC_SDRAM_BANK2))
Kojto 107:4f6c30876dfa 367
Kojto 107:4f6c30876dfa 368 #define IS_FMC_COLUMNBITS_NUMBER(COLUMN) (((COLUMN) == FMC_SDRAM_COLUMN_BITS_NUM_8) || \
Kojto 107:4f6c30876dfa 369 ((COLUMN) == FMC_SDRAM_COLUMN_BITS_NUM_9) || \
Kojto 107:4f6c30876dfa 370 ((COLUMN) == FMC_SDRAM_COLUMN_BITS_NUM_10) || \
Kojto 107:4f6c30876dfa 371 ((COLUMN) == FMC_SDRAM_COLUMN_BITS_NUM_11))
Kojto 107:4f6c30876dfa 372
Kojto 107:4f6c30876dfa 373 #define IS_FMC_ROWBITS_NUMBER(ROW) (((ROW) == FMC_SDRAM_ROW_BITS_NUM_11) || \
Kojto 107:4f6c30876dfa 374 ((ROW) == FMC_SDRAM_ROW_BITS_NUM_12) || \
Kojto 107:4f6c30876dfa 375 ((ROW) == FMC_SDRAM_ROW_BITS_NUM_13))
Kojto 107:4f6c30876dfa 376
Kojto 107:4f6c30876dfa 377 #define IS_FMC_INTERNALBANK_NUMBER(NUMBER) (((NUMBER) == FMC_SDRAM_INTERN_BANKS_NUM_2) || \
Kojto 107:4f6c30876dfa 378 ((NUMBER) == FMC_SDRAM_INTERN_BANKS_NUM_4))
Kojto 107:4f6c30876dfa 379
Kojto 107:4f6c30876dfa 380
Kojto 107:4f6c30876dfa 381 #define IS_FMC_CAS_LATENCY(LATENCY) (((LATENCY) == FMC_SDRAM_CAS_LATENCY_1) || \
Kojto 107:4f6c30876dfa 382 ((LATENCY) == FMC_SDRAM_CAS_LATENCY_2) || \
Kojto 107:4f6c30876dfa 383 ((LATENCY) == FMC_SDRAM_CAS_LATENCY_3))
Kojto 107:4f6c30876dfa 384
Kojto 107:4f6c30876dfa 385 #define IS_FMC_PAGESIZE(__SIZE__) (((__SIZE__) == FMC_PAGE_SIZE_NONE) || \
Kojto 107:4f6c30876dfa 386 ((__SIZE__) == FMC_PAGE_SIZE_128) || \
Kojto 107:4f6c30876dfa 387 ((__SIZE__) == FMC_PAGE_SIZE_256) || \
Kojto 107:4f6c30876dfa 388 ((__SIZE__) == FMC_PAGE_SIZE_1024))
Kojto 107:4f6c30876dfa 389
Kojto 107:4f6c30876dfa 390 #define IS_FMC_WRITE_FIFO(__FIFO__) (((__FIFO__) == FMC_WRITE_FIFO_DISABLE) || \
Kojto 107:4f6c30876dfa 391 ((__FIFO__) == FMC_WRITE_FIFO_ENABLE))
Kojto 107:4f6c30876dfa 392 /**
Kojto 107:4f6c30876dfa 393 * @}
Kojto 107:4f6c30876dfa 394 */
Kojto 107:4f6c30876dfa 395
Kojto 107:4f6c30876dfa 396 /* Exported typedef ----------------------------------------------------------*/
Kojto 107:4f6c30876dfa 397 /** @defgroup FMC_Exported_typedef FMC Low Layer Exported Types
Kojto 107:4f6c30876dfa 398 * @{
Kojto 107:4f6c30876dfa 399 */
Kojto 107:4f6c30876dfa 400 #define FMC_NORSRAM_TypeDef FMC_Bank1_TypeDef
Kojto 107:4f6c30876dfa 401 #define FMC_NORSRAM_EXTENDED_TypeDef FMC_Bank1E_TypeDef
Kojto 107:4f6c30876dfa 402 #define FMC_NAND_TypeDef FMC_Bank3_TypeDef
Kojto 107:4f6c30876dfa 403 #define FMC_SDRAM_TypeDef FMC_Bank5_6_TypeDef
Kojto 107:4f6c30876dfa 404
Kojto 107:4f6c30876dfa 405 #define FMC_NORSRAM_DEVICE FMC_Bank1
Kojto 107:4f6c30876dfa 406 #define FMC_NORSRAM_EXTENDED_DEVICE FMC_Bank1E
Kojto 107:4f6c30876dfa 407 #define FMC_NAND_DEVICE FMC_Bank3
Kojto 107:4f6c30876dfa 408 #define FMC_SDRAM_DEVICE FMC_Bank5_6
Kojto 107:4f6c30876dfa 409
Kojto 107:4f6c30876dfa 410 /**
Kojto 107:4f6c30876dfa 411 * @brief FMC NORSRAM Configuration Structure definition
Kojto 107:4f6c30876dfa 412 */
Kojto 107:4f6c30876dfa 413 typedef struct
Kojto 107:4f6c30876dfa 414 {
Kojto 107:4f6c30876dfa 415 uint32_t NSBank; /*!< Specifies the NORSRAM memory device that will be used.
Kojto 107:4f6c30876dfa 416 This parameter can be a value of @ref FMC_NORSRAM_Bank */
Kojto 107:4f6c30876dfa 417
Kojto 107:4f6c30876dfa 418 uint32_t DataAddressMux; /*!< Specifies whether the address and data values are
Kojto 107:4f6c30876dfa 419 multiplexed on the data bus or not.
Kojto 107:4f6c30876dfa 420 This parameter can be a value of @ref FMC_Data_Address_Bus_Multiplexing */
Kojto 107:4f6c30876dfa 421
Kojto 107:4f6c30876dfa 422 uint32_t MemoryType; /*!< Specifies the type of external memory attached to
Kojto 107:4f6c30876dfa 423 the corresponding memory device.
Kojto 107:4f6c30876dfa 424 This parameter can be a value of @ref FMC_Memory_Type */
Kojto 107:4f6c30876dfa 425
Kojto 107:4f6c30876dfa 426 uint32_t MemoryDataWidth; /*!< Specifies the external memory device width.
Kojto 107:4f6c30876dfa 427 This parameter can be a value of @ref FMC_NORSRAM_Data_Width */
Kojto 107:4f6c30876dfa 428
Kojto 107:4f6c30876dfa 429 uint32_t BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory,
Kojto 107:4f6c30876dfa 430 valid only with synchronous burst Flash memories.
Kojto 107:4f6c30876dfa 431 This parameter can be a value of @ref FMC_Burst_Access_Mode */
Kojto 107:4f6c30876dfa 432
Kojto 107:4f6c30876dfa 433 uint32_t WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing
Kojto 107:4f6c30876dfa 434 the Flash memory in burst mode.
Kojto 107:4f6c30876dfa 435 This parameter can be a value of @ref FMC_Wait_Signal_Polarity */
Kojto 107:4f6c30876dfa 436
Kojto 107:4f6c30876dfa 437 uint32_t WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one
Kojto 107:4f6c30876dfa 438 clock cycle before the wait state or during the wait state,
Kojto 107:4f6c30876dfa 439 valid only when accessing memories in burst mode.
Kojto 107:4f6c30876dfa 440 This parameter can be a value of @ref FMC_Wait_Timing */
Kojto 107:4f6c30876dfa 441
Kojto 107:4f6c30876dfa 442 uint32_t WriteOperation; /*!< Enables or disables the write operation in the selected device by the FMC.
Kojto 107:4f6c30876dfa 443 This parameter can be a value of @ref FMC_Write_Operation */
Kojto 107:4f6c30876dfa 444
Kojto 107:4f6c30876dfa 445 uint32_t WaitSignal; /*!< Enables or disables the wait state insertion via wait
Kojto 107:4f6c30876dfa 446 signal, valid for Flash memory access in burst mode.
Kojto 107:4f6c30876dfa 447 This parameter can be a value of @ref FMC_Wait_Signal */
Kojto 107:4f6c30876dfa 448
Kojto 107:4f6c30876dfa 449 uint32_t ExtendedMode; /*!< Enables or disables the extended mode.
Kojto 107:4f6c30876dfa 450 This parameter can be a value of @ref FMC_Extended_Mode */
Kojto 107:4f6c30876dfa 451
Kojto 107:4f6c30876dfa 452 uint32_t AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers,
Kojto 107:4f6c30876dfa 453 valid only with asynchronous Flash memories.
Kojto 107:4f6c30876dfa 454 This parameter can be a value of @ref FMC_AsynchronousWait */
Kojto 107:4f6c30876dfa 455
Kojto 107:4f6c30876dfa 456 uint32_t WriteBurst; /*!< Enables or disables the write burst operation.
Kojto 107:4f6c30876dfa 457 This parameter can be a value of @ref FMC_Write_Burst */
Kojto 107:4f6c30876dfa 458
Kojto 107:4f6c30876dfa 459 uint32_t ContinuousClock; /*!< Enables or disables the FMC clock output to external memory devices.
Kojto 107:4f6c30876dfa 460 This parameter is only enabled through the FMC_BCR1 register, and don't care
Kojto 107:4f6c30876dfa 461 through FMC_BCR2..4 registers.
Kojto 107:4f6c30876dfa 462 This parameter can be a value of @ref FMC_Continous_Clock */
Kojto 107:4f6c30876dfa 463
Kojto 107:4f6c30876dfa 464 uint32_t WriteFifo; /*!< Enables or disables the write FIFO used by the FMC controller.
Kojto 107:4f6c30876dfa 465 This parameter is only enabled through the FMC_BCR1 register, and don't care
Kojto 107:4f6c30876dfa 466 through FMC_BCR2..4 registers.
Kojto 107:4f6c30876dfa 467 This parameter can be a value of @ref FMC_Write_FIFO */
Kojto 107:4f6c30876dfa 468
Kojto 107:4f6c30876dfa 469 uint32_t PageSize; /*!< Specifies the memory page size.
Kojto 107:4f6c30876dfa 470 This parameter can be a value of @ref FMC_Page_Size */
Kojto 107:4f6c30876dfa 471
Kojto 107:4f6c30876dfa 472 }FMC_NORSRAM_InitTypeDef;
Kojto 107:4f6c30876dfa 473
Kojto 107:4f6c30876dfa 474 /**
Kojto 107:4f6c30876dfa 475 * @brief FMC NORSRAM Timing parameters structure definition
Kojto 107:4f6c30876dfa 476 */
Kojto 107:4f6c30876dfa 477 typedef struct
Kojto 107:4f6c30876dfa 478 {
Kojto 107:4f6c30876dfa 479 uint32_t AddressSetupTime; /*!< Defines the number of HCLK cycles to configure
Kojto 107:4f6c30876dfa 480 the duration of the address setup time.
Kojto 107:4f6c30876dfa 481 This parameter can be a value between Min_Data = 0 and Max_Data = 15.
Kojto 107:4f6c30876dfa 482 @note This parameter is not used with synchronous NOR Flash memories. */
Kojto 107:4f6c30876dfa 483
Kojto 107:4f6c30876dfa 484 uint32_t AddressHoldTime; /*!< Defines the number of HCLK cycles to configure
Kojto 107:4f6c30876dfa 485 the duration of the address hold time.
Kojto 107:4f6c30876dfa 486 This parameter can be a value between Min_Data = 1 and Max_Data = 15.
Kojto 107:4f6c30876dfa 487 @note This parameter is not used with synchronous NOR Flash memories. */
Kojto 107:4f6c30876dfa 488
Kojto 107:4f6c30876dfa 489 uint32_t DataSetupTime; /*!< Defines the number of HCLK cycles to configure
Kojto 107:4f6c30876dfa 490 the duration of the data setup time.
Kojto 107:4f6c30876dfa 491 This parameter can be a value between Min_Data = 1 and Max_Data = 255.
Kojto 107:4f6c30876dfa 492 @note This parameter is used for SRAMs, ROMs and asynchronous multiplexed
Kojto 107:4f6c30876dfa 493 NOR Flash memories. */
Kojto 107:4f6c30876dfa 494
Kojto 107:4f6c30876dfa 495 uint32_t BusTurnAroundDuration; /*!< Defines the number of HCLK cycles to configure
Kojto 107:4f6c30876dfa 496 the duration of the bus turnaround.
Kojto 107:4f6c30876dfa 497 This parameter can be a value between Min_Data = 0 and Max_Data = 15.
Kojto 107:4f6c30876dfa 498 @note This parameter is only used for multiplexed NOR Flash memories. */
Kojto 107:4f6c30876dfa 499
Kojto 107:4f6c30876dfa 500 uint32_t CLKDivision; /*!< Defines the period of CLK clock output signal, expressed in number of
Kojto 107:4f6c30876dfa 501 HCLK cycles. This parameter can be a value between Min_Data = 2 and Max_Data = 16.
Kojto 107:4f6c30876dfa 502 @note This parameter is not used for asynchronous NOR Flash, SRAM or ROM
Kojto 107:4f6c30876dfa 503 accesses. */
Kojto 107:4f6c30876dfa 504
Kojto 107:4f6c30876dfa 505 uint32_t DataLatency; /*!< Defines the number of memory clock cycles to issue
Kojto 107:4f6c30876dfa 506 to the memory before getting the first data.
Kojto 107:4f6c30876dfa 507 The parameter value depends on the memory type as shown below:
Kojto 107:4f6c30876dfa 508 - It must be set to 0 in case of a CRAM
Kojto 107:4f6c30876dfa 509 - It is don't care in asynchronous NOR, SRAM or ROM accesses
Kojto 107:4f6c30876dfa 510 - It may assume a value between Min_Data = 2 and Max_Data = 17 in NOR Flash memories
Kojto 107:4f6c30876dfa 511 with synchronous burst mode enable */
Kojto 107:4f6c30876dfa 512
Kojto 107:4f6c30876dfa 513 uint32_t AccessMode; /*!< Specifies the asynchronous access mode.
Kojto 107:4f6c30876dfa 514 This parameter can be a value of @ref FMC_Access_Mode */
Kojto 107:4f6c30876dfa 515 }FMC_NORSRAM_TimingTypeDef;
Kojto 107:4f6c30876dfa 516
Kojto 107:4f6c30876dfa 517 /**
Kojto 107:4f6c30876dfa 518 * @brief FMC NAND Configuration Structure definition
Kojto 107:4f6c30876dfa 519 */
Kojto 107:4f6c30876dfa 520 typedef struct
Kojto 107:4f6c30876dfa 521 {
Kojto 107:4f6c30876dfa 522 uint32_t NandBank; /*!< Specifies the NAND memory device that will be used.
Kojto 107:4f6c30876dfa 523 This parameter can be a value of @ref FMC_NAND_Bank */
Kojto 107:4f6c30876dfa 524
Kojto 107:4f6c30876dfa 525 uint32_t Waitfeature; /*!< Enables or disables the Wait feature for the NAND Memory device.
Kojto 107:4f6c30876dfa 526 This parameter can be any value of @ref FMC_Wait_feature */
Kojto 107:4f6c30876dfa 527
Kojto 107:4f6c30876dfa 528 uint32_t MemoryDataWidth; /*!< Specifies the external memory device width.
Kojto 107:4f6c30876dfa 529 This parameter can be any value of @ref FMC_NAND_Data_Width */
Kojto 107:4f6c30876dfa 530
Kojto 107:4f6c30876dfa 531 uint32_t EccComputation; /*!< Enables or disables the ECC computation.
Kojto 107:4f6c30876dfa 532 This parameter can be any value of @ref FMC_ECC */
Kojto 107:4f6c30876dfa 533
Kojto 107:4f6c30876dfa 534 uint32_t ECCPageSize; /*!< Defines the page size for the extended ECC.
Kojto 107:4f6c30876dfa 535 This parameter can be any value of @ref FMC_ECC_Page_Size */
Kojto 107:4f6c30876dfa 536
Kojto 107:4f6c30876dfa 537 uint32_t TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the
Kojto 107:4f6c30876dfa 538 delay between CLE low and RE low.
Kojto 107:4f6c30876dfa 539 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
Kojto 107:4f6c30876dfa 540
Kojto 107:4f6c30876dfa 541 uint32_t TARSetupTime; /*!< Defines the number of HCLK cycles to configure the
Kojto 107:4f6c30876dfa 542 delay between ALE low and RE low.
Kojto 107:4f6c30876dfa 543 This parameter can be a number between Min_Data = 0 and Max_Data = 255 */
Kojto 107:4f6c30876dfa 544 }FMC_NAND_InitTypeDef;
Kojto 107:4f6c30876dfa 545
Kojto 107:4f6c30876dfa 546 /**
Kojto 107:4f6c30876dfa 547 * @brief FMC NAND Timing parameters structure definition
Kojto 107:4f6c30876dfa 548 */
Kojto 107:4f6c30876dfa 549 typedef struct
Kojto 107:4f6c30876dfa 550 {
Kojto 107:4f6c30876dfa 551 uint32_t SetupTime; /*!< Defines the number of HCLK cycles to setup address before
Kojto 107:4f6c30876dfa 552 the command assertion for NAND-Flash read or write access
Kojto 107:4f6c30876dfa 553 to common/Attribute or I/O memory space (depending on
Kojto 107:4f6c30876dfa 554 the memory space timing to be configured).
Kojto 107:4f6c30876dfa 555 This parameter can be a value between Min_Data = 0 and Max_Data = 254 */
Kojto 107:4f6c30876dfa 556
Kojto 107:4f6c30876dfa 557 uint32_t WaitSetupTime; /*!< Defines the minimum number of HCLK cycles to assert the
Kojto 107:4f6c30876dfa 558 command for NAND-Flash read or write access to
Kojto 107:4f6c30876dfa 559 common/Attribute or I/O memory space (depending on the
Kojto 107:4f6c30876dfa 560 memory space timing to be configured).
Kojto 107:4f6c30876dfa 561 This parameter can be a number between Min_Data = 0 and Max_Data = 254 */
Kojto 107:4f6c30876dfa 562
Kojto 107:4f6c30876dfa 563 uint32_t HoldSetupTime; /*!< Defines the number of HCLK clock cycles to hold address
Kojto 107:4f6c30876dfa 564 (and data for write access) after the command de-assertion
Kojto 107:4f6c30876dfa 565 for NAND-Flash read or write access to common/Attribute
Kojto 107:4f6c30876dfa 566 or I/O memory space (depending on the memory space timing
Kojto 107:4f6c30876dfa 567 to be configured).
Kojto 107:4f6c30876dfa 568 This parameter can be a number between Min_Data = 0 and Max_Data = 254 */
Kojto 107:4f6c30876dfa 569
Kojto 107:4f6c30876dfa 570 uint32_t HiZSetupTime; /*!< Defines the number of HCLK clock cycles during which the
Kojto 107:4f6c30876dfa 571 data bus is kept in HiZ after the start of a NAND-Flash
Kojto 107:4f6c30876dfa 572 write access to common/Attribute or I/O memory space (depending
Kojto 107:4f6c30876dfa 573 on the memory space timing to be configured).
Kojto 107:4f6c30876dfa 574 This parameter can be a number between Min_Data = 0 and Max_Data = 254 */
Kojto 107:4f6c30876dfa 575 }FMC_NAND_PCC_TimingTypeDef;
Kojto 107:4f6c30876dfa 576
Kojto 107:4f6c30876dfa 577 /**
Kojto 107:4f6c30876dfa 578 * @brief FMC SDRAM Configuration Structure definition
Kojto 107:4f6c30876dfa 579 */
Kojto 107:4f6c30876dfa 580 typedef struct
Kojto 107:4f6c30876dfa 581 {
Kojto 107:4f6c30876dfa 582 uint32_t SDBank; /*!< Specifies the SDRAM memory device that will be used.
Kojto 107:4f6c30876dfa 583 This parameter can be a value of @ref FMC_SDRAM_Bank */
Kojto 107:4f6c30876dfa 584
Kojto 107:4f6c30876dfa 585 uint32_t ColumnBitsNumber; /*!< Defines the number of bits of column address.
Kojto 107:4f6c30876dfa 586 This parameter can be a value of @ref FMC_SDRAM_Column_Bits_number. */
Kojto 107:4f6c30876dfa 587
Kojto 107:4f6c30876dfa 588 uint32_t RowBitsNumber; /*!< Defines the number of bits of column address.
Kojto 107:4f6c30876dfa 589 This parameter can be a value of @ref FMC_SDRAM_Row_Bits_number. */
Kojto 107:4f6c30876dfa 590
Kojto 107:4f6c30876dfa 591 uint32_t MemoryDataWidth; /*!< Defines the memory device width.
Kojto 107:4f6c30876dfa 592 This parameter can be a value of @ref FMC_SDRAM_Memory_Bus_Width. */
Kojto 107:4f6c30876dfa 593
Kojto 107:4f6c30876dfa 594 uint32_t InternalBankNumber; /*!< Defines the number of the device's internal banks.
Kojto 107:4f6c30876dfa 595 This parameter can be of @ref FMC_SDRAM_Internal_Banks_Number. */
Kojto 107:4f6c30876dfa 596
Kojto 107:4f6c30876dfa 597 uint32_t CASLatency; /*!< Defines the SDRAM CAS latency in number of memory clock cycles.
Kojto 107:4f6c30876dfa 598 This parameter can be a value of @ref FMC_SDRAM_CAS_Latency. */
Kojto 107:4f6c30876dfa 599
Kojto 107:4f6c30876dfa 600 uint32_t WriteProtection; /*!< Enables the SDRAM device to be accessed in write mode.
Kojto 107:4f6c30876dfa 601 This parameter can be a value of @ref FMC_SDRAM_Write_Protection. */
Kojto 107:4f6c30876dfa 602
Kojto 107:4f6c30876dfa 603 uint32_t SDClockPeriod; /*!< Define the SDRAM Clock Period for both SDRAM devices and they allow
Kojto 107:4f6c30876dfa 604 to disable the clock before changing frequency.
Kojto 107:4f6c30876dfa 605 This parameter can be a value of @ref FMC_SDRAM_Clock_Period. */
Kojto 107:4f6c30876dfa 606
Kojto 107:4f6c30876dfa 607 uint32_t ReadBurst; /*!< This bit enable the SDRAM controller to anticipate the next read
Kojto 107:4f6c30876dfa 608 commands during the CAS latency and stores data in the Read FIFO.
Kojto 107:4f6c30876dfa 609 This parameter can be a value of @ref FMC_SDRAM_Read_Burst. */
Kojto 107:4f6c30876dfa 610
Kojto 107:4f6c30876dfa 611 uint32_t ReadPipeDelay; /*!< Define the delay in system clock cycles on read data path.
Kojto 107:4f6c30876dfa 612 This parameter can be a value of @ref FMC_SDRAM_Read_Pipe_Delay. */
Kojto 107:4f6c30876dfa 613 }FMC_SDRAM_InitTypeDef;
Kojto 107:4f6c30876dfa 614
Kojto 107:4f6c30876dfa 615 /**
Kojto 107:4f6c30876dfa 616 * @brief FMC SDRAM Timing parameters structure definition
Kojto 107:4f6c30876dfa 617 */
Kojto 107:4f6c30876dfa 618 typedef struct
Kojto 107:4f6c30876dfa 619 {
Kojto 107:4f6c30876dfa 620 uint32_t LoadToActiveDelay; /*!< Defines the delay between a Load Mode Register command and
Kojto 107:4f6c30876dfa 621 an active or Refresh command in number of memory clock cycles.
Kojto 107:4f6c30876dfa 622 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
Kojto 107:4f6c30876dfa 623
Kojto 107:4f6c30876dfa 624 uint32_t ExitSelfRefreshDelay; /*!< Defines the delay from releasing the self refresh command to
Kojto 107:4f6c30876dfa 625 issuing the Activate command in number of memory clock cycles.
Kojto 107:4f6c30876dfa 626 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
Kojto 107:4f6c30876dfa 627
Kojto 107:4f6c30876dfa 628 uint32_t SelfRefreshTime; /*!< Defines the minimum Self Refresh period in number of memory clock
Kojto 107:4f6c30876dfa 629 cycles.
Kojto 107:4f6c30876dfa 630 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
Kojto 107:4f6c30876dfa 631
Kojto 107:4f6c30876dfa 632 uint32_t RowCycleDelay; /*!< Defines the delay between the Refresh command and the Activate command
Kojto 107:4f6c30876dfa 633 and the delay between two consecutive Refresh commands in number of
Kojto 107:4f6c30876dfa 634 memory clock cycles.
Kojto 107:4f6c30876dfa 635 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
Kojto 107:4f6c30876dfa 636
Kojto 107:4f6c30876dfa 637 uint32_t WriteRecoveryTime; /*!< Defines the Write recovery Time in number of memory clock cycles.
Kojto 107:4f6c30876dfa 638 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
Kojto 107:4f6c30876dfa 639
Kojto 107:4f6c30876dfa 640 uint32_t RPDelay; /*!< Defines the delay between a Precharge Command and an other command
Kojto 107:4f6c30876dfa 641 in number of memory clock cycles.
Kojto 107:4f6c30876dfa 642 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
Kojto 107:4f6c30876dfa 643
Kojto 107:4f6c30876dfa 644 uint32_t RCDDelay; /*!< Defines the delay between the Activate Command and a Read/Write
Kojto 107:4f6c30876dfa 645 command in number of memory clock cycles.
Kojto 107:4f6c30876dfa 646 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
Kojto 107:4f6c30876dfa 647 }FMC_SDRAM_TimingTypeDef;
Kojto 107:4f6c30876dfa 648
Kojto 107:4f6c30876dfa 649 /**
Kojto 107:4f6c30876dfa 650 * @brief SDRAM command parameters structure definition
Kojto 107:4f6c30876dfa 651 */
Kojto 107:4f6c30876dfa 652 typedef struct
Kojto 107:4f6c30876dfa 653 {
Kojto 107:4f6c30876dfa 654 uint32_t CommandMode; /*!< Defines the command issued to the SDRAM device.
Kojto 107:4f6c30876dfa 655 This parameter can be a value of @ref FMC_SDRAM_Command_Mode. */
Kojto 107:4f6c30876dfa 656
Kojto 107:4f6c30876dfa 657 uint32_t CommandTarget; /*!< Defines which device (1 or 2) the command will be issued to.
Kojto 107:4f6c30876dfa 658 This parameter can be a value of @ref FMC_SDRAM_Command_Target. */
Kojto 107:4f6c30876dfa 659
Kojto 107:4f6c30876dfa 660 uint32_t AutoRefreshNumber; /*!< Defines the number of consecutive auto refresh command issued
Kojto 107:4f6c30876dfa 661 in auto refresh mode.
Kojto 107:4f6c30876dfa 662 This parameter can be a value between Min_Data = 1 and Max_Data = 16 */
Kojto 107:4f6c30876dfa 663 uint32_t ModeRegisterDefinition; /*!< Defines the SDRAM Mode register content */
Kojto 107:4f6c30876dfa 664 }FMC_SDRAM_CommandTypeDef;
Kojto 107:4f6c30876dfa 665 /**
Kojto 107:4f6c30876dfa 666 * @}
Kojto 107:4f6c30876dfa 667 */
Kojto 107:4f6c30876dfa 668
Kojto 107:4f6c30876dfa 669 /* Exported constants --------------------------------------------------------*/
Kojto 107:4f6c30876dfa 670 /** @addtogroup FMC_LL_Exported_Constants FMC Low Layer Exported Constants
Kojto 107:4f6c30876dfa 671 * @{
Kojto 107:4f6c30876dfa 672 */
Kojto 107:4f6c30876dfa 673
Kojto 107:4f6c30876dfa 674 /** @defgroup FMC_LL_NOR_SRAM_Controller FMC NOR/SRAM Controller
Kojto 107:4f6c30876dfa 675 * @{
Kojto 107:4f6c30876dfa 676 */
Kojto 107:4f6c30876dfa 677
Kojto 107:4f6c30876dfa 678 /** @defgroup FMC_NORSRAM_Bank FMC NOR/SRAM Bank
Kojto 107:4f6c30876dfa 679 * @{
Kojto 107:4f6c30876dfa 680 */
Kojto 107:4f6c30876dfa 681 #define FMC_NORSRAM_BANK1 ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 682 #define FMC_NORSRAM_BANK2 ((uint32_t)0x00000002)
Kojto 107:4f6c30876dfa 683 #define FMC_NORSRAM_BANK3 ((uint32_t)0x00000004)
Kojto 107:4f6c30876dfa 684 #define FMC_NORSRAM_BANK4 ((uint32_t)0x00000006)
Kojto 107:4f6c30876dfa 685 /**
Kojto 107:4f6c30876dfa 686 * @}
Kojto 107:4f6c30876dfa 687 */
Kojto 107:4f6c30876dfa 688
Kojto 107:4f6c30876dfa 689 /** @defgroup FMC_Data_Address_Bus_Multiplexing FMC Data Address Bus Multiplexing
Kojto 107:4f6c30876dfa 690 * @{
Kojto 107:4f6c30876dfa 691 */
Kojto 107:4f6c30876dfa 692 #define FMC_DATA_ADDRESS_MUX_DISABLE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 693 #define FMC_DATA_ADDRESS_MUX_ENABLE ((uint32_t)0x00000002)
Kojto 107:4f6c30876dfa 694 /**
Kojto 107:4f6c30876dfa 695 * @}
Kojto 107:4f6c30876dfa 696 */
Kojto 107:4f6c30876dfa 697
Kojto 107:4f6c30876dfa 698 /** @defgroup FMC_Memory_Type FMC Memory Type
Kojto 107:4f6c30876dfa 699 * @{
Kojto 107:4f6c30876dfa 700 */
Kojto 107:4f6c30876dfa 701 #define FMC_MEMORY_TYPE_SRAM ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 702 #define FMC_MEMORY_TYPE_PSRAM ((uint32_t)0x00000004)
Kojto 107:4f6c30876dfa 703 #define FMC_MEMORY_TYPE_NOR ((uint32_t)0x00000008)
Kojto 107:4f6c30876dfa 704 /**
Kojto 107:4f6c30876dfa 705 * @}
Kojto 107:4f6c30876dfa 706 */
Kojto 107:4f6c30876dfa 707
Kojto 107:4f6c30876dfa 708 /** @defgroup FMC_NORSRAM_Data_Width FMC NORSRAM Data Width
Kojto 107:4f6c30876dfa 709 * @{
Kojto 107:4f6c30876dfa 710 */
Kojto 107:4f6c30876dfa 711 #define FMC_NORSRAM_MEM_BUS_WIDTH_8 ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 712 #define FMC_NORSRAM_MEM_BUS_WIDTH_16 ((uint32_t)0x00000010)
Kojto 107:4f6c30876dfa 713 #define FMC_NORSRAM_MEM_BUS_WIDTH_32 ((uint32_t)0x00000020)
Kojto 107:4f6c30876dfa 714 /**
Kojto 107:4f6c30876dfa 715 * @}
Kojto 107:4f6c30876dfa 716 */
Kojto 107:4f6c30876dfa 717
Kojto 107:4f6c30876dfa 718 /** @defgroup FMC_NORSRAM_Flash_Access FMC NOR/SRAM Flash Access
Kojto 107:4f6c30876dfa 719 * @{
Kojto 107:4f6c30876dfa 720 */
Kojto 107:4f6c30876dfa 721 #define FMC_NORSRAM_FLASH_ACCESS_ENABLE ((uint32_t)0x00000040)
Kojto 107:4f6c30876dfa 722 #define FMC_NORSRAM_FLASH_ACCESS_DISABLE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 723 /**
Kojto 107:4f6c30876dfa 724 * @}
Kojto 107:4f6c30876dfa 725 */
Kojto 107:4f6c30876dfa 726
Kojto 107:4f6c30876dfa 727 /** @defgroup FMC_Burst_Access_Mode FMC Burst Access Mode
Kojto 107:4f6c30876dfa 728 * @{
Kojto 107:4f6c30876dfa 729 */
Kojto 107:4f6c30876dfa 730 #define FMC_BURST_ACCESS_MODE_DISABLE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 731 #define FMC_BURST_ACCESS_MODE_ENABLE ((uint32_t)0x00000100)
Kojto 107:4f6c30876dfa 732 /**
Kojto 107:4f6c30876dfa 733 * @}
Kojto 107:4f6c30876dfa 734 */
Kojto 107:4f6c30876dfa 735
Kojto 107:4f6c30876dfa 736 /** @defgroup FMC_Wait_Signal_Polarity FMC Wait Signal Polarity
Kojto 107:4f6c30876dfa 737 * @{
Kojto 107:4f6c30876dfa 738 */
Kojto 107:4f6c30876dfa 739 #define FMC_WAIT_SIGNAL_POLARITY_LOW ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 740 #define FMC_WAIT_SIGNAL_POLARITY_HIGH ((uint32_t)0x00000200)
Kojto 107:4f6c30876dfa 741 /**
Kojto 107:4f6c30876dfa 742 * @}
Kojto 107:4f6c30876dfa 743 */
Kojto 107:4f6c30876dfa 744
Kojto 107:4f6c30876dfa 745 /** @defgroup FMC_Wait_Timing FMC Wait Timing
Kojto 107:4f6c30876dfa 746 * @{
Kojto 107:4f6c30876dfa 747 */
Kojto 107:4f6c30876dfa 748 #define FMC_WAIT_TIMING_BEFORE_WS ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 749 #define FMC_WAIT_TIMING_DURING_WS ((uint32_t)0x00000800)
Kojto 107:4f6c30876dfa 750 /**
Kojto 107:4f6c30876dfa 751 * @}
Kojto 107:4f6c30876dfa 752 */
Kojto 107:4f6c30876dfa 753
Kojto 107:4f6c30876dfa 754 /** @defgroup FMC_Write_Operation FMC Write Operation
Kojto 107:4f6c30876dfa 755 * @{
Kojto 107:4f6c30876dfa 756 */
Kojto 107:4f6c30876dfa 757 #define FMC_WRITE_OPERATION_DISABLE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 758 #define FMC_WRITE_OPERATION_ENABLE ((uint32_t)0x00001000)
Kojto 107:4f6c30876dfa 759 /**
Kojto 107:4f6c30876dfa 760 * @}
Kojto 107:4f6c30876dfa 761 */
Kojto 107:4f6c30876dfa 762
Kojto 107:4f6c30876dfa 763 /** @defgroup FMC_Wait_Signal FMC Wait Signal
Kojto 107:4f6c30876dfa 764 * @{
Kojto 107:4f6c30876dfa 765 */
Kojto 107:4f6c30876dfa 766 #define FMC_WAIT_SIGNAL_DISABLE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 767 #define FMC_WAIT_SIGNAL_ENABLE ((uint32_t)0x00002000)
Kojto 107:4f6c30876dfa 768 /**
Kojto 107:4f6c30876dfa 769 * @}
Kojto 107:4f6c30876dfa 770 */
Kojto 107:4f6c30876dfa 771
Kojto 107:4f6c30876dfa 772 /** @defgroup FMC_Extended_Mode FMC Extended Mode
Kojto 107:4f6c30876dfa 773 * @{
Kojto 107:4f6c30876dfa 774 */
Kojto 107:4f6c30876dfa 775 #define FMC_EXTENDED_MODE_DISABLE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 776 #define FMC_EXTENDED_MODE_ENABLE ((uint32_t)0x00004000)
Kojto 107:4f6c30876dfa 777 /**
Kojto 107:4f6c30876dfa 778 * @}
Kojto 107:4f6c30876dfa 779 */
Kojto 107:4f6c30876dfa 780
Kojto 107:4f6c30876dfa 781 /** @defgroup FMC_AsynchronousWait FMC Asynchronous Wait
Kojto 107:4f6c30876dfa 782 * @{
Kojto 107:4f6c30876dfa 783 */
Kojto 107:4f6c30876dfa 784 #define FMC_ASYNCHRONOUS_WAIT_DISABLE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 785 #define FMC_ASYNCHRONOUS_WAIT_ENABLE ((uint32_t)0x00008000)
Kojto 107:4f6c30876dfa 786 /**
Kojto 107:4f6c30876dfa 787 * @}
Kojto 107:4f6c30876dfa 788 */
Kojto 107:4f6c30876dfa 789
Kojto 107:4f6c30876dfa 790 /** @defgroup FMC_Page_Size FMC Page Size
Kojto 107:4f6c30876dfa 791 * @{
Kojto 107:4f6c30876dfa 792 */
Kojto 107:4f6c30876dfa 793 #define FMC_PAGE_SIZE_NONE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 794 #define FMC_PAGE_SIZE_128 ((uint32_t)FMC_BCR1_CPSIZE_0)
Kojto 107:4f6c30876dfa 795 #define FMC_PAGE_SIZE_256 ((uint32_t)FMC_BCR1_CPSIZE_1)
Kojto 107:4f6c30876dfa 796 #define FMC_PAGE_SIZE_1024 ((uint32_t)FMC_BCR1_CPSIZE_2)
Kojto 107:4f6c30876dfa 797 /**
Kojto 107:4f6c30876dfa 798 * @}
Kojto 107:4f6c30876dfa 799 */
Kojto 107:4f6c30876dfa 800
Kojto 107:4f6c30876dfa 801 /** @defgroup FMC_Write_Burst FMC Write Burst
Kojto 107:4f6c30876dfa 802 * @{
Kojto 107:4f6c30876dfa 803 */
Kojto 107:4f6c30876dfa 804 #define FMC_WRITE_BURST_DISABLE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 805 #define FMC_WRITE_BURST_ENABLE ((uint32_t)0x00080000)
Kojto 107:4f6c30876dfa 806 /**
Kojto 107:4f6c30876dfa 807 * @}
Kojto 107:4f6c30876dfa 808 */
Kojto 107:4f6c30876dfa 809
Kojto 107:4f6c30876dfa 810 /** @defgroup FMC_Continous_Clock FMC Continuous Clock
Kojto 107:4f6c30876dfa 811 * @{
Kojto 107:4f6c30876dfa 812 */
Kojto 107:4f6c30876dfa 813 #define FMC_CONTINUOUS_CLOCK_SYNC_ONLY ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 814 #define FMC_CONTINUOUS_CLOCK_SYNC_ASYNC ((uint32_t)0x00100000)
Kojto 107:4f6c30876dfa 815 /**
Kojto 107:4f6c30876dfa 816 * @}
Kojto 107:4f6c30876dfa 817 */
Kojto 107:4f6c30876dfa 818
Kojto 107:4f6c30876dfa 819 /** @defgroup FMC_Write_FIFO FMC Write FIFO
Kojto 107:4f6c30876dfa 820 * @{
Kojto 107:4f6c30876dfa 821 */
Kojto 107:4f6c30876dfa 822 #define FMC_WRITE_FIFO_DISABLE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 823 #define FMC_WRITE_FIFO_ENABLE ((uint32_t)FMC_BCR1_WFDIS)
Kojto 107:4f6c30876dfa 824 /**
Kojto 107:4f6c30876dfa 825 * @}
Kojto 107:4f6c30876dfa 826 */
Kojto 107:4f6c30876dfa 827
Kojto 107:4f6c30876dfa 828 /** @defgroup FMC_Access_Mode FMC Access Mode
Kojto 107:4f6c30876dfa 829 * @{
Kojto 107:4f6c30876dfa 830 */
Kojto 107:4f6c30876dfa 831 #define FMC_ACCESS_MODE_A ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 832 #define FMC_ACCESS_MODE_B ((uint32_t)0x10000000)
Kojto 107:4f6c30876dfa 833 #define FMC_ACCESS_MODE_C ((uint32_t)0x20000000)
Kojto 107:4f6c30876dfa 834 #define FMC_ACCESS_MODE_D ((uint32_t)0x30000000)
Kojto 107:4f6c30876dfa 835 /**
Kojto 107:4f6c30876dfa 836 * @}
Kojto 107:4f6c30876dfa 837 */
Kojto 107:4f6c30876dfa 838
Kojto 107:4f6c30876dfa 839 /**
Kojto 107:4f6c30876dfa 840 * @}
Kojto 107:4f6c30876dfa 841 */
Kojto 107:4f6c30876dfa 842
Kojto 107:4f6c30876dfa 843 /** @defgroup FMC_LL_NAND_Controller FMC NAND Controller
Kojto 107:4f6c30876dfa 844 * @{
Kojto 107:4f6c30876dfa 845 */
Kojto 107:4f6c30876dfa 846 /** @defgroup FMC_NAND_Bank FMC NAND Bank
Kojto 107:4f6c30876dfa 847 * @{
Kojto 107:4f6c30876dfa 848 */
Kojto 107:4f6c30876dfa 849 #define FMC_NAND_BANK3 ((uint32_t)0x00000100)
Kojto 107:4f6c30876dfa 850 /**
Kojto 107:4f6c30876dfa 851 * @}
Kojto 107:4f6c30876dfa 852 */
Kojto 107:4f6c30876dfa 853
Kojto 107:4f6c30876dfa 854 /** @defgroup FMC_Wait_feature FMC Wait feature
Kojto 107:4f6c30876dfa 855 * @{
Kojto 107:4f6c30876dfa 856 */
Kojto 107:4f6c30876dfa 857 #define FMC_NAND_WAIT_FEATURE_DISABLE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 858 #define FMC_NAND_WAIT_FEATURE_ENABLE ((uint32_t)0x00000002)
Kojto 107:4f6c30876dfa 859 /**
Kojto 107:4f6c30876dfa 860 * @}
Kojto 107:4f6c30876dfa 861 */
Kojto 107:4f6c30876dfa 862
Kojto 107:4f6c30876dfa 863 /** @defgroup FMC_PCR_Memory_Type FMC PCR Memory Type
Kojto 107:4f6c30876dfa 864 * @{
Kojto 107:4f6c30876dfa 865 */
Kojto 107:4f6c30876dfa 866 #define FMC_PCR_MEMORY_TYPE_NAND ((uint32_t)0x00000008)
Kojto 107:4f6c30876dfa 867 /**
Kojto 107:4f6c30876dfa 868 * @}
Kojto 107:4f6c30876dfa 869 */
Kojto 107:4f6c30876dfa 870
Kojto 107:4f6c30876dfa 871 /** @defgroup FMC_NAND_Data_Width FMC NAND Data Width
Kojto 107:4f6c30876dfa 872 * @{
Kojto 107:4f6c30876dfa 873 */
Kojto 107:4f6c30876dfa 874 #define FMC_NAND_MEM_BUS_WIDTH_8 ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 875 #define FMC_NAND_MEM_BUS_WIDTH_16 ((uint32_t)0x00000010)
Kojto 107:4f6c30876dfa 876 /**
Kojto 107:4f6c30876dfa 877 * @}
Kojto 107:4f6c30876dfa 878 */
Kojto 107:4f6c30876dfa 879
Kojto 107:4f6c30876dfa 880 /** @defgroup FMC_ECC FMC ECC
Kojto 107:4f6c30876dfa 881 * @{
Kojto 107:4f6c30876dfa 882 */
Kojto 107:4f6c30876dfa 883 #define FMC_NAND_ECC_DISABLE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 884 #define FMC_NAND_ECC_ENABLE ((uint32_t)0x00000040)
Kojto 107:4f6c30876dfa 885 /**
Kojto 107:4f6c30876dfa 886 * @}
Kojto 107:4f6c30876dfa 887 */
Kojto 107:4f6c30876dfa 888
Kojto 107:4f6c30876dfa 889 /** @defgroup FMC_ECC_Page_Size FMC ECC Page Size
Kojto 107:4f6c30876dfa 890 * @{
Kojto 107:4f6c30876dfa 891 */
Kojto 107:4f6c30876dfa 892 #define FMC_NAND_ECC_PAGE_SIZE_256BYTE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 893 #define FMC_NAND_ECC_PAGE_SIZE_512BYTE ((uint32_t)0x00020000)
Kojto 107:4f6c30876dfa 894 #define FMC_NAND_ECC_PAGE_SIZE_1024BYTE ((uint32_t)0x00040000)
Kojto 107:4f6c30876dfa 895 #define FMC_NAND_ECC_PAGE_SIZE_2048BYTE ((uint32_t)0x00060000)
Kojto 107:4f6c30876dfa 896 #define FMC_NAND_ECC_PAGE_SIZE_4096BYTE ((uint32_t)0x00080000)
Kojto 107:4f6c30876dfa 897 #define FMC_NAND_ECC_PAGE_SIZE_8192BYTE ((uint32_t)0x000A0000)
Kojto 107:4f6c30876dfa 898 /**
Kojto 107:4f6c30876dfa 899 * @}
Kojto 107:4f6c30876dfa 900 */
Kojto 107:4f6c30876dfa 901
Kojto 107:4f6c30876dfa 902 /**
Kojto 107:4f6c30876dfa 903 * @}
Kojto 107:4f6c30876dfa 904 */
Kojto 107:4f6c30876dfa 905
Kojto 107:4f6c30876dfa 906 /** @defgroup FMC_LL_SDRAM_Controller FMC SDRAM Controller
Kojto 107:4f6c30876dfa 907 * @{
Kojto 107:4f6c30876dfa 908 */
Kojto 107:4f6c30876dfa 909 /** @defgroup FMC_SDRAM_Bank FMC SDRAM Bank
Kojto 107:4f6c30876dfa 910 * @{
Kojto 107:4f6c30876dfa 911 */
Kojto 107:4f6c30876dfa 912 #define FMC_SDRAM_BANK1 ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 913 #define FMC_SDRAM_BANK2 ((uint32_t)0x00000001)
Kojto 107:4f6c30876dfa 914 /**
Kojto 107:4f6c30876dfa 915 * @}
Kojto 107:4f6c30876dfa 916 */
Kojto 107:4f6c30876dfa 917
Kojto 107:4f6c30876dfa 918 /** @defgroup FMC_SDRAM_Column_Bits_number FMC SDRAM Column Bits number
Kojto 107:4f6c30876dfa 919 * @{
Kojto 107:4f6c30876dfa 920 */
Kojto 107:4f6c30876dfa 921 #define FMC_SDRAM_COLUMN_BITS_NUM_8 ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 922 #define FMC_SDRAM_COLUMN_BITS_NUM_9 ((uint32_t)0x00000001)
Kojto 107:4f6c30876dfa 923 #define FMC_SDRAM_COLUMN_BITS_NUM_10 ((uint32_t)0x00000002)
Kojto 107:4f6c30876dfa 924 #define FMC_SDRAM_COLUMN_BITS_NUM_11 ((uint32_t)0x00000003)
Kojto 107:4f6c30876dfa 925 /**
Kojto 107:4f6c30876dfa 926 * @}
Kojto 107:4f6c30876dfa 927 */
Kojto 107:4f6c30876dfa 928
Kojto 107:4f6c30876dfa 929 /** @defgroup FMC_SDRAM_Row_Bits_number FMC SDRAM Row Bits number
Kojto 107:4f6c30876dfa 930 * @{
Kojto 107:4f6c30876dfa 931 */
Kojto 107:4f6c30876dfa 932 #define FMC_SDRAM_ROW_BITS_NUM_11 ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 933 #define FMC_SDRAM_ROW_BITS_NUM_12 ((uint32_t)0x00000004)
Kojto 107:4f6c30876dfa 934 #define FMC_SDRAM_ROW_BITS_NUM_13 ((uint32_t)0x00000008)
Kojto 107:4f6c30876dfa 935 /**
Kojto 107:4f6c30876dfa 936 * @}
Kojto 107:4f6c30876dfa 937 */
Kojto 107:4f6c30876dfa 938
Kojto 107:4f6c30876dfa 939 /** @defgroup FMC_SDRAM_Memory_Bus_Width FMC SDRAM Memory Bus Width
Kojto 107:4f6c30876dfa 940 * @{
Kojto 107:4f6c30876dfa 941 */
Kojto 107:4f6c30876dfa 942 #define FMC_SDRAM_MEM_BUS_WIDTH_8 ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 943 #define FMC_SDRAM_MEM_BUS_WIDTH_16 ((uint32_t)0x00000010)
Kojto 107:4f6c30876dfa 944 #define FMC_SDRAM_MEM_BUS_WIDTH_32 ((uint32_t)0x00000020)
Kojto 107:4f6c30876dfa 945 /**
Kojto 107:4f6c30876dfa 946 * @}
Kojto 107:4f6c30876dfa 947 */
Kojto 107:4f6c30876dfa 948
Kojto 107:4f6c30876dfa 949 /** @defgroup FMC_SDRAM_Internal_Banks_Number FMC SDRAM Internal Banks Number
Kojto 107:4f6c30876dfa 950 * @{
Kojto 107:4f6c30876dfa 951 */
Kojto 107:4f6c30876dfa 952 #define FMC_SDRAM_INTERN_BANKS_NUM_2 ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 953 #define FMC_SDRAM_INTERN_BANKS_NUM_4 ((uint32_t)0x00000040)
Kojto 107:4f6c30876dfa 954 /**
Kojto 107:4f6c30876dfa 955 * @}
Kojto 107:4f6c30876dfa 956 */
Kojto 107:4f6c30876dfa 957
Kojto 107:4f6c30876dfa 958 /** @defgroup FMC_SDRAM_CAS_Latency FMC SDRAM CAS Latency
Kojto 107:4f6c30876dfa 959 * @{
Kojto 107:4f6c30876dfa 960 */
Kojto 107:4f6c30876dfa 961 #define FMC_SDRAM_CAS_LATENCY_1 ((uint32_t)0x00000080)
Kojto 107:4f6c30876dfa 962 #define FMC_SDRAM_CAS_LATENCY_2 ((uint32_t)0x00000100)
Kojto 107:4f6c30876dfa 963 #define FMC_SDRAM_CAS_LATENCY_3 ((uint32_t)0x00000180)
Kojto 107:4f6c30876dfa 964 /**
Kojto 107:4f6c30876dfa 965 * @}
Kojto 107:4f6c30876dfa 966 */
Kojto 107:4f6c30876dfa 967
Kojto 107:4f6c30876dfa 968 /** @defgroup FMC_SDRAM_Write_Protection FMC SDRAM Write Protection
Kojto 107:4f6c30876dfa 969 * @{
Kojto 107:4f6c30876dfa 970 */
Kojto 107:4f6c30876dfa 971 #define FMC_SDRAM_WRITE_PROTECTION_DISABLE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 972 #define FMC_SDRAM_WRITE_PROTECTION_ENABLE ((uint32_t)0x00000200)
Kojto 107:4f6c30876dfa 973 /**
Kojto 107:4f6c30876dfa 974 * @}
Kojto 107:4f6c30876dfa 975 */
Kojto 107:4f6c30876dfa 976
Kojto 107:4f6c30876dfa 977 /** @defgroup FMC_SDRAM_Clock_Period FMC SDRAM Clock Period
Kojto 107:4f6c30876dfa 978 * @{
Kojto 107:4f6c30876dfa 979 */
Kojto 107:4f6c30876dfa 980 #define FMC_SDRAM_CLOCK_DISABLE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 981 #define FMC_SDRAM_CLOCK_PERIOD_2 ((uint32_t)0x00000800)
Kojto 107:4f6c30876dfa 982 #define FMC_SDRAM_CLOCK_PERIOD_3 ((uint32_t)0x00000C00)
Kojto 107:4f6c30876dfa 983 /**
Kojto 107:4f6c30876dfa 984 * @}
Kojto 107:4f6c30876dfa 985 */
Kojto 107:4f6c30876dfa 986
Kojto 107:4f6c30876dfa 987 /** @defgroup FMC_SDRAM_Read_Burst FMC SDRAM Read Burst
Kojto 107:4f6c30876dfa 988 * @{
Kojto 107:4f6c30876dfa 989 */
Kojto 107:4f6c30876dfa 990 #define FMC_SDRAM_RBURST_DISABLE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 991 #define FMC_SDRAM_RBURST_ENABLE ((uint32_t)0x00001000)
Kojto 107:4f6c30876dfa 992 /**
Kojto 107:4f6c30876dfa 993 * @}
Kojto 107:4f6c30876dfa 994 */
Kojto 107:4f6c30876dfa 995
Kojto 107:4f6c30876dfa 996 /** @defgroup FMC_SDRAM_Read_Pipe_Delay FMC SDRAM Read Pipe Delay
Kojto 107:4f6c30876dfa 997 * @{
Kojto 107:4f6c30876dfa 998 */
Kojto 107:4f6c30876dfa 999 #define FMC_SDRAM_RPIPE_DELAY_0 ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 1000 #define FMC_SDRAM_RPIPE_DELAY_1 ((uint32_t)0x00002000)
Kojto 107:4f6c30876dfa 1001 #define FMC_SDRAM_RPIPE_DELAY_2 ((uint32_t)0x00004000)
Kojto 107:4f6c30876dfa 1002 /**
Kojto 107:4f6c30876dfa 1003 * @}
Kojto 107:4f6c30876dfa 1004 */
Kojto 107:4f6c30876dfa 1005
Kojto 107:4f6c30876dfa 1006 /** @defgroup FMC_SDRAM_Command_Mode FMC SDRAM Command Mode
Kojto 107:4f6c30876dfa 1007 * @{
Kojto 107:4f6c30876dfa 1008 */
Kojto 107:4f6c30876dfa 1009 #define FMC_SDRAM_CMD_NORMAL_MODE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 1010 #define FMC_SDRAM_CMD_CLK_ENABLE ((uint32_t)0x00000001)
Kojto 107:4f6c30876dfa 1011 #define FMC_SDRAM_CMD_PALL ((uint32_t)0x00000002)
Kojto 107:4f6c30876dfa 1012 #define FMC_SDRAM_CMD_AUTOREFRESH_MODE ((uint32_t)0x00000003)
Kojto 107:4f6c30876dfa 1013 #define FMC_SDRAM_CMD_LOAD_MODE ((uint32_t)0x00000004)
Kojto 107:4f6c30876dfa 1014 #define FMC_SDRAM_CMD_SELFREFRESH_MODE ((uint32_t)0x00000005)
Kojto 107:4f6c30876dfa 1015 #define FMC_SDRAM_CMD_POWERDOWN_MODE ((uint32_t)0x00000006)
Kojto 107:4f6c30876dfa 1016 /**
Kojto 107:4f6c30876dfa 1017 * @}
Kojto 107:4f6c30876dfa 1018 */
Kojto 107:4f6c30876dfa 1019
Kojto 107:4f6c30876dfa 1020 /** @defgroup FMC_SDRAM_Command_Target FMC SDRAM Command Target
Kojto 107:4f6c30876dfa 1021 * @{
Kojto 107:4f6c30876dfa 1022 */
Kojto 107:4f6c30876dfa 1023 #define FMC_SDRAM_CMD_TARGET_BANK2 FMC_SDCMR_CTB2
Kojto 107:4f6c30876dfa 1024 #define FMC_SDRAM_CMD_TARGET_BANK1 FMC_SDCMR_CTB1
Kojto 107:4f6c30876dfa 1025 #define FMC_SDRAM_CMD_TARGET_BANK1_2 ((uint32_t)0x00000018)
Kojto 107:4f6c30876dfa 1026 /**
Kojto 107:4f6c30876dfa 1027 * @}
Kojto 107:4f6c30876dfa 1028 */
Kojto 107:4f6c30876dfa 1029
Kojto 107:4f6c30876dfa 1030 /** @defgroup FMC_SDRAM_Mode_Status FMC SDRAM Mode Status
Kojto 107:4f6c30876dfa 1031 * @{
Kojto 107:4f6c30876dfa 1032 */
Kojto 107:4f6c30876dfa 1033 #define FMC_SDRAM_NORMAL_MODE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 1034 #define FMC_SDRAM_SELF_REFRESH_MODE FMC_SDSR_MODES1_0
Kojto 107:4f6c30876dfa 1035 #define FMC_SDRAM_POWER_DOWN_MODE FMC_SDSR_MODES1_1
Kojto 107:4f6c30876dfa 1036 /**
Kojto 107:4f6c30876dfa 1037 * @}
Kojto 107:4f6c30876dfa 1038 */
Kojto 107:4f6c30876dfa 1039
Kojto 107:4f6c30876dfa 1040 /**
Kojto 107:4f6c30876dfa 1041 * @}
Kojto 107:4f6c30876dfa 1042 */
Kojto 107:4f6c30876dfa 1043
Kojto 107:4f6c30876dfa 1044 /** @defgroup FMC_LL_Interrupt_definition FMC Low Layer Interrupt definition
Kojto 107:4f6c30876dfa 1045 * @{
Kojto 107:4f6c30876dfa 1046 */
Kojto 107:4f6c30876dfa 1047 #define FMC_IT_RISING_EDGE ((uint32_t)0x00000008)
Kojto 107:4f6c30876dfa 1048 #define FMC_IT_LEVEL ((uint32_t)0x00000010)
Kojto 107:4f6c30876dfa 1049 #define FMC_IT_FALLING_EDGE ((uint32_t)0x00000020)
Kojto 107:4f6c30876dfa 1050 #define FMC_IT_REFRESH_ERROR ((uint32_t)0x00004000)
Kojto 107:4f6c30876dfa 1051 /**
Kojto 107:4f6c30876dfa 1052 * @}
Kojto 107:4f6c30876dfa 1053 */
Kojto 107:4f6c30876dfa 1054
Kojto 107:4f6c30876dfa 1055 /** @defgroup FMC_LL_Flag_definition FMC Low Layer Flag definition
Kojto 107:4f6c30876dfa 1056 * @{
Kojto 107:4f6c30876dfa 1057 */
Kojto 107:4f6c30876dfa 1058 #define FMC_FLAG_RISING_EDGE ((uint32_t)0x00000001)
Kojto 107:4f6c30876dfa 1059 #define FMC_FLAG_LEVEL ((uint32_t)0x00000002)
Kojto 107:4f6c30876dfa 1060 #define FMC_FLAG_FALLING_EDGE ((uint32_t)0x00000004)
Kojto 107:4f6c30876dfa 1061 #define FMC_FLAG_FEMPT ((uint32_t)0x00000040)
Kojto 107:4f6c30876dfa 1062 #define FMC_SDRAM_FLAG_REFRESH_IT FMC_SDSR_RE
Kojto 107:4f6c30876dfa 1063 #define FMC_SDRAM_FLAG_BUSY FMC_SDSR_BUSY
Kojto 107:4f6c30876dfa 1064 #define FMC_SDRAM_FLAG_REFRESH_ERROR FMC_SDRTR_CRE
Kojto 107:4f6c30876dfa 1065 /**
Kojto 107:4f6c30876dfa 1066 * @}
Kojto 107:4f6c30876dfa 1067 */
Kojto 107:4f6c30876dfa 1068 /**
Kojto 107:4f6c30876dfa 1069 * @}
Kojto 107:4f6c30876dfa 1070 */
Kojto 107:4f6c30876dfa 1071
Kojto 107:4f6c30876dfa 1072 /**
Kojto 107:4f6c30876dfa 1073 * @}
Kojto 107:4f6c30876dfa 1074 */
Kojto 107:4f6c30876dfa 1075
Kojto 107:4f6c30876dfa 1076 /* Private macro -------------------------------------------------------------*/
Kojto 107:4f6c30876dfa 1077 /** @defgroup FMC_LL_Private_Macros FMC_LL Private Macros
Kojto 107:4f6c30876dfa 1078 * @{
Kojto 107:4f6c30876dfa 1079 */
Kojto 107:4f6c30876dfa 1080
Kojto 107:4f6c30876dfa 1081 /** @defgroup FMC_LL_NOR_Macros FMC NOR/SRAM Macros
Kojto 107:4f6c30876dfa 1082 * @brief macros to handle NOR device enable/disable and read/write operations
Kojto 107:4f6c30876dfa 1083 * @{
Kojto 107:4f6c30876dfa 1084 */
Kojto 107:4f6c30876dfa 1085
Kojto 107:4f6c30876dfa 1086 /**
Kojto 107:4f6c30876dfa 1087 * @brief Enable the NORSRAM device access.
Kojto 107:4f6c30876dfa 1088 * @param __INSTANCE__: FMC_NORSRAM Instance
Kojto 107:4f6c30876dfa 1089 * @param __BANK__: FMC_NORSRAM Bank
Kojto 107:4f6c30876dfa 1090 * @retval None
Kojto 107:4f6c30876dfa 1091 */
Kojto 107:4f6c30876dfa 1092 #define __FMC_NORSRAM_ENABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->BTCR[(__BANK__)] |= FMC_BCR1_MBKEN)
Kojto 107:4f6c30876dfa 1093
Kojto 107:4f6c30876dfa 1094 /**
Kojto 107:4f6c30876dfa 1095 * @brief Disable the NORSRAM device access.
Kojto 107:4f6c30876dfa 1096 * @param __INSTANCE__: FMC_NORSRAM Instance
Kojto 107:4f6c30876dfa 1097 * @param __BANK__: FMC_NORSRAM Bank
Kojto 107:4f6c30876dfa 1098 * @retval None
Kojto 107:4f6c30876dfa 1099 */
Kojto 107:4f6c30876dfa 1100 #define __FMC_NORSRAM_DISABLE(__INSTANCE__, __BANK__) ((__INSTANCE__)->BTCR[(__BANK__)] &= ~FMC_BCR1_MBKEN)
Kojto 107:4f6c30876dfa 1101
Kojto 107:4f6c30876dfa 1102 /**
Kojto 107:4f6c30876dfa 1103 * @}
Kojto 107:4f6c30876dfa 1104 */
Kojto 107:4f6c30876dfa 1105
Kojto 107:4f6c30876dfa 1106 /** @defgroup FMC_LL_NAND_Macros FMC NAND Macros
Kojto 107:4f6c30876dfa 1107 * @brief macros to handle NAND device enable/disable
Kojto 107:4f6c30876dfa 1108 * @{
Kojto 107:4f6c30876dfa 1109 */
Kojto 107:4f6c30876dfa 1110
Kojto 107:4f6c30876dfa 1111 /**
Kojto 107:4f6c30876dfa 1112 * @brief Enable the NAND device access.
Kojto 107:4f6c30876dfa 1113 * @param __INSTANCE__: FMC_NAND Instance
Kojto 107:4f6c30876dfa 1114 * @retval None
Kojto 107:4f6c30876dfa 1115 */
Kojto 107:4f6c30876dfa 1116 #define __FMC_NAND_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR |= FMC_PCR_PBKEN)
Kojto 107:4f6c30876dfa 1117
Kojto 107:4f6c30876dfa 1118 /**
Kojto 107:4f6c30876dfa 1119 * @brief Disable the NAND device access.
Kojto 107:4f6c30876dfa 1120 * @param __INSTANCE__: FMC_NAND Instance
Kojto 107:4f6c30876dfa 1121 * @retval None
Kojto 107:4f6c30876dfa 1122 */
Kojto 107:4f6c30876dfa 1123 #define __FMC_NAND_DISABLE(__INSTANCE__) ((__INSTANCE__)->PCR &= ~FMC_PCR_PBKEN)
Kojto 107:4f6c30876dfa 1124
Kojto 107:4f6c30876dfa 1125 /**
Kojto 107:4f6c30876dfa 1126 * @}
Kojto 107:4f6c30876dfa 1127 */
Kojto 107:4f6c30876dfa 1128
Kojto 107:4f6c30876dfa 1129 /** @defgroup FMC_Interrupt FMC Interrupt
Kojto 107:4f6c30876dfa 1130 * @brief macros to handle FMC interrupts
Kojto 107:4f6c30876dfa 1131 * @{
Kojto 107:4f6c30876dfa 1132 */
Kojto 107:4f6c30876dfa 1133
Kojto 107:4f6c30876dfa 1134 /**
Kojto 107:4f6c30876dfa 1135 * @brief Enable the NAND device interrupt.
Kojto 107:4f6c30876dfa 1136 * @param __INSTANCE__: FMC_NAND instance
Kojto 107:4f6c30876dfa 1137 * @param __INTERRUPT__: FMC_NAND interrupt
Kojto 107:4f6c30876dfa 1138 * This parameter can be any combination of the following values:
Kojto 107:4f6c30876dfa 1139 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
Kojto 107:4f6c30876dfa 1140 * @arg FMC_IT_LEVEL: Interrupt level.
Kojto 107:4f6c30876dfa 1141 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
Kojto 107:4f6c30876dfa 1142 * @retval None
Kojto 107:4f6c30876dfa 1143 */
Kojto 107:4f6c30876dfa 1144 #define __FMC_NAND_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SR |= (__INTERRUPT__))
Kojto 107:4f6c30876dfa 1145
Kojto 107:4f6c30876dfa 1146 /**
Kojto 107:4f6c30876dfa 1147 * @brief Disable the NAND device interrupt.
Kojto 107:4f6c30876dfa 1148 * @param __INSTANCE__: FMC_NAND Instance
Kojto 107:4f6c30876dfa 1149 * @param __INTERRUPT__: FMC_NAND interrupt
Kojto 107:4f6c30876dfa 1150 * This parameter can be any combination of the following values:
Kojto 107:4f6c30876dfa 1151 * @arg FMC_IT_RISING_EDGE: Interrupt rising edge.
Kojto 107:4f6c30876dfa 1152 * @arg FMC_IT_LEVEL: Interrupt level.
Kojto 107:4f6c30876dfa 1153 * @arg FMC_IT_FALLING_EDGE: Interrupt falling edge.
Kojto 107:4f6c30876dfa 1154 * @retval None
Kojto 107:4f6c30876dfa 1155 */
Kojto 107:4f6c30876dfa 1156 #define __FMC_NAND_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SR &= ~(__INTERRUPT__))
Kojto 107:4f6c30876dfa 1157
Kojto 107:4f6c30876dfa 1158 /**
Kojto 107:4f6c30876dfa 1159 * @brief Get flag status of the NAND device.
Kojto 107:4f6c30876dfa 1160 * @param __INSTANCE__: FMC_NAND Instance
Kojto 107:4f6c30876dfa 1161 * @param __BANK__: FMC_NAND Bank
Kojto 107:4f6c30876dfa 1162 * @param __FLAG__: FMC_NAND flag
Kojto 107:4f6c30876dfa 1163 * This parameter can be any combination of the following values:
Kojto 107:4f6c30876dfa 1164 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
Kojto 107:4f6c30876dfa 1165 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
Kojto 107:4f6c30876dfa 1166 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
Kojto 107:4f6c30876dfa 1167 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
Kojto 107:4f6c30876dfa 1168 * @retval The state of FLAG (SET or RESET).
Kojto 107:4f6c30876dfa 1169 */
Kojto 107:4f6c30876dfa 1170 #define __FMC_NAND_GET_FLAG(__INSTANCE__, __BANK__, __FLAG__) (((__INSTANCE__)->SR &(__FLAG__)) == (__FLAG__))
Kojto 107:4f6c30876dfa 1171
Kojto 107:4f6c30876dfa 1172 /**
Kojto 107:4f6c30876dfa 1173 * @brief Clear flag status of the NAND device.
Kojto 107:4f6c30876dfa 1174 * @param __INSTANCE__: FMC_NAND Instance
Kojto 107:4f6c30876dfa 1175 * @param __FLAG__: FMC_NAND flag
Kojto 107:4f6c30876dfa 1176 * This parameter can be any combination of the following values:
Kojto 107:4f6c30876dfa 1177 * @arg FMC_FLAG_RISING_EDGE: Interrupt rising edge flag.
Kojto 107:4f6c30876dfa 1178 * @arg FMC_FLAG_LEVEL: Interrupt level edge flag.
Kojto 107:4f6c30876dfa 1179 * @arg FMC_FLAG_FALLING_EDGE: Interrupt falling edge flag.
Kojto 107:4f6c30876dfa 1180 * @arg FMC_FLAG_FEMPT: FIFO empty flag.
Kojto 107:4f6c30876dfa 1181 * @retval None
Kojto 107:4f6c30876dfa 1182 */
Kojto 107:4f6c30876dfa 1183 #define __FMC_NAND_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->SR &= ~(__FLAG__))
Kojto 107:4f6c30876dfa 1184
Kojto 107:4f6c30876dfa 1185 /**
Kojto 107:4f6c30876dfa 1186 * @brief Enable the SDRAM device interrupt.
Kojto 107:4f6c30876dfa 1187 * @param __INSTANCE__: FMC_SDRAM instance
Kojto 107:4f6c30876dfa 1188 * @param __INTERRUPT__: FMC_SDRAM interrupt
Kojto 107:4f6c30876dfa 1189 * This parameter can be any combination of the following values:
Kojto 107:4f6c30876dfa 1190 * @arg FMC_IT_REFRESH_ERROR: Interrupt refresh error
Kojto 107:4f6c30876dfa 1191 * @retval None
Kojto 107:4f6c30876dfa 1192 */
Kojto 107:4f6c30876dfa 1193 #define __FMC_SDRAM_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SDRTR |= (__INTERRUPT__))
Kojto 107:4f6c30876dfa 1194
Kojto 107:4f6c30876dfa 1195 /**
Kojto 107:4f6c30876dfa 1196 * @brief Disable the SDRAM device interrupt.
Kojto 107:4f6c30876dfa 1197 * @param __INSTANCE__: FMC_SDRAM instance
Kojto 107:4f6c30876dfa 1198 * @param __INTERRUPT__: FMC_SDRAM interrupt
Kojto 107:4f6c30876dfa 1199 * This parameter can be any combination of the following values:
Kojto 107:4f6c30876dfa 1200 * @arg FMC_IT_REFRESH_ERROR: Interrupt refresh error
Kojto 107:4f6c30876dfa 1201 * @retval None
Kojto 107:4f6c30876dfa 1202 */
Kojto 107:4f6c30876dfa 1203 #define __FMC_SDRAM_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->SDRTR &= ~(__INTERRUPT__))
Kojto 107:4f6c30876dfa 1204
Kojto 107:4f6c30876dfa 1205 /**
Kojto 107:4f6c30876dfa 1206 * @brief Get flag status of the SDRAM device.
Kojto 107:4f6c30876dfa 1207 * @param __INSTANCE__: FMC_SDRAM instance
Kojto 107:4f6c30876dfa 1208 * @param __FLAG__: FMC_SDRAM flag
Kojto 107:4f6c30876dfa 1209 * This parameter can be any combination of the following values:
Kojto 107:4f6c30876dfa 1210 * @arg FMC_SDRAM_FLAG_REFRESH_IT: Interrupt refresh error.
Kojto 107:4f6c30876dfa 1211 * @arg FMC_SDRAM_FLAG_BUSY: SDRAM busy flag.
Kojto 107:4f6c30876dfa 1212 * @arg FMC_SDRAM_FLAG_REFRESH_ERROR: Refresh error flag.
Kojto 107:4f6c30876dfa 1213 * @retval The state of FLAG (SET or RESET).
Kojto 107:4f6c30876dfa 1214 */
Kojto 107:4f6c30876dfa 1215 #define __FMC_SDRAM_GET_FLAG(__INSTANCE__, __FLAG__) (((__INSTANCE__)->SDSR &(__FLAG__)) == (__FLAG__))
Kojto 107:4f6c30876dfa 1216
Kojto 107:4f6c30876dfa 1217 /**
Kojto 107:4f6c30876dfa 1218 * @brief Clear flag status of the SDRAM device.
Kojto 107:4f6c30876dfa 1219 * @param __INSTANCE__: FMC_SDRAM instance
Kojto 107:4f6c30876dfa 1220 * @param __FLAG__: FMC_SDRAM flag
Kojto 107:4f6c30876dfa 1221 * This parameter can be any combination of the following values:
Kojto 107:4f6c30876dfa 1222 * @arg FMC_SDRAM_FLAG_REFRESH_ERROR
Kojto 107:4f6c30876dfa 1223 * @retval None
Kojto 107:4f6c30876dfa 1224 */
Kojto 107:4f6c30876dfa 1225 #define __FMC_SDRAM_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->SDRTR |= (__FLAG__))
Kojto 107:4f6c30876dfa 1226 /**
Kojto 107:4f6c30876dfa 1227 * @}
Kojto 107:4f6c30876dfa 1228 */
Kojto 107:4f6c30876dfa 1229
Kojto 107:4f6c30876dfa 1230 /**
Kojto 107:4f6c30876dfa 1231 * @}
Kojto 107:4f6c30876dfa 1232 */
Kojto 107:4f6c30876dfa 1233
Kojto 107:4f6c30876dfa 1234 /* Private functions ---------------------------------------------------------*/
Kojto 107:4f6c30876dfa 1235 /** @defgroup FMC_LL_Private_Functions FMC LL Private Functions
Kojto 107:4f6c30876dfa 1236 * @{
Kojto 107:4f6c30876dfa 1237 */
Kojto 107:4f6c30876dfa 1238
Kojto 107:4f6c30876dfa 1239 /** @defgroup FMC_LL_NORSRAM NOR SRAM
Kojto 107:4f6c30876dfa 1240 * @{
Kojto 107:4f6c30876dfa 1241 */
Kojto 107:4f6c30876dfa 1242 /** @defgroup FMC_LL_NORSRAM_Private_Functions_Group1 NOR SRAM Initialization/de-initialization functions
Kojto 107:4f6c30876dfa 1243 * @{
Kojto 107:4f6c30876dfa 1244 */
Kojto 107:4f6c30876dfa 1245 HAL_StatusTypeDef FMC_NORSRAM_Init(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_InitTypeDef *Init);
Kojto 107:4f6c30876dfa 1246 HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank);
Kojto 107:4f6c30876dfa 1247 HAL_StatusTypeDef FMC_NORSRAM_Extended_Timing_Init(FMC_NORSRAM_EXTENDED_TypeDef *Device, FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode);
Kojto 107:4f6c30876dfa 1248 HAL_StatusTypeDef FMC_NORSRAM_DeInit(FMC_NORSRAM_TypeDef *Device, FMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank);
Kojto 107:4f6c30876dfa 1249 /**
Kojto 107:4f6c30876dfa 1250 * @}
Kojto 107:4f6c30876dfa 1251 */
Kojto 107:4f6c30876dfa 1252
Kojto 107:4f6c30876dfa 1253 /** @defgroup FMC_LL_NORSRAM_Private_Functions_Group2 NOR SRAM Control functions
Kojto 107:4f6c30876dfa 1254 * @{
Kojto 107:4f6c30876dfa 1255 */
Kojto 107:4f6c30876dfa 1256 HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Enable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank);
Kojto 107:4f6c30876dfa 1257 HAL_StatusTypeDef FMC_NORSRAM_WriteOperation_Disable(FMC_NORSRAM_TypeDef *Device, uint32_t Bank);
Kojto 107:4f6c30876dfa 1258 /**
Kojto 107:4f6c30876dfa 1259 * @}
Kojto 107:4f6c30876dfa 1260 */
Kojto 107:4f6c30876dfa 1261 /**
Kojto 107:4f6c30876dfa 1262 * @}
Kojto 107:4f6c30876dfa 1263 */
Kojto 107:4f6c30876dfa 1264
Kojto 107:4f6c30876dfa 1265 /** @defgroup FMC_LL_NAND NAND
Kojto 107:4f6c30876dfa 1266 * @{
Kojto 107:4f6c30876dfa 1267 */
Kojto 107:4f6c30876dfa 1268 /** @defgroup FMC_LL_NAND_Private_Functions_Group1 NAND Initialization/de-initialization functions
Kojto 107:4f6c30876dfa 1269 * @{
Kojto 107:4f6c30876dfa 1270 */
Kojto 107:4f6c30876dfa 1271 HAL_StatusTypeDef FMC_NAND_Init(FMC_NAND_TypeDef *Device, FMC_NAND_InitTypeDef *Init);
Kojto 107:4f6c30876dfa 1272 HAL_StatusTypeDef FMC_NAND_CommonSpace_Timing_Init(FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
Kojto 107:4f6c30876dfa 1273 HAL_StatusTypeDef FMC_NAND_AttributeSpace_Timing_Init(FMC_NAND_TypeDef *Device, FMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank);
Kojto 107:4f6c30876dfa 1274 HAL_StatusTypeDef FMC_NAND_DeInit(FMC_NAND_TypeDef *Device, uint32_t Bank);
Kojto 107:4f6c30876dfa 1275 /**
Kojto 107:4f6c30876dfa 1276 * @}
Kojto 107:4f6c30876dfa 1277 */
Kojto 107:4f6c30876dfa 1278
Kojto 107:4f6c30876dfa 1279 /** @defgroup FMC_LL_NAND_Private_Functions_Group2 NAND Control functions
Kojto 107:4f6c30876dfa 1280 * @{
Kojto 107:4f6c30876dfa 1281 */
Kojto 107:4f6c30876dfa 1282 HAL_StatusTypeDef FMC_NAND_ECC_Enable(FMC_NAND_TypeDef *Device, uint32_t Bank);
Kojto 107:4f6c30876dfa 1283 HAL_StatusTypeDef FMC_NAND_ECC_Disable(FMC_NAND_TypeDef *Device, uint32_t Bank);
Kojto 107:4f6c30876dfa 1284 HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, uint32_t Timeout);
Kojto 107:4f6c30876dfa 1285 /**
Kojto 107:4f6c30876dfa 1286 * @}
Kojto 107:4f6c30876dfa 1287 */
Kojto 107:4f6c30876dfa 1288
Kojto 107:4f6c30876dfa 1289 /** @defgroup FMC_LL_SDRAM SDRAM
Kojto 107:4f6c30876dfa 1290 * @{
Kojto 107:4f6c30876dfa 1291 */
Kojto 107:4f6c30876dfa 1292 /** @defgroup FMC_LL_SDRAM_Private_Functions_Group1 SDRAM Initialization/de-initialization functions
Kojto 107:4f6c30876dfa 1293 * @{
Kojto 107:4f6c30876dfa 1294 */
Kojto 107:4f6c30876dfa 1295 HAL_StatusTypeDef FMC_SDRAM_Init(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_InitTypeDef *Init);
Kojto 107:4f6c30876dfa 1296 HAL_StatusTypeDef FMC_SDRAM_Timing_Init(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_TimingTypeDef *Timing, uint32_t Bank);
Kojto 107:4f6c30876dfa 1297 HAL_StatusTypeDef FMC_SDRAM_DeInit(FMC_SDRAM_TypeDef *Device, uint32_t Bank);
Kojto 107:4f6c30876dfa 1298
Kojto 107:4f6c30876dfa 1299 /**
Kojto 107:4f6c30876dfa 1300 * @}
Kojto 107:4f6c30876dfa 1301 */
Kojto 107:4f6c30876dfa 1302
Kojto 107:4f6c30876dfa 1303 /** @defgroup FMC_LL_SDRAM_Private_Functions_Group2 SDRAM Control functions
Kojto 107:4f6c30876dfa 1304 * @{
Kojto 107:4f6c30876dfa 1305 */
Kojto 107:4f6c30876dfa 1306 HAL_StatusTypeDef FMC_SDRAM_WriteProtection_Enable(FMC_SDRAM_TypeDef *Device, uint32_t Bank);
Kojto 107:4f6c30876dfa 1307 HAL_StatusTypeDef FMC_SDRAM_WriteProtection_Disable(FMC_SDRAM_TypeDef *Device, uint32_t Bank);
Kojto 107:4f6c30876dfa 1308 HAL_StatusTypeDef FMC_SDRAM_SendCommand(FMC_SDRAM_TypeDef *Device, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout);
Kojto 107:4f6c30876dfa 1309 HAL_StatusTypeDef FMC_SDRAM_ProgramRefreshRate(FMC_SDRAM_TypeDef *Device, uint32_t RefreshRate);
Kojto 107:4f6c30876dfa 1310 HAL_StatusTypeDef FMC_SDRAM_SetAutoRefreshNumber(FMC_SDRAM_TypeDef *Device, uint32_t AutoRefreshNumber);
Kojto 107:4f6c30876dfa 1311 uint32_t FMC_SDRAM_GetModeStatus(FMC_SDRAM_TypeDef *Device, uint32_t Bank);
Kojto 107:4f6c30876dfa 1312 /**
Kojto 107:4f6c30876dfa 1313 * @}
Kojto 107:4f6c30876dfa 1314 */
Kojto 107:4f6c30876dfa 1315
Kojto 107:4f6c30876dfa 1316 /**
Kojto 107:4f6c30876dfa 1317 * @}
Kojto 107:4f6c30876dfa 1318 */
Kojto 107:4f6c30876dfa 1319
Kojto 107:4f6c30876dfa 1320 /**
Kojto 107:4f6c30876dfa 1321 * @}
Kojto 107:4f6c30876dfa 1322 */
Kojto 107:4f6c30876dfa 1323
Kojto 107:4f6c30876dfa 1324 /**
Kojto 107:4f6c30876dfa 1325 * @}
Kojto 107:4f6c30876dfa 1326 */
Kojto 107:4f6c30876dfa 1327
Kojto 107:4f6c30876dfa 1328 /**
Kojto 107:4f6c30876dfa 1329 * @}
Kojto 107:4f6c30876dfa 1330 */
Kojto 107:4f6c30876dfa 1331 #ifdef __cplusplus
Kojto 107:4f6c30876dfa 1332 }
Kojto 107:4f6c30876dfa 1333 #endif
Kojto 107:4f6c30876dfa 1334
Kojto 107:4f6c30876dfa 1335 #endif /* __STM32F7xx_LL_FMC_H */
Kojto 107:4f6c30876dfa 1336
Kojto 107:4f6c30876dfa 1337 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/