Ricardo Benitez / mbed

Fork of mbed by mbed official

Committer:
Kojto
Date:
Wed Sep 16 15:32:31 2015 +0100
Revision:
107:4f6c30876dfa
Child:
116:c0f6e94411f5
Release 107  of the mbed library

Changes:
- new platforms - DISCO_F746NG, DISCO_L476VG, NUCLEO_L476RG
- KL43Z - bugfix RTC init function
- K20 - SPI mode fix

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 107:4f6c30876dfa 1 /**
Kojto 107:4f6c30876dfa 2 ******************************************************************************
Kojto 107:4f6c30876dfa 3 * @file stm32f7xx_hal_qspi.h
Kojto 107:4f6c30876dfa 4 * @author MCD Application Team
Kojto 107:4f6c30876dfa 5 * @version V1.0.1
Kojto 107:4f6c30876dfa 6 * @date 25-June-2015
Kojto 107:4f6c30876dfa 7 * @brief Header file of QSPI HAL module.
Kojto 107:4f6c30876dfa 8 ******************************************************************************
Kojto 107:4f6c30876dfa 9 * @attention
Kojto 107:4f6c30876dfa 10 *
Kojto 107:4f6c30876dfa 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 107:4f6c30876dfa 12 *
Kojto 107:4f6c30876dfa 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 107:4f6c30876dfa 14 * are permitted provided that the following conditions are met:
Kojto 107:4f6c30876dfa 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 107:4f6c30876dfa 16 * this list of conditions and the following disclaimer.
Kojto 107:4f6c30876dfa 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 107:4f6c30876dfa 18 * this list of conditions and the following disclaimer in the documentation
Kojto 107:4f6c30876dfa 19 * and/or other materials provided with the distribution.
Kojto 107:4f6c30876dfa 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 107:4f6c30876dfa 21 * may be used to endorse or promote products derived from this software
Kojto 107:4f6c30876dfa 22 * without specific prior written permission.
Kojto 107:4f6c30876dfa 23 *
Kojto 107:4f6c30876dfa 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 107:4f6c30876dfa 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 107:4f6c30876dfa 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 107:4f6c30876dfa 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 107:4f6c30876dfa 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 107:4f6c30876dfa 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 107:4f6c30876dfa 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 107:4f6c30876dfa 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 107:4f6c30876dfa 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 107:4f6c30876dfa 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 107:4f6c30876dfa 34 *
Kojto 107:4f6c30876dfa 35 ******************************************************************************
Kojto 107:4f6c30876dfa 36 */
Kojto 107:4f6c30876dfa 37
Kojto 107:4f6c30876dfa 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 107:4f6c30876dfa 39 #ifndef __STM32F7xx_HAL_QSPI_H
Kojto 107:4f6c30876dfa 40 #define __STM32F7xx_HAL_QSPI_H
Kojto 107:4f6c30876dfa 41
Kojto 107:4f6c30876dfa 42 #ifdef __cplusplus
Kojto 107:4f6c30876dfa 43 extern "C" {
Kojto 107:4f6c30876dfa 44 #endif
Kojto 107:4f6c30876dfa 45
Kojto 107:4f6c30876dfa 46 /* Includes ------------------------------------------------------------------*/
Kojto 107:4f6c30876dfa 47 #include "stm32f7xx_hal_def.h"
Kojto 107:4f6c30876dfa 48
Kojto 107:4f6c30876dfa 49 /** @addtogroup STM32F7xx_HAL_Driver
Kojto 107:4f6c30876dfa 50 * @{
Kojto 107:4f6c30876dfa 51 */
Kojto 107:4f6c30876dfa 52
Kojto 107:4f6c30876dfa 53 /** @addtogroup QSPI
Kojto 107:4f6c30876dfa 54 * @{
Kojto 107:4f6c30876dfa 55 */
Kojto 107:4f6c30876dfa 56
Kojto 107:4f6c30876dfa 57 /* Exported types ------------------------------------------------------------*/
Kojto 107:4f6c30876dfa 58 /** @defgroup QSPI_Exported_Types QSPI Exported Types
Kojto 107:4f6c30876dfa 59 * @{
Kojto 107:4f6c30876dfa 60 */
Kojto 107:4f6c30876dfa 61
Kojto 107:4f6c30876dfa 62 /**
Kojto 107:4f6c30876dfa 63 * @brief QSPI Init structure definition
Kojto 107:4f6c30876dfa 64 */
Kojto 107:4f6c30876dfa 65
Kojto 107:4f6c30876dfa 66 typedef struct
Kojto 107:4f6c30876dfa 67 {
Kojto 107:4f6c30876dfa 68 uint32_t ClockPrescaler; /* Specifies the prescaler factor for generating clock based on the AHB clock.
Kojto 107:4f6c30876dfa 69 This parameter can be a number between 0 and 255 */
Kojto 107:4f6c30876dfa 70
Kojto 107:4f6c30876dfa 71 uint32_t FifoThreshold; /* Specifies the threshold number of bytes in the FIFO (used only in indirect mode)
Kojto 107:4f6c30876dfa 72 This parameter can be a value between 1 and 32 */
Kojto 107:4f6c30876dfa 73
Kojto 107:4f6c30876dfa 74 uint32_t SampleShifting; /* Specifies the Sample Shift. The data is sampled 1/2 clock cycle delay later to
Kojto 107:4f6c30876dfa 75 take in account external signal delays. (It should be QSPI_SAMPLE_SHIFTING_NONE in DDR mode)
Kojto 107:4f6c30876dfa 76 This parameter can be a value of @ref QSPI_SampleShifting */
Kojto 107:4f6c30876dfa 77
Kojto 107:4f6c30876dfa 78 uint32_t FlashSize; /* Specifies the Flash Size. FlashSize+1 is effectively the number of address bits
Kojto 107:4f6c30876dfa 79 required to address the flash memory. The flash capacity can be up to 4GB
Kojto 107:4f6c30876dfa 80 (addressed using 32 bits) in indirect mode, but the addressable space in
Kojto 107:4f6c30876dfa 81 memory-mapped mode is limited to 256MB
Kojto 107:4f6c30876dfa 82 This parameter can be a number between 0 and 31 */
Kojto 107:4f6c30876dfa 83
Kojto 107:4f6c30876dfa 84 uint32_t ChipSelectHighTime; /* Specifies the Chip Select High Time. ChipSelectHighTime+1 defines the minimum number
Kojto 107:4f6c30876dfa 85 of clock cycles which the chip select must remain high between commands.
Kojto 107:4f6c30876dfa 86 This parameter can be a value of @ref QSPI_ChipSelectHighTime */
Kojto 107:4f6c30876dfa 87
Kojto 107:4f6c30876dfa 88 uint32_t ClockMode; /* Specifies the Clock Mode. It indicates the level that clock takes between commands.
Kojto 107:4f6c30876dfa 89 This parameter can be a value of @ref QSPI_ClockMode */
Kojto 107:4f6c30876dfa 90
Kojto 107:4f6c30876dfa 91 uint32_t FlashID; /* Specifies the Flash which will be used,
Kojto 107:4f6c30876dfa 92 This parameter can be a value of @ref QSPI_Flash_Select */
Kojto 107:4f6c30876dfa 93
Kojto 107:4f6c30876dfa 94 uint32_t DualFlash; /* Specifies the Dual Flash Mode State
Kojto 107:4f6c30876dfa 95 This parameter can be a value of @ref QSPI_DualFlash_Mode */
Kojto 107:4f6c30876dfa 96 }QSPI_InitTypeDef;
Kojto 107:4f6c30876dfa 97
Kojto 107:4f6c30876dfa 98 /**
Kojto 107:4f6c30876dfa 99 * @brief HAL QSPI State structures definition
Kojto 107:4f6c30876dfa 100 */
Kojto 107:4f6c30876dfa 101 typedef enum
Kojto 107:4f6c30876dfa 102 {
Kojto 107:4f6c30876dfa 103 HAL_QSPI_STATE_RESET = 0x00, /*!< Peripheral not initialized */
Kojto 107:4f6c30876dfa 104 HAL_QSPI_STATE_READY = 0x01, /*!< Peripheral initialized and ready for use */
Kojto 107:4f6c30876dfa 105 HAL_QSPI_STATE_BUSY = 0x02, /*!< Peripheral in indirect mode and busy */
Kojto 107:4f6c30876dfa 106 HAL_QSPI_STATE_BUSY_INDIRECT_TX = 0x12, /*!< Peripheral in indirect mode with transmission ongoing */
Kojto 107:4f6c30876dfa 107 HAL_QSPI_STATE_BUSY_INDIRECT_RX = 0x22, /*!< Peripheral in indirect mode with reception ongoing */
Kojto 107:4f6c30876dfa 108 HAL_QSPI_STATE_BUSY_AUTO_POLLING = 0x42, /*!< Peripheral in auto polling mode ongoing */
Kojto 107:4f6c30876dfa 109 HAL_QSPI_STATE_BUSY_MEM_MAPPED = 0x82, /*!< Peripheral in memory mapped mode ongoing */
Kojto 107:4f6c30876dfa 110 HAL_QSPI_STATE_ERROR = 0x04 /*!< Peripheral in error */
Kojto 107:4f6c30876dfa 111 }HAL_QSPI_StateTypeDef;
Kojto 107:4f6c30876dfa 112
Kojto 107:4f6c30876dfa 113 /**
Kojto 107:4f6c30876dfa 114 * @brief QSPI Handle Structure definition
Kojto 107:4f6c30876dfa 115 */
Kojto 107:4f6c30876dfa 116 typedef struct
Kojto 107:4f6c30876dfa 117 {
Kojto 107:4f6c30876dfa 118 QUADSPI_TypeDef *Instance; /* QSPI registers base address */
Kojto 107:4f6c30876dfa 119 QSPI_InitTypeDef Init; /* QSPI communication parameters */
Kojto 107:4f6c30876dfa 120 uint8_t *pTxBuffPtr; /* Pointer to QSPI Tx transfer Buffer */
Kojto 107:4f6c30876dfa 121 __IO uint16_t TxXferSize; /* QSPI Tx Transfer size */
Kojto 107:4f6c30876dfa 122 __IO uint16_t TxXferCount; /* QSPI Tx Transfer Counter */
Kojto 107:4f6c30876dfa 123 uint8_t *pRxBuffPtr; /* Pointer to QSPI Rx transfer Buffer */
Kojto 107:4f6c30876dfa 124 __IO uint16_t RxXferSize; /* QSPI Rx Transfer size */
Kojto 107:4f6c30876dfa 125 __IO uint16_t RxXferCount; /* QSPI Rx Transfer Counter */
Kojto 107:4f6c30876dfa 126 DMA_HandleTypeDef *hdma; /* QSPI Rx/Tx DMA Handle parameters */
Kojto 107:4f6c30876dfa 127 __IO HAL_LockTypeDef Lock; /* Locking object */
Kojto 107:4f6c30876dfa 128 __IO HAL_QSPI_StateTypeDef State; /* QSPI communication state */
Kojto 107:4f6c30876dfa 129 __IO uint32_t ErrorCode; /* QSPI Error code */
Kojto 107:4f6c30876dfa 130 uint32_t Timeout; /* Timeout for the QSPI memory access */
Kojto 107:4f6c30876dfa 131 }QSPI_HandleTypeDef;
Kojto 107:4f6c30876dfa 132
Kojto 107:4f6c30876dfa 133 /**
Kojto 107:4f6c30876dfa 134 * @brief QSPI Command structure definition
Kojto 107:4f6c30876dfa 135 */
Kojto 107:4f6c30876dfa 136 typedef struct
Kojto 107:4f6c30876dfa 137 {
Kojto 107:4f6c30876dfa 138 uint32_t Instruction; /* Specifies the Instruction to be sent
Kojto 107:4f6c30876dfa 139 This parameter can be a value (8-bit) between 0x00 and 0xFF */
Kojto 107:4f6c30876dfa 140 uint32_t Address; /* Specifies the Address to be sent (Size from 1 to 4 bytes according AddressSize)
Kojto 107:4f6c30876dfa 141 This parameter can be a value (32-bits) between 0x0 and 0xFFFFFFFF */
Kojto 107:4f6c30876dfa 142 uint32_t AlternateBytes; /* Specifies the Alternate Bytes to be sent (Size from 1 to 4 bytes according AlternateBytesSize)
Kojto 107:4f6c30876dfa 143 This parameter can be a value (32-bits) between 0x0 and 0xFFFFFFFF */
Kojto 107:4f6c30876dfa 144 uint32_t AddressSize; /* Specifies the Address Size
Kojto 107:4f6c30876dfa 145 This parameter can be a value of @ref QSPI_AddressSize */
Kojto 107:4f6c30876dfa 146 uint32_t AlternateBytesSize; /* Specifies the Alternate Bytes Size
Kojto 107:4f6c30876dfa 147 This parameter can be a value of @ref QSPI_AlternateBytesSize */
Kojto 107:4f6c30876dfa 148 uint32_t DummyCycles; /* Specifies the Number of Dummy Cycles.
Kojto 107:4f6c30876dfa 149 This parameter can be a number between 0 and 31 */
Kojto 107:4f6c30876dfa 150 uint32_t InstructionMode; /* Specifies the Instruction Mode
Kojto 107:4f6c30876dfa 151 This parameter can be a value of @ref QSPI_InstructionMode */
Kojto 107:4f6c30876dfa 152 uint32_t AddressMode; /* Specifies the Address Mode
Kojto 107:4f6c30876dfa 153 This parameter can be a value of @ref QSPI_AddressMode */
Kojto 107:4f6c30876dfa 154 uint32_t AlternateByteMode; /* Specifies the Alternate Bytes Mode
Kojto 107:4f6c30876dfa 155 This parameter can be a value of @ref QSPI_AlternateBytesMode */
Kojto 107:4f6c30876dfa 156 uint32_t DataMode; /* Specifies the Data Mode (used for dummy cycles and data phases)
Kojto 107:4f6c30876dfa 157 This parameter can be a value of @ref QSPI_DataMode */
Kojto 107:4f6c30876dfa 158 uint32_t NbData; /* Specifies the number of data to transfer.
Kojto 107:4f6c30876dfa 159 This parameter can be any value between 0 and 0xFFFFFFFF (0 means undefined length
Kojto 107:4f6c30876dfa 160 until end of memory)*/
Kojto 107:4f6c30876dfa 161 uint32_t DdrMode; /* Specifies the double data rate mode for address, alternate byte and data phase
Kojto 107:4f6c30876dfa 162 This parameter can be a value of @ref QSPI_DdrMode */
Kojto 107:4f6c30876dfa 163 uint32_t DdrHoldHalfCycle; /* Specifies the DDR hold half cycle. It delays the data output by one half of
Kojto 107:4f6c30876dfa 164 system clock in DDR mode.
Kojto 107:4f6c30876dfa 165 This parameter can be a value of @ref QSPI_DdrHoldHalfCycle */
Kojto 107:4f6c30876dfa 166 uint32_t SIOOMode; /* Specifies the send instruction only once mode
Kojto 107:4f6c30876dfa 167 This parameter can be a value of @ref QSPI_SIOOMode */
Kojto 107:4f6c30876dfa 168 }QSPI_CommandTypeDef;
Kojto 107:4f6c30876dfa 169
Kojto 107:4f6c30876dfa 170 /**
Kojto 107:4f6c30876dfa 171 * @brief QSPI Auto Polling mode configuration structure definition
Kojto 107:4f6c30876dfa 172 */
Kojto 107:4f6c30876dfa 173 typedef struct
Kojto 107:4f6c30876dfa 174 {
Kojto 107:4f6c30876dfa 175 uint32_t Match; /* Specifies the value to be compared with the masked status register to get a match.
Kojto 107:4f6c30876dfa 176 This parameter can be any value between 0 and 0xFFFFFFFF */
Kojto 107:4f6c30876dfa 177 uint32_t Mask; /* Specifies the mask to be applied to the status bytes received.
Kojto 107:4f6c30876dfa 178 This parameter can be any value between 0 and 0xFFFFFFFF */
Kojto 107:4f6c30876dfa 179 uint32_t Interval; /* Specifies the number of clock cycles between two read during automatic polling phases.
Kojto 107:4f6c30876dfa 180 This parameter can be any value between 0 and 0xFFFF */
Kojto 107:4f6c30876dfa 181 uint32_t StatusBytesSize; /* Specifies the size of the status bytes received.
Kojto 107:4f6c30876dfa 182 This parameter can be any value between 1 and 4 */
Kojto 107:4f6c30876dfa 183 uint32_t MatchMode; /* Specifies the method used for determining a match.
Kojto 107:4f6c30876dfa 184 This parameter can be a value of @ref QSPI_MatchMode */
Kojto 107:4f6c30876dfa 185 uint32_t AutomaticStop; /* Specifies if automatic polling is stopped after a match.
Kojto 107:4f6c30876dfa 186 This parameter can be a value of @ref QSPI_AutomaticStop */
Kojto 107:4f6c30876dfa 187 }QSPI_AutoPollingTypeDef;
Kojto 107:4f6c30876dfa 188
Kojto 107:4f6c30876dfa 189 /**
Kojto 107:4f6c30876dfa 190 * @brief QSPI Memory Mapped mode configuration structure definition
Kojto 107:4f6c30876dfa 191 */
Kojto 107:4f6c30876dfa 192 typedef struct
Kojto 107:4f6c30876dfa 193 {
Kojto 107:4f6c30876dfa 194 uint32_t TimeOutPeriod; /* Specifies the number of clock to wait when the FIFO is full before to release the chip select.
Kojto 107:4f6c30876dfa 195 This parameter can be any value between 0 and 0xFFFF */
Kojto 107:4f6c30876dfa 196 uint32_t TimeOutActivation; /* Specifies if the time out counter is enabled to release the chip select.
Kojto 107:4f6c30876dfa 197 This parameter can be a value of @ref QSPI_TimeOutActivation */
Kojto 107:4f6c30876dfa 198 }QSPI_MemoryMappedTypeDef;
Kojto 107:4f6c30876dfa 199 /**
Kojto 107:4f6c30876dfa 200 * @}
Kojto 107:4f6c30876dfa 201 */
Kojto 107:4f6c30876dfa 202
Kojto 107:4f6c30876dfa 203 /* Exported constants --------------------------------------------------------*/
Kojto 107:4f6c30876dfa 204 /** @defgroup QSPI_Exported_Constants QSPI Exported Constants
Kojto 107:4f6c30876dfa 205 * @{
Kojto 107:4f6c30876dfa 206 */
Kojto 107:4f6c30876dfa 207 /** @defgroup QSPI_ErrorCode QSPI Error Code
Kojto 107:4f6c30876dfa 208 * @{
Kojto 107:4f6c30876dfa 209 */
Kojto 107:4f6c30876dfa 210 #define HAL_QSPI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
Kojto 107:4f6c30876dfa 211 #define HAL_QSPI_ERROR_TIMEOUT ((uint32_t)0x00000001) /*!< Timeout error */
Kojto 107:4f6c30876dfa 212 #define HAL_QSPI_ERROR_TRANSFER ((uint32_t)0x00000002) /*!< Transfer error */
Kojto 107:4f6c30876dfa 213 #define HAL_QSPI_ERROR_DMA ((uint32_t)0x00000004) /*!< DMA transfer error */
Kojto 107:4f6c30876dfa 214 /**
Kojto 107:4f6c30876dfa 215 * @}
Kojto 107:4f6c30876dfa 216 */
Kojto 107:4f6c30876dfa 217
Kojto 107:4f6c30876dfa 218 /** @defgroup QSPI_SampleShifting QSPI Sample Shifting
Kojto 107:4f6c30876dfa 219 * @{
Kojto 107:4f6c30876dfa 220 */
Kojto 107:4f6c30876dfa 221 #define QSPI_SAMPLE_SHIFTING_NONE ((uint32_t)0x00000000) /*!<No clock cycle shift to sample data*/
Kojto 107:4f6c30876dfa 222 #define QSPI_SAMPLE_SHIFTING_HALFCYCLE ((uint32_t)QUADSPI_CR_SSHIFT) /*!<1/2 clock cycle shift to sample data*/
Kojto 107:4f6c30876dfa 223 /**
Kojto 107:4f6c30876dfa 224 * @}
Kojto 107:4f6c30876dfa 225 */
Kojto 107:4f6c30876dfa 226
Kojto 107:4f6c30876dfa 227 /** @defgroup QSPI_ChipSelectHighTime QSPI Chip Select High Time
Kojto 107:4f6c30876dfa 228 * @{
Kojto 107:4f6c30876dfa 229 */
Kojto 107:4f6c30876dfa 230 #define QSPI_CS_HIGH_TIME_1_CYCLE ((uint32_t)0x00000000) /*!<nCS stay high for at least 1 clock cycle between commands*/
Kojto 107:4f6c30876dfa 231 #define QSPI_CS_HIGH_TIME_2_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0) /*!<nCS stay high for at least 2 clock cycles between commands*/
Kojto 107:4f6c30876dfa 232 #define QSPI_CS_HIGH_TIME_3_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_1) /*!<nCS stay high for at least 3 clock cycles between commands*/
Kojto 107:4f6c30876dfa 233 #define QSPI_CS_HIGH_TIME_4_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0 | QUADSPI_DCR_CSHT_1) /*!<nCS stay high for at least 4 clock cycles between commands*/
Kojto 107:4f6c30876dfa 234 #define QSPI_CS_HIGH_TIME_5_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2) /*!<nCS stay high for at least 5 clock cycles between commands*/
Kojto 107:4f6c30876dfa 235 #define QSPI_CS_HIGH_TIME_6_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 | QUADSPI_DCR_CSHT_0) /*!<nCS stay high for at least 6 clock cycles between commands*/
Kojto 107:4f6c30876dfa 236 #define QSPI_CS_HIGH_TIME_7_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 | QUADSPI_DCR_CSHT_1) /*!<nCS stay high for at least 7 clock cycles between commands*/
Kojto 107:4f6c30876dfa 237 #define QSPI_CS_HIGH_TIME_8_CYCLE ((uint32_t)QUADSPI_DCR_CSHT) /*!<nCS stay high for at least 8 clock cycles between commands*/
Kojto 107:4f6c30876dfa 238 /**
Kojto 107:4f6c30876dfa 239 * @}
Kojto 107:4f6c30876dfa 240 */
Kojto 107:4f6c30876dfa 241
Kojto 107:4f6c30876dfa 242 /** @defgroup QSPI_ClockMode QSPI Clock Mode
Kojto 107:4f6c30876dfa 243 * @{
Kojto 107:4f6c30876dfa 244 */
Kojto 107:4f6c30876dfa 245 #define QSPI_CLOCK_MODE_0 ((uint32_t)0x00000000) /*!<Clk stays low while nCS is released*/
Kojto 107:4f6c30876dfa 246 #define QSPI_CLOCK_MODE_3 ((uint32_t)QUADSPI_DCR_CKMODE) /*!<Clk goes high while nCS is released*/
Kojto 107:4f6c30876dfa 247 /**
Kojto 107:4f6c30876dfa 248 * @}
Kojto 107:4f6c30876dfa 249 */
Kojto 107:4f6c30876dfa 250
Kojto 107:4f6c30876dfa 251 /** @defgroup QSPI_Flash_Select QSPI Flash Select
Kojto 107:4f6c30876dfa 252 * @{
Kojto 107:4f6c30876dfa 253 */
Kojto 107:4f6c30876dfa 254 #define QSPI_FLASH_ID_1 ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 255 #define QSPI_FLASH_ID_2 ((uint32_t)QUADSPI_CR_FSEL)
Kojto 107:4f6c30876dfa 256 /**
Kojto 107:4f6c30876dfa 257 * @}
Kojto 107:4f6c30876dfa 258 */
Kojto 107:4f6c30876dfa 259
Kojto 107:4f6c30876dfa 260 /** @defgroup QSPI_DualFlash_Mode QSPI Dual Flash Mode
Kojto 107:4f6c30876dfa 261 * @{
Kojto 107:4f6c30876dfa 262 */
Kojto 107:4f6c30876dfa 263 #define QSPI_DUALFLASH_ENABLE ((uint32_t)QUADSPI_CR_DFM)
Kojto 107:4f6c30876dfa 264 #define QSPI_DUALFLASH_DISABLE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 265 /**
Kojto 107:4f6c30876dfa 266 * @}
Kojto 107:4f6c30876dfa 267 */
Kojto 107:4f6c30876dfa 268
Kojto 107:4f6c30876dfa 269 /** @defgroup QSPI_AddressSize QSPI Address Size
Kojto 107:4f6c30876dfa 270 * @{
Kojto 107:4f6c30876dfa 271 */
Kojto 107:4f6c30876dfa 272 #define QSPI_ADDRESS_8_BITS ((uint32_t)0x00000000) /*!<8-bit address*/
Kojto 107:4f6c30876dfa 273 #define QSPI_ADDRESS_16_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_0) /*!<16-bit address*/
Kojto 107:4f6c30876dfa 274 #define QSPI_ADDRESS_24_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_1) /*!<24-bit address*/
Kojto 107:4f6c30876dfa 275 #define QSPI_ADDRESS_32_BITS ((uint32_t)QUADSPI_CCR_ADSIZE) /*!<32-bit address*/
Kojto 107:4f6c30876dfa 276 /**
Kojto 107:4f6c30876dfa 277 * @}
Kojto 107:4f6c30876dfa 278 */
Kojto 107:4f6c30876dfa 279
Kojto 107:4f6c30876dfa 280 /** @defgroup QSPI_AlternateBytesSize QSPI Alternate Bytes Size
Kojto 107:4f6c30876dfa 281 * @{
Kojto 107:4f6c30876dfa 282 */
Kojto 107:4f6c30876dfa 283 #define QSPI_ALTERNATE_BYTES_8_BITS ((uint32_t)0x00000000) /*!<8-bit alternate bytes*/
Kojto 107:4f6c30876dfa 284 #define QSPI_ALTERNATE_BYTES_16_BITS ((uint32_t)QUADSPI_CCR_ABSIZE_0) /*!<16-bit alternate bytes*/
Kojto 107:4f6c30876dfa 285 #define QSPI_ALTERNATE_BYTES_24_BITS ((uint32_t)QUADSPI_CCR_ABSIZE_1) /*!<24-bit alternate bytes*/
Kojto 107:4f6c30876dfa 286 #define QSPI_ALTERNATE_BYTES_32_BITS ((uint32_t)QUADSPI_CCR_ABSIZE) /*!<32-bit alternate bytes*/
Kojto 107:4f6c30876dfa 287 /**
Kojto 107:4f6c30876dfa 288 * @}
Kojto 107:4f6c30876dfa 289 */
Kojto 107:4f6c30876dfa 290
Kojto 107:4f6c30876dfa 291 /** @defgroup QSPI_InstructionMode QSPI Instruction Mode
Kojto 107:4f6c30876dfa 292 * @{
Kojto 107:4f6c30876dfa 293 */
Kojto 107:4f6c30876dfa 294 #define QSPI_INSTRUCTION_NONE ((uint32_t)0x00000000) /*!<No instruction*/
Kojto 107:4f6c30876dfa 295 #define QSPI_INSTRUCTION_1_LINE ((uint32_t)QUADSPI_CCR_IMODE_0) /*!<Instruction on a single line*/
Kojto 107:4f6c30876dfa 296 #define QSPI_INSTRUCTION_2_LINES ((uint32_t)QUADSPI_CCR_IMODE_1) /*!<Instruction on two lines*/
Kojto 107:4f6c30876dfa 297 #define QSPI_INSTRUCTION_4_LINES ((uint32_t)QUADSPI_CCR_IMODE) /*!<Instruction on four lines*/
Kojto 107:4f6c30876dfa 298 /**
Kojto 107:4f6c30876dfa 299 * @}
Kojto 107:4f6c30876dfa 300 */
Kojto 107:4f6c30876dfa 301
Kojto 107:4f6c30876dfa 302 /** @defgroup QSPI_AddressMode QSPI Address Mode
Kojto 107:4f6c30876dfa 303 * @{
Kojto 107:4f6c30876dfa 304 */
Kojto 107:4f6c30876dfa 305 #define QSPI_ADDRESS_NONE ((uint32_t)0x00000000) /*!<No address*/
Kojto 107:4f6c30876dfa 306 #define QSPI_ADDRESS_1_LINE ((uint32_t)QUADSPI_CCR_ADMODE_0) /*!<Address on a single line*/
Kojto 107:4f6c30876dfa 307 #define QSPI_ADDRESS_2_LINES ((uint32_t)QUADSPI_CCR_ADMODE_1) /*!<Address on two lines*/
Kojto 107:4f6c30876dfa 308 #define QSPI_ADDRESS_4_LINES ((uint32_t)QUADSPI_CCR_ADMODE) /*!<Address on four lines*/
Kojto 107:4f6c30876dfa 309 /**
Kojto 107:4f6c30876dfa 310 * @}
Kojto 107:4f6c30876dfa 311 */
Kojto 107:4f6c30876dfa 312
Kojto 107:4f6c30876dfa 313 /** @defgroup QSPI_AlternateBytesMode QSPI Alternate Bytes Mode
Kojto 107:4f6c30876dfa 314 * @{
Kojto 107:4f6c30876dfa 315 */
Kojto 107:4f6c30876dfa 316 #define QSPI_ALTERNATE_BYTES_NONE ((uint32_t)0x00000000) /*!<No alternate bytes*/
Kojto 107:4f6c30876dfa 317 #define QSPI_ALTERNATE_BYTES_1_LINE ((uint32_t)QUADSPI_CCR_ABMODE_0) /*!<Alternate bytes on a single line*/
Kojto 107:4f6c30876dfa 318 #define QSPI_ALTERNATE_BYTES_2_LINES ((uint32_t)QUADSPI_CCR_ABMODE_1) /*!<Alternate bytes on two lines*/
Kojto 107:4f6c30876dfa 319 #define QSPI_ALTERNATE_BYTES_4_LINES ((uint32_t)QUADSPI_CCR_ABMODE) /*!<Alternate bytes on four lines*/
Kojto 107:4f6c30876dfa 320 /**
Kojto 107:4f6c30876dfa 321 * @}
Kojto 107:4f6c30876dfa 322 */
Kojto 107:4f6c30876dfa 323
Kojto 107:4f6c30876dfa 324 /** @defgroup QSPI_DataMode QSPI Data Mode
Kojto 107:4f6c30876dfa 325 * @{
Kojto 107:4f6c30876dfa 326 */
Kojto 107:4f6c30876dfa 327 #define QSPI_DATA_NONE ((uint32_t)0X00000000) /*!<No data*/
Kojto 107:4f6c30876dfa 328 #define QSPI_DATA_1_LINE ((uint32_t)QUADSPI_CCR_DMODE_0) /*!<Data on a single line*/
Kojto 107:4f6c30876dfa 329 #define QSPI_DATA_2_LINES ((uint32_t)QUADSPI_CCR_DMODE_1) /*!<Data on two lines*/
Kojto 107:4f6c30876dfa 330 #define QSPI_DATA_4_LINES ((uint32_t)QUADSPI_CCR_DMODE) /*!<Data on four lines*/
Kojto 107:4f6c30876dfa 331 /**
Kojto 107:4f6c30876dfa 332 * @}
Kojto 107:4f6c30876dfa 333 */
Kojto 107:4f6c30876dfa 334
Kojto 107:4f6c30876dfa 335 /** @defgroup QSPI_DdrMode QSPI Ddr Mode
Kojto 107:4f6c30876dfa 336 * @{
Kojto 107:4f6c30876dfa 337 */
Kojto 107:4f6c30876dfa 338 #define QSPI_DDR_MODE_DISABLE ((uint32_t)0x00000000) /*!<Double data rate mode disabled*/
Kojto 107:4f6c30876dfa 339 #define QSPI_DDR_MODE_ENABLE ((uint32_t)QUADSPI_CCR_DDRM) /*!<Double data rate mode enabled*/
Kojto 107:4f6c30876dfa 340 /**
Kojto 107:4f6c30876dfa 341 * @}
Kojto 107:4f6c30876dfa 342 */
Kojto 107:4f6c30876dfa 343
Kojto 107:4f6c30876dfa 344 /** @defgroup QSPI_DdrHoldHalfCycle QSPI Ddr HoldHalfCycle
Kojto 107:4f6c30876dfa 345 * @{
Kojto 107:4f6c30876dfa 346 */
Kojto 107:4f6c30876dfa 347 #define QSPI_DDR_HHC_ANALOG_DELAY ((uint32_t)0x00000000) /*!<Delay the data output using analog delay in DDR mode*/
Kojto 107:4f6c30876dfa 348 #define QSPI_DDR_HHC_HALF_CLK_DELAY ((uint32_t)QUADSPI_CCR_DHHC) /*!<Delay the data output by 1/2 clock cycle in DDR mode*/
Kojto 107:4f6c30876dfa 349 /**
Kojto 107:4f6c30876dfa 350 * @}
Kojto 107:4f6c30876dfa 351 */
Kojto 107:4f6c30876dfa 352
Kojto 107:4f6c30876dfa 353 /** @defgroup QSPI_SIOOMode QSPI SIOO Mode
Kojto 107:4f6c30876dfa 354 * @{
Kojto 107:4f6c30876dfa 355 */
Kojto 107:4f6c30876dfa 356 #define QSPI_SIOO_INST_EVERY_CMD ((uint32_t)0x00000000) /*!<Send instruction on every transaction*/
Kojto 107:4f6c30876dfa 357 #define QSPI_SIOO_INST_ONLY_FIRST_CMD ((uint32_t)QUADSPI_CCR_SIOO) /*!<Send instruction only for the first command*/
Kojto 107:4f6c30876dfa 358 /**
Kojto 107:4f6c30876dfa 359 * @}
Kojto 107:4f6c30876dfa 360 */
Kojto 107:4f6c30876dfa 361
Kojto 107:4f6c30876dfa 362 /** @defgroup QSPI_MatchMode QSPI Match Mode
Kojto 107:4f6c30876dfa 363 * @{
Kojto 107:4f6c30876dfa 364 */
Kojto 107:4f6c30876dfa 365 #define QSPI_MATCH_MODE_AND ((uint32_t)0x00000000) /*!<AND match mode between unmasked bits*/
Kojto 107:4f6c30876dfa 366 #define QSPI_MATCH_MODE_OR ((uint32_t)QUADSPI_CR_PMM) /*!<OR match mode between unmasked bits*/
Kojto 107:4f6c30876dfa 367 /**
Kojto 107:4f6c30876dfa 368 * @}
Kojto 107:4f6c30876dfa 369 */
Kojto 107:4f6c30876dfa 370
Kojto 107:4f6c30876dfa 371 /** @defgroup QSPI_AutomaticStop QSPI Automatic Stop
Kojto 107:4f6c30876dfa 372 * @{
Kojto 107:4f6c30876dfa 373 */
Kojto 107:4f6c30876dfa 374 #define QSPI_AUTOMATIC_STOP_DISABLE ((uint32_t)0x00000000) /*!<AutoPolling stops only with abort or QSPI disabling*/
Kojto 107:4f6c30876dfa 375 #define QSPI_AUTOMATIC_STOP_ENABLE ((uint32_t)QUADSPI_CR_APMS) /*!<AutoPolling stops as soon as there is a match*/
Kojto 107:4f6c30876dfa 376 /**
Kojto 107:4f6c30876dfa 377 * @}
Kojto 107:4f6c30876dfa 378 */
Kojto 107:4f6c30876dfa 379
Kojto 107:4f6c30876dfa 380 /** @defgroup QSPI_TimeOutActivation QSPI TimeOut Activation
Kojto 107:4f6c30876dfa 381 * @{
Kojto 107:4f6c30876dfa 382 */
Kojto 107:4f6c30876dfa 383 #define QSPI_TIMEOUT_COUNTER_DISABLE ((uint32_t)0x00000000) /*!<Timeout counter disabled, nCS remains active*/
Kojto 107:4f6c30876dfa 384 #define QSPI_TIMEOUT_COUNTER_ENABLE ((uint32_t)QUADSPI_CR_TCEN) /*!<Timeout counter enabled, nCS released when timeout expires*/
Kojto 107:4f6c30876dfa 385 /**
Kojto 107:4f6c30876dfa 386 * @}
Kojto 107:4f6c30876dfa 387 */
Kojto 107:4f6c30876dfa 388
Kojto 107:4f6c30876dfa 389 /** @defgroup QSPI_Flags QSPI Flags
Kojto 107:4f6c30876dfa 390 * @{
Kojto 107:4f6c30876dfa 391 */
Kojto 107:4f6c30876dfa 392 #define QSPI_FLAG_BUSY QUADSPI_SR_BUSY /*!<Busy flag: operation is ongoing*/
Kojto 107:4f6c30876dfa 393 #define QSPI_FLAG_TO QUADSPI_SR_TOF /*!<Timeout flag: timeout occurs in memory-mapped mode*/
Kojto 107:4f6c30876dfa 394 #define QSPI_FLAG_SM QUADSPI_SR_SMF /*!<Status match flag: received data matches in autopolling mode*/
Kojto 107:4f6c30876dfa 395 #define QSPI_FLAG_FT QUADSPI_SR_FTF /*!<Fifo threshold flag: Fifo threshold reached or data left after read from memory is complete*/
Kojto 107:4f6c30876dfa 396 #define QSPI_FLAG_TC QUADSPI_SR_TCF /*!<Transfer complete flag: programmed number of data have been transferred or the transfer has been aborted*/
Kojto 107:4f6c30876dfa 397 #define QSPI_FLAG_TE QUADSPI_SR_TEF /*!<Transfer error flag: invalid address is being accessed*/
Kojto 107:4f6c30876dfa 398 /**
Kojto 107:4f6c30876dfa 399 * @}
Kojto 107:4f6c30876dfa 400 */
Kojto 107:4f6c30876dfa 401
Kojto 107:4f6c30876dfa 402 /** @defgroup QSPI_Interrupts QSPI Interrupts
Kojto 107:4f6c30876dfa 403 * @{
Kojto 107:4f6c30876dfa 404 */
Kojto 107:4f6c30876dfa 405 #define QSPI_IT_TO QUADSPI_CR_TOIE /*!<Interrupt on the timeout flag*/
Kojto 107:4f6c30876dfa 406 #define QSPI_IT_SM QUADSPI_CR_SMIE /*!<Interrupt on the status match flag*/
Kojto 107:4f6c30876dfa 407 #define QSPI_IT_FT QUADSPI_CR_FTIE /*!<Interrupt on the fifo threshold flag*/
Kojto 107:4f6c30876dfa 408 #define QSPI_IT_TC QUADSPI_CR_TCIE /*!<Interrupt on the transfer complete flag*/
Kojto 107:4f6c30876dfa 409 #define QSPI_IT_TE QUADSPI_CR_TEIE /*!<Interrupt on the transfer error flag*/
Kojto 107:4f6c30876dfa 410 /**
Kojto 107:4f6c30876dfa 411 * @}
Kojto 107:4f6c30876dfa 412 */
Kojto 107:4f6c30876dfa 413
Kojto 107:4f6c30876dfa 414 /** @defgroup QSPI_Timeout_definition QSPI Timeout definition
Kojto 107:4f6c30876dfa 415 * @{
Kojto 107:4f6c30876dfa 416 */
Kojto 107:4f6c30876dfa 417 #define HAL_QPSI_TIMEOUT_DEFAULT_VALUE ((uint32_t)5000)/* 5 s */
Kojto 107:4f6c30876dfa 418 /**
Kojto 107:4f6c30876dfa 419 * @}
Kojto 107:4f6c30876dfa 420 */
Kojto 107:4f6c30876dfa 421
Kojto 107:4f6c30876dfa 422 /**
Kojto 107:4f6c30876dfa 423 * @}
Kojto 107:4f6c30876dfa 424 */
Kojto 107:4f6c30876dfa 425
Kojto 107:4f6c30876dfa 426 /* Exported macros -----------------------------------------------------------*/
Kojto 107:4f6c30876dfa 427 /** @defgroup QSPI_Exported_Macros QSPI Exported Macros
Kojto 107:4f6c30876dfa 428 * @{
Kojto 107:4f6c30876dfa 429 */
Kojto 107:4f6c30876dfa 430
Kojto 107:4f6c30876dfa 431 /** @brief Reset QSPI handle state
Kojto 107:4f6c30876dfa 432 * @param __HANDLE__: QSPI handle.
Kojto 107:4f6c30876dfa 433 * @retval None
Kojto 107:4f6c30876dfa 434 */
Kojto 107:4f6c30876dfa 435 #define __HAL_QSPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_QSPI_STATE_RESET)
Kojto 107:4f6c30876dfa 436
Kojto 107:4f6c30876dfa 437 /** @brief Enable QSPI
Kojto 107:4f6c30876dfa 438 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 107:4f6c30876dfa 439 * @retval None
Kojto 107:4f6c30876dfa 440 */
Kojto 107:4f6c30876dfa 441 #define __HAL_QSPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, QUADSPI_CR_EN)
Kojto 107:4f6c30876dfa 442
Kojto 107:4f6c30876dfa 443 /** @brief Disable QSPI
Kojto 107:4f6c30876dfa 444 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 107:4f6c30876dfa 445 * @retval None
Kojto 107:4f6c30876dfa 446 */
Kojto 107:4f6c30876dfa 447 #define __HAL_QSPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, QUADSPI_CR_EN)
Kojto 107:4f6c30876dfa 448
Kojto 107:4f6c30876dfa 449 /** @brief Enables the specified QSPI interrupt.
Kojto 107:4f6c30876dfa 450 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 107:4f6c30876dfa 451 * @param __INTERRUPT__: specifies the QSPI interrupt source to enable.
Kojto 107:4f6c30876dfa 452 * This parameter can be one of the following values:
Kojto 107:4f6c30876dfa 453 * @arg QSPI_IT_TO: QSPI Time out interrupt
Kojto 107:4f6c30876dfa 454 * @arg QSPI_IT_SM: QSPI Status match interrupt
Kojto 107:4f6c30876dfa 455 * @arg QSPI_IT_FT: QSPI FIFO threshold interrupt
Kojto 107:4f6c30876dfa 456 * @arg QSPI_IT_TC: QSPI Transfer complete interrupt
Kojto 107:4f6c30876dfa 457 * @arg QSPI_IT_TE: QSPI Transfer error interrupt
Kojto 107:4f6c30876dfa 458 * @retval None
Kojto 107:4f6c30876dfa 459 */
Kojto 107:4f6c30876dfa 460 #define __HAL_QSPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__))
Kojto 107:4f6c30876dfa 461
Kojto 107:4f6c30876dfa 462
Kojto 107:4f6c30876dfa 463 /** @brief Disables the specified QSPI interrupt.
Kojto 107:4f6c30876dfa 464 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 107:4f6c30876dfa 465 * @param __INTERRUPT__: specifies the QSPI interrupt source to disable.
Kojto 107:4f6c30876dfa 466 * This parameter can be one of the following values:
Kojto 107:4f6c30876dfa 467 * @arg QSPI_IT_TO: QSPI Timeout interrupt
Kojto 107:4f6c30876dfa 468 * @arg QSPI_IT_SM: QSPI Status match interrupt
Kojto 107:4f6c30876dfa 469 * @arg QSPI_IT_FT: QSPI FIFO threshold interrupt
Kojto 107:4f6c30876dfa 470 * @arg QSPI_IT_TC: QSPI Transfer complete interrupt
Kojto 107:4f6c30876dfa 471 * @arg QSPI_IT_TE: QSPI Transfer error interrupt
Kojto 107:4f6c30876dfa 472 * @retval None
Kojto 107:4f6c30876dfa 473 */
Kojto 107:4f6c30876dfa 474 #define __HAL_QSPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__))
Kojto 107:4f6c30876dfa 475
Kojto 107:4f6c30876dfa 476 /** @brief Checks whether the specified QSPI interrupt source is enabled.
Kojto 107:4f6c30876dfa 477 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 107:4f6c30876dfa 478 * @param __INTERRUPT__: specifies the QSPI interrupt source to check.
Kojto 107:4f6c30876dfa 479 * This parameter can be one of the following values:
Kojto 107:4f6c30876dfa 480 * @arg QSPI_IT_TO: QSPI Time out interrupt
Kojto 107:4f6c30876dfa 481 * @arg QSPI_IT_SM: QSPI Status match interrupt
Kojto 107:4f6c30876dfa 482 * @arg QSPI_IT_FT: QSPI FIFO threshold interrupt
Kojto 107:4f6c30876dfa 483 * @arg QSPI_IT_TC: QSPI Transfer complete interrupt
Kojto 107:4f6c30876dfa 484 * @arg QSPI_IT_TE: QSPI Transfer error interrupt
Kojto 107:4f6c30876dfa 485 * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
Kojto 107:4f6c30876dfa 486 */
Kojto 107:4f6c30876dfa 487 #define __HAL_QSPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (READ_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) == (__INTERRUPT__))
Kojto 107:4f6c30876dfa 488
Kojto 107:4f6c30876dfa 489 /**
Kojto 107:4f6c30876dfa 490 * @brief Get the selected QSPI's flag status.
Kojto 107:4f6c30876dfa 491 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 107:4f6c30876dfa 492 * @param __FLAG__: specifies the QSPI flag to check.
Kojto 107:4f6c30876dfa 493 * This parameter can be one of the following values:
Kojto 107:4f6c30876dfa 494 * @arg QSPI_FLAG_BUSY: QSPI Busy flag
Kojto 107:4f6c30876dfa 495 * @arg QSPI_FLAG_TO: QSPI Time out flag
Kojto 107:4f6c30876dfa 496 * @arg QSPI_FLAG_SM: QSPI Status match flag
Kojto 107:4f6c30876dfa 497 * @arg QSPI_FLAG_FT: QSPI FIFO threshold flag
Kojto 107:4f6c30876dfa 498 * @arg QSPI_FLAG_TC: QSPI Transfer complete flag
Kojto 107:4f6c30876dfa 499 * @arg QSPI_FLAG_TE: QSPI Transfer error flag
Kojto 107:4f6c30876dfa 500 * @retval None
Kojto 107:4f6c30876dfa 501 */
Kojto 107:4f6c30876dfa 502 #define __HAL_QSPI_GET_FLAG(__HANDLE__, __FLAG__) (READ_BIT((__HANDLE__)->Instance->SR, (__FLAG__)) != 0)
Kojto 107:4f6c30876dfa 503
Kojto 107:4f6c30876dfa 504 /** @brief Clears the specified QSPI's flag status.
Kojto 107:4f6c30876dfa 505 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 107:4f6c30876dfa 506 * @param __FLAG__: specifies the QSPI clear register flag that needs to be set
Kojto 107:4f6c30876dfa 507 * This parameter can be one of the following values:
Kojto 107:4f6c30876dfa 508 * @arg QSPI_FLAG_TO: QSPI Time out flag
Kojto 107:4f6c30876dfa 509 * @arg QSPI_FLAG_SM: QSPI Status match flag
Kojto 107:4f6c30876dfa 510 * @arg QSPI_FLAG_TC: QSPI Transfer complete flag
Kojto 107:4f6c30876dfa 511 * @arg QSPI_FLAG_TE: QSPI Transfer error flag
Kojto 107:4f6c30876dfa 512 * @retval None
Kojto 107:4f6c30876dfa 513 */
Kojto 107:4f6c30876dfa 514 #define __HAL_QSPI_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->FCR, (__FLAG__))
Kojto 107:4f6c30876dfa 515 /**
Kojto 107:4f6c30876dfa 516 * @}
Kojto 107:4f6c30876dfa 517 */
Kojto 107:4f6c30876dfa 518
Kojto 107:4f6c30876dfa 519 /* Exported functions --------------------------------------------------------*/
Kojto 107:4f6c30876dfa 520 /** @addtogroup QSPI_Exported_Functions
Kojto 107:4f6c30876dfa 521 * @{
Kojto 107:4f6c30876dfa 522 */
Kojto 107:4f6c30876dfa 523
Kojto 107:4f6c30876dfa 524 /** @addtogroup QSPI_Exported_Functions_Group1
Kojto 107:4f6c30876dfa 525 * @{
Kojto 107:4f6c30876dfa 526 */
Kojto 107:4f6c30876dfa 527 /* Initialization/de-initialization functions ********************************/
Kojto 107:4f6c30876dfa 528 HAL_StatusTypeDef HAL_QSPI_Init (QSPI_HandleTypeDef *hqspi);
Kojto 107:4f6c30876dfa 529 HAL_StatusTypeDef HAL_QSPI_DeInit (QSPI_HandleTypeDef *hqspi);
Kojto 107:4f6c30876dfa 530 void HAL_QSPI_MspInit (QSPI_HandleTypeDef *hqspi);
Kojto 107:4f6c30876dfa 531 void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef *hqspi);
Kojto 107:4f6c30876dfa 532 /**
Kojto 107:4f6c30876dfa 533 * @}
Kojto 107:4f6c30876dfa 534 */
Kojto 107:4f6c30876dfa 535
Kojto 107:4f6c30876dfa 536 /** @addtogroup QSPI_Exported_Functions_Group2
Kojto 107:4f6c30876dfa 537 * @{
Kojto 107:4f6c30876dfa 538 */
Kojto 107:4f6c30876dfa 539 /* IO operation functions *****************************************************/
Kojto 107:4f6c30876dfa 540 /* QSPI IRQ handler method */
Kojto 107:4f6c30876dfa 541 void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi);
Kojto 107:4f6c30876dfa 542
Kojto 107:4f6c30876dfa 543 /* QSPI indirect mode */
Kojto 107:4f6c30876dfa 544 HAL_StatusTypeDef HAL_QSPI_Command (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t Timeout);
Kojto 107:4f6c30876dfa 545 HAL_StatusTypeDef HAL_QSPI_Transmit (QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout);
Kojto 107:4f6c30876dfa 546 HAL_StatusTypeDef HAL_QSPI_Receive (QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout);
Kojto 107:4f6c30876dfa 547 HAL_StatusTypeDef HAL_QSPI_Command_IT (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd);
Kojto 107:4f6c30876dfa 548 HAL_StatusTypeDef HAL_QSPI_Transmit_IT (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
Kojto 107:4f6c30876dfa 549 HAL_StatusTypeDef HAL_QSPI_Receive_IT (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
Kojto 107:4f6c30876dfa 550 HAL_StatusTypeDef HAL_QSPI_Transmit_DMA (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
Kojto 107:4f6c30876dfa 551 HAL_StatusTypeDef HAL_QSPI_Receive_DMA (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
Kojto 107:4f6c30876dfa 552
Kojto 107:4f6c30876dfa 553 /* QSPI status flag polling mode */
Kojto 107:4f6c30876dfa 554 HAL_StatusTypeDef HAL_QSPI_AutoPolling (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout);
Kojto 107:4f6c30876dfa 555 HAL_StatusTypeDef HAL_QSPI_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg);
Kojto 107:4f6c30876dfa 556
Kojto 107:4f6c30876dfa 557 /* QSPI memory-mapped mode */
Kojto 107:4f6c30876dfa 558 HAL_StatusTypeDef HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg);
Kojto 107:4f6c30876dfa 559 /**
Kojto 107:4f6c30876dfa 560 * @}
Kojto 107:4f6c30876dfa 561 */
Kojto 107:4f6c30876dfa 562
Kojto 107:4f6c30876dfa 563 /** @addtogroup QSPI_Exported_Functions_Group3
Kojto 107:4f6c30876dfa 564 * @{
Kojto 107:4f6c30876dfa 565 */
Kojto 107:4f6c30876dfa 566 /* Callback functions in non-blocking modes ***********************************/
Kojto 107:4f6c30876dfa 567 void HAL_QSPI_ErrorCallback (QSPI_HandleTypeDef *hqspi);
Kojto 107:4f6c30876dfa 568 void HAL_QSPI_FifoThresholdCallback(QSPI_HandleTypeDef *hqspi);
Kojto 107:4f6c30876dfa 569
Kojto 107:4f6c30876dfa 570 /* QSPI indirect mode */
Kojto 107:4f6c30876dfa 571 void HAL_QSPI_CmdCpltCallback (QSPI_HandleTypeDef *hqspi);
Kojto 107:4f6c30876dfa 572 void HAL_QSPI_RxCpltCallback (QSPI_HandleTypeDef *hqspi);
Kojto 107:4f6c30876dfa 573 void HAL_QSPI_TxCpltCallback (QSPI_HandleTypeDef *hqspi);
Kojto 107:4f6c30876dfa 574 void HAL_QSPI_RxHalfCpltCallback (QSPI_HandleTypeDef *hqspi);
Kojto 107:4f6c30876dfa 575 void HAL_QSPI_TxHalfCpltCallback (QSPI_HandleTypeDef *hqspi);
Kojto 107:4f6c30876dfa 576
Kojto 107:4f6c30876dfa 577 /* QSPI status flag polling mode */
Kojto 107:4f6c30876dfa 578 void HAL_QSPI_StatusMatchCallback (QSPI_HandleTypeDef *hqspi);
Kojto 107:4f6c30876dfa 579
Kojto 107:4f6c30876dfa 580 /* QSPI memory-mapped mode */
Kojto 107:4f6c30876dfa 581 void HAL_QSPI_TimeOutCallback (QSPI_HandleTypeDef *hqspi);
Kojto 107:4f6c30876dfa 582 /**
Kojto 107:4f6c30876dfa 583 * @}
Kojto 107:4f6c30876dfa 584 */
Kojto 107:4f6c30876dfa 585
Kojto 107:4f6c30876dfa 586 /** @addtogroup QSPI_Exported_Functions_Group4
Kojto 107:4f6c30876dfa 587 * @{
Kojto 107:4f6c30876dfa 588 */
Kojto 107:4f6c30876dfa 589 /* Peripheral Control and State functions ************************************/
Kojto 107:4f6c30876dfa 590 HAL_QSPI_StateTypeDef HAL_QSPI_GetState(QSPI_HandleTypeDef *hqspi);
Kojto 107:4f6c30876dfa 591 uint32_t HAL_QSPI_GetError(QSPI_HandleTypeDef *hqspi);
Kojto 107:4f6c30876dfa 592 HAL_StatusTypeDef HAL_QSPI_Abort (QSPI_HandleTypeDef *hqspi);
Kojto 107:4f6c30876dfa 593 void HAL_QSPI_SetTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Timeout);
Kojto 107:4f6c30876dfa 594 /**
Kojto 107:4f6c30876dfa 595 * @}
Kojto 107:4f6c30876dfa 596 */
Kojto 107:4f6c30876dfa 597
Kojto 107:4f6c30876dfa 598 /**
Kojto 107:4f6c30876dfa 599 * @}
Kojto 107:4f6c30876dfa 600 */
Kojto 107:4f6c30876dfa 601
Kojto 107:4f6c30876dfa 602 /* Private types -------------------------------------------------------------*/
Kojto 107:4f6c30876dfa 603 /* Private variables ---------------------------------------------------------*/
Kojto 107:4f6c30876dfa 604 /* Private constants ---------------------------------------------------------*/
Kojto 107:4f6c30876dfa 605 /** @defgroup QSPI_Private_Constants QSPI Private Constants
Kojto 107:4f6c30876dfa 606 * @{
Kojto 107:4f6c30876dfa 607 */
Kojto 107:4f6c30876dfa 608
Kojto 107:4f6c30876dfa 609 /**
Kojto 107:4f6c30876dfa 610 * @}
Kojto 107:4f6c30876dfa 611 */
Kojto 107:4f6c30876dfa 612
Kojto 107:4f6c30876dfa 613 /* Private macros ------------------------------------------------------------*/
Kojto 107:4f6c30876dfa 614 /** @defgroup QSPI_Private_Macros QSPI Private Macros
Kojto 107:4f6c30876dfa 615 * @{
Kojto 107:4f6c30876dfa 616 */
Kojto 107:4f6c30876dfa 617 /** @defgroup QSPI_ClockPrescaler QSPI Clock Prescaler
Kojto 107:4f6c30876dfa 618 * @{
Kojto 107:4f6c30876dfa 619 */
Kojto 107:4f6c30876dfa 620 #define IS_QSPI_CLOCK_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFF)
Kojto 107:4f6c30876dfa 621 /**
Kojto 107:4f6c30876dfa 622 * @}
Kojto 107:4f6c30876dfa 623 */
Kojto 107:4f6c30876dfa 624
Kojto 107:4f6c30876dfa 625 /** @defgroup QSPI_FifoThreshold QSPI Fifo Threshold
Kojto 107:4f6c30876dfa 626 * @{
Kojto 107:4f6c30876dfa 627 */
Kojto 107:4f6c30876dfa 628 #define IS_QSPI_FIFO_THRESHOLD(THR) (((THR) > 0) && ((THR) <= 32))
Kojto 107:4f6c30876dfa 629 /**
Kojto 107:4f6c30876dfa 630 * @}
Kojto 107:4f6c30876dfa 631 */
Kojto 107:4f6c30876dfa 632
Kojto 107:4f6c30876dfa 633 #define IS_QSPI_SSHIFT(SSHIFT) (((SSHIFT) == QSPI_SAMPLE_SHIFTING_NONE) || \
Kojto 107:4f6c30876dfa 634 ((SSHIFT) == QSPI_SAMPLE_SHIFTING_HALFCYCLE))
Kojto 107:4f6c30876dfa 635
Kojto 107:4f6c30876dfa 636 /** @defgroup QSPI_FlashSize QSPI Flash Size
Kojto 107:4f6c30876dfa 637 * @{
Kojto 107:4f6c30876dfa 638 */
Kojto 107:4f6c30876dfa 639 #define IS_QSPI_FLASH_SIZE(FSIZE) (((FSIZE) <= 31))
Kojto 107:4f6c30876dfa 640 /**
Kojto 107:4f6c30876dfa 641 * @}
Kojto 107:4f6c30876dfa 642 */
Kojto 107:4f6c30876dfa 643
Kojto 107:4f6c30876dfa 644 #define IS_QSPI_CS_HIGH_TIME(CSHTIME) (((CSHTIME) == QSPI_CS_HIGH_TIME_1_CYCLE) || \
Kojto 107:4f6c30876dfa 645 ((CSHTIME) == QSPI_CS_HIGH_TIME_2_CYCLE) || \
Kojto 107:4f6c30876dfa 646 ((CSHTIME) == QSPI_CS_HIGH_TIME_3_CYCLE) || \
Kojto 107:4f6c30876dfa 647 ((CSHTIME) == QSPI_CS_HIGH_TIME_4_CYCLE) || \
Kojto 107:4f6c30876dfa 648 ((CSHTIME) == QSPI_CS_HIGH_TIME_5_CYCLE) || \
Kojto 107:4f6c30876dfa 649 ((CSHTIME) == QSPI_CS_HIGH_TIME_6_CYCLE) || \
Kojto 107:4f6c30876dfa 650 ((CSHTIME) == QSPI_CS_HIGH_TIME_7_CYCLE) || \
Kojto 107:4f6c30876dfa 651 ((CSHTIME) == QSPI_CS_HIGH_TIME_8_CYCLE))
Kojto 107:4f6c30876dfa 652
Kojto 107:4f6c30876dfa 653 #define IS_QSPI_CLOCK_MODE(CLKMODE) (((CLKMODE) == QSPI_CLOCK_MODE_0) || \
Kojto 107:4f6c30876dfa 654 ((CLKMODE) == QSPI_CLOCK_MODE_3))
Kojto 107:4f6c30876dfa 655
Kojto 107:4f6c30876dfa 656 #define IS_QSPI_FLASH_ID(FLA) (((FLA) == QSPI_FLASH_ID_1) || \
Kojto 107:4f6c30876dfa 657 ((FLA) == QSPI_FLASH_ID_2))
Kojto 107:4f6c30876dfa 658
Kojto 107:4f6c30876dfa 659 #define IS_QSPI_DUAL_FLASH_MODE(MODE) (((MODE) == QSPI_DUALFLASH_ENABLE) || \
Kojto 107:4f6c30876dfa 660 ((MODE) == QSPI_DUALFLASH_DISABLE))
Kojto 107:4f6c30876dfa 661
Kojto 107:4f6c30876dfa 662
Kojto 107:4f6c30876dfa 663 /** @defgroup QSPI_Instruction QSPI Instruction
Kojto 107:4f6c30876dfa 664 * @{
Kojto 107:4f6c30876dfa 665 */
Kojto 107:4f6c30876dfa 666 #define IS_QSPI_INSTRUCTION(INSTRUCTION) ((INSTRUCTION) <= 0xFF)
Kojto 107:4f6c30876dfa 667 /**
Kojto 107:4f6c30876dfa 668 * @}
Kojto 107:4f6c30876dfa 669 */
Kojto 107:4f6c30876dfa 670
Kojto 107:4f6c30876dfa 671 #define IS_QSPI_ADDRESS_SIZE(ADDR_SIZE) (((ADDR_SIZE) == QSPI_ADDRESS_8_BITS) || \
Kojto 107:4f6c30876dfa 672 ((ADDR_SIZE) == QSPI_ADDRESS_16_BITS) || \
Kojto 107:4f6c30876dfa 673 ((ADDR_SIZE) == QSPI_ADDRESS_24_BITS) || \
Kojto 107:4f6c30876dfa 674 ((ADDR_SIZE) == QSPI_ADDRESS_32_BITS))
Kojto 107:4f6c30876dfa 675
Kojto 107:4f6c30876dfa 676 #define IS_QSPI_ALTERNATE_BYTES_SIZE(SIZE) (((SIZE) == QSPI_ALTERNATE_BYTES_8_BITS) || \
Kojto 107:4f6c30876dfa 677 ((SIZE) == QSPI_ALTERNATE_BYTES_16_BITS) || \
Kojto 107:4f6c30876dfa 678 ((SIZE) == QSPI_ALTERNATE_BYTES_24_BITS) || \
Kojto 107:4f6c30876dfa 679 ((SIZE) == QSPI_ALTERNATE_BYTES_32_BITS))
Kojto 107:4f6c30876dfa 680
Kojto 107:4f6c30876dfa 681
Kojto 107:4f6c30876dfa 682 /** @defgroup QSPI_DummyCycles QSPI Dummy Cycles
Kojto 107:4f6c30876dfa 683 * @{
Kojto 107:4f6c30876dfa 684 */
Kojto 107:4f6c30876dfa 685 #define IS_QSPI_DUMMY_CYCLES(DCY) ((DCY) <= 31)
Kojto 107:4f6c30876dfa 686 /**
Kojto 107:4f6c30876dfa 687 * @}
Kojto 107:4f6c30876dfa 688 */
Kojto 107:4f6c30876dfa 689
Kojto 107:4f6c30876dfa 690 #define IS_QSPI_INSTRUCTION_MODE(MODE) (((MODE) == QSPI_INSTRUCTION_NONE) || \
Kojto 107:4f6c30876dfa 691 ((MODE) == QSPI_INSTRUCTION_1_LINE) || \
Kojto 107:4f6c30876dfa 692 ((MODE) == QSPI_INSTRUCTION_2_LINES) || \
Kojto 107:4f6c30876dfa 693 ((MODE) == QSPI_INSTRUCTION_4_LINES))
Kojto 107:4f6c30876dfa 694
Kojto 107:4f6c30876dfa 695 #define IS_QSPI_ADDRESS_MODE(MODE) (((MODE) == QSPI_ADDRESS_NONE) || \
Kojto 107:4f6c30876dfa 696 ((MODE) == QSPI_ADDRESS_1_LINE) || \
Kojto 107:4f6c30876dfa 697 ((MODE) == QSPI_ADDRESS_2_LINES) || \
Kojto 107:4f6c30876dfa 698 ((MODE) == QSPI_ADDRESS_4_LINES))
Kojto 107:4f6c30876dfa 699
Kojto 107:4f6c30876dfa 700 #define IS_QSPI_ALTERNATE_BYTES_MODE(MODE) (((MODE) == QSPI_ALTERNATE_BYTES_NONE) || \
Kojto 107:4f6c30876dfa 701 ((MODE) == QSPI_ALTERNATE_BYTES_1_LINE) || \
Kojto 107:4f6c30876dfa 702 ((MODE) == QSPI_ALTERNATE_BYTES_2_LINES) || \
Kojto 107:4f6c30876dfa 703 ((MODE) == QSPI_ALTERNATE_BYTES_4_LINES))
Kojto 107:4f6c30876dfa 704
Kojto 107:4f6c30876dfa 705 #define IS_QSPI_DATA_MODE(MODE) (((MODE) == QSPI_DATA_NONE) || \
Kojto 107:4f6c30876dfa 706 ((MODE) == QSPI_DATA_1_LINE) || \
Kojto 107:4f6c30876dfa 707 ((MODE) == QSPI_DATA_2_LINES) || \
Kojto 107:4f6c30876dfa 708 ((MODE) == QSPI_DATA_4_LINES))
Kojto 107:4f6c30876dfa 709
Kojto 107:4f6c30876dfa 710 #define IS_QSPI_DDR_MODE(DDR_MODE) (((DDR_MODE) == QSPI_DDR_MODE_DISABLE) || \
Kojto 107:4f6c30876dfa 711 ((DDR_MODE) == QSPI_DDR_MODE_ENABLE))
Kojto 107:4f6c30876dfa 712
Kojto 107:4f6c30876dfa 713 #define IS_QSPI_DDR_HHC(DDR_HHC) (((DDR_HHC) == QSPI_DDR_HHC_ANALOG_DELAY) || \
Kojto 107:4f6c30876dfa 714 ((DDR_HHC) == QSPI_DDR_HHC_HALF_CLK_DELAY))
Kojto 107:4f6c30876dfa 715
Kojto 107:4f6c30876dfa 716 #define IS_QSPI_SIOO_MODE(SIOO_MODE) (((SIOO_MODE) == QSPI_SIOO_INST_EVERY_CMD) || \
Kojto 107:4f6c30876dfa 717 ((SIOO_MODE) == QSPI_SIOO_INST_ONLY_FIRST_CMD))
Kojto 107:4f6c30876dfa 718
Kojto 107:4f6c30876dfa 719 /** @defgroup QSPI_Interval QSPI Interval
Kojto 107:4f6c30876dfa 720 * @{
Kojto 107:4f6c30876dfa 721 */
Kojto 107:4f6c30876dfa 722 #define IS_QSPI_INTERVAL(INTERVAL) ((INTERVAL) <= QUADSPI_PIR_INTERVAL)
Kojto 107:4f6c30876dfa 723 /**
Kojto 107:4f6c30876dfa 724 * @}
Kojto 107:4f6c30876dfa 725 */
Kojto 107:4f6c30876dfa 726
Kojto 107:4f6c30876dfa 727 /** @defgroup QSPI_StatusBytesSize QSPI Status Bytes Size
Kojto 107:4f6c30876dfa 728 * @{
Kojto 107:4f6c30876dfa 729 */
Kojto 107:4f6c30876dfa 730 #define IS_QSPI_STATUS_BYTES_SIZE(SIZE) (((SIZE) >= 1) && ((SIZE) <= 4))
Kojto 107:4f6c30876dfa 731 /**
Kojto 107:4f6c30876dfa 732 * @}
Kojto 107:4f6c30876dfa 733 */
Kojto 107:4f6c30876dfa 734 #define IS_QSPI_MATCH_MODE(MODE) (((MODE) == QSPI_MATCH_MODE_AND) || \
Kojto 107:4f6c30876dfa 735 ((MODE) == QSPI_MATCH_MODE_OR))
Kojto 107:4f6c30876dfa 736
Kojto 107:4f6c30876dfa 737 #define IS_QSPI_AUTOMATIC_STOP(APMS) (((APMS) == QSPI_AUTOMATIC_STOP_DISABLE) || \
Kojto 107:4f6c30876dfa 738 ((APMS) == QSPI_AUTOMATIC_STOP_ENABLE))
Kojto 107:4f6c30876dfa 739
Kojto 107:4f6c30876dfa 740 #define IS_QSPI_TIMEOUT_ACTIVATION(TCEN) (((TCEN) == QSPI_TIMEOUT_COUNTER_DISABLE) || \
Kojto 107:4f6c30876dfa 741 ((TCEN) == QSPI_TIMEOUT_COUNTER_ENABLE))
Kojto 107:4f6c30876dfa 742
Kojto 107:4f6c30876dfa 743 /** @defgroup QSPI_TimeOutPeriod QSPI TimeOut Period
Kojto 107:4f6c30876dfa 744 * @{
Kojto 107:4f6c30876dfa 745 */
Kojto 107:4f6c30876dfa 746 #define IS_QSPI_TIMEOUT_PERIOD(PERIOD) ((PERIOD) <= 0xFFFF)
Kojto 107:4f6c30876dfa 747 /**
Kojto 107:4f6c30876dfa 748 * @}
Kojto 107:4f6c30876dfa 749 */
Kojto 107:4f6c30876dfa 750
Kojto 107:4f6c30876dfa 751 #define IS_QSPI_GET_FLAG(FLAG) (((FLAG) == QSPI_FLAG_BUSY) || \
Kojto 107:4f6c30876dfa 752 ((FLAG) == QSPI_FLAG_TO) || \
Kojto 107:4f6c30876dfa 753 ((FLAG) == QSPI_FLAG_SM) || \
Kojto 107:4f6c30876dfa 754 ((FLAG) == QSPI_FLAG_FT) || \
Kojto 107:4f6c30876dfa 755 ((FLAG) == QSPI_FLAG_TC) || \
Kojto 107:4f6c30876dfa 756 ((FLAG) == QSPI_FLAG_TE))
Kojto 107:4f6c30876dfa 757
Kojto 107:4f6c30876dfa 758 #define IS_QSPI_IT(IT) ((((IT) & (uint32_t)0xFFE0FFFF) == 0x00000000) && ((IT) != 0x00000000))
Kojto 107:4f6c30876dfa 759 /**
Kojto 107:4f6c30876dfa 760 * @}
Kojto 107:4f6c30876dfa 761 */
Kojto 107:4f6c30876dfa 762
Kojto 107:4f6c30876dfa 763 /* Private functions ---------------------------------------------------------*/
Kojto 107:4f6c30876dfa 764 /** @defgroup QSPI_Private_Functions QSPI Private Functions
Kojto 107:4f6c30876dfa 765 * @{
Kojto 107:4f6c30876dfa 766 */
Kojto 107:4f6c30876dfa 767
Kojto 107:4f6c30876dfa 768 /**
Kojto 107:4f6c30876dfa 769 * @}
Kojto 107:4f6c30876dfa 770 */
Kojto 107:4f6c30876dfa 771
Kojto 107:4f6c30876dfa 772 /**
Kojto 107:4f6c30876dfa 773 * @}
Kojto 107:4f6c30876dfa 774 */
Kojto 107:4f6c30876dfa 775
Kojto 107:4f6c30876dfa 776 /**
Kojto 107:4f6c30876dfa 777 * @}
Kojto 107:4f6c30876dfa 778 */
Kojto 107:4f6c30876dfa 779
Kojto 107:4f6c30876dfa 780 #ifdef __cplusplus
Kojto 107:4f6c30876dfa 781 }
Kojto 107:4f6c30876dfa 782 #endif
Kojto 107:4f6c30876dfa 783
Kojto 107:4f6c30876dfa 784 #endif /* __STM32F7xx_HAL_QSPI_H */
Kojto 107:4f6c30876dfa 785
Kojto 107:4f6c30876dfa 786 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/