Ricardo Benitez / mbed

Fork of mbed by mbed official

Committer:
Kojto
Date:
Wed Sep 16 15:32:31 2015 +0100
Revision:
107:4f6c30876dfa
Child:
116:c0f6e94411f5
Release 107  of the mbed library

Changes:
- new platforms - DISCO_F746NG, DISCO_L476VG, NUCLEO_L476RG
- KL43Z - bugfix RTC init function
- K20 - SPI mode fix

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 107:4f6c30876dfa 1 /**
Kojto 107:4f6c30876dfa 2 ******************************************************************************
Kojto 107:4f6c30876dfa 3 * @file stm32f7xx_hal_dma.h
Kojto 107:4f6c30876dfa 4 * @author MCD Application Team
Kojto 107:4f6c30876dfa 5 * @version V1.0.1
Kojto 107:4f6c30876dfa 6 * @date 25-June-2015
Kojto 107:4f6c30876dfa 7 * @brief Header file of DMA HAL module.
Kojto 107:4f6c30876dfa 8 ******************************************************************************
Kojto 107:4f6c30876dfa 9 * @attention
Kojto 107:4f6c30876dfa 10 *
Kojto 107:4f6c30876dfa 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 107:4f6c30876dfa 12 *
Kojto 107:4f6c30876dfa 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 107:4f6c30876dfa 14 * are permitted provided that the following conditions are met:
Kojto 107:4f6c30876dfa 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 107:4f6c30876dfa 16 * this list of conditions and the following disclaimer.
Kojto 107:4f6c30876dfa 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 107:4f6c30876dfa 18 * this list of conditions and the following disclaimer in the documentation
Kojto 107:4f6c30876dfa 19 * and/or other materials provided with the distribution.
Kojto 107:4f6c30876dfa 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 107:4f6c30876dfa 21 * may be used to endorse or promote products derived from this software
Kojto 107:4f6c30876dfa 22 * without specific prior written permission.
Kojto 107:4f6c30876dfa 23 *
Kojto 107:4f6c30876dfa 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 107:4f6c30876dfa 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 107:4f6c30876dfa 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 107:4f6c30876dfa 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 107:4f6c30876dfa 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 107:4f6c30876dfa 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 107:4f6c30876dfa 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 107:4f6c30876dfa 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 107:4f6c30876dfa 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 107:4f6c30876dfa 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 107:4f6c30876dfa 34 *
Kojto 107:4f6c30876dfa 35 ******************************************************************************
Kojto 107:4f6c30876dfa 36 */
Kojto 107:4f6c30876dfa 37
Kojto 107:4f6c30876dfa 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 107:4f6c30876dfa 39 #ifndef __STM32F7xx_HAL_DMA_H
Kojto 107:4f6c30876dfa 40 #define __STM32F7xx_HAL_DMA_H
Kojto 107:4f6c30876dfa 41
Kojto 107:4f6c30876dfa 42 #ifdef __cplusplus
Kojto 107:4f6c30876dfa 43 extern "C" {
Kojto 107:4f6c30876dfa 44 #endif
Kojto 107:4f6c30876dfa 45
Kojto 107:4f6c30876dfa 46 /* Includes ------------------------------------------------------------------*/
Kojto 107:4f6c30876dfa 47 #include "stm32f7xx_hal_def.h"
Kojto 107:4f6c30876dfa 48
Kojto 107:4f6c30876dfa 49 /** @addtogroup STM32F7xx_HAL_Driver
Kojto 107:4f6c30876dfa 50 * @{
Kojto 107:4f6c30876dfa 51 */
Kojto 107:4f6c30876dfa 52
Kojto 107:4f6c30876dfa 53 /** @addtogroup DMA
Kojto 107:4f6c30876dfa 54 * @{
Kojto 107:4f6c30876dfa 55 */
Kojto 107:4f6c30876dfa 56
Kojto 107:4f6c30876dfa 57 /* Exported types ------------------------------------------------------------*/
Kojto 107:4f6c30876dfa 58
Kojto 107:4f6c30876dfa 59 /** @defgroup DMA_Exported_Types DMA Exported Types
Kojto 107:4f6c30876dfa 60 * @brief DMA Exported Types
Kojto 107:4f6c30876dfa 61 * @{
Kojto 107:4f6c30876dfa 62 */
Kojto 107:4f6c30876dfa 63
Kojto 107:4f6c30876dfa 64 /**
Kojto 107:4f6c30876dfa 65 * @brief DMA Configuration Structure definition
Kojto 107:4f6c30876dfa 66 */
Kojto 107:4f6c30876dfa 67 typedef struct
Kojto 107:4f6c30876dfa 68 {
Kojto 107:4f6c30876dfa 69 uint32_t Channel; /*!< Specifies the channel used for the specified stream.
Kojto 107:4f6c30876dfa 70 This parameter can be a value of @ref DMA_Channel_selection */
Kojto 107:4f6c30876dfa 71
Kojto 107:4f6c30876dfa 72 uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
Kojto 107:4f6c30876dfa 73 from memory to memory or from peripheral to memory.
Kojto 107:4f6c30876dfa 74 This parameter can be a value of @ref DMA_Data_transfer_direction */
Kojto 107:4f6c30876dfa 75
Kojto 107:4f6c30876dfa 76 uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not.
Kojto 107:4f6c30876dfa 77 This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
Kojto 107:4f6c30876dfa 78
Kojto 107:4f6c30876dfa 79 uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not.
Kojto 107:4f6c30876dfa 80 This parameter can be a value of @ref DMA_Memory_incremented_mode */
Kojto 107:4f6c30876dfa 81
Kojto 107:4f6c30876dfa 82 uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
Kojto 107:4f6c30876dfa 83 This parameter can be a value of @ref DMA_Peripheral_data_size */
Kojto 107:4f6c30876dfa 84
Kojto 107:4f6c30876dfa 85 uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
Kojto 107:4f6c30876dfa 86 This parameter can be a value of @ref DMA_Memory_data_size */
Kojto 107:4f6c30876dfa 87
Kojto 107:4f6c30876dfa 88 uint32_t Mode; /*!< Specifies the operation mode of the DMAy Streamx.
Kojto 107:4f6c30876dfa 89 This parameter can be a value of @ref DMA_mode
Kojto 107:4f6c30876dfa 90 @note The circular buffer mode cannot be used if the memory-to-memory
Kojto 107:4f6c30876dfa 91 data transfer is configured on the selected Stream */
Kojto 107:4f6c30876dfa 92
Kojto 107:4f6c30876dfa 93 uint32_t Priority; /*!< Specifies the software priority for the DMAy Streamx.
Kojto 107:4f6c30876dfa 94 This parameter can be a value of @ref DMA_Priority_level */
Kojto 107:4f6c30876dfa 95
Kojto 107:4f6c30876dfa 96 uint32_t FIFOMode; /*!< Specifies if the FIFO mode or Direct mode will be used for the specified stream.
Kojto 107:4f6c30876dfa 97 This parameter can be a value of @ref DMA_FIFO_direct_mode
Kojto 107:4f6c30876dfa 98 @note The Direct mode (FIFO mode disabled) cannot be used if the
Kojto 107:4f6c30876dfa 99 memory-to-memory data transfer is configured on the selected stream */
Kojto 107:4f6c30876dfa 100
Kojto 107:4f6c30876dfa 101 uint32_t FIFOThreshold; /*!< Specifies the FIFO threshold level.
Kojto 107:4f6c30876dfa 102 This parameter can be a value of @ref DMA_FIFO_threshold_level */
Kojto 107:4f6c30876dfa 103
Kojto 107:4f6c30876dfa 104 uint32_t MemBurst; /*!< Specifies the Burst transfer configuration for the memory transfers.
Kojto 107:4f6c30876dfa 105 It specifies the amount of data to be transferred in a single non interruptible
Kojto 107:4f6c30876dfa 106 transaction.
Kojto 107:4f6c30876dfa 107 This parameter can be a value of @ref DMA_Memory_burst
Kojto 107:4f6c30876dfa 108 @note The burst mode is possible only if the address Increment mode is enabled. */
Kojto 107:4f6c30876dfa 109
Kojto 107:4f6c30876dfa 110 uint32_t PeriphBurst; /*!< Specifies the Burst transfer configuration for the peripheral transfers.
Kojto 107:4f6c30876dfa 111 It specifies the amount of data to be transferred in a single non interruptible
Kojto 107:4f6c30876dfa 112 transaction.
Kojto 107:4f6c30876dfa 113 This parameter can be a value of @ref DMA_Peripheral_burst
Kojto 107:4f6c30876dfa 114 @note The burst mode is possible only if the address Increment mode is enabled. */
Kojto 107:4f6c30876dfa 115 }DMA_InitTypeDef;
Kojto 107:4f6c30876dfa 116
Kojto 107:4f6c30876dfa 117 /**
Kojto 107:4f6c30876dfa 118 * @brief HAL DMA State structures definition
Kojto 107:4f6c30876dfa 119 */
Kojto 107:4f6c30876dfa 120 typedef enum
Kojto 107:4f6c30876dfa 121 {
Kojto 107:4f6c30876dfa 122 HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */
Kojto 107:4f6c30876dfa 123 HAL_DMA_STATE_READY = 0x01, /*!< DMA initialized and ready for use */
Kojto 107:4f6c30876dfa 124 HAL_DMA_STATE_READY_MEM0 = 0x11, /*!< DMA Mem0 process success */
Kojto 107:4f6c30876dfa 125 HAL_DMA_STATE_READY_MEM1 = 0x21, /*!< DMA Mem1 process success */
Kojto 107:4f6c30876dfa 126 HAL_DMA_STATE_READY_HALF_MEM0 = 0x31, /*!< DMA Mem0 Half process success */
Kojto 107:4f6c30876dfa 127 HAL_DMA_STATE_READY_HALF_MEM1 = 0x41, /*!< DMA Mem1 Half process success */
Kojto 107:4f6c30876dfa 128 HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */
Kojto 107:4f6c30876dfa 129 HAL_DMA_STATE_BUSY_MEM0 = 0x12, /*!< DMA Mem0 process is ongoing */
Kojto 107:4f6c30876dfa 130 HAL_DMA_STATE_BUSY_MEM1 = 0x22, /*!< DMA Mem1 process is ongoing */
Kojto 107:4f6c30876dfa 131 HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */
Kojto 107:4f6c30876dfa 132 HAL_DMA_STATE_ERROR = 0x04, /*!< DMA error state */
Kojto 107:4f6c30876dfa 133 }HAL_DMA_StateTypeDef;
Kojto 107:4f6c30876dfa 134
Kojto 107:4f6c30876dfa 135 /**
Kojto 107:4f6c30876dfa 136 * @brief HAL DMA Error Code structure definition
Kojto 107:4f6c30876dfa 137 */
Kojto 107:4f6c30876dfa 138 typedef enum
Kojto 107:4f6c30876dfa 139 {
Kojto 107:4f6c30876dfa 140 HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */
Kojto 107:4f6c30876dfa 141 HAL_DMA_HALF_TRANSFER = 0x01, /*!< Half Transfer */
Kojto 107:4f6c30876dfa 142 }HAL_DMA_LevelCompleteTypeDef;
Kojto 107:4f6c30876dfa 143
Kojto 107:4f6c30876dfa 144 /**
Kojto 107:4f6c30876dfa 145 * @brief DMA handle Structure definition
Kojto 107:4f6c30876dfa 146 */
Kojto 107:4f6c30876dfa 147 typedef struct __DMA_HandleTypeDef
Kojto 107:4f6c30876dfa 148 {
Kojto 107:4f6c30876dfa 149 DMA_Stream_TypeDef *Instance; /*!< Register base address */
Kojto 107:4f6c30876dfa 150
Kojto 107:4f6c30876dfa 151 DMA_InitTypeDef Init; /*!< DMA communication parameters */
Kojto 107:4f6c30876dfa 152
Kojto 107:4f6c30876dfa 153 HAL_LockTypeDef Lock; /*!< DMA locking object */
Kojto 107:4f6c30876dfa 154
Kojto 107:4f6c30876dfa 155 __IO HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
Kojto 107:4f6c30876dfa 156
Kojto 107:4f6c30876dfa 157 void *Parent; /*!< Parent object state */
Kojto 107:4f6c30876dfa 158
Kojto 107:4f6c30876dfa 159 void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
Kojto 107:4f6c30876dfa 160
Kojto 107:4f6c30876dfa 161 void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
Kojto 107:4f6c30876dfa 162
Kojto 107:4f6c30876dfa 163 void (* XferM1CpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete Memory1 callback */
Kojto 107:4f6c30876dfa 164
Kojto 107:4f6c30876dfa 165 void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
Kojto 107:4f6c30876dfa 166
Kojto 107:4f6c30876dfa 167 __IO uint32_t ErrorCode; /*!< DMA Error code */
Kojto 107:4f6c30876dfa 168 }DMA_HandleTypeDef;
Kojto 107:4f6c30876dfa 169
Kojto 107:4f6c30876dfa 170 /**
Kojto 107:4f6c30876dfa 171 * @}
Kojto 107:4f6c30876dfa 172 */
Kojto 107:4f6c30876dfa 173
Kojto 107:4f6c30876dfa 174
Kojto 107:4f6c30876dfa 175 /* Exported constants --------------------------------------------------------*/
Kojto 107:4f6c30876dfa 176
Kojto 107:4f6c30876dfa 177 /** @defgroup DMA_Exported_Constants DMA Exported Constants
Kojto 107:4f6c30876dfa 178 * @brief DMA Exported constants
Kojto 107:4f6c30876dfa 179 * @{
Kojto 107:4f6c30876dfa 180 */
Kojto 107:4f6c30876dfa 181
Kojto 107:4f6c30876dfa 182 /** @defgroup DMA_Error_Code DMA Error Code
Kojto 107:4f6c30876dfa 183 * @brief DMA Error Code
Kojto 107:4f6c30876dfa 184 * @{
Kojto 107:4f6c30876dfa 185 */
Kojto 107:4f6c30876dfa 186 #define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
Kojto 107:4f6c30876dfa 187 #define HAL_DMA_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
Kojto 107:4f6c30876dfa 188 #define HAL_DMA_ERROR_FE ((uint32_t)0x00000002) /*!< FIFO error */
Kojto 107:4f6c30876dfa 189 #define HAL_DMA_ERROR_DME ((uint32_t)0x00000004) /*!< Direct Mode error */
Kojto 107:4f6c30876dfa 190 #define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
Kojto 107:4f6c30876dfa 191 /**
Kojto 107:4f6c30876dfa 192 * @}
Kojto 107:4f6c30876dfa 193 */
Kojto 107:4f6c30876dfa 194
Kojto 107:4f6c30876dfa 195 /** @defgroup DMA_Channel_selection DMA Channel selection
Kojto 107:4f6c30876dfa 196 * @brief DMA channel selection
Kojto 107:4f6c30876dfa 197 * @{
Kojto 107:4f6c30876dfa 198 */
Kojto 107:4f6c30876dfa 199 #define DMA_CHANNEL_0 ((uint32_t)0x00000000) /*!< DMA Channel 0 */
Kojto 107:4f6c30876dfa 200 #define DMA_CHANNEL_1 ((uint32_t)0x02000000) /*!< DMA Channel 1 */
Kojto 107:4f6c30876dfa 201 #define DMA_CHANNEL_2 ((uint32_t)0x04000000) /*!< DMA Channel 2 */
Kojto 107:4f6c30876dfa 202 #define DMA_CHANNEL_3 ((uint32_t)0x06000000) /*!< DMA Channel 3 */
Kojto 107:4f6c30876dfa 203 #define DMA_CHANNEL_4 ((uint32_t)0x08000000) /*!< DMA Channel 4 */
Kojto 107:4f6c30876dfa 204 #define DMA_CHANNEL_5 ((uint32_t)0x0A000000) /*!< DMA Channel 5 */
Kojto 107:4f6c30876dfa 205 #define DMA_CHANNEL_6 ((uint32_t)0x0C000000) /*!< DMA Channel 6 */
Kojto 107:4f6c30876dfa 206 #define DMA_CHANNEL_7 ((uint32_t)0x0E000000) /*!< DMA Channel 7 */
Kojto 107:4f6c30876dfa 207 /**
Kojto 107:4f6c30876dfa 208 * @}
Kojto 107:4f6c30876dfa 209 */
Kojto 107:4f6c30876dfa 210
Kojto 107:4f6c30876dfa 211 /** @defgroup DMA_Data_transfer_direction DMA Data transfer direction
Kojto 107:4f6c30876dfa 212 * @brief DMA data transfer direction
Kojto 107:4f6c30876dfa 213 * @{
Kojto 107:4f6c30876dfa 214 */
Kojto 107:4f6c30876dfa 215 #define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */
Kojto 107:4f6c30876dfa 216 #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_SxCR_DIR_0) /*!< Memory to peripheral direction */
Kojto 107:4f6c30876dfa 217 #define DMA_MEMORY_TO_MEMORY ((uint32_t)DMA_SxCR_DIR_1) /*!< Memory to memory direction */
Kojto 107:4f6c30876dfa 218 /**
Kojto 107:4f6c30876dfa 219 * @}
Kojto 107:4f6c30876dfa 220 */
Kojto 107:4f6c30876dfa 221
Kojto 107:4f6c30876dfa 222 /** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode
Kojto 107:4f6c30876dfa 223 * @brief DMA peripheral incremented mode
Kojto 107:4f6c30876dfa 224 * @{
Kojto 107:4f6c30876dfa 225 */
Kojto 107:4f6c30876dfa 226 #define DMA_PINC_ENABLE ((uint32_t)DMA_SxCR_PINC) /*!< Peripheral increment mode enable */
Kojto 107:4f6c30876dfa 227 #define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode disable */
Kojto 107:4f6c30876dfa 228 /**
Kojto 107:4f6c30876dfa 229 * @}
Kojto 107:4f6c30876dfa 230 */
Kojto 107:4f6c30876dfa 231
Kojto 107:4f6c30876dfa 232 /** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode
Kojto 107:4f6c30876dfa 233 * @brief DMA memory incremented mode
Kojto 107:4f6c30876dfa 234 * @{
Kojto 107:4f6c30876dfa 235 */
Kojto 107:4f6c30876dfa 236 #define DMA_MINC_ENABLE ((uint32_t)DMA_SxCR_MINC) /*!< Memory increment mode enable */
Kojto 107:4f6c30876dfa 237 #define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode disable */
Kojto 107:4f6c30876dfa 238 /**
Kojto 107:4f6c30876dfa 239 * @}
Kojto 107:4f6c30876dfa 240 */
Kojto 107:4f6c30876dfa 241
Kojto 107:4f6c30876dfa 242
Kojto 107:4f6c30876dfa 243 /** @defgroup DMA_Peripheral_data_size DMA Peripheral data size
Kojto 107:4f6c30876dfa 244 * @brief DMA peripheral data size
Kojto 107:4f6c30876dfa 245 * @{
Kojto 107:4f6c30876dfa 246 */
Kojto 107:4f6c30876dfa 247 #define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment: Byte */
Kojto 107:4f6c30876dfa 248 #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_SxCR_PSIZE_0) /*!< Peripheral data alignment: HalfWord */
Kojto 107:4f6c30876dfa 249 #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_SxCR_PSIZE_1) /*!< Peripheral data alignment: Word */
Kojto 107:4f6c30876dfa 250 /**
Kojto 107:4f6c30876dfa 251 * @}
Kojto 107:4f6c30876dfa 252 */
Kojto 107:4f6c30876dfa 253
Kojto 107:4f6c30876dfa 254
Kojto 107:4f6c30876dfa 255 /** @defgroup DMA_Memory_data_size DMA Memory data size
Kojto 107:4f6c30876dfa 256 * @brief DMA memory data size
Kojto 107:4f6c30876dfa 257 * @{
Kojto 107:4f6c30876dfa 258 */
Kojto 107:4f6c30876dfa 259 #define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment: Byte */
Kojto 107:4f6c30876dfa 260 #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_SxCR_MSIZE_0) /*!< Memory data alignment: HalfWord */
Kojto 107:4f6c30876dfa 261 #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_SxCR_MSIZE_1) /*!< Memory data alignment: Word */
Kojto 107:4f6c30876dfa 262 /**
Kojto 107:4f6c30876dfa 263 * @}
Kojto 107:4f6c30876dfa 264 */
Kojto 107:4f6c30876dfa 265
Kojto 107:4f6c30876dfa 266 /** @defgroup DMA_mode DMA mode
Kojto 107:4f6c30876dfa 267 * @brief DMA mode
Kojto 107:4f6c30876dfa 268 * @{
Kojto 107:4f6c30876dfa 269 */
Kojto 107:4f6c30876dfa 270 #define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */
Kojto 107:4f6c30876dfa 271 #define DMA_CIRCULAR ((uint32_t)DMA_SxCR_CIRC) /*!< Circular mode */
Kojto 107:4f6c30876dfa 272 #define DMA_PFCTRL ((uint32_t)DMA_SxCR_PFCTRL) /*!< Peripheral flow control mode */
Kojto 107:4f6c30876dfa 273 /**
Kojto 107:4f6c30876dfa 274 * @}
Kojto 107:4f6c30876dfa 275 */
Kojto 107:4f6c30876dfa 276
Kojto 107:4f6c30876dfa 277
Kojto 107:4f6c30876dfa 278 /** @defgroup DMA_Priority_level DMA Priority level
Kojto 107:4f6c30876dfa 279 * @brief DMA priority levels
Kojto 107:4f6c30876dfa 280 * @{
Kojto 107:4f6c30876dfa 281 */
Kojto 107:4f6c30876dfa 282 #define DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level: Low */
Kojto 107:4f6c30876dfa 283 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_SxCR_PL_0) /*!< Priority level: Medium */
Kojto 107:4f6c30876dfa 284 #define DMA_PRIORITY_HIGH ((uint32_t)DMA_SxCR_PL_1) /*!< Priority level: High */
Kojto 107:4f6c30876dfa 285 #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_SxCR_PL) /*!< Priority level: Very High */
Kojto 107:4f6c30876dfa 286 /**
Kojto 107:4f6c30876dfa 287 * @}
Kojto 107:4f6c30876dfa 288 */
Kojto 107:4f6c30876dfa 289
Kojto 107:4f6c30876dfa 290
Kojto 107:4f6c30876dfa 291 /** @defgroup DMA_FIFO_direct_mode DMA FIFO direct mode
Kojto 107:4f6c30876dfa 292 * @brief DMA FIFO direct mode
Kojto 107:4f6c30876dfa 293 * @{
Kojto 107:4f6c30876dfa 294 */
Kojto 107:4f6c30876dfa 295 #define DMA_FIFOMODE_DISABLE ((uint32_t)0x00000000) /*!< FIFO mode disable */
Kojto 107:4f6c30876dfa 296 #define DMA_FIFOMODE_ENABLE ((uint32_t)DMA_SxFCR_DMDIS) /*!< FIFO mode enable */
Kojto 107:4f6c30876dfa 297 /**
Kojto 107:4f6c30876dfa 298 * @}
Kojto 107:4f6c30876dfa 299 */
Kojto 107:4f6c30876dfa 300
Kojto 107:4f6c30876dfa 301 /** @defgroup DMA_FIFO_threshold_level DMA FIFO threshold level
Kojto 107:4f6c30876dfa 302 * @brief DMA FIFO level
Kojto 107:4f6c30876dfa 303 * @{
Kojto 107:4f6c30876dfa 304 */
Kojto 107:4f6c30876dfa 305 #define DMA_FIFO_THRESHOLD_1QUARTERFULL ((uint32_t)0x00000000) /*!< FIFO threshold 1 quart full configuration */
Kojto 107:4f6c30876dfa 306 #define DMA_FIFO_THRESHOLD_HALFFULL ((uint32_t)DMA_SxFCR_FTH_0) /*!< FIFO threshold half full configuration */
Kojto 107:4f6c30876dfa 307 #define DMA_FIFO_THRESHOLD_3QUARTERSFULL ((uint32_t)DMA_SxFCR_FTH_1) /*!< FIFO threshold 3 quarts full configuration */
Kojto 107:4f6c30876dfa 308 #define DMA_FIFO_THRESHOLD_FULL ((uint32_t)DMA_SxFCR_FTH) /*!< FIFO threshold full configuration */
Kojto 107:4f6c30876dfa 309 /**
Kojto 107:4f6c30876dfa 310 * @}
Kojto 107:4f6c30876dfa 311 */
Kojto 107:4f6c30876dfa 312
Kojto 107:4f6c30876dfa 313 /** @defgroup DMA_Memory_burst DMA Memory burst
Kojto 107:4f6c30876dfa 314 * @brief DMA memory burst
Kojto 107:4f6c30876dfa 315 * @{
Kojto 107:4f6c30876dfa 316 */
Kojto 107:4f6c30876dfa 317 #define DMA_MBURST_SINGLE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 318 #define DMA_MBURST_INC4 ((uint32_t)DMA_SxCR_MBURST_0)
Kojto 107:4f6c30876dfa 319 #define DMA_MBURST_INC8 ((uint32_t)DMA_SxCR_MBURST_1)
Kojto 107:4f6c30876dfa 320 #define DMA_MBURST_INC16 ((uint32_t)DMA_SxCR_MBURST)
Kojto 107:4f6c30876dfa 321 /**
Kojto 107:4f6c30876dfa 322 * @}
Kojto 107:4f6c30876dfa 323 */
Kojto 107:4f6c30876dfa 324
Kojto 107:4f6c30876dfa 325
Kojto 107:4f6c30876dfa 326 /** @defgroup DMA_Peripheral_burst DMA Peripheral burst
Kojto 107:4f6c30876dfa 327 * @brief DMA peripheral burst
Kojto 107:4f6c30876dfa 328 * @{
Kojto 107:4f6c30876dfa 329 */
Kojto 107:4f6c30876dfa 330 #define DMA_PBURST_SINGLE ((uint32_t)0x00000000)
Kojto 107:4f6c30876dfa 331 #define DMA_PBURST_INC4 ((uint32_t)DMA_SxCR_PBURST_0)
Kojto 107:4f6c30876dfa 332 #define DMA_PBURST_INC8 ((uint32_t)DMA_SxCR_PBURST_1)
Kojto 107:4f6c30876dfa 333 #define DMA_PBURST_INC16 ((uint32_t)DMA_SxCR_PBURST)
Kojto 107:4f6c30876dfa 334 /**
Kojto 107:4f6c30876dfa 335 * @}
Kojto 107:4f6c30876dfa 336 */
Kojto 107:4f6c30876dfa 337
Kojto 107:4f6c30876dfa 338 /** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions
Kojto 107:4f6c30876dfa 339 * @brief DMA interrupts definition
Kojto 107:4f6c30876dfa 340 * @{
Kojto 107:4f6c30876dfa 341 */
Kojto 107:4f6c30876dfa 342 #define DMA_IT_TC ((uint32_t)DMA_SxCR_TCIE)
Kojto 107:4f6c30876dfa 343 #define DMA_IT_HT ((uint32_t)DMA_SxCR_HTIE)
Kojto 107:4f6c30876dfa 344 #define DMA_IT_TE ((uint32_t)DMA_SxCR_TEIE)
Kojto 107:4f6c30876dfa 345 #define DMA_IT_DME ((uint32_t)DMA_SxCR_DMEIE)
Kojto 107:4f6c30876dfa 346 #define DMA_IT_FE ((uint32_t)0x00000080)
Kojto 107:4f6c30876dfa 347 /**
Kojto 107:4f6c30876dfa 348 * @}
Kojto 107:4f6c30876dfa 349 */
Kojto 107:4f6c30876dfa 350
Kojto 107:4f6c30876dfa 351 /** @defgroup DMA_flag_definitions DMA flag definitions
Kojto 107:4f6c30876dfa 352 * @brief DMA flag definitions
Kojto 107:4f6c30876dfa 353 * @{
Kojto 107:4f6c30876dfa 354 */
Kojto 107:4f6c30876dfa 355 #define DMA_FLAG_FEIF0_4 ((uint32_t)0x00800001)
Kojto 107:4f6c30876dfa 356 #define DMA_FLAG_DMEIF0_4 ((uint32_t)0x00800004)
Kojto 107:4f6c30876dfa 357 #define DMA_FLAG_TEIF0_4 ((uint32_t)0x00000008)
Kojto 107:4f6c30876dfa 358 #define DMA_FLAG_HTIF0_4 ((uint32_t)0x00000010)
Kojto 107:4f6c30876dfa 359 #define DMA_FLAG_TCIF0_4 ((uint32_t)0x00000020)
Kojto 107:4f6c30876dfa 360 #define DMA_FLAG_FEIF1_5 ((uint32_t)0x00000040)
Kojto 107:4f6c30876dfa 361 #define DMA_FLAG_DMEIF1_5 ((uint32_t)0x00000100)
Kojto 107:4f6c30876dfa 362 #define DMA_FLAG_TEIF1_5 ((uint32_t)0x00000200)
Kojto 107:4f6c30876dfa 363 #define DMA_FLAG_HTIF1_5 ((uint32_t)0x00000400)
Kojto 107:4f6c30876dfa 364 #define DMA_FLAG_TCIF1_5 ((uint32_t)0x00000800)
Kojto 107:4f6c30876dfa 365 #define DMA_FLAG_FEIF2_6 ((uint32_t)0x00010000)
Kojto 107:4f6c30876dfa 366 #define DMA_FLAG_DMEIF2_6 ((uint32_t)0x00040000)
Kojto 107:4f6c30876dfa 367 #define DMA_FLAG_TEIF2_6 ((uint32_t)0x00080000)
Kojto 107:4f6c30876dfa 368 #define DMA_FLAG_HTIF2_6 ((uint32_t)0x00100000)
Kojto 107:4f6c30876dfa 369 #define DMA_FLAG_TCIF2_6 ((uint32_t)0x00200000)
Kojto 107:4f6c30876dfa 370 #define DMA_FLAG_FEIF3_7 ((uint32_t)0x00400000)
Kojto 107:4f6c30876dfa 371 #define DMA_FLAG_DMEIF3_7 ((uint32_t)0x01000000)
Kojto 107:4f6c30876dfa 372 #define DMA_FLAG_TEIF3_7 ((uint32_t)0x02000000)
Kojto 107:4f6c30876dfa 373 #define DMA_FLAG_HTIF3_7 ((uint32_t)0x04000000)
Kojto 107:4f6c30876dfa 374 #define DMA_FLAG_TCIF3_7 ((uint32_t)0x08000000)
Kojto 107:4f6c30876dfa 375 /**
Kojto 107:4f6c30876dfa 376 * @}
Kojto 107:4f6c30876dfa 377 */
Kojto 107:4f6c30876dfa 378
Kojto 107:4f6c30876dfa 379 /**
Kojto 107:4f6c30876dfa 380 * @}
Kojto 107:4f6c30876dfa 381 */
Kojto 107:4f6c30876dfa 382
Kojto 107:4f6c30876dfa 383 /* Exported macro ------------------------------------------------------------*/
Kojto 107:4f6c30876dfa 384
Kojto 107:4f6c30876dfa 385 /** @brief Reset DMA handle state
Kojto 107:4f6c30876dfa 386 * @param __HANDLE__: specifies the DMA handle.
Kojto 107:4f6c30876dfa 387 * @retval None
Kojto 107:4f6c30876dfa 388 */
Kojto 107:4f6c30876dfa 389 #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
Kojto 107:4f6c30876dfa 390
Kojto 107:4f6c30876dfa 391 /**
Kojto 107:4f6c30876dfa 392 * @brief Return the current DMA Stream FIFO filled level.
Kojto 107:4f6c30876dfa 393 * @param __HANDLE__: DMA handle
Kojto 107:4f6c30876dfa 394 * @retval The FIFO filling state.
Kojto 107:4f6c30876dfa 395 * - DMA_FIFOStatus_Less1QuarterFull: when FIFO is less than 1 quarter-full
Kojto 107:4f6c30876dfa 396 * and not empty.
Kojto 107:4f6c30876dfa 397 * - DMA_FIFOStatus_1QuarterFull: if more than 1 quarter-full.
Kojto 107:4f6c30876dfa 398 * - DMA_FIFOStatus_HalfFull: if more than 1 half-full.
Kojto 107:4f6c30876dfa 399 * - DMA_FIFOStatus_3QuartersFull: if more than 3 quarters-full.
Kojto 107:4f6c30876dfa 400 * - DMA_FIFOStatus_Empty: when FIFO is empty
Kojto 107:4f6c30876dfa 401 * - DMA_FIFOStatus_Full: when FIFO is full
Kojto 107:4f6c30876dfa 402 */
Kojto 107:4f6c30876dfa 403 #define __HAL_DMA_GET_FS(__HANDLE__) (((__HANDLE__)->Instance->FCR & (DMA_SxFCR_FS)))
Kojto 107:4f6c30876dfa 404
Kojto 107:4f6c30876dfa 405 /**
Kojto 107:4f6c30876dfa 406 * @brief Enable the specified DMA Stream.
Kojto 107:4f6c30876dfa 407 * @param __HANDLE__: DMA handle
Kojto 107:4f6c30876dfa 408 * @retval None
Kojto 107:4f6c30876dfa 409 */
Kojto 107:4f6c30876dfa 410 #define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA_SxCR_EN)
Kojto 107:4f6c30876dfa 411
Kojto 107:4f6c30876dfa 412 /**
Kojto 107:4f6c30876dfa 413 * @brief Disable the specified DMA Stream.
Kojto 107:4f6c30876dfa 414 * @param __HANDLE__: DMA handle
Kojto 107:4f6c30876dfa 415 * @retval None
Kojto 107:4f6c30876dfa 416 */
Kojto 107:4f6c30876dfa 417 #define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DMA_SxCR_EN)
Kojto 107:4f6c30876dfa 418
Kojto 107:4f6c30876dfa 419 /* Interrupt & Flag management */
Kojto 107:4f6c30876dfa 420
Kojto 107:4f6c30876dfa 421 /**
Kojto 107:4f6c30876dfa 422 * @brief Return the current DMA Stream transfer complete flag.
Kojto 107:4f6c30876dfa 423 * @param __HANDLE__: DMA handle
Kojto 107:4f6c30876dfa 424 * @retval The specified transfer complete flag index.
Kojto 107:4f6c30876dfa 425 */
Kojto 107:4f6c30876dfa 426 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
Kojto 107:4f6c30876dfa 427 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_TCIF0_4 :\
Kojto 107:4f6c30876dfa 428 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_TCIF0_4 :\
Kojto 107:4f6c30876dfa 429 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_TCIF0_4 :\
Kojto 107:4f6c30876dfa 430 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_TCIF0_4 :\
Kojto 107:4f6c30876dfa 431 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_TCIF1_5 :\
Kojto 107:4f6c30876dfa 432 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_TCIF1_5 :\
Kojto 107:4f6c30876dfa 433 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_TCIF1_5 :\
Kojto 107:4f6c30876dfa 434 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TCIF1_5 :\
Kojto 107:4f6c30876dfa 435 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_TCIF2_6 :\
Kojto 107:4f6c30876dfa 436 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_TCIF2_6 :\
Kojto 107:4f6c30876dfa 437 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_TCIF2_6 :\
Kojto 107:4f6c30876dfa 438 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_TCIF2_6 :\
Kojto 107:4f6c30876dfa 439 DMA_FLAG_TCIF3_7)
Kojto 107:4f6c30876dfa 440
Kojto 107:4f6c30876dfa 441 /**
Kojto 107:4f6c30876dfa 442 * @brief Return the current DMA Stream half transfer complete flag.
Kojto 107:4f6c30876dfa 443 * @param __HANDLE__: DMA handle
Kojto 107:4f6c30876dfa 444 * @retval The specified half transfer complete flag index.
Kojto 107:4f6c30876dfa 445 */
Kojto 107:4f6c30876dfa 446 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
Kojto 107:4f6c30876dfa 447 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_HTIF0_4 :\
Kojto 107:4f6c30876dfa 448 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_HTIF0_4 :\
Kojto 107:4f6c30876dfa 449 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_HTIF0_4 :\
Kojto 107:4f6c30876dfa 450 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_HTIF0_4 :\
Kojto 107:4f6c30876dfa 451 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_HTIF1_5 :\
Kojto 107:4f6c30876dfa 452 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_HTIF1_5 :\
Kojto 107:4f6c30876dfa 453 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_HTIF1_5 :\
Kojto 107:4f6c30876dfa 454 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_HTIF1_5 :\
Kojto 107:4f6c30876dfa 455 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_HTIF2_6 :\
Kojto 107:4f6c30876dfa 456 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_HTIF2_6 :\
Kojto 107:4f6c30876dfa 457 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_HTIF2_6 :\
Kojto 107:4f6c30876dfa 458 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_HTIF2_6 :\
Kojto 107:4f6c30876dfa 459 DMA_FLAG_HTIF3_7)
Kojto 107:4f6c30876dfa 460
Kojto 107:4f6c30876dfa 461 /**
Kojto 107:4f6c30876dfa 462 * @brief Return the current DMA Stream transfer error flag.
Kojto 107:4f6c30876dfa 463 * @param __HANDLE__: DMA handle
Kojto 107:4f6c30876dfa 464 * @retval The specified transfer error flag index.
Kojto 107:4f6c30876dfa 465 */
Kojto 107:4f6c30876dfa 466 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
Kojto 107:4f6c30876dfa 467 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_TEIF0_4 :\
Kojto 107:4f6c30876dfa 468 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_TEIF0_4 :\
Kojto 107:4f6c30876dfa 469 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_TEIF0_4 :\
Kojto 107:4f6c30876dfa 470 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_TEIF0_4 :\
Kojto 107:4f6c30876dfa 471 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_TEIF1_5 :\
Kojto 107:4f6c30876dfa 472 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_TEIF1_5 :\
Kojto 107:4f6c30876dfa 473 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_TEIF1_5 :\
Kojto 107:4f6c30876dfa 474 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TEIF1_5 :\
Kojto 107:4f6c30876dfa 475 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_TEIF2_6 :\
Kojto 107:4f6c30876dfa 476 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_TEIF2_6 :\
Kojto 107:4f6c30876dfa 477 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_TEIF2_6 :\
Kojto 107:4f6c30876dfa 478 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_TEIF2_6 :\
Kojto 107:4f6c30876dfa 479 DMA_FLAG_TEIF3_7)
Kojto 107:4f6c30876dfa 480
Kojto 107:4f6c30876dfa 481 /**
Kojto 107:4f6c30876dfa 482 * @brief Return the current DMA Stream FIFO error flag.
Kojto 107:4f6c30876dfa 483 * @param __HANDLE__: DMA handle
Kojto 107:4f6c30876dfa 484 * @retval The specified FIFO error flag index.
Kojto 107:4f6c30876dfa 485 */
Kojto 107:4f6c30876dfa 486 #define __HAL_DMA_GET_FE_FLAG_INDEX(__HANDLE__)\
Kojto 107:4f6c30876dfa 487 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_FEIF0_4 :\
Kojto 107:4f6c30876dfa 488 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_FEIF0_4 :\
Kojto 107:4f6c30876dfa 489 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_FEIF0_4 :\
Kojto 107:4f6c30876dfa 490 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_FEIF0_4 :\
Kojto 107:4f6c30876dfa 491 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_FEIF1_5 :\
Kojto 107:4f6c30876dfa 492 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_FEIF1_5 :\
Kojto 107:4f6c30876dfa 493 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_FEIF1_5 :\
Kojto 107:4f6c30876dfa 494 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_FEIF1_5 :\
Kojto 107:4f6c30876dfa 495 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_FEIF2_6 :\
Kojto 107:4f6c30876dfa 496 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_FEIF2_6 :\
Kojto 107:4f6c30876dfa 497 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_FEIF2_6 :\
Kojto 107:4f6c30876dfa 498 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_FEIF2_6 :\
Kojto 107:4f6c30876dfa 499 DMA_FLAG_FEIF3_7)
Kojto 107:4f6c30876dfa 500
Kojto 107:4f6c30876dfa 501 /**
Kojto 107:4f6c30876dfa 502 * @brief Return the current DMA Stream direct mode error flag.
Kojto 107:4f6c30876dfa 503 * @param __HANDLE__: DMA handle
Kojto 107:4f6c30876dfa 504 * @retval The specified direct mode error flag index.
Kojto 107:4f6c30876dfa 505 */
Kojto 107:4f6c30876dfa 506 #define __HAL_DMA_GET_DME_FLAG_INDEX(__HANDLE__)\
Kojto 107:4f6c30876dfa 507 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_DMEIF0_4 :\
Kojto 107:4f6c30876dfa 508 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_DMEIF0_4 :\
Kojto 107:4f6c30876dfa 509 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_DMEIF0_4 :\
Kojto 107:4f6c30876dfa 510 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_DMEIF0_4 :\
Kojto 107:4f6c30876dfa 511 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_DMEIF1_5 :\
Kojto 107:4f6c30876dfa 512 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_DMEIF1_5 :\
Kojto 107:4f6c30876dfa 513 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_DMEIF1_5 :\
Kojto 107:4f6c30876dfa 514 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_DMEIF1_5 :\
Kojto 107:4f6c30876dfa 515 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_DMEIF2_6 :\
Kojto 107:4f6c30876dfa 516 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_DMEIF2_6 :\
Kojto 107:4f6c30876dfa 517 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_DMEIF2_6 :\
Kojto 107:4f6c30876dfa 518 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_DMEIF2_6 :\
Kojto 107:4f6c30876dfa 519 DMA_FLAG_DMEIF3_7)
Kojto 107:4f6c30876dfa 520
Kojto 107:4f6c30876dfa 521 /**
Kojto 107:4f6c30876dfa 522 * @brief Get the DMA Stream pending flags.
Kojto 107:4f6c30876dfa 523 * @param __HANDLE__: DMA handle
Kojto 107:4f6c30876dfa 524 * @param __FLAG__: Get the specified flag.
Kojto 107:4f6c30876dfa 525 * This parameter can be any combination of the following values:
Kojto 107:4f6c30876dfa 526 * @arg DMA_FLAG_TCIFx: Transfer complete flag.
Kojto 107:4f6c30876dfa 527 * @arg DMA_FLAG_HTIFx: Half transfer complete flag.
Kojto 107:4f6c30876dfa 528 * @arg DMA_FLAG_TEIFx: Transfer error flag.
Kojto 107:4f6c30876dfa 529 * @arg DMA_FLAG_DMEIFx: Direct mode error flag.
Kojto 107:4f6c30876dfa 530 * @arg DMA_FLAG_FEIFx: FIFO error flag.
Kojto 107:4f6c30876dfa 531 * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Stream flag.
Kojto 107:4f6c30876dfa 532 * @retval The state of FLAG (SET or RESET).
Kojto 107:4f6c30876dfa 533 */
Kojto 107:4f6c30876dfa 534 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
Kojto 107:4f6c30876dfa 535 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HISR & (__FLAG__)) :\
Kojto 107:4f6c30876dfa 536 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LISR & (__FLAG__)) :\
Kojto 107:4f6c30876dfa 537 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HISR & (__FLAG__)) : (DMA1->LISR & (__FLAG__)))
Kojto 107:4f6c30876dfa 538
Kojto 107:4f6c30876dfa 539 /**
Kojto 107:4f6c30876dfa 540 * @brief Clear the DMA Stream pending flags.
Kojto 107:4f6c30876dfa 541 * @param __HANDLE__: DMA handle
Kojto 107:4f6c30876dfa 542 * @param __FLAG__: specifies the flag to clear.
Kojto 107:4f6c30876dfa 543 * This parameter can be any combination of the following values:
Kojto 107:4f6c30876dfa 544 * @arg DMA_FLAG_TCIFx: Transfer complete flag.
Kojto 107:4f6c30876dfa 545 * @arg DMA_FLAG_HTIFx: Half transfer complete flag.
Kojto 107:4f6c30876dfa 546 * @arg DMA_FLAG_TEIFx: Transfer error flag.
Kojto 107:4f6c30876dfa 547 * @arg DMA_FLAG_DMEIFx: Direct mode error flag.
Kojto 107:4f6c30876dfa 548 * @arg DMA_FLAG_FEIFx: FIFO error flag.
Kojto 107:4f6c30876dfa 549 * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Stream flag.
Kojto 107:4f6c30876dfa 550 * @retval None
Kojto 107:4f6c30876dfa 551 */
Kojto 107:4f6c30876dfa 552 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
Kojto 107:4f6c30876dfa 553 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HIFCR = (__FLAG__)) :\
Kojto 107:4f6c30876dfa 554 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LIFCR = (__FLAG__)) :\
Kojto 107:4f6c30876dfa 555 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1->LIFCR = (__FLAG__)))
Kojto 107:4f6c30876dfa 556
Kojto 107:4f6c30876dfa 557 /**
Kojto 107:4f6c30876dfa 558 * @brief Enable the specified DMA Stream interrupts.
Kojto 107:4f6c30876dfa 559 * @param __HANDLE__: DMA handle
Kojto 107:4f6c30876dfa 560 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
Kojto 107:4f6c30876dfa 561 * This parameter can be any combination of the following values:
Kojto 107:4f6c30876dfa 562 * @arg DMA_IT_TC: Transfer complete interrupt mask.
Kojto 107:4f6c30876dfa 563 * @arg DMA_IT_HT: Half transfer complete interrupt mask.
Kojto 107:4f6c30876dfa 564 * @arg DMA_IT_TE: Transfer error interrupt mask.
Kojto 107:4f6c30876dfa 565 * @arg DMA_IT_FE: FIFO error interrupt mask.
Kojto 107:4f6c30876dfa 566 * @arg DMA_IT_DME: Direct mode error interrupt.
Kojto 107:4f6c30876dfa 567 * @retval None
Kojto 107:4f6c30876dfa 568 */
Kojto 107:4f6c30876dfa 569 #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__INTERRUPT__) != DMA_IT_FE)? \
Kojto 107:4f6c30876dfa 570 ((__HANDLE__)->Instance->CR |= (__INTERRUPT__)) : ((__HANDLE__)->Instance->FCR |= (__INTERRUPT__)))
Kojto 107:4f6c30876dfa 571
Kojto 107:4f6c30876dfa 572 /**
Kojto 107:4f6c30876dfa 573 * @brief Disable the specified DMA Stream interrupts.
Kojto 107:4f6c30876dfa 574 * @param __HANDLE__: DMA handle
Kojto 107:4f6c30876dfa 575 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
Kojto 107:4f6c30876dfa 576 * This parameter can be any combination of the following values:
Kojto 107:4f6c30876dfa 577 * @arg DMA_IT_TC: Transfer complete interrupt mask.
Kojto 107:4f6c30876dfa 578 * @arg DMA_IT_HT: Half transfer complete interrupt mask.
Kojto 107:4f6c30876dfa 579 * @arg DMA_IT_TE: Transfer error interrupt mask.
Kojto 107:4f6c30876dfa 580 * @arg DMA_IT_FE: FIFO error interrupt mask.
Kojto 107:4f6c30876dfa 581 * @arg DMA_IT_DME: Direct mode error interrupt.
Kojto 107:4f6c30876dfa 582 * @retval None
Kojto 107:4f6c30876dfa 583 */
Kojto 107:4f6c30876dfa 584 #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__INTERRUPT__) != DMA_IT_FE)? \
Kojto 107:4f6c30876dfa 585 ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__)) : ((__HANDLE__)->Instance->FCR &= ~(__INTERRUPT__)))
Kojto 107:4f6c30876dfa 586
Kojto 107:4f6c30876dfa 587 /**
Kojto 107:4f6c30876dfa 588 * @brief Check whether the specified DMA Stream interrupt is enabled or not.
Kojto 107:4f6c30876dfa 589 * @param __HANDLE__: DMA handle
Kojto 107:4f6c30876dfa 590 * @param __INTERRUPT__: specifies the DMA interrupt source to check.
Kojto 107:4f6c30876dfa 591 * This parameter can be one of the following values:
Kojto 107:4f6c30876dfa 592 * @arg DMA_IT_TC: Transfer complete interrupt mask.
Kojto 107:4f6c30876dfa 593 * @arg DMA_IT_HT: Half transfer complete interrupt mask.
Kojto 107:4f6c30876dfa 594 * @arg DMA_IT_TE: Transfer error interrupt mask.
Kojto 107:4f6c30876dfa 595 * @arg DMA_IT_FE: FIFO error interrupt mask.
Kojto 107:4f6c30876dfa 596 * @arg DMA_IT_DME: Direct mode error interrupt.
Kojto 107:4f6c30876dfa 597 * @retval The state of DMA_IT.
Kojto 107:4f6c30876dfa 598 */
Kojto 107:4f6c30876dfa 599 #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__INTERRUPT__) != DMA_IT_FE)? \
Kojto 107:4f6c30876dfa 600 ((__HANDLE__)->Instance->CR & (__INTERRUPT__)) : \
Kojto 107:4f6c30876dfa 601 ((__HANDLE__)->Instance->FCR & (__INTERRUPT__)))
Kojto 107:4f6c30876dfa 602
Kojto 107:4f6c30876dfa 603 /**
Kojto 107:4f6c30876dfa 604 * @brief Writes the number of data units to be transferred on the DMA Stream.
Kojto 107:4f6c30876dfa 605 * @param __HANDLE__: DMA handle
Kojto 107:4f6c30876dfa 606 * @param __COUNTER__: Number of data units to be transferred (from 0 to 65535)
Kojto 107:4f6c30876dfa 607 * Number of data items depends only on the Peripheral data format.
Kojto 107:4f6c30876dfa 608 *
Kojto 107:4f6c30876dfa 609 * @note If Peripheral data format is Bytes: number of data units is equal
Kojto 107:4f6c30876dfa 610 * to total number of bytes to be transferred.
Kojto 107:4f6c30876dfa 611 *
Kojto 107:4f6c30876dfa 612 * @note If Peripheral data format is Half-Word: number of data units is
Kojto 107:4f6c30876dfa 613 * equal to total number of bytes to be transferred / 2.
Kojto 107:4f6c30876dfa 614 *
Kojto 107:4f6c30876dfa 615 * @note If Peripheral data format is Word: number of data units is equal
Kojto 107:4f6c30876dfa 616 * to total number of bytes to be transferred / 4.
Kojto 107:4f6c30876dfa 617 *
Kojto 107:4f6c30876dfa 618 * @retval The number of remaining data units in the current DMAy Streamx transfer.
Kojto 107:4f6c30876dfa 619 */
Kojto 107:4f6c30876dfa 620 #define __HAL_DMA_SET_COUNTER(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->NDTR = (uint16_t)(__COUNTER__))
Kojto 107:4f6c30876dfa 621
Kojto 107:4f6c30876dfa 622 /**
Kojto 107:4f6c30876dfa 623 * @brief Returns the number of remaining data units in the current DMAy Streamx transfer.
Kojto 107:4f6c30876dfa 624 * @param __HANDLE__: DMA handle
Kojto 107:4f6c30876dfa 625 *
Kojto 107:4f6c30876dfa 626 * @retval The number of remaining data units in the current DMA Stream transfer.
Kojto 107:4f6c30876dfa 627 */
Kojto 107:4f6c30876dfa 628 #define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->NDTR)
Kojto 107:4f6c30876dfa 629
Kojto 107:4f6c30876dfa 630
Kojto 107:4f6c30876dfa 631 /* Include DMA HAL Extension module */
Kojto 107:4f6c30876dfa 632 #include "stm32f7xx_hal_dma_ex.h"
Kojto 107:4f6c30876dfa 633
Kojto 107:4f6c30876dfa 634 /* Exported functions --------------------------------------------------------*/
Kojto 107:4f6c30876dfa 635
Kojto 107:4f6c30876dfa 636 /** @defgroup DMA_Exported_Functions DMA Exported Functions
Kojto 107:4f6c30876dfa 637 * @brief DMA Exported functions
Kojto 107:4f6c30876dfa 638 * @{
Kojto 107:4f6c30876dfa 639 */
Kojto 107:4f6c30876dfa 640
Kojto 107:4f6c30876dfa 641 /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 107:4f6c30876dfa 642 * @brief Initialization and de-initialization functions
Kojto 107:4f6c30876dfa 643 * @{
Kojto 107:4f6c30876dfa 644 */
Kojto 107:4f6c30876dfa 645 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
Kojto 107:4f6c30876dfa 646 HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma);
Kojto 107:4f6c30876dfa 647 /**
Kojto 107:4f6c30876dfa 648 * @}
Kojto 107:4f6c30876dfa 649 */
Kojto 107:4f6c30876dfa 650
Kojto 107:4f6c30876dfa 651 /** @defgroup DMA_Exported_Functions_Group2 I/O operation functions
Kojto 107:4f6c30876dfa 652 * @brief I/O operation functions
Kojto 107:4f6c30876dfa 653 * @{
Kojto 107:4f6c30876dfa 654 */
Kojto 107:4f6c30876dfa 655 HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
Kojto 107:4f6c30876dfa 656 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
Kojto 107:4f6c30876dfa 657 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
Kojto 107:4f6c30876dfa 658 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
Kojto 107:4f6c30876dfa 659 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
Kojto 107:4f6c30876dfa 660 /**
Kojto 107:4f6c30876dfa 661 * @}
Kojto 107:4f6c30876dfa 662 */
Kojto 107:4f6c30876dfa 663
Kojto 107:4f6c30876dfa 664 /** @defgroup DMA_Exported_Functions_Group3 Peripheral State functions
Kojto 107:4f6c30876dfa 665 * @brief Peripheral State functions
Kojto 107:4f6c30876dfa 666 * @{
Kojto 107:4f6c30876dfa 667 */
Kojto 107:4f6c30876dfa 668 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
Kojto 107:4f6c30876dfa 669 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
Kojto 107:4f6c30876dfa 670 /**
Kojto 107:4f6c30876dfa 671 * @}
Kojto 107:4f6c30876dfa 672 */
Kojto 107:4f6c30876dfa 673 /**
Kojto 107:4f6c30876dfa 674 * @}
Kojto 107:4f6c30876dfa 675 */
Kojto 107:4f6c30876dfa 676 /* Private Constants -------------------------------------------------------------*/
Kojto 107:4f6c30876dfa 677 /** @defgroup DMA_Private_Constants DMA Private Constants
Kojto 107:4f6c30876dfa 678 * @brief DMA private defines and constants
Kojto 107:4f6c30876dfa 679 * @{
Kojto 107:4f6c30876dfa 680 */
Kojto 107:4f6c30876dfa 681 /**
Kojto 107:4f6c30876dfa 682 * @}
Kojto 107:4f6c30876dfa 683 */
Kojto 107:4f6c30876dfa 684
Kojto 107:4f6c30876dfa 685 /* Private macros ------------------------------------------------------------*/
Kojto 107:4f6c30876dfa 686 /** @defgroup DMA_Private_Macros DMA Private Macros
Kojto 107:4f6c30876dfa 687 * @brief DMA private macros
Kojto 107:4f6c30876dfa 688 * @{
Kojto 107:4f6c30876dfa 689 */
Kojto 107:4f6c30876dfa 690 #define IS_DMA_CHANNEL(CHANNEL) (((CHANNEL) == DMA_CHANNEL_0) || \
Kojto 107:4f6c30876dfa 691 ((CHANNEL) == DMA_CHANNEL_1) || \
Kojto 107:4f6c30876dfa 692 ((CHANNEL) == DMA_CHANNEL_2) || \
Kojto 107:4f6c30876dfa 693 ((CHANNEL) == DMA_CHANNEL_3) || \
Kojto 107:4f6c30876dfa 694 ((CHANNEL) == DMA_CHANNEL_4) || \
Kojto 107:4f6c30876dfa 695 ((CHANNEL) == DMA_CHANNEL_5) || \
Kojto 107:4f6c30876dfa 696 ((CHANNEL) == DMA_CHANNEL_6) || \
Kojto 107:4f6c30876dfa 697 ((CHANNEL) == DMA_CHANNEL_7))
Kojto 107:4f6c30876dfa 698
Kojto 107:4f6c30876dfa 699 #define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
Kojto 107:4f6c30876dfa 700 ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
Kojto 107:4f6c30876dfa 701 ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
Kojto 107:4f6c30876dfa 702
Kojto 107:4f6c30876dfa 703 #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
Kojto 107:4f6c30876dfa 704
Kojto 107:4f6c30876dfa 705 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
Kojto 107:4f6c30876dfa 706 ((STATE) == DMA_PINC_DISABLE))
Kojto 107:4f6c30876dfa 707
Kojto 107:4f6c30876dfa 708 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \
Kojto 107:4f6c30876dfa 709 ((STATE) == DMA_MINC_DISABLE))
Kojto 107:4f6c30876dfa 710
Kojto 107:4f6c30876dfa 711 #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \
Kojto 107:4f6c30876dfa 712 ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
Kojto 107:4f6c30876dfa 713 ((SIZE) == DMA_PDATAALIGN_WORD))
Kojto 107:4f6c30876dfa 714
Kojto 107:4f6c30876dfa 715 #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \
Kojto 107:4f6c30876dfa 716 ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
Kojto 107:4f6c30876dfa 717 ((SIZE) == DMA_MDATAALIGN_WORD ))
Kojto 107:4f6c30876dfa 718
Kojto 107:4f6c30876dfa 719 #define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \
Kojto 107:4f6c30876dfa 720 ((MODE) == DMA_CIRCULAR) || \
Kojto 107:4f6c30876dfa 721 ((MODE) == DMA_PFCTRL))
Kojto 107:4f6c30876dfa 722
Kojto 107:4f6c30876dfa 723 #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \
Kojto 107:4f6c30876dfa 724 ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
Kojto 107:4f6c30876dfa 725 ((PRIORITY) == DMA_PRIORITY_HIGH) || \
Kojto 107:4f6c30876dfa 726 ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
Kojto 107:4f6c30876dfa 727
Kojto 107:4f6c30876dfa 728 #define IS_DMA_FIFO_MODE_STATE(STATE) (((STATE) == DMA_FIFOMODE_DISABLE ) || \
Kojto 107:4f6c30876dfa 729 ((STATE) == DMA_FIFOMODE_ENABLE))
Kojto 107:4f6c30876dfa 730
Kojto 107:4f6c30876dfa 731 #define IS_DMA_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == DMA_FIFO_THRESHOLD_1QUARTERFULL ) || \
Kojto 107:4f6c30876dfa 732 ((THRESHOLD) == DMA_FIFO_THRESHOLD_HALFFULL) || \
Kojto 107:4f6c30876dfa 733 ((THRESHOLD) == DMA_FIFO_THRESHOLD_3QUARTERSFULL) || \
Kojto 107:4f6c30876dfa 734 ((THRESHOLD) == DMA_FIFO_THRESHOLD_FULL))
Kojto 107:4f6c30876dfa 735
Kojto 107:4f6c30876dfa 736 #define IS_DMA_MEMORY_BURST(BURST) (((BURST) == DMA_MBURST_SINGLE) || \
Kojto 107:4f6c30876dfa 737 ((BURST) == DMA_MBURST_INC4) || \
Kojto 107:4f6c30876dfa 738 ((BURST) == DMA_MBURST_INC8) || \
Kojto 107:4f6c30876dfa 739 ((BURST) == DMA_MBURST_INC16))
Kojto 107:4f6c30876dfa 740
Kojto 107:4f6c30876dfa 741 #define IS_DMA_PERIPHERAL_BURST(BURST) (((BURST) == DMA_PBURST_SINGLE) || \
Kojto 107:4f6c30876dfa 742 ((BURST) == DMA_PBURST_INC4) || \
Kojto 107:4f6c30876dfa 743 ((BURST) == DMA_PBURST_INC8) || \
Kojto 107:4f6c30876dfa 744 ((BURST) == DMA_PBURST_INC16))
Kojto 107:4f6c30876dfa 745 /**
Kojto 107:4f6c30876dfa 746 * @}
Kojto 107:4f6c30876dfa 747 */
Kojto 107:4f6c30876dfa 748
Kojto 107:4f6c30876dfa 749 /* Private functions ---------------------------------------------------------*/
Kojto 107:4f6c30876dfa 750 /** @defgroup DMA_Private_Functions DMA Private Functions
Kojto 107:4f6c30876dfa 751 * @brief DMA private functions
Kojto 107:4f6c30876dfa 752 * @{
Kojto 107:4f6c30876dfa 753 */
Kojto 107:4f6c30876dfa 754 /**
Kojto 107:4f6c30876dfa 755 * @}
Kojto 107:4f6c30876dfa 756 */
Kojto 107:4f6c30876dfa 757
Kojto 107:4f6c30876dfa 758 /**
Kojto 107:4f6c30876dfa 759 * @}
Kojto 107:4f6c30876dfa 760 */
Kojto 107:4f6c30876dfa 761
Kojto 107:4f6c30876dfa 762 /**
Kojto 107:4f6c30876dfa 763 * @}
Kojto 107:4f6c30876dfa 764 */
Kojto 107:4f6c30876dfa 765
Kojto 107:4f6c30876dfa 766 #ifdef __cplusplus
Kojto 107:4f6c30876dfa 767 }
Kojto 107:4f6c30876dfa 768 #endif
Kojto 107:4f6c30876dfa 769
Kojto 107:4f6c30876dfa 770 #endif /* __STM32F7xx_HAL_DMA_H */
Kojto 107:4f6c30876dfa 771
Kojto 107:4f6c30876dfa 772 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/