Ricardo Benitez / mbed

meh

Fork of mbed by mbed official

TARGET_KL05Z/core_cmInstr.h@110:165afa46840b, 2015-11-25 (annotated)

Committer:
Kojto
Date:
Wed Nov 25 13:21:40 2015 +0000
Revision:
110:165afa46840b
Parent:
78:ed8466a608b4 
Release 110  of the mbed library



Changes:

- new platforms - STM32F410R, DISCO_F429ZI, DISCO_F469NI

- Nucleo L476 - gcc and uvision template

- k22,k64f targets - ADC channels A addition

- EFM32 - bugfixes in sleep, serial and spi

- Delta DFCM NNN40 - pinnames update

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 78:ed8466a608b4 1 /**************************************************************************//**
emilmont 78:ed8466a608b4 2 * @file core_cmInstr.h
emilmont 78:ed8466a608b4 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
Kojto 110:165afa46840b 4 * @version V4.10
Kojto 110:165afa46840b 5 * @date 18. March 2015
emilmont 78:ed8466a608b4 6 *
emilmont 78:ed8466a608b4 7 * @note
emilmont 78:ed8466a608b4 8 *
emilmont 78:ed8466a608b4 9 ******************************************************************************/
Kojto 110:165afa46840b 10 /* Copyright (c) 2009 - 2014 ARM LIMITED
emilmont 78:ed8466a608b4 11
emilmont 78:ed8466a608b4 12 All rights reserved.
emilmont 78:ed8466a608b4 13 Redistribution and use in source and binary forms, with or without
emilmont 78:ed8466a608b4 14 modification, are permitted provided that the following conditions are met:
emilmont 78:ed8466a608b4 15 - Redistributions of source code must retain the above copyright
emilmont 78:ed8466a608b4 16 notice, this list of conditions and the following disclaimer.
emilmont 78:ed8466a608b4 17 - Redistributions in binary form must reproduce the above copyright
emilmont 78:ed8466a608b4 18 notice, this list of conditions and the following disclaimer in the
emilmont 78:ed8466a608b4 19 documentation and/or other materials provided with the distribution.
emilmont 78:ed8466a608b4 20 - Neither the name of ARM nor the names of its contributors may be used
emilmont 78:ed8466a608b4 21 to endorse or promote products derived from this software without
emilmont 78:ed8466a608b4 22 specific prior written permission.
emilmont 78:ed8466a608b4 23 *
emilmont 78:ed8466a608b4 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 78:ed8466a608b4 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 78:ed8466a608b4 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
emilmont 78:ed8466a608b4 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
emilmont 78:ed8466a608b4 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
emilmont 78:ed8466a608b4 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
emilmont 78:ed8466a608b4 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
emilmont 78:ed8466a608b4 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
emilmont 78:ed8466a608b4 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
emilmont 78:ed8466a608b4 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
emilmont 78:ed8466a608b4 34 POSSIBILITY OF SUCH DAMAGE.
emilmont 78:ed8466a608b4 35 ---------------------------------------------------------------------------*/
emilmont 78:ed8466a608b4 36
emilmont 78:ed8466a608b4 37
emilmont 78:ed8466a608b4 38 #ifndef __CORE_CMINSTR_H
emilmont 78:ed8466a608b4 39 #define __CORE_CMINSTR_H
emilmont 78:ed8466a608b4 40
emilmont 78:ed8466a608b4 41
emilmont 78:ed8466a608b4 42 /* ########################## Core Instruction Access ######################### */
emilmont 78:ed8466a608b4 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
emilmont 78:ed8466a608b4 44 Access to dedicated instructions
emilmont 78:ed8466a608b4 45 @{
emilmont 78:ed8466a608b4 46 */
emilmont 78:ed8466a608b4 47
emilmont 78:ed8466a608b4 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
emilmont 78:ed8466a608b4 49 /* ARM armcc specific functions */
emilmont 78:ed8466a608b4 50
emilmont 78:ed8466a608b4 51 #if (__ARMCC_VERSION < 400677)
emilmont 78:ed8466a608b4 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
emilmont 78:ed8466a608b4 53 #endif
emilmont 78:ed8466a608b4 54
emilmont 78:ed8466a608b4 55
emilmont 78:ed8466a608b4 56 /** \brief No Operation
emilmont 78:ed8466a608b4 57
emilmont 78:ed8466a608b4 58 No Operation does nothing. This instruction can be used for code alignment purposes.
emilmont 78:ed8466a608b4 59 */
emilmont 78:ed8466a608b4 60 #define __NOP __nop
emilmont 78:ed8466a608b4 61
emilmont 78:ed8466a608b4 62
emilmont 78:ed8466a608b4 63 /** \brief Wait For Interrupt
emilmont 78:ed8466a608b4 64
emilmont 78:ed8466a608b4 65 Wait For Interrupt is a hint instruction that suspends execution
emilmont 78:ed8466a608b4 66 until one of a number of events occurs.
emilmont 78:ed8466a608b4 67 */
emilmont 78:ed8466a608b4 68 #define __WFI __wfi
emilmont 78:ed8466a608b4 69
emilmont 78:ed8466a608b4 70
emilmont 78:ed8466a608b4 71 /** \brief Wait For Event
emilmont 78:ed8466a608b4 72
emilmont 78:ed8466a608b4 73 Wait For Event is a hint instruction that permits the processor to enter
emilmont 78:ed8466a608b4 74 a low-power state until one of a number of events occurs.
emilmont 78:ed8466a608b4 75 */
emilmont 78:ed8466a608b4 76 #define __WFE __wfe
emilmont 78:ed8466a608b4 77
emilmont 78:ed8466a608b4 78
emilmont 78:ed8466a608b4 79 /** \brief Send Event
emilmont 78:ed8466a608b4 80
emilmont 78:ed8466a608b4 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
emilmont 78:ed8466a608b4 82 */
emilmont 78:ed8466a608b4 83 #define __SEV __sev
emilmont 78:ed8466a608b4 84
emilmont 78:ed8466a608b4 85
emilmont 78:ed8466a608b4 86 /** \brief Instruction Synchronization Barrier
emilmont 78:ed8466a608b4 87
emilmont 78:ed8466a608b4 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
emilmont 78:ed8466a608b4 89 so that all instructions following the ISB are fetched from cache or
emilmont 78:ed8466a608b4 90 memory, after the instruction has been completed.
emilmont 78:ed8466a608b4 91 */
Kojto 110:165afa46840b 92 #define __ISB() do {\
Kojto 110:165afa46840b 93 __schedule_barrier();\
Kojto 110:165afa46840b 94 __isb(0xF);\
Kojto 110:165afa46840b 95 __schedule_barrier();\
Kojto 110:165afa46840b 96 } while (0)
emilmont 78:ed8466a608b4 97
emilmont 78:ed8466a608b4 98 /** \brief Data Synchronization Barrier
emilmont 78:ed8466a608b4 99
emilmont 78:ed8466a608b4 100 This function acts as a special kind of Data Memory Barrier.
emilmont 78:ed8466a608b4 101 It completes when all explicit memory accesses before this instruction complete.
emilmont 78:ed8466a608b4 102 */
Kojto 110:165afa46840b 103 #define __DSB() do {\
Kojto 110:165afa46840b 104 __schedule_barrier();\
Kojto 110:165afa46840b 105 __dsb(0xF);\
Kojto 110:165afa46840b 106 __schedule_barrier();\
Kojto 110:165afa46840b 107 } while (0)
emilmont 78:ed8466a608b4 108
emilmont 78:ed8466a608b4 109 /** \brief Data Memory Barrier
emilmont 78:ed8466a608b4 110
emilmont 78:ed8466a608b4 111 This function ensures the apparent order of the explicit memory operations before
emilmont 78:ed8466a608b4 112 and after the instruction, without ensuring their completion.
emilmont 78:ed8466a608b4 113 */
Kojto 110:165afa46840b 114 #define __DMB() do {\
Kojto 110:165afa46840b 115 __schedule_barrier();\
Kojto 110:165afa46840b 116 __dmb(0xF);\
Kojto 110:165afa46840b 117 __schedule_barrier();\
Kojto 110:165afa46840b 118 } while (0)
emilmont 78:ed8466a608b4 119
emilmont 78:ed8466a608b4 120 /** \brief Reverse byte order (32 bit)
emilmont 78:ed8466a608b4 121
emilmont 78:ed8466a608b4 122 This function reverses the byte order in integer value.
emilmont 78:ed8466a608b4 123
emilmont 78:ed8466a608b4 124 \param [in] value Value to reverse
emilmont 78:ed8466a608b4 125 \return Reversed value
emilmont 78:ed8466a608b4 126 */
emilmont 78:ed8466a608b4 127 #define __REV __rev
emilmont 78:ed8466a608b4 128
emilmont 78:ed8466a608b4 129
emilmont 78:ed8466a608b4 130 /** \brief Reverse byte order (16 bit)
emilmont 78:ed8466a608b4 131
emilmont 78:ed8466a608b4 132 This function reverses the byte order in two unsigned short values.
emilmont 78:ed8466a608b4 133
emilmont 78:ed8466a608b4 134 \param [in] value Value to reverse
emilmont 78:ed8466a608b4 135 \return Reversed value
emilmont 78:ed8466a608b4 136 */
emilmont 78:ed8466a608b4 137 #ifndef __NO_EMBEDDED_ASM
emilmont 78:ed8466a608b4 138 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
emilmont 78:ed8466a608b4 139 {
emilmont 78:ed8466a608b4 140 rev16 r0, r0
emilmont 78:ed8466a608b4 141 bx lr
emilmont 78:ed8466a608b4 142 }
emilmont 78:ed8466a608b4 143 #endif
emilmont 78:ed8466a608b4 144
emilmont 78:ed8466a608b4 145 /** \brief Reverse byte order in signed short value
emilmont 78:ed8466a608b4 146
emilmont 78:ed8466a608b4 147 This function reverses the byte order in a signed short value with sign extension to integer.
emilmont 78:ed8466a608b4 148
emilmont 78:ed8466a608b4 149 \param [in] value Value to reverse
emilmont 78:ed8466a608b4 150 \return Reversed value
emilmont 78:ed8466a608b4 151 */
emilmont 78:ed8466a608b4 152 #ifndef __NO_EMBEDDED_ASM
emilmont 78:ed8466a608b4 153 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
emilmont 78:ed8466a608b4 154 {
emilmont 78:ed8466a608b4 155 revsh r0, r0
emilmont 78:ed8466a608b4 156 bx lr
emilmont 78:ed8466a608b4 157 }
emilmont 78:ed8466a608b4 158 #endif
emilmont 78:ed8466a608b4 159
emilmont 78:ed8466a608b4 160
emilmont 78:ed8466a608b4 161 /** \brief Rotate Right in unsigned value (32 bit)
emilmont 78:ed8466a608b4 162
emilmont 78:ed8466a608b4 163 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
emilmont 78:ed8466a608b4 164
emilmont 78:ed8466a608b4 165 \param [in] value Value to rotate
emilmont 78:ed8466a608b4 166 \param [in] value Number of Bits to rotate
emilmont 78:ed8466a608b4 167 \return Rotated value
emilmont 78:ed8466a608b4 168 */
emilmont 78:ed8466a608b4 169 #define __ROR __ror
emilmont 78:ed8466a608b4 170
emilmont 78:ed8466a608b4 171
emilmont 78:ed8466a608b4 172 /** \brief Breakpoint
emilmont 78:ed8466a608b4 173
emilmont 78:ed8466a608b4 174 This function causes the processor to enter Debug state.
emilmont 78:ed8466a608b4 175 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
emilmont 78:ed8466a608b4 176
emilmont 78:ed8466a608b4 177 \param [in] value is ignored by the processor.
emilmont 78:ed8466a608b4 178 If required, a debugger can use it to store additional information about the breakpoint.
emilmont 78:ed8466a608b4 179 */
emilmont 78:ed8466a608b4 180 #define __BKPT(value) __breakpoint(value)
emilmont 78:ed8466a608b4 181
emilmont 78:ed8466a608b4 182
emilmont 78:ed8466a608b4 183 /** \brief Reverse bit order of value
emilmont 78:ed8466a608b4 184
emilmont 78:ed8466a608b4 185 This function reverses the bit order of the given value.
emilmont 78:ed8466a608b4 186
emilmont 78:ed8466a608b4 187 \param [in] value Value to reverse
emilmont 78:ed8466a608b4 188 \return Reversed value
emilmont 78:ed8466a608b4 189 */
Kojto 110:165afa46840b 190 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
Kojto 110:165afa46840b 191 #define __RBIT __rbit
Kojto 110:165afa46840b 192 #else
Kojto 110:165afa46840b 193 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
Kojto 110:165afa46840b 194 {
Kojto 110:165afa46840b 195 uint32_t result;
Kojto 110:165afa46840b 196 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
emilmont 78:ed8466a608b4 197
Kojto 110:165afa46840b 198 result = value; // r will be reversed bits of v; first get LSB of v
Kojto 110:165afa46840b 199 for (value >>= 1; value; value >>= 1)
Kojto 110:165afa46840b 200 {
Kojto 110:165afa46840b 201 result <<= 1;
Kojto 110:165afa46840b 202 result |= value & 1;
Kojto 110:165afa46840b 203 s--;
Kojto 110:165afa46840b 204 }
Kojto 110:165afa46840b 205 result <<= s; // shift when v's highest bits are zero
Kojto 110:165afa46840b 206 return(result);
Kojto 110:165afa46840b 207 }
Kojto 110:165afa46840b 208 #endif
Kojto 110:165afa46840b 209
Kojto 110:165afa46840b 210
Kojto 110:165afa46840b 211 /** \brief Count leading zeros
Kojto 110:165afa46840b 212
Kojto 110:165afa46840b 213 This function counts the number of leading zeros of a data value.
Kojto 110:165afa46840b 214
Kojto 110:165afa46840b 215 \param [in] value Value to count the leading zeros
Kojto 110:165afa46840b 216 \return number of leading zeros in value
Kojto 110:165afa46840b 217 */
Kojto 110:165afa46840b 218 #define __CLZ __clz
Kojto 110:165afa46840b 219
Kojto 110:165afa46840b 220
Kojto 110:165afa46840b 221 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
emilmont 78:ed8466a608b4 222
emilmont 78:ed8466a608b4 223 /** \brief LDR Exclusive (8 bit)
emilmont 78:ed8466a608b4 224
Kojto 110:165afa46840b 225 This function executes a exclusive LDR instruction for 8 bit value.
emilmont 78:ed8466a608b4 226
emilmont 78:ed8466a608b4 227 \param [in] ptr Pointer to data
emilmont 78:ed8466a608b4 228 \return value of type uint8_t at (*ptr)
emilmont 78:ed8466a608b4 229 */
emilmont 78:ed8466a608b4 230 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
emilmont 78:ed8466a608b4 231
emilmont 78:ed8466a608b4 232
emilmont 78:ed8466a608b4 233 /** \brief LDR Exclusive (16 bit)
emilmont 78:ed8466a608b4 234
Kojto 110:165afa46840b 235 This function executes a exclusive LDR instruction for 16 bit values.
emilmont 78:ed8466a608b4 236
emilmont 78:ed8466a608b4 237 \param [in] ptr Pointer to data
emilmont 78:ed8466a608b4 238 \return value of type uint16_t at (*ptr)
emilmont 78:ed8466a608b4 239 */
emilmont 78:ed8466a608b4 240 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
emilmont 78:ed8466a608b4 241
emilmont 78:ed8466a608b4 242
emilmont 78:ed8466a608b4 243 /** \brief LDR Exclusive (32 bit)
emilmont 78:ed8466a608b4 244
Kojto 110:165afa46840b 245 This function executes a exclusive LDR instruction for 32 bit values.
emilmont 78:ed8466a608b4 246
emilmont 78:ed8466a608b4 247 \param [in] ptr Pointer to data
emilmont 78:ed8466a608b4 248 \return value of type uint32_t at (*ptr)
emilmont 78:ed8466a608b4 249 */
emilmont 78:ed8466a608b4 250 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
emilmont 78:ed8466a608b4 251
emilmont 78:ed8466a608b4 252
emilmont 78:ed8466a608b4 253 /** \brief STR Exclusive (8 bit)
emilmont 78:ed8466a608b4 254
Kojto 110:165afa46840b 255 This function executes a exclusive STR instruction for 8 bit values.
emilmont 78:ed8466a608b4 256
emilmont 78:ed8466a608b4 257 \param [in] value Value to store
emilmont 78:ed8466a608b4 258 \param [in] ptr Pointer to location
emilmont 78:ed8466a608b4 259 \return 0 Function succeeded
emilmont 78:ed8466a608b4 260 \return 1 Function failed
emilmont 78:ed8466a608b4 261 */
emilmont 78:ed8466a608b4 262 #define __STREXB(value, ptr) __strex(value, ptr)
emilmont 78:ed8466a608b4 263
emilmont 78:ed8466a608b4 264
emilmont 78:ed8466a608b4 265 /** \brief STR Exclusive (16 bit)
emilmont 78:ed8466a608b4 266
Kojto 110:165afa46840b 267 This function executes a exclusive STR instruction for 16 bit values.
emilmont 78:ed8466a608b4 268
emilmont 78:ed8466a608b4 269 \param [in] value Value to store
emilmont 78:ed8466a608b4 270 \param [in] ptr Pointer to location
emilmont 78:ed8466a608b4 271 \return 0 Function succeeded
emilmont 78:ed8466a608b4 272 \return 1 Function failed
emilmont 78:ed8466a608b4 273 */
emilmont 78:ed8466a608b4 274 #define __STREXH(value, ptr) __strex(value, ptr)
emilmont 78:ed8466a608b4 275
emilmont 78:ed8466a608b4 276
emilmont 78:ed8466a608b4 277 /** \brief STR Exclusive (32 bit)
emilmont 78:ed8466a608b4 278
Kojto 110:165afa46840b 279 This function executes a exclusive STR instruction for 32 bit values.
emilmont 78:ed8466a608b4 280
emilmont 78:ed8466a608b4 281 \param [in] value Value to store
emilmont 78:ed8466a608b4 282 \param [in] ptr Pointer to location
emilmont 78:ed8466a608b4 283 \return 0 Function succeeded
emilmont 78:ed8466a608b4 284 \return 1 Function failed
emilmont 78:ed8466a608b4 285 */
emilmont 78:ed8466a608b4 286 #define __STREXW(value, ptr) __strex(value, ptr)
emilmont 78:ed8466a608b4 287
emilmont 78:ed8466a608b4 288
emilmont 78:ed8466a608b4 289 /** \brief Remove the exclusive lock
emilmont 78:ed8466a608b4 290
emilmont 78:ed8466a608b4 291 This function removes the exclusive lock which is created by LDREX.
emilmont 78:ed8466a608b4 292
emilmont 78:ed8466a608b4 293 */
emilmont 78:ed8466a608b4 294 #define __CLREX __clrex
emilmont 78:ed8466a608b4 295
emilmont 78:ed8466a608b4 296
emilmont 78:ed8466a608b4 297 /** \brief Signed Saturate
emilmont 78:ed8466a608b4 298
emilmont 78:ed8466a608b4 299 This function saturates a signed value.
emilmont 78:ed8466a608b4 300
emilmont 78:ed8466a608b4 301 \param [in] value Value to be saturated
emilmont 78:ed8466a608b4 302 \param [in] sat Bit position to saturate to (1..32)
emilmont 78:ed8466a608b4 303 \return Saturated value
emilmont 78:ed8466a608b4 304 */
emilmont 78:ed8466a608b4 305 #define __SSAT __ssat
emilmont 78:ed8466a608b4 306
emilmont 78:ed8466a608b4 307
emilmont 78:ed8466a608b4 308 /** \brief Unsigned Saturate
emilmont 78:ed8466a608b4 309
emilmont 78:ed8466a608b4 310 This function saturates an unsigned value.
emilmont 78:ed8466a608b4 311
emilmont 78:ed8466a608b4 312 \param [in] value Value to be saturated
emilmont 78:ed8466a608b4 313 \param [in] sat Bit position to saturate to (0..31)
emilmont 78:ed8466a608b4 314 \return Saturated value
emilmont 78:ed8466a608b4 315 */
emilmont 78:ed8466a608b4 316 #define __USAT __usat
emilmont 78:ed8466a608b4 317
emilmont 78:ed8466a608b4 318
Kojto 110:165afa46840b 319 /** \brief Rotate Right with Extend (32 bit)
Kojto 110:165afa46840b 320
Kojto 110:165afa46840b 321 This function moves each bit of a bitstring right by one bit.
Kojto 110:165afa46840b 322 The carry input is shifted in at the left end of the bitstring.
emilmont 78:ed8466a608b4 323
Kojto 110:165afa46840b 324 \param [in] value Value to rotate
Kojto 110:165afa46840b 325 \return Rotated value
Kojto 110:165afa46840b 326 */
Kojto 110:165afa46840b 327 #ifndef __NO_EMBEDDED_ASM
Kojto 110:165afa46840b 328 __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
Kojto 110:165afa46840b 329 {
Kojto 110:165afa46840b 330 rrx r0, r0
Kojto 110:165afa46840b 331 bx lr
Kojto 110:165afa46840b 332 }
Kojto 110:165afa46840b 333 #endif
Kojto 110:165afa46840b 334
emilmont 78:ed8466a608b4 335
Kojto 110:165afa46840b 336 /** \brief LDRT Unprivileged (8 bit)
Kojto 110:165afa46840b 337
Kojto 110:165afa46840b 338 This function executes a Unprivileged LDRT instruction for 8 bit value.
Kojto 110:165afa46840b 339
Kojto 110:165afa46840b 340 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 341 \return value of type uint8_t at (*ptr)
emilmont 78:ed8466a608b4 342 */
Kojto 110:165afa46840b 343 #define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
Kojto 110:165afa46840b 344
Kojto 110:165afa46840b 345
Kojto 110:165afa46840b 346 /** \brief LDRT Unprivileged (16 bit)
emilmont 78:ed8466a608b4 347
Kojto 110:165afa46840b 348 This function executes a Unprivileged LDRT instruction for 16 bit values.
Kojto 110:165afa46840b 349
Kojto 110:165afa46840b 350 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 351 \return value of type uint16_t at (*ptr)
Kojto 110:165afa46840b 352 */
Kojto 110:165afa46840b 353 #define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
emilmont 78:ed8466a608b4 354
emilmont 78:ed8466a608b4 355
Kojto 110:165afa46840b 356 /** \brief LDRT Unprivileged (32 bit)
emilmont 78:ed8466a608b4 357
Kojto 110:165afa46840b 358 This function executes a Unprivileged LDRT instruction for 32 bit values.
Kojto 110:165afa46840b 359
Kojto 110:165afa46840b 360 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 361 \return value of type uint32_t at (*ptr)
Kojto 110:165afa46840b 362 */
Kojto 110:165afa46840b 363 #define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
Kojto 110:165afa46840b 364
emilmont 78:ed8466a608b4 365
Kojto 110:165afa46840b 366 /** \brief STRT Unprivileged (8 bit)
Kojto 110:165afa46840b 367
Kojto 110:165afa46840b 368 This function executes a Unprivileged STRT instruction for 8 bit values.
Kojto 110:165afa46840b 369
Kojto 110:165afa46840b 370 \param [in] value Value to store
Kojto 110:165afa46840b 371 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 372 */
Kojto 110:165afa46840b 373 #define __STRBT(value, ptr) __strt(value, ptr)
emilmont 78:ed8466a608b4 374
emilmont 78:ed8466a608b4 375
Kojto 110:165afa46840b 376 /** \brief STRT Unprivileged (16 bit)
Kojto 110:165afa46840b 377
Kojto 110:165afa46840b 378 This function executes a Unprivileged STRT instruction for 16 bit values.
Kojto 110:165afa46840b 379
Kojto 110:165afa46840b 380 \param [in] value Value to store
Kojto 110:165afa46840b 381 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 382 */
Kojto 110:165afa46840b 383 #define __STRHT(value, ptr) __strt(value, ptr)
Kojto 110:165afa46840b 384
emilmont 78:ed8466a608b4 385
Kojto 110:165afa46840b 386 /** \brief STRT Unprivileged (32 bit)
Kojto 110:165afa46840b 387
Kojto 110:165afa46840b 388 This function executes a Unprivileged STRT instruction for 32 bit values.
Kojto 110:165afa46840b 389
Kojto 110:165afa46840b 390 \param [in] value Value to store
Kojto 110:165afa46840b 391 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 392 */
Kojto 110:165afa46840b 393 #define __STRT(value, ptr) __strt(value, ptr)
Kojto 110:165afa46840b 394
Kojto 110:165afa46840b 395 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
emilmont 78:ed8466a608b4 396
emilmont 78:ed8466a608b4 397
emilmont 78:ed8466a608b4 398 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
emilmont 78:ed8466a608b4 399 /* GNU gcc specific functions */
emilmont 78:ed8466a608b4 400
emilmont 78:ed8466a608b4 401 /* Define macros for porting to both thumb1 and thumb2.
emilmont 78:ed8466a608b4 402 * For thumb1, use low register (r0-r7), specified by constrant "l"
emilmont 78:ed8466a608b4 403 * Otherwise, use general registers, specified by constrant "r" */
emilmont 78:ed8466a608b4 404 #if defined (__thumb__) && !defined (__thumb2__)
emilmont 78:ed8466a608b4 405 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
emilmont 78:ed8466a608b4 406 #define __CMSIS_GCC_USE_REG(r) "l" (r)
emilmont 78:ed8466a608b4 407 #else
emilmont 78:ed8466a608b4 408 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
emilmont 78:ed8466a608b4 409 #define __CMSIS_GCC_USE_REG(r) "r" (r)
emilmont 78:ed8466a608b4 410 #endif
emilmont 78:ed8466a608b4 411
emilmont 78:ed8466a608b4 412 /** \brief No Operation
emilmont 78:ed8466a608b4 413
emilmont 78:ed8466a608b4 414 No Operation does nothing. This instruction can be used for code alignment purposes.
emilmont 78:ed8466a608b4 415 */
Kojto 110:165afa46840b 416 __attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
emilmont 78:ed8466a608b4 417 {
emilmont 78:ed8466a608b4 418 __ASM volatile ("nop");
emilmont 78:ed8466a608b4 419 }
emilmont 78:ed8466a608b4 420
emilmont 78:ed8466a608b4 421
emilmont 78:ed8466a608b4 422 /** \brief Wait For Interrupt
emilmont 78:ed8466a608b4 423
emilmont 78:ed8466a608b4 424 Wait For Interrupt is a hint instruction that suspends execution
emilmont 78:ed8466a608b4 425 until one of a number of events occurs.
emilmont 78:ed8466a608b4 426 */
Kojto 110:165afa46840b 427 __attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
emilmont 78:ed8466a608b4 428 {
emilmont 78:ed8466a608b4 429 __ASM volatile ("wfi");
emilmont 78:ed8466a608b4 430 }
emilmont 78:ed8466a608b4 431
emilmont 78:ed8466a608b4 432
emilmont 78:ed8466a608b4 433 /** \brief Wait For Event
emilmont 78:ed8466a608b4 434
emilmont 78:ed8466a608b4 435 Wait For Event is a hint instruction that permits the processor to enter
emilmont 78:ed8466a608b4 436 a low-power state until one of a number of events occurs.
emilmont 78:ed8466a608b4 437 */
Kojto 110:165afa46840b 438 __attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
emilmont 78:ed8466a608b4 439 {
emilmont 78:ed8466a608b4 440 __ASM volatile ("wfe");
emilmont 78:ed8466a608b4 441 }
emilmont 78:ed8466a608b4 442
emilmont 78:ed8466a608b4 443
emilmont 78:ed8466a608b4 444 /** \brief Send Event
emilmont 78:ed8466a608b4 445
emilmont 78:ed8466a608b4 446 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
emilmont 78:ed8466a608b4 447 */
Kojto 110:165afa46840b 448 __attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
emilmont 78:ed8466a608b4 449 {
emilmont 78:ed8466a608b4 450 __ASM volatile ("sev");
emilmont 78:ed8466a608b4 451 }
emilmont 78:ed8466a608b4 452
emilmont 78:ed8466a608b4 453
emilmont 78:ed8466a608b4 454 /** \brief Instruction Synchronization Barrier
emilmont 78:ed8466a608b4 455
emilmont 78:ed8466a608b4 456 Instruction Synchronization Barrier flushes the pipeline in the processor,
emilmont 78:ed8466a608b4 457 so that all instructions following the ISB are fetched from cache or
emilmont 78:ed8466a608b4 458 memory, after the instruction has been completed.
emilmont 78:ed8466a608b4 459 */
Kojto 110:165afa46840b 460 __attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
emilmont 78:ed8466a608b4 461 {
Kojto 110:165afa46840b 462 __ASM volatile ("isb 0xF":::"memory");
emilmont 78:ed8466a608b4 463 }
emilmont 78:ed8466a608b4 464
emilmont 78:ed8466a608b4 465
emilmont 78:ed8466a608b4 466 /** \brief Data Synchronization Barrier
emilmont 78:ed8466a608b4 467
emilmont 78:ed8466a608b4 468 This function acts as a special kind of Data Memory Barrier.
emilmont 78:ed8466a608b4 469 It completes when all explicit memory accesses before this instruction complete.
emilmont 78:ed8466a608b4 470 */
Kojto 110:165afa46840b 471 __attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
emilmont 78:ed8466a608b4 472 {
Kojto 110:165afa46840b 473 __ASM volatile ("dsb 0xF":::"memory");
emilmont 78:ed8466a608b4 474 }
emilmont 78:ed8466a608b4 475
emilmont 78:ed8466a608b4 476
emilmont 78:ed8466a608b4 477 /** \brief Data Memory Barrier
emilmont 78:ed8466a608b4 478
emilmont 78:ed8466a608b4 479 This function ensures the apparent order of the explicit memory operations before
emilmont 78:ed8466a608b4 480 and after the instruction, without ensuring their completion.
emilmont 78:ed8466a608b4 481 */
Kojto 110:165afa46840b 482 __attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
emilmont 78:ed8466a608b4 483 {
Kojto 110:165afa46840b 484 __ASM volatile ("dmb 0xF":::"memory");
emilmont 78:ed8466a608b4 485 }
emilmont 78:ed8466a608b4 486
emilmont 78:ed8466a608b4 487
emilmont 78:ed8466a608b4 488 /** \brief Reverse byte order (32 bit)
emilmont 78:ed8466a608b4 489
emilmont 78:ed8466a608b4 490 This function reverses the byte order in integer value.
emilmont 78:ed8466a608b4 491
emilmont 78:ed8466a608b4 492 \param [in] value Value to reverse
emilmont 78:ed8466a608b4 493 \return Reversed value
emilmont 78:ed8466a608b4 494 */
Kojto 110:165afa46840b 495 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
emilmont 78:ed8466a608b4 496 {
emilmont 78:ed8466a608b4 497 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
emilmont 78:ed8466a608b4 498 return __builtin_bswap32(value);
emilmont 78:ed8466a608b4 499 #else
emilmont 78:ed8466a608b4 500 uint32_t result;
emilmont 78:ed8466a608b4 501
emilmont 78:ed8466a608b4 502 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
emilmont 78:ed8466a608b4 503 return(result);
emilmont 78:ed8466a608b4 504 #endif
emilmont 78:ed8466a608b4 505 }
emilmont 78:ed8466a608b4 506
emilmont 78:ed8466a608b4 507
emilmont 78:ed8466a608b4 508 /** \brief Reverse byte order (16 bit)
emilmont 78:ed8466a608b4 509
emilmont 78:ed8466a608b4 510 This function reverses the byte order in two unsigned short values.
emilmont 78:ed8466a608b4 511
emilmont 78:ed8466a608b4 512 \param [in] value Value to reverse
emilmont 78:ed8466a608b4 513 \return Reversed value
emilmont 78:ed8466a608b4 514 */
Kojto 110:165afa46840b 515 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
emilmont 78:ed8466a608b4 516 {
emilmont 78:ed8466a608b4 517 uint32_t result;
emilmont 78:ed8466a608b4 518
emilmont 78:ed8466a608b4 519 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
emilmont 78:ed8466a608b4 520 return(result);
emilmont 78:ed8466a608b4 521 }
emilmont 78:ed8466a608b4 522
emilmont 78:ed8466a608b4 523
emilmont 78:ed8466a608b4 524 /** \brief Reverse byte order in signed short value
emilmont 78:ed8466a608b4 525
emilmont 78:ed8466a608b4 526 This function reverses the byte order in a signed short value with sign extension to integer.
emilmont 78:ed8466a608b4 527
emilmont 78:ed8466a608b4 528 \param [in] value Value to reverse
emilmont 78:ed8466a608b4 529 \return Reversed value
emilmont 78:ed8466a608b4 530 */
Kojto 110:165afa46840b 531 __attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
emilmont 78:ed8466a608b4 532 {
emilmont 78:ed8466a608b4 533 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
emilmont 78:ed8466a608b4 534 return (short)__builtin_bswap16(value);
emilmont 78:ed8466a608b4 535 #else
emilmont 78:ed8466a608b4 536 uint32_t result;
emilmont 78:ed8466a608b4 537
emilmont 78:ed8466a608b4 538 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
emilmont 78:ed8466a608b4 539 return(result);
emilmont 78:ed8466a608b4 540 #endif
emilmont 78:ed8466a608b4 541 }
emilmont 78:ed8466a608b4 542
emilmont 78:ed8466a608b4 543
emilmont 78:ed8466a608b4 544 /** \brief Rotate Right in unsigned value (32 bit)
emilmont 78:ed8466a608b4 545
emilmont 78:ed8466a608b4 546 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
emilmont 78:ed8466a608b4 547
emilmont 78:ed8466a608b4 548 \param [in] value Value to rotate
emilmont 78:ed8466a608b4 549 \param [in] value Number of Bits to rotate
emilmont 78:ed8466a608b4 550 \return Rotated value
emilmont 78:ed8466a608b4 551 */
Kojto 110:165afa46840b 552 __attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
emilmont 78:ed8466a608b4 553 {
Kojto 110:165afa46840b 554 return (op1 >> op2) | (op1 << (32 - op2));
emilmont 78:ed8466a608b4 555 }
emilmont 78:ed8466a608b4 556
emilmont 78:ed8466a608b4 557
emilmont 78:ed8466a608b4 558 /** \brief Breakpoint
emilmont 78:ed8466a608b4 559
emilmont 78:ed8466a608b4 560 This function causes the processor to enter Debug state.
emilmont 78:ed8466a608b4 561 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
emilmont 78:ed8466a608b4 562
emilmont 78:ed8466a608b4 563 \param [in] value is ignored by the processor.
emilmont 78:ed8466a608b4 564 If required, a debugger can use it to store additional information about the breakpoint.
emilmont 78:ed8466a608b4 565 */
emilmont 78:ed8466a608b4 566 #define __BKPT(value) __ASM volatile ("bkpt "#value)
emilmont 78:ed8466a608b4 567
emilmont 78:ed8466a608b4 568
emilmont 78:ed8466a608b4 569 /** \brief Reverse bit order of value
emilmont 78:ed8466a608b4 570
emilmont 78:ed8466a608b4 571 This function reverses the bit order of the given value.
emilmont 78:ed8466a608b4 572
emilmont 78:ed8466a608b4 573 \param [in] value Value to reverse
emilmont 78:ed8466a608b4 574 \return Reversed value
emilmont 78:ed8466a608b4 575 */
Kojto 110:165afa46840b 576 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
emilmont 78:ed8466a608b4 577 {
emilmont 78:ed8466a608b4 578 uint32_t result;
emilmont 78:ed8466a608b4 579
Kojto 110:165afa46840b 580 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
emilmont 78:ed8466a608b4 581 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
Kojto 110:165afa46840b 582 #else
Kojto 110:165afa46840b 583 int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
Kojto 110:165afa46840b 584
Kojto 110:165afa46840b 585 result = value; // r will be reversed bits of v; first get LSB of v
Kojto 110:165afa46840b 586 for (value >>= 1; value; value >>= 1)
Kojto 110:165afa46840b 587 {
Kojto 110:165afa46840b 588 result <<= 1;
Kojto 110:165afa46840b 589 result |= value & 1;
Kojto 110:165afa46840b 590 s--;
Kojto 110:165afa46840b 591 }
Kojto 110:165afa46840b 592 result <<= s; // shift when v's highest bits are zero
Kojto 110:165afa46840b 593 #endif
Kojto 110:165afa46840b 594 return(result);
emilmont 78:ed8466a608b4 595 }
emilmont 78:ed8466a608b4 596
emilmont 78:ed8466a608b4 597
Kojto 110:165afa46840b 598 /** \brief Count leading zeros
Kojto 110:165afa46840b 599
Kojto 110:165afa46840b 600 This function counts the number of leading zeros of a data value.
Kojto 110:165afa46840b 601
Kojto 110:165afa46840b 602 \param [in] value Value to count the leading zeros
Kojto 110:165afa46840b 603 \return number of leading zeros in value
Kojto 110:165afa46840b 604 */
Kojto 110:165afa46840b 605 #define __CLZ __builtin_clz
Kojto 110:165afa46840b 606
Kojto 110:165afa46840b 607
Kojto 110:165afa46840b 608 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
Kojto 110:165afa46840b 609
emilmont 78:ed8466a608b4 610 /** \brief LDR Exclusive (8 bit)
emilmont 78:ed8466a608b4 611
Kojto 110:165afa46840b 612 This function executes a exclusive LDR instruction for 8 bit value.
emilmont 78:ed8466a608b4 613
emilmont 78:ed8466a608b4 614 \param [in] ptr Pointer to data
emilmont 78:ed8466a608b4 615 \return value of type uint8_t at (*ptr)
emilmont 78:ed8466a608b4 616 */
Kojto 110:165afa46840b 617 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
emilmont 78:ed8466a608b4 618 {
emilmont 78:ed8466a608b4 619 uint32_t result;
emilmont 78:ed8466a608b4 620
emilmont 78:ed8466a608b4 621 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
emilmont 78:ed8466a608b4 622 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
emilmont 78:ed8466a608b4 623 #else
emilmont 78:ed8466a608b4 624 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
emilmont 78:ed8466a608b4 625 accepted by assembler. So has to use following less efficient pattern.
emilmont 78:ed8466a608b4 626 */
emilmont 78:ed8466a608b4 627 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
emilmont 78:ed8466a608b4 628 #endif
Kojto 110:165afa46840b 629 return ((uint8_t) result); /* Add explicit type cast here */
emilmont 78:ed8466a608b4 630 }
emilmont 78:ed8466a608b4 631
emilmont 78:ed8466a608b4 632
emilmont 78:ed8466a608b4 633 /** \brief LDR Exclusive (16 bit)
emilmont 78:ed8466a608b4 634
Kojto 110:165afa46840b 635 This function executes a exclusive LDR instruction for 16 bit values.
emilmont 78:ed8466a608b4 636
emilmont 78:ed8466a608b4 637 \param [in] ptr Pointer to data
emilmont 78:ed8466a608b4 638 \return value of type uint16_t at (*ptr)
emilmont 78:ed8466a608b4 639 */
Kojto 110:165afa46840b 640 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
emilmont 78:ed8466a608b4 641 {
emilmont 78:ed8466a608b4 642 uint32_t result;
emilmont 78:ed8466a608b4 643
emilmont 78:ed8466a608b4 644 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
emilmont 78:ed8466a608b4 645 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
emilmont 78:ed8466a608b4 646 #else
emilmont 78:ed8466a608b4 647 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
emilmont 78:ed8466a608b4 648 accepted by assembler. So has to use following less efficient pattern.
emilmont 78:ed8466a608b4 649 */
emilmont 78:ed8466a608b4 650 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
emilmont 78:ed8466a608b4 651 #endif
Kojto 110:165afa46840b 652 return ((uint16_t) result); /* Add explicit type cast here */
emilmont 78:ed8466a608b4 653 }
emilmont 78:ed8466a608b4 654
emilmont 78:ed8466a608b4 655
emilmont 78:ed8466a608b4 656 /** \brief LDR Exclusive (32 bit)
emilmont 78:ed8466a608b4 657
Kojto 110:165afa46840b 658 This function executes a exclusive LDR instruction for 32 bit values.
emilmont 78:ed8466a608b4 659
emilmont 78:ed8466a608b4 660 \param [in] ptr Pointer to data
emilmont 78:ed8466a608b4 661 \return value of type uint32_t at (*ptr)
emilmont 78:ed8466a608b4 662 */
Kojto 110:165afa46840b 663 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
emilmont 78:ed8466a608b4 664 {
emilmont 78:ed8466a608b4 665 uint32_t result;
emilmont 78:ed8466a608b4 666
emilmont 78:ed8466a608b4 667 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
emilmont 78:ed8466a608b4 668 return(result);
emilmont 78:ed8466a608b4 669 }
emilmont 78:ed8466a608b4 670
emilmont 78:ed8466a608b4 671
emilmont 78:ed8466a608b4 672 /** \brief STR Exclusive (8 bit)
emilmont 78:ed8466a608b4 673
Kojto 110:165afa46840b 674 This function executes a exclusive STR instruction for 8 bit values.
emilmont 78:ed8466a608b4 675
emilmont 78:ed8466a608b4 676 \param [in] value Value to store
emilmont 78:ed8466a608b4 677 \param [in] ptr Pointer to location
emilmont 78:ed8466a608b4 678 \return 0 Function succeeded
emilmont 78:ed8466a608b4 679 \return 1 Function failed
emilmont 78:ed8466a608b4 680 */
Kojto 110:165afa46840b 681 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
emilmont 78:ed8466a608b4 682 {
emilmont 78:ed8466a608b4 683 uint32_t result;
emilmont 78:ed8466a608b4 684
Kojto 110:165afa46840b 685 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
emilmont 78:ed8466a608b4 686 return(result);
emilmont 78:ed8466a608b4 687 }
emilmont 78:ed8466a608b4 688
emilmont 78:ed8466a608b4 689
emilmont 78:ed8466a608b4 690 /** \brief STR Exclusive (16 bit)
emilmont 78:ed8466a608b4 691
Kojto 110:165afa46840b 692 This function executes a exclusive STR instruction for 16 bit values.
emilmont 78:ed8466a608b4 693
emilmont 78:ed8466a608b4 694 \param [in] value Value to store
emilmont 78:ed8466a608b4 695 \param [in] ptr Pointer to location
emilmont 78:ed8466a608b4 696 \return 0 Function succeeded
emilmont 78:ed8466a608b4 697 \return 1 Function failed
emilmont 78:ed8466a608b4 698 */
Kojto 110:165afa46840b 699 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
emilmont 78:ed8466a608b4 700 {
emilmont 78:ed8466a608b4 701 uint32_t result;
emilmont 78:ed8466a608b4 702
Kojto 110:165afa46840b 703 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
emilmont 78:ed8466a608b4 704 return(result);
emilmont 78:ed8466a608b4 705 }
emilmont 78:ed8466a608b4 706
emilmont 78:ed8466a608b4 707
emilmont 78:ed8466a608b4 708 /** \brief STR Exclusive (32 bit)
emilmont 78:ed8466a608b4 709
Kojto 110:165afa46840b 710 This function executes a exclusive STR instruction for 32 bit values.
emilmont 78:ed8466a608b4 711
emilmont 78:ed8466a608b4 712 \param [in] value Value to store
emilmont 78:ed8466a608b4 713 \param [in] ptr Pointer to location
emilmont 78:ed8466a608b4 714 \return 0 Function succeeded
emilmont 78:ed8466a608b4 715 \return 1 Function failed
emilmont 78:ed8466a608b4 716 */
Kojto 110:165afa46840b 717 __attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
emilmont 78:ed8466a608b4 718 {
emilmont 78:ed8466a608b4 719 uint32_t result;
emilmont 78:ed8466a608b4 720
emilmont 78:ed8466a608b4 721 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
emilmont 78:ed8466a608b4 722 return(result);
emilmont 78:ed8466a608b4 723 }
emilmont 78:ed8466a608b4 724
emilmont 78:ed8466a608b4 725
emilmont 78:ed8466a608b4 726 /** \brief Remove the exclusive lock
emilmont 78:ed8466a608b4 727
emilmont 78:ed8466a608b4 728 This function removes the exclusive lock which is created by LDREX.
emilmont 78:ed8466a608b4 729
emilmont 78:ed8466a608b4 730 */
Kojto 110:165afa46840b 731 __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
emilmont 78:ed8466a608b4 732 {
emilmont 78:ed8466a608b4 733 __ASM volatile ("clrex" ::: "memory");
emilmont 78:ed8466a608b4 734 }
emilmont 78:ed8466a608b4 735
emilmont 78:ed8466a608b4 736
emilmont 78:ed8466a608b4 737 /** \brief Signed Saturate
emilmont 78:ed8466a608b4 738
emilmont 78:ed8466a608b4 739 This function saturates a signed value.
emilmont 78:ed8466a608b4 740
emilmont 78:ed8466a608b4 741 \param [in] value Value to be saturated
emilmont 78:ed8466a608b4 742 \param [in] sat Bit position to saturate to (1..32)
emilmont 78:ed8466a608b4 743 \return Saturated value
emilmont 78:ed8466a608b4 744 */
emilmont 78:ed8466a608b4 745 #define __SSAT(ARG1,ARG2) \
emilmont 78:ed8466a608b4 746 ({ \
emilmont 78:ed8466a608b4 747 uint32_t __RES, __ARG1 = (ARG1); \
emilmont 78:ed8466a608b4 748 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
emilmont 78:ed8466a608b4 749 __RES; \
emilmont 78:ed8466a608b4 750 })
emilmont 78:ed8466a608b4 751
emilmont 78:ed8466a608b4 752
emilmont 78:ed8466a608b4 753 /** \brief Unsigned Saturate
emilmont 78:ed8466a608b4 754
emilmont 78:ed8466a608b4 755 This function saturates an unsigned value.
emilmont 78:ed8466a608b4 756
emilmont 78:ed8466a608b4 757 \param [in] value Value to be saturated
emilmont 78:ed8466a608b4 758 \param [in] sat Bit position to saturate to (0..31)
emilmont 78:ed8466a608b4 759 \return Saturated value
emilmont 78:ed8466a608b4 760 */
emilmont 78:ed8466a608b4 761 #define __USAT(ARG1,ARG2) \
emilmont 78:ed8466a608b4 762 ({ \
emilmont 78:ed8466a608b4 763 uint32_t __RES, __ARG1 = (ARG1); \
emilmont 78:ed8466a608b4 764 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
emilmont 78:ed8466a608b4 765 __RES; \
emilmont 78:ed8466a608b4 766 })
emilmont 78:ed8466a608b4 767
emilmont 78:ed8466a608b4 768
Kojto 110:165afa46840b 769 /** \brief Rotate Right with Extend (32 bit)
emilmont 78:ed8466a608b4 770
Kojto 110:165afa46840b 771 This function moves each bit of a bitstring right by one bit.
Kojto 110:165afa46840b 772 The carry input is shifted in at the left end of the bitstring.
emilmont 78:ed8466a608b4 773
Kojto 110:165afa46840b 774 \param [in] value Value to rotate
Kojto 110:165afa46840b 775 \return Rotated value
emilmont 78:ed8466a608b4 776 */
Kojto 110:165afa46840b 777 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
emilmont 78:ed8466a608b4 778 {
Kojto 110:165afa46840b 779 uint32_t result;
emilmont 78:ed8466a608b4 780
Kojto 110:165afa46840b 781 __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
emilmont 78:ed8466a608b4 782 return(result);
emilmont 78:ed8466a608b4 783 }
emilmont 78:ed8466a608b4 784
Kojto 110:165afa46840b 785
Kojto 110:165afa46840b 786 /** \brief LDRT Unprivileged (8 bit)
Kojto 110:165afa46840b 787
Kojto 110:165afa46840b 788 This function executes a Unprivileged LDRT instruction for 8 bit value.
Kojto 110:165afa46840b 789
Kojto 110:165afa46840b 790 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 791 \return value of type uint8_t at (*ptr)
Kojto 110:165afa46840b 792 */
Kojto 110:165afa46840b 793 __attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
Kojto 110:165afa46840b 794 {
Kojto 110:165afa46840b 795 uint32_t result;
Kojto 110:165afa46840b 796
Kojto 110:165afa46840b 797 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Kojto 110:165afa46840b 798 __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
Kojto 110:165afa46840b 799 #else
Kojto 110:165afa46840b 800 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Kojto 110:165afa46840b 801 accepted by assembler. So has to use following less efficient pattern.
Kojto 110:165afa46840b 802 */
Kojto 110:165afa46840b 803 __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Kojto 110:165afa46840b 804 #endif
Kojto 110:165afa46840b 805 return ((uint8_t) result); /* Add explicit type cast here */
Kojto 110:165afa46840b 806 }
Kojto 110:165afa46840b 807
Kojto 110:165afa46840b 808
Kojto 110:165afa46840b 809 /** \brief LDRT Unprivileged (16 bit)
Kojto 110:165afa46840b 810
Kojto 110:165afa46840b 811 This function executes a Unprivileged LDRT instruction for 16 bit values.
Kojto 110:165afa46840b 812
Kojto 110:165afa46840b 813 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 814 \return value of type uint16_t at (*ptr)
Kojto 110:165afa46840b 815 */
Kojto 110:165afa46840b 816 __attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
Kojto 110:165afa46840b 817 {
Kojto 110:165afa46840b 818 uint32_t result;
Kojto 110:165afa46840b 819
Kojto 110:165afa46840b 820 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Kojto 110:165afa46840b 821 __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
Kojto 110:165afa46840b 822 #else
Kojto 110:165afa46840b 823 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Kojto 110:165afa46840b 824 accepted by assembler. So has to use following less efficient pattern.
Kojto 110:165afa46840b 825 */
Kojto 110:165afa46840b 826 __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Kojto 110:165afa46840b 827 #endif
Kojto 110:165afa46840b 828 return ((uint16_t) result); /* Add explicit type cast here */
Kojto 110:165afa46840b 829 }
emilmont 78:ed8466a608b4 830
emilmont 78:ed8466a608b4 831
Kojto 110:165afa46840b 832 /** \brief LDRT Unprivileged (32 bit)
Kojto 110:165afa46840b 833
Kojto 110:165afa46840b 834 This function executes a Unprivileged LDRT instruction for 32 bit values.
Kojto 110:165afa46840b 835
Kojto 110:165afa46840b 836 \param [in] ptr Pointer to data
Kojto 110:165afa46840b 837 \return value of type uint32_t at (*ptr)
Kojto 110:165afa46840b 838 */
Kojto 110:165afa46840b 839 __attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
Kojto 110:165afa46840b 840 {
Kojto 110:165afa46840b 841 uint32_t result;
Kojto 110:165afa46840b 842
Kojto 110:165afa46840b 843 __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
Kojto 110:165afa46840b 844 return(result);
Kojto 110:165afa46840b 845 }
Kojto 110:165afa46840b 846
Kojto 110:165afa46840b 847
Kojto 110:165afa46840b 848 /** \brief STRT Unprivileged (8 bit)
Kojto 110:165afa46840b 849
Kojto 110:165afa46840b 850 This function executes a Unprivileged STRT instruction for 8 bit values.
Kojto 110:165afa46840b 851
Kojto 110:165afa46840b 852 \param [in] value Value to store
Kojto 110:165afa46840b 853 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 854 */
Kojto 110:165afa46840b 855 __attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
Kojto 110:165afa46840b 856 {
Kojto 110:165afa46840b 857 __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
Kojto 110:165afa46840b 858 }
Kojto 110:165afa46840b 859
Kojto 110:165afa46840b 860
Kojto 110:165afa46840b 861 /** \brief STRT Unprivileged (16 bit)
Kojto 110:165afa46840b 862
Kojto 110:165afa46840b 863 This function executes a Unprivileged STRT instruction for 16 bit values.
Kojto 110:165afa46840b 864
Kojto 110:165afa46840b 865 \param [in] value Value to store
Kojto 110:165afa46840b 866 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 867 */
Kojto 110:165afa46840b 868 __attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
Kojto 110:165afa46840b 869 {
Kojto 110:165afa46840b 870 __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
Kojto 110:165afa46840b 871 }
Kojto 110:165afa46840b 872
Kojto 110:165afa46840b 873
Kojto 110:165afa46840b 874 /** \brief STRT Unprivileged (32 bit)
Kojto 110:165afa46840b 875
Kojto 110:165afa46840b 876 This function executes a Unprivileged STRT instruction for 32 bit values.
Kojto 110:165afa46840b 877
Kojto 110:165afa46840b 878 \param [in] value Value to store
Kojto 110:165afa46840b 879 \param [in] ptr Pointer to location
Kojto 110:165afa46840b 880 */
Kojto 110:165afa46840b 881 __attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
Kojto 110:165afa46840b 882 {
Kojto 110:165afa46840b 883 __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
Kojto 110:165afa46840b 884 }
Kojto 110:165afa46840b 885
Kojto 110:165afa46840b 886 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
Kojto 110:165afa46840b 887
Kojto 110:165afa46840b 888
Kojto 110:165afa46840b 889 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Kojto 110:165afa46840b 890 /* IAR iccarm specific functions */
Kojto 110:165afa46840b 891 #include <cmsis_iar.h>
Kojto 110:165afa46840b 892
Kojto 110:165afa46840b 893
Kojto 110:165afa46840b 894 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Kojto 110:165afa46840b 895 /* TI CCS specific functions */
Kojto 110:165afa46840b 896 #include <cmsis_ccs.h>
emilmont 78:ed8466a608b4 897
emilmont 78:ed8466a608b4 898
emilmont 78:ed8466a608b4 899 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
emilmont 78:ed8466a608b4 900 /* TASKING carm specific functions */
emilmont 78:ed8466a608b4 901 /*
emilmont 78:ed8466a608b4 902 * The CMSIS functions have been implemented as intrinsics in the compiler.
emilmont 78:ed8466a608b4 903 * Please use "carm -?i" to get an up to date list of all intrinsics,
emilmont 78:ed8466a608b4 904 * Including the CMSIS ones.
emilmont 78:ed8466a608b4 905 */
emilmont 78:ed8466a608b4 906
Kojto 110:165afa46840b 907
Kojto 110:165afa46840b 908 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
Kojto 110:165afa46840b 909 /* Cosmic specific functions */
Kojto 110:165afa46840b 910 #include <cmsis_csm.h>
Kojto 110:165afa46840b 911
emilmont 78:ed8466a608b4 912 #endif
emilmont 78:ed8466a608b4 913
emilmont 78:ed8466a608b4 914 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
emilmont 78:ed8466a608b4 915
emilmont 78:ed8466a608b4 916 #endif /* __CORE_CMINSTR_H */