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Diff: TARGET_MTS_MDOT_F405RG/stm32f4xx_ll_usb.h
- Revision:
- 99:dbbf35b96557
- Parent:
- 92:4fc01daae5a5
- Child:
- 106:ba1f97679dad
--- a/TARGET_MTS_MDOT_F405RG/stm32f4xx_ll_usb.h Wed Apr 29 10:16:23 2015 +0100 +++ b/TARGET_MTS_MDOT_F405RG/stm32f4xx_ll_usb.h Wed May 13 08:08:21 2015 +0200 @@ -2,13 +2,13 @@ ****************************************************************************** * @file stm32f4xx_ll_usb.h * @author MCD Application Team - * @version V1.1.0 - * @date 19-June-2014 + * @version V1.3.0 + * @date 09-March-2015 * @brief Header file of USB Core HAL module. ****************************************************************************** * @attention * - * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> + * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: @@ -122,7 +122,9 @@ uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */ - uint32_t low_power_enable; /*!< Enable or disable the low power mode. */ + uint32_t low_power_enable; /*!< Enable or disable the low power mode. */ + + uint32_t lpm_enable; /*!< Enable or disable Link Power Management. */ uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */ @@ -224,11 +226,11 @@ /* Exported constants --------------------------------------------------------*/ -/** @defgroup PCD_Exported_Constants +/** @defgroup PCD_Exported_Constants PCD Exported Constants * @{ */ -/** @defgroup USB_Core_Mode_ +/** @defgroup USB_Core_Mode_ USB Core Mode * @{ */ #define USB_OTG_MODE_DEVICE 0 @@ -238,7 +240,7 @@ * @} */ -/** @defgroup USB_Core_Speed_ +/** @defgroup USB_Core_Speed_ USB Core Speed * @{ */ #define USB_OTG_SPEED_HIGH 0 @@ -249,7 +251,7 @@ * @} */ -/** @defgroup USB_Core_PHY_ +/** @defgroup USB_Core_PHY_ USB Core PHY * @{ */ #define USB_OTG_ULPI_PHY 1 @@ -258,7 +260,7 @@ * @} */ -/** @defgroup USB_Core_MPS_ +/** @defgroup USB_Core_MPS_ USB Core MPS * @{ */ #define USB_OTG_HS_MAX_PACKET_SIZE 512 @@ -268,7 +270,7 @@ * @} */ -/** @defgroup USB_Core_Phy_Frequency_ +/** @defgroup USB_Core_Phy_Frequency_ USB Core Phy Frequency * @{ */ #define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0 << 1) @@ -279,7 +281,7 @@ * @} */ -/** @defgroup USB_CORE_Frame_Interval_ +/** @defgroup USB_CORE_Frame_Interval_ USB CORE Frame Interval * @{ */ #define DCFG_FRAME_INTERVAL_80 0 @@ -290,7 +292,7 @@ * @} */ -/** @defgroup USB_EP0_MPS_ +/** @defgroup USB_EP0_MPS_ USB EP0 MPS * @{ */ #define DEP0CTL_MPS_64 0 @@ -301,7 +303,7 @@ * @} */ -/** @defgroup USB_EP_Speed_ +/** @defgroup USB_EP_Speed_ USB EP Speed * @{ */ #define EP_SPEED_LOW 0 @@ -311,7 +313,7 @@ * @} */ -/** @defgroup USB_EP_Type_ +/** @defgroup USB_EP_Type_ USB EP Type * @{ */ #define EP_TYPE_CTRL 0 @@ -323,7 +325,7 @@ * @} */ -/** @defgroup USB_STS_Defines_ +/** @defgroup USB_STS_Defines_ USB STS Defines * @{ */ #define STS_GOUT_NAK 1 @@ -335,7 +337,7 @@ * @} */ -/** @defgroup HCFG_SPEED_Defines_ +/** @defgroup HCFG_SPEED_Defines_ HCFG SPEED Defines * @{ */ #define HCFG_30_60_MHZ 0 @@ -345,7 +347,7 @@ * @} */ -/** @defgroup HPRT0_PRTSPD_SPEED_Defines_ +/** @defgroup HPRT0_PRTSPD_SPEED_Defines_ HPRT0 PRTSPD SPEED Defines * @{ */ #define HPRT0_PRTSPD_HIGH_SPEED 0 @@ -380,7 +382,9 @@ #define USBx_HOST ((USB_OTG_HostTypeDef *)((uint32_t )USBx + USB_OTG_HOST_BASE)) #define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)((uint32_t)USBx + USB_OTG_HOST_CHANNEL_BASE + (i)*USB_OTG_HOST_CHANNEL_SIZE)) - +/** + * @} + */ /* Exported macro ------------------------------------------------------------*/ #define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__)) #define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__))