Diff: TARGET_NUCLEO_F030R8/stm32f030x8.h

Revision:

92:4fc01daae5a5

Parent:

90:cb3d968589d8

Child:

93:e188a91d3eaa

--- a/TARGET_NUCLEO_F030R8/stm32f030x8.h	Wed Oct 29 11:02:04 2014 +0000
+++ b/TARGET_NUCLEO_F030R8/stm32f030x8.h	Thu Nov 27 13:33:22 2014 +0000
@@ -252,15 +252,15 @@
 
 typedef struct
 {
-  __IO uint32_t MODER;        /*!< GPIO port mode register,                                  Address offset: 0x00 */
+  __IO uint32_t MODER;        /*!< GPIO port mode register,               Address offset: 0x00 */
   __IO uint32_t OTYPER;       /*!< GPIO port output type register,        Address offset: 0x04 */
-  __IO uint32_t OSPEEDR;      /*!< GPIO port output speed register,                          Address offset: 0x08 */
-  __IO uint32_t PUPDR;        /*!< GPIO port pull-up/pull-down register,                     Address offset: 0x0C */
+  __IO uint32_t OSPEEDR;      /*!< GPIO port output speed register,       Address offset: 0x08 */
+  __IO uint32_t PUPDR;        /*!< GPIO port pull-up/pull-down register,  Address offset: 0x0C */
   __IO uint32_t IDR;          /*!< GPIO port input data register,         Address offset: 0x10 */
   __IO uint32_t ODR;          /*!< GPIO port output data register,        Address offset: 0x14 */
   __IO uint32_t BSRR;         /*!< GPIO port bit set/reset register,      Address offset: 0x1A */
-  __IO uint32_t LCKR;         /*!< GPIO port configuration lock register,                    Address offset: 0x1C */
-  __IO uint32_t AFR[2];       /*!< GPIO alternate function low register,                Address offset: 0x20-0x24 */
+  __IO uint32_t LCKR;         /*!< GPIO port configuration lock register, Address offset: 0x1C */
+  __IO uint32_t AFR[2];       /*!< GPIO alternate function low register,  Address offset: 0x20-0x24 */
   __IO uint32_t BRR;          /*!< GPIO bit reset register,               Address offset: 0x28 */
 }GPIO_TypeDef;