Ricardo Benitez
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TARGET_NUCLEO_F401RE/stm32f4xx_hal_i2s.h@99:dbbf35b96557, 2015-05-13 (annotated)
- Committer:
- Kojto
- Date:
- Wed May 13 08:08:21 2015 +0200
- Revision:
- 99:dbbf35b96557
- Parent:
- 90:cb3d968589d8
- Child:
- 106:ba1f97679dad
Release 99 of the mbed library
Changes:
- new targets - MAXWSNENV, DISCO_L053C8
- STM32F4xx - ST Cube driver
- KSDK mcu - SPI timing fix
- Nordic - update to softdevice s130
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| emilmont | 77:869cf507173a | 1 | /** |
| emilmont | 77:869cf507173a | 2 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 3 | * @file stm32f4xx_hal_i2s.h |
| emilmont | 77:869cf507173a | 4 | * @author MCD Application Team |
| Kojto | 99:dbbf35b96557 | 5 | * @version V1.3.0 |
| Kojto | 99:dbbf35b96557 | 6 | * @date 09-March-2015 |
| emilmont | 77:869cf507173a | 7 | * @brief Header file of I2S HAL module. |
| emilmont | 77:869cf507173a | 8 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 9 | * @attention |
| emilmont | 77:869cf507173a | 10 | * |
| Kojto | 99:dbbf35b96557 | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| emilmont | 77:869cf507173a | 12 | * |
| emilmont | 77:869cf507173a | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| emilmont | 77:869cf507173a | 14 | * are permitted provided that the following conditions are met: |
| emilmont | 77:869cf507173a | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| emilmont | 77:869cf507173a | 16 | * this list of conditions and the following disclaimer. |
| emilmont | 77:869cf507173a | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| emilmont | 77:869cf507173a | 18 | * this list of conditions and the following disclaimer in the documentation |
| emilmont | 77:869cf507173a | 19 | * and/or other materials provided with the distribution. |
| emilmont | 77:869cf507173a | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| emilmont | 77:869cf507173a | 21 | * may be used to endorse or promote products derived from this software |
| emilmont | 77:869cf507173a | 22 | * without specific prior written permission. |
| emilmont | 77:869cf507173a | 23 | * |
| emilmont | 77:869cf507173a | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| emilmont | 77:869cf507173a | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| emilmont | 77:869cf507173a | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| emilmont | 77:869cf507173a | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| emilmont | 77:869cf507173a | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| emilmont | 77:869cf507173a | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| emilmont | 77:869cf507173a | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| emilmont | 77:869cf507173a | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| emilmont | 77:869cf507173a | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| emilmont | 77:869cf507173a | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| emilmont | 77:869cf507173a | 34 | * |
| emilmont | 77:869cf507173a | 35 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 36 | */ |
| emilmont | 77:869cf507173a | 37 | |
| emilmont | 77:869cf507173a | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| emilmont | 77:869cf507173a | 39 | #ifndef __STM32F4xx_HAL_I2S_H |
| emilmont | 77:869cf507173a | 40 | #define __STM32F4xx_HAL_I2S_H |
| emilmont | 77:869cf507173a | 41 | |
| emilmont | 77:869cf507173a | 42 | #ifdef __cplusplus |
| emilmont | 77:869cf507173a | 43 | extern "C" { |
| emilmont | 77:869cf507173a | 44 | #endif |
| emilmont | 77:869cf507173a | 45 | |
| emilmont | 77:869cf507173a | 46 | /* Includes ------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 47 | #include "stm32f4xx_hal_def.h" |
| emilmont | 77:869cf507173a | 48 | |
| emilmont | 77:869cf507173a | 49 | /** @addtogroup STM32F4xx_HAL_Driver |
| emilmont | 77:869cf507173a | 50 | * @{ |
| emilmont | 77:869cf507173a | 51 | */ |
| emilmont | 77:869cf507173a | 52 | |
| emilmont | 77:869cf507173a | 53 | /** @addtogroup I2S |
| emilmont | 77:869cf507173a | 54 | * @{ |
| emilmont | 77:869cf507173a | 55 | */ |
| emilmont | 77:869cf507173a | 56 | |
| Kojto | 99:dbbf35b96557 | 57 | /* Exported types ------------------------------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 58 | /** @defgroup I2S_Exported_Types I2S Exported Types |
| Kojto | 99:dbbf35b96557 | 59 | * @{ |
| Kojto | 99:dbbf35b96557 | 60 | */ |
| Kojto | 99:dbbf35b96557 | 61 | |
| emilmont | 77:869cf507173a | 62 | /** |
| emilmont | 77:869cf507173a | 63 | * @brief I2S Init structure definition |
| emilmont | 77:869cf507173a | 64 | */ |
| emilmont | 77:869cf507173a | 65 | typedef struct |
| emilmont | 77:869cf507173a | 66 | { |
| emilmont | 77:869cf507173a | 67 | uint32_t Mode; /*!< Specifies the I2S operating mode. |
| emilmont | 77:869cf507173a | 68 | This parameter can be a value of @ref I2S_Mode */ |
| emilmont | 77:869cf507173a | 69 | |
| emilmont | 77:869cf507173a | 70 | uint32_t Standard; /*!< Specifies the standard used for the I2S communication. |
| emilmont | 77:869cf507173a | 71 | This parameter can be a value of @ref I2S_Standard */ |
| emilmont | 77:869cf507173a | 72 | |
| emilmont | 77:869cf507173a | 73 | uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. |
| emilmont | 77:869cf507173a | 74 | This parameter can be a value of @ref I2S_Data_Format */ |
| emilmont | 77:869cf507173a | 75 | |
| emilmont | 77:869cf507173a | 76 | uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. |
| emilmont | 77:869cf507173a | 77 | This parameter can be a value of @ref I2S_MCLK_Output */ |
| emilmont | 77:869cf507173a | 78 | |
| emilmont | 77:869cf507173a | 79 | uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. |
| emilmont | 77:869cf507173a | 80 | This parameter can be a value of @ref I2S_Audio_Frequency */ |
| emilmont | 77:869cf507173a | 81 | |
| emilmont | 77:869cf507173a | 82 | uint32_t CPOL; /*!< Specifies the idle state of the I2S clock. |
| emilmont | 77:869cf507173a | 83 | This parameter can be a value of @ref I2S_Clock_Polarity */ |
| emilmont | 77:869cf507173a | 84 | |
| emilmont | 77:869cf507173a | 85 | uint32_t ClockSource; /*!< Specifies the I2S Clock Source. |
| emilmont | 77:869cf507173a | 86 | This parameter can be a value of @ref I2S_Clock_Source */ |
| emilmont | 77:869cf507173a | 87 | |
| emilmont | 77:869cf507173a | 88 | uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode. |
| emilmont | 77:869cf507173a | 89 | This parameter can be a value of @ref I2S_FullDuplex_Mode */ |
| emilmont | 77:869cf507173a | 90 | |
| emilmont | 77:869cf507173a | 91 | }I2S_InitTypeDef; |
| emilmont | 77:869cf507173a | 92 | |
| emilmont | 77:869cf507173a | 93 | /** |
| emilmont | 77:869cf507173a | 94 | * @brief HAL State structures definition |
| emilmont | 77:869cf507173a | 95 | */ |
| emilmont | 77:869cf507173a | 96 | typedef enum |
| emilmont | 77:869cf507173a | 97 | { |
| emilmont | 77:869cf507173a | 98 | HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */ |
| emilmont | 77:869cf507173a | 99 | HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */ |
| emilmont | 77:869cf507173a | 100 | HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */ |
| emilmont | 77:869cf507173a | 101 | HAL_I2S_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ |
| emilmont | 77:869cf507173a | 102 | HAL_I2S_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ |
| emilmont | 77:869cf507173a | 103 | HAL_I2S_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */ |
| emilmont | 77:869cf507173a | 104 | HAL_I2S_STATE_TIMEOUT = 0x03, /*!< I2S timeout state */ |
| emilmont | 77:869cf507173a | 105 | HAL_I2S_STATE_ERROR = 0x04 /*!< I2S error state */ |
| emilmont | 77:869cf507173a | 106 | |
| emilmont | 77:869cf507173a | 107 | }HAL_I2S_StateTypeDef; |
| emilmont | 77:869cf507173a | 108 | |
| emilmont | 77:869cf507173a | 109 | /** |
| emilmont | 77:869cf507173a | 110 | * @brief I2S handle Structure definition |
| emilmont | 77:869cf507173a | 111 | */ |
| emilmont | 77:869cf507173a | 112 | typedef struct |
| emilmont | 77:869cf507173a | 113 | { |
| emilmont | 77:869cf507173a | 114 | SPI_TypeDef *Instance; /* I2S registers base address */ |
| emilmont | 77:869cf507173a | 115 | |
| emilmont | 77:869cf507173a | 116 | I2S_InitTypeDef Init; /* I2S communication parameters */ |
| emilmont | 77:869cf507173a | 117 | |
| emilmont | 77:869cf507173a | 118 | uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */ |
| emilmont | 77:869cf507173a | 119 | |
| emilmont | 77:869cf507173a | 120 | __IO uint16_t TxXferSize; /* I2S Tx transfer size */ |
| emilmont | 77:869cf507173a | 121 | |
| emilmont | 77:869cf507173a | 122 | __IO uint16_t TxXferCount; /* I2S Tx transfer Counter */ |
| emilmont | 77:869cf507173a | 123 | |
| emilmont | 77:869cf507173a | 124 | uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */ |
| emilmont | 77:869cf507173a | 125 | |
| emilmont | 77:869cf507173a | 126 | __IO uint16_t RxXferSize; /* I2S Rx transfer size */ |
| emilmont | 77:869cf507173a | 127 | |
| emilmont | 77:869cf507173a | 128 | __IO uint16_t RxXferCount; /* I2S Rx transfer counter */ |
| emilmont | 77:869cf507173a | 129 | |
| emilmont | 77:869cf507173a | 130 | DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */ |
| emilmont | 77:869cf507173a | 131 | |
| emilmont | 77:869cf507173a | 132 | DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */ |
| emilmont | 77:869cf507173a | 133 | |
| emilmont | 77:869cf507173a | 134 | __IO HAL_LockTypeDef Lock; /* I2S locking object */ |
| emilmont | 77:869cf507173a | 135 | |
| emilmont | 77:869cf507173a | 136 | __IO HAL_I2S_StateTypeDef State; /* I2S communication state */ |
| emilmont | 77:869cf507173a | 137 | |
| Kojto | 99:dbbf35b96557 | 138 | __IO uint32_t ErrorCode; /* I2S Error code */ |
| Kojto | 99:dbbf35b96557 | 139 | |
| emilmont | 77:869cf507173a | 140 | }I2S_HandleTypeDef; |
| Kojto | 99:dbbf35b96557 | 141 | /** |
| Kojto | 99:dbbf35b96557 | 142 | * @} |
| Kojto | 99:dbbf35b96557 | 143 | */ |
| emilmont | 77:869cf507173a | 144 | |
| emilmont | 77:869cf507173a | 145 | /* Exported constants --------------------------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 146 | /** @defgroup I2S_Exported_Constants I2S Exported Constants |
| emilmont | 77:869cf507173a | 147 | * @{ |
| emilmont | 77:869cf507173a | 148 | */ |
| emilmont | 77:869cf507173a | 149 | |
| Kojto | 99:dbbf35b96557 | 150 | /** @defgroup I2S_Error_Code I2S Error Code |
| Kojto | 99:dbbf35b96557 | 151 | * @brief I2S Error Code |
| Kojto | 99:dbbf35b96557 | 152 | * @{ |
| Kojto | 99:dbbf35b96557 | 153 | */ |
| Kojto | 99:dbbf35b96557 | 154 | #define HAL_I2S_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ |
| Kojto | 99:dbbf35b96557 | 155 | #define HAL_I2S_ERROR_UDR ((uint32_t)0x00000001) /*!< I2S Underrun error */ |
| Kojto | 99:dbbf35b96557 | 156 | #define HAL_I2S_ERROR_OVR ((uint32_t)0x00000002) /*!< I2S Overrun error */ |
| Kojto | 99:dbbf35b96557 | 157 | #define HAL_I2SEX_ERROR_UDR ((uint32_t)0x00000004) /*!< I2S extended Underrun error */ |
| Kojto | 99:dbbf35b96557 | 158 | #define HAL_I2SEX_ERROR_OVR ((uint32_t)0x00000008) /*!< I2S extended Overrun error */ |
| Kojto | 99:dbbf35b96557 | 159 | #define HAL_I2S_ERROR_FRE ((uint32_t)0x00000010) /*!< I2S Frame format error */ |
| Kojto | 99:dbbf35b96557 | 160 | #define HAL_I2S_ERROR_DMA ((uint32_t)0x00000020) /*!< DMA transfer error */ |
| Kojto | 99:dbbf35b96557 | 161 | /** |
| Kojto | 99:dbbf35b96557 | 162 | * @} |
| Kojto | 99:dbbf35b96557 | 163 | */ |
| Kojto | 99:dbbf35b96557 | 164 | |
| Kojto | 99:dbbf35b96557 | 165 | /** @defgroup I2S_Clock_Source I2S Clock Source |
| emilmont | 77:869cf507173a | 166 | * @{ |
| emilmont | 77:869cf507173a | 167 | */ |
| emilmont | 77:869cf507173a | 168 | #define I2S_CLOCK_PLL ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 169 | #define I2S_CLOCK_EXTERNAL ((uint32_t)0x00000001) |
| Kojto | 99:dbbf35b96557 | 170 | #define I2S_CLOCK_PLLR ((uint32_t)0x00000002) |
| Kojto | 99:dbbf35b96557 | 171 | #define I2S_CLOCK_PLLSRC ((uint32_t)0x00000003) |
| emilmont | 77:869cf507173a | 172 | /** |
| emilmont | 77:869cf507173a | 173 | * @} |
| emilmont | 77:869cf507173a | 174 | */ |
| emilmont | 77:869cf507173a | 175 | |
| Kojto | 99:dbbf35b96557 | 176 | /** @defgroup I2S_Mode I2S Mode |
| emilmont | 77:869cf507173a | 177 | * @{ |
| emilmont | 77:869cf507173a | 178 | */ |
| emilmont | 77:869cf507173a | 179 | #define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 180 | #define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100) |
| emilmont | 77:869cf507173a | 181 | #define I2S_MODE_MASTER_TX ((uint32_t)0x00000200) |
| emilmont | 77:869cf507173a | 182 | #define I2S_MODE_MASTER_RX ((uint32_t)0x00000300) |
| emilmont | 77:869cf507173a | 183 | /** |
| emilmont | 77:869cf507173a | 184 | * @} |
| emilmont | 77:869cf507173a | 185 | */ |
| emilmont | 77:869cf507173a | 186 | |
| Kojto | 99:dbbf35b96557 | 187 | /** @defgroup I2S_Standard I2S Standard |
| emilmont | 77:869cf507173a | 188 | * @{ |
| emilmont | 77:869cf507173a | 189 | */ |
| bogdanm | 85:024bf7f99721 | 190 | #define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 191 | #define I2S_STANDARD_MSB ((uint32_t)0x00000010) |
| emilmont | 77:869cf507173a | 192 | #define I2S_STANDARD_LSB ((uint32_t)0x00000020) |
| emilmont | 77:869cf507173a | 193 | #define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030) |
| emilmont | 77:869cf507173a | 194 | #define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0) |
| emilmont | 77:869cf507173a | 195 | /** |
| emilmont | 77:869cf507173a | 196 | * @} |
| emilmont | 77:869cf507173a | 197 | */ |
| emilmont | 77:869cf507173a | 198 | |
| Kojto | 99:dbbf35b96557 | 199 | /** @defgroup I2S_Data_Format I2S Data Format |
| emilmont | 77:869cf507173a | 200 | * @{ |
| emilmont | 77:869cf507173a | 201 | */ |
| emilmont | 77:869cf507173a | 202 | #define I2S_DATAFORMAT_16B ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 203 | #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001) |
| emilmont | 77:869cf507173a | 204 | #define I2S_DATAFORMAT_24B ((uint32_t)0x00000003) |
| emilmont | 77:869cf507173a | 205 | #define I2S_DATAFORMAT_32B ((uint32_t)0x00000005) |
| emilmont | 77:869cf507173a | 206 | /** |
| emilmont | 77:869cf507173a | 207 | * @} |
| emilmont | 77:869cf507173a | 208 | */ |
| emilmont | 77:869cf507173a | 209 | |
| Kojto | 99:dbbf35b96557 | 210 | /** @defgroup I2S_MCLK_Output I2S Mclk Output |
| emilmont | 77:869cf507173a | 211 | * @{ |
| emilmont | 77:869cf507173a | 212 | */ |
| emilmont | 77:869cf507173a | 213 | #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE) |
| emilmont | 77:869cf507173a | 214 | #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 215 | /** |
| emilmont | 77:869cf507173a | 216 | * @} |
| emilmont | 77:869cf507173a | 217 | */ |
| emilmont | 77:869cf507173a | 218 | |
| Kojto | 99:dbbf35b96557 | 219 | /** @defgroup I2S_Audio_Frequency I2S Audio Frequency |
| emilmont | 77:869cf507173a | 220 | * @{ |
| emilmont | 77:869cf507173a | 221 | */ |
| emilmont | 77:869cf507173a | 222 | #define I2S_AUDIOFREQ_192K ((uint32_t)192000) |
| emilmont | 77:869cf507173a | 223 | #define I2S_AUDIOFREQ_96K ((uint32_t)96000) |
| emilmont | 77:869cf507173a | 224 | #define I2S_AUDIOFREQ_48K ((uint32_t)48000) |
| emilmont | 77:869cf507173a | 225 | #define I2S_AUDIOFREQ_44K ((uint32_t)44100) |
| emilmont | 77:869cf507173a | 226 | #define I2S_AUDIOFREQ_32K ((uint32_t)32000) |
| emilmont | 77:869cf507173a | 227 | #define I2S_AUDIOFREQ_22K ((uint32_t)22050) |
| emilmont | 77:869cf507173a | 228 | #define I2S_AUDIOFREQ_16K ((uint32_t)16000) |
| emilmont | 77:869cf507173a | 229 | #define I2S_AUDIOFREQ_11K ((uint32_t)11025) |
| emilmont | 77:869cf507173a | 230 | #define I2S_AUDIOFREQ_8K ((uint32_t)8000) |
| emilmont | 77:869cf507173a | 231 | #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2) |
| emilmont | 77:869cf507173a | 232 | /** |
| emilmont | 77:869cf507173a | 233 | * @} |
| emilmont | 77:869cf507173a | 234 | */ |
| emilmont | 77:869cf507173a | 235 | |
| Kojto | 99:dbbf35b96557 | 236 | /** @defgroup I2S_FullDuplex_Mode I2S FullDuplex Mode |
| emilmont | 77:869cf507173a | 237 | * @{ |
| emilmont | 77:869cf507173a | 238 | */ |
| emilmont | 77:869cf507173a | 239 | #define I2S_FULLDUPLEXMODE_DISABLE ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 240 | #define I2S_FULLDUPLEXMODE_ENABLE ((uint32_t)0x00000001) |
| emilmont | 77:869cf507173a | 241 | /** |
| emilmont | 77:869cf507173a | 242 | * @} |
| emilmont | 77:869cf507173a | 243 | */ |
| emilmont | 77:869cf507173a | 244 | |
| Kojto | 99:dbbf35b96557 | 245 | /** @defgroup I2S_Clock_Polarity I2S Clock Polarity |
| emilmont | 77:869cf507173a | 246 | * @{ |
| emilmont | 77:869cf507173a | 247 | */ |
| emilmont | 77:869cf507173a | 248 | #define I2S_CPOL_LOW ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 249 | #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL) |
| emilmont | 77:869cf507173a | 250 | /** |
| emilmont | 77:869cf507173a | 251 | * @} |
| emilmont | 77:869cf507173a | 252 | */ |
| emilmont | 77:869cf507173a | 253 | |
| Kojto | 99:dbbf35b96557 | 254 | /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition |
| emilmont | 77:869cf507173a | 255 | * @{ |
| emilmont | 77:869cf507173a | 256 | */ |
| emilmont | 77:869cf507173a | 257 | #define I2S_IT_TXE SPI_CR2_TXEIE |
| emilmont | 77:869cf507173a | 258 | #define I2S_IT_RXNE SPI_CR2_RXNEIE |
| emilmont | 77:869cf507173a | 259 | #define I2S_IT_ERR SPI_CR2_ERRIE |
| emilmont | 77:869cf507173a | 260 | /** |
| emilmont | 77:869cf507173a | 261 | * @} |
| emilmont | 77:869cf507173a | 262 | */ |
| emilmont | 77:869cf507173a | 263 | |
| Kojto | 99:dbbf35b96557 | 264 | /** @defgroup I2S_Flags_Definition I2S Flags Definition |
| emilmont | 77:869cf507173a | 265 | * @{ |
| emilmont | 77:869cf507173a | 266 | */ |
| emilmont | 77:869cf507173a | 267 | #define I2S_FLAG_TXE SPI_SR_TXE |
| emilmont | 77:869cf507173a | 268 | #define I2S_FLAG_RXNE SPI_SR_RXNE |
| emilmont | 77:869cf507173a | 269 | |
| emilmont | 77:869cf507173a | 270 | #define I2S_FLAG_UDR SPI_SR_UDR |
| emilmont | 77:869cf507173a | 271 | #define I2S_FLAG_OVR SPI_SR_OVR |
| emilmont | 77:869cf507173a | 272 | #define I2S_FLAG_FRE SPI_SR_FRE |
| emilmont | 77:869cf507173a | 273 | |
| emilmont | 77:869cf507173a | 274 | #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE |
| emilmont | 77:869cf507173a | 275 | #define I2S_FLAG_BSY SPI_SR_BSY |
| emilmont | 77:869cf507173a | 276 | /** |
| emilmont | 77:869cf507173a | 277 | * @} |
| emilmont | 77:869cf507173a | 278 | */ |
| emilmont | 77:869cf507173a | 279 | |
| emilmont | 77:869cf507173a | 280 | /** |
| emilmont | 77:869cf507173a | 281 | * @} |
| emilmont | 77:869cf507173a | 282 | */ |
| Kojto | 99:dbbf35b96557 | 283 | |
| emilmont | 77:869cf507173a | 284 | /* Exported macro ------------------------------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 285 | /** @defgroup I2S_Exported_Macros I2S Exported Macros |
| Kojto | 99:dbbf35b96557 | 286 | * @{ |
| Kojto | 99:dbbf35b96557 | 287 | */ |
| bogdanm | 85:024bf7f99721 | 288 | |
| bogdanm | 85:024bf7f99721 | 289 | /** @brief Reset I2S handle state |
| bogdanm | 85:024bf7f99721 | 290 | * @param __HANDLE__: specifies the I2S Handle. |
| bogdanm | 85:024bf7f99721 | 291 | * @retval None |
| bogdanm | 85:024bf7f99721 | 292 | */ |
| bogdanm | 85:024bf7f99721 | 293 | #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) |
| bogdanm | 85:024bf7f99721 | 294 | |
| emilmont | 77:869cf507173a | 295 | /** @brief Enable or disable the specified SPI peripheral (in I2S mode). |
| emilmont | 77:869cf507173a | 296 | * @param __HANDLE__: specifies the I2S Handle. |
| emilmont | 77:869cf507173a | 297 | * @retval None |
| emilmont | 77:869cf507173a | 298 | */ |
| emilmont | 77:869cf507173a | 299 | #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE) |
| emilmont | 77:869cf507173a | 300 | #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= ~SPI_I2SCFGR_I2SE) |
| emilmont | 77:869cf507173a | 301 | |
| emilmont | 77:869cf507173a | 302 | /** @brief Enable or disable the specified I2S interrupts. |
| emilmont | 77:869cf507173a | 303 | * @param __HANDLE__: specifies the I2S Handle. |
| emilmont | 77:869cf507173a | 304 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
| emilmont | 77:869cf507173a | 305 | * This parameter can be one of the following values: |
| emilmont | 77:869cf507173a | 306 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
| emilmont | 77:869cf507173a | 307 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
| emilmont | 77:869cf507173a | 308 | * @arg I2S_IT_ERR: Error interrupt enable |
| emilmont | 77:869cf507173a | 309 | * @retval None |
| emilmont | 77:869cf507173a | 310 | */ |
| emilmont | 77:869cf507173a | 311 | #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) |
| emilmont | 77:869cf507173a | 312 | #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= ~(__INTERRUPT__)) |
| emilmont | 77:869cf507173a | 313 | |
| emilmont | 77:869cf507173a | 314 | /** @brief Checks if the specified I2S interrupt source is enabled or disabled. |
| emilmont | 77:869cf507173a | 315 | * @param __HANDLE__: specifies the I2S Handle. |
| emilmont | 77:869cf507173a | 316 | * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. |
| emilmont | 77:869cf507173a | 317 | * @param __INTERRUPT__: specifies the I2S interrupt source to check. |
| emilmont | 77:869cf507173a | 318 | * This parameter can be one of the following values: |
| emilmont | 77:869cf507173a | 319 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
| emilmont | 77:869cf507173a | 320 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
| emilmont | 77:869cf507173a | 321 | * @arg I2S_IT_ERR: Error interrupt enable |
| emilmont | 77:869cf507173a | 322 | * @retval The new state of __IT__ (TRUE or FALSE). |
| emilmont | 77:869cf507173a | 323 | */ |
| emilmont | 77:869cf507173a | 324 | #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| emilmont | 77:869cf507173a | 325 | |
| emilmont | 77:869cf507173a | 326 | /** @brief Checks whether the specified I2S flag is set or not. |
| emilmont | 77:869cf507173a | 327 | * @param __HANDLE__: specifies the I2S Handle. |
| emilmont | 77:869cf507173a | 328 | * @param __FLAG__: specifies the flag to check. |
| emilmont | 77:869cf507173a | 329 | * This parameter can be one of the following values: |
| emilmont | 77:869cf507173a | 330 | * @arg I2S_FLAG_RXNE: Receive buffer not empty flag |
| emilmont | 77:869cf507173a | 331 | * @arg I2S_FLAG_TXE: Transmit buffer empty flag |
| emilmont | 77:869cf507173a | 332 | * @arg I2S_FLAG_UDR: Underrun flag |
| emilmont | 77:869cf507173a | 333 | * @arg I2S_FLAG_OVR: Overrun flag |
| emilmont | 77:869cf507173a | 334 | * @arg I2S_FLAG_FRE: Frame error flag |
| emilmont | 77:869cf507173a | 335 | * @arg I2S_FLAG_CHSIDE: Channel Side flag |
| emilmont | 77:869cf507173a | 336 | * @arg I2S_FLAG_BSY: Busy flag |
| emilmont | 77:869cf507173a | 337 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| emilmont | 77:869cf507173a | 338 | */ |
| emilmont | 77:869cf507173a | 339 | #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
| emilmont | 77:869cf507173a | 340 | |
| emilmont | 77:869cf507173a | 341 | /** @brief Clears the I2S OVR pending flag. |
| emilmont | 77:869cf507173a | 342 | * @param __HANDLE__: specifies the I2S Handle. |
| emilmont | 77:869cf507173a | 343 | * @retval None |
| emilmont | 77:869cf507173a | 344 | */ |
| Kojto | 99:dbbf35b96557 | 345 | #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) \ |
| Kojto | 99:dbbf35b96557 | 346 | do{ \ |
| Kojto | 99:dbbf35b96557 | 347 | __IO uint32_t tmpreg; \ |
| Kojto | 99:dbbf35b96557 | 348 | tmpreg = (__HANDLE__)->Instance->DR; \ |
| Kojto | 99:dbbf35b96557 | 349 | tmpreg = (__HANDLE__)->Instance->SR; \ |
| Kojto | 99:dbbf35b96557 | 350 | UNUSED(tmpreg); \ |
| Kojto | 99:dbbf35b96557 | 351 | } while(0) |
| Kojto | 99:dbbf35b96557 | 352 | |
| emilmont | 77:869cf507173a | 353 | /** @brief Clears the I2S UDR pending flag. |
| emilmont | 77:869cf507173a | 354 | * @param __HANDLE__: specifies the I2S Handle. |
| emilmont | 77:869cf507173a | 355 | * @retval None |
| emilmont | 77:869cf507173a | 356 | */ |
| Kojto | 99:dbbf35b96557 | 357 | #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) \ |
| Kojto | 99:dbbf35b96557 | 358 | do{ \ |
| Kojto | 99:dbbf35b96557 | 359 | __IO uint32_t tmpreg; \ |
| Kojto | 99:dbbf35b96557 | 360 | tmpreg = (__HANDLE__)->Instance->SR; \ |
| Kojto | 99:dbbf35b96557 | 361 | UNUSED(tmpreg); \ |
| Kojto | 99:dbbf35b96557 | 362 | } while(0) |
| Kojto | 99:dbbf35b96557 | 363 | /** |
| Kojto | 99:dbbf35b96557 | 364 | * @} |
| Kojto | 99:dbbf35b96557 | 365 | */ |
| Kojto | 99:dbbf35b96557 | 366 | |
| emilmont | 77:869cf507173a | 367 | /* Include I2S Extension module */ |
| emilmont | 77:869cf507173a | 368 | #include "stm32f4xx_hal_i2s_ex.h" |
| emilmont | 77:869cf507173a | 369 | |
| emilmont | 77:869cf507173a | 370 | /* Exported functions --------------------------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 371 | /** @addtogroup I2S_Exported_Functions |
| Kojto | 99:dbbf35b96557 | 372 | * @{ |
| Kojto | 99:dbbf35b96557 | 373 | */ |
| emilmont | 77:869cf507173a | 374 | |
| Kojto | 99:dbbf35b96557 | 375 | /** @addtogroup I2S_Exported_Functions_Group1 |
| Kojto | 99:dbbf35b96557 | 376 | * @{ |
| Kojto | 99:dbbf35b96557 | 377 | */ |
| emilmont | 77:869cf507173a | 378 | /* Initialization/de-initialization functions **********************************/ |
| emilmont | 77:869cf507173a | 379 | HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); |
| emilmont | 77:869cf507173a | 380 | HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s); |
| emilmont | 77:869cf507173a | 381 | void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); |
| emilmont | 77:869cf507173a | 382 | void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); |
| Kojto | 99:dbbf35b96557 | 383 | /** |
| Kojto | 99:dbbf35b96557 | 384 | * @} |
| Kojto | 99:dbbf35b96557 | 385 | */ |
| emilmont | 77:869cf507173a | 386 | |
| Kojto | 99:dbbf35b96557 | 387 | /** @addtogroup I2S_Exported_Functions_Group2 |
| Kojto | 99:dbbf35b96557 | 388 | * @{ |
| Kojto | 99:dbbf35b96557 | 389 | */ |
| emilmont | 77:869cf507173a | 390 | /* I/O operation functions *****************************************************/ |
| Kojto | 99:dbbf35b96557 | 391 | /* Blocking mode: Polling */ |
| emilmont | 77:869cf507173a | 392 | HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
| emilmont | 77:869cf507173a | 393 | HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
| emilmont | 77:869cf507173a | 394 | |
| emilmont | 77:869cf507173a | 395 | /* Non-Blocking mode: Interrupt */ |
| emilmont | 77:869cf507173a | 396 | HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| emilmont | 77:869cf507173a | 397 | HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| emilmont | 77:869cf507173a | 398 | void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); |
| emilmont | 77:869cf507173a | 399 | |
| emilmont | 77:869cf507173a | 400 | /* Non-Blocking mode: DMA */ |
| emilmont | 77:869cf507173a | 401 | HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| emilmont | 77:869cf507173a | 402 | HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| emilmont | 77:869cf507173a | 403 | |
| emilmont | 77:869cf507173a | 404 | HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); |
| emilmont | 77:869cf507173a | 405 | HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); |
| emilmont | 77:869cf507173a | 406 | HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); |
| emilmont | 77:869cf507173a | 407 | |
| emilmont | 77:869cf507173a | 408 | /* Peripheral Control and State functions **************************************/ |
| emilmont | 77:869cf507173a | 409 | HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); |
| Kojto | 99:dbbf35b96557 | 410 | uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); |
| emilmont | 77:869cf507173a | 411 | |
| emilmont | 77:869cf507173a | 412 | /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ |
| bogdanm | 81:7d30d6019079 | 413 | void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
| bogdanm | 81:7d30d6019079 | 414 | void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); |
| bogdanm | 81:7d30d6019079 | 415 | void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
| bogdanm | 81:7d30d6019079 | 416 | void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); |
| bogdanm | 81:7d30d6019079 | 417 | void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); |
| Kojto | 99:dbbf35b96557 | 418 | /** |
| Kojto | 99:dbbf35b96557 | 419 | * @} |
| Kojto | 99:dbbf35b96557 | 420 | */ |
| emilmont | 77:869cf507173a | 421 | |
| Kojto | 99:dbbf35b96557 | 422 | /** |
| Kojto | 99:dbbf35b96557 | 423 | * @} |
| Kojto | 99:dbbf35b96557 | 424 | */ |
| Kojto | 99:dbbf35b96557 | 425 | |
| Kojto | 99:dbbf35b96557 | 426 | /* Private types -------------------------------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 427 | /* Private variables ---------------------------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 428 | /* Private constants ---------------------------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 429 | /** @defgroup I2S_Private_Constants I2S Private Constants |
| Kojto | 99:dbbf35b96557 | 430 | * @{ |
| Kojto | 99:dbbf35b96557 | 431 | */ |
| Kojto | 99:dbbf35b96557 | 432 | |
| Kojto | 99:dbbf35b96557 | 433 | /** |
| Kojto | 99:dbbf35b96557 | 434 | * @} |
| Kojto | 99:dbbf35b96557 | 435 | */ |
| Kojto | 99:dbbf35b96557 | 436 | |
| Kojto | 99:dbbf35b96557 | 437 | /* Private macros ------------------------------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 438 | /** @defgroup I2S_Private_Macros I2S Private Macros |
| Kojto | 99:dbbf35b96557 | 439 | * @{ |
| Kojto | 99:dbbf35b96557 | 440 | */ |
| Kojto | 99:dbbf35b96557 | 441 | #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \ |
| Kojto | 99:dbbf35b96557 | 442 | ((CLOCK) == I2S_CLOCK_PLLR) ||\ |
| Kojto | 99:dbbf35b96557 | 443 | ((CLOCK) == I2S_CLOCK_PLLSRC) ||\ |
| Kojto | 99:dbbf35b96557 | 444 | ((CLOCK) == I2S_CLOCK_PLL)) |
| Kojto | 99:dbbf35b96557 | 445 | |
| Kojto | 99:dbbf35b96557 | 446 | #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ |
| Kojto | 99:dbbf35b96557 | 447 | ((MODE) == I2S_MODE_SLAVE_RX) || \ |
| Kojto | 99:dbbf35b96557 | 448 | ((MODE) == I2S_MODE_MASTER_TX) || \ |
| Kojto | 99:dbbf35b96557 | 449 | ((MODE) == I2S_MODE_MASTER_RX)) |
| Kojto | 99:dbbf35b96557 | 450 | |
| Kojto | 99:dbbf35b96557 | 451 | #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \ |
| Kojto | 99:dbbf35b96557 | 452 | ((STANDARD) == I2S_STANDARD_MSB) || \ |
| Kojto | 99:dbbf35b96557 | 453 | ((STANDARD) == I2S_STANDARD_LSB) || \ |
| Kojto | 99:dbbf35b96557 | 454 | ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \ |
| Kojto | 99:dbbf35b96557 | 455 | ((STANDARD) == I2S_STANDARD_PCM_LONG)) |
| Kojto | 99:dbbf35b96557 | 456 | |
| Kojto | 99:dbbf35b96557 | 457 | #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \ |
| Kojto | 99:dbbf35b96557 | 458 | ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \ |
| Kojto | 99:dbbf35b96557 | 459 | ((FORMAT) == I2S_DATAFORMAT_24B) || \ |
| Kojto | 99:dbbf35b96557 | 460 | ((FORMAT) == I2S_DATAFORMAT_32B)) |
| Kojto | 99:dbbf35b96557 | 461 | |
| Kojto | 99:dbbf35b96557 | 462 | #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \ |
| Kojto | 99:dbbf35b96557 | 463 | ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE)) |
| Kojto | 99:dbbf35b96557 | 464 | |
| Kojto | 99:dbbf35b96557 | 465 | #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \ |
| Kojto | 99:dbbf35b96557 | 466 | ((FREQ) <= I2S_AUDIOFREQ_192K)) || \ |
| Kojto | 99:dbbf35b96557 | 467 | ((FREQ) == I2S_AUDIOFREQ_DEFAULT)) |
| Kojto | 99:dbbf35b96557 | 468 | |
| Kojto | 99:dbbf35b96557 | 469 | #define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \ |
| Kojto | 99:dbbf35b96557 | 470 | ((MODE) == I2S_FULLDUPLEXMODE_ENABLE)) |
| Kojto | 99:dbbf35b96557 | 471 | |
| Kojto | 99:dbbf35b96557 | 472 | #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \ |
| Kojto | 99:dbbf35b96557 | 473 | ((CPOL) == I2S_CPOL_HIGH)) |
| Kojto | 99:dbbf35b96557 | 474 | |
| Kojto | 99:dbbf35b96557 | 475 | #define I2SxEXT(__INSTANCE__) ((__INSTANCE__) == (SPI2)? (SPI_TypeDef *)(I2S2ext_BASE): (SPI_TypeDef *)(I2S3ext_BASE)) |
| Kojto | 99:dbbf35b96557 | 476 | /** |
| Kojto | 99:dbbf35b96557 | 477 | * @} |
| Kojto | 99:dbbf35b96557 | 478 | */ |
| Kojto | 99:dbbf35b96557 | 479 | |
| Kojto | 99:dbbf35b96557 | 480 | /* Private functions ---------------------------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 481 | /** @defgroup I2S_Private_Functions I2S Private Functions |
| Kojto | 99:dbbf35b96557 | 482 | * @{ |
| Kojto | 99:dbbf35b96557 | 483 | */ |
| emilmont | 77:869cf507173a | 484 | void I2S_DMATxCplt(DMA_HandleTypeDef *hdma); |
| emilmont | 77:869cf507173a | 485 | void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma); |
| emilmont | 77:869cf507173a | 486 | void I2S_DMARxCplt(DMA_HandleTypeDef *hdma); |
| emilmont | 77:869cf507173a | 487 | void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma); |
| emilmont | 77:869cf507173a | 488 | void I2S_DMAError(DMA_HandleTypeDef *hdma); |
| emilmont | 77:869cf507173a | 489 | HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout); |
| Kojto | 99:dbbf35b96557 | 490 | HAL_StatusTypeDef I2S_Transmit_IT(I2S_HandleTypeDef *hi2s); |
| Kojto | 99:dbbf35b96557 | 491 | HAL_StatusTypeDef I2S_Receive_IT(I2S_HandleTypeDef *hi2s); |
| Kojto | 99:dbbf35b96557 | 492 | /** |
| Kojto | 99:dbbf35b96557 | 493 | * @} |
| Kojto | 99:dbbf35b96557 | 494 | */ |
| emilmont | 77:869cf507173a | 495 | |
| emilmont | 77:869cf507173a | 496 | /** |
| emilmont | 77:869cf507173a | 497 | * @} |
| emilmont | 77:869cf507173a | 498 | */ |
| emilmont | 77:869cf507173a | 499 | |
| emilmont | 77:869cf507173a | 500 | /** |
| emilmont | 77:869cf507173a | 501 | * @} |
| Kojto | 99:dbbf35b96557 | 502 | */ |
| emilmont | 77:869cf507173a | 503 | |
| emilmont | 77:869cf507173a | 504 | #ifdef __cplusplus |
| emilmont | 77:869cf507173a | 505 | } |
| emilmont | 77:869cf507173a | 506 | #endif |
| emilmont | 77:869cf507173a | 507 | |
| emilmont | 77:869cf507173a | 508 | |
| emilmont | 77:869cf507173a | 509 | #endif /* __STM32F4xx_HAL_I2S_H */ |
| emilmont | 77:869cf507173a | 510 | |
| emilmont | 77:869cf507173a | 511 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |