Ricardo Benitez / mbed

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TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_uart.h@99:dbbf35b96557, 2015-05-13 (annotated)

Committer:
Kojto
Date:
Wed May 13 08:08:21 2015 +0200
Revision:
99:dbbf35b96557
Parent:
92:4fc01daae5a5
Child:
106:ba1f97679dad
Release 99 of the mbed library



Changes:

 - new targets - MAXWSNENV, DISCO_L053C8

 - STM32F4xx - ST Cube driver

 - KSDK mcu - SPI timing fix

 - Nordic - update to softdevice s130

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_uart.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
Kojto 99:dbbf35b96557 5 * @version V1.3.0
Kojto 99:dbbf35b96557 6 * @date 09-March-2015
bogdanm 92:4fc01daae5a5 7 * @brief Header file of UART HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
Kojto 99:dbbf35b96557 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_UART_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_UART_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 47 #include "stm32f4xx_hal_def.h"
bogdanm 92:4fc01daae5a5 48
bogdanm 92:4fc01daae5a5 49 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 50 * @{
bogdanm 92:4fc01daae5a5 51 */
bogdanm 92:4fc01daae5a5 52
bogdanm 92:4fc01daae5a5 53 /** @addtogroup UART
bogdanm 92:4fc01daae5a5 54 * @{
bogdanm 92:4fc01daae5a5 55 */
bogdanm 92:4fc01daae5a5 56
bogdanm 92:4fc01daae5a5 57 /* Exported types ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 58 /** @defgroup UART_Exported_Types UART Exported Types
Kojto 99:dbbf35b96557 59 * @{
Kojto 99:dbbf35b96557 60 */
bogdanm 92:4fc01daae5a5 61
bogdanm 92:4fc01daae5a5 62 /**
bogdanm 92:4fc01daae5a5 63 * @brief UART Init Structure definition
bogdanm 92:4fc01daae5a5 64 */
bogdanm 92:4fc01daae5a5 65 typedef struct
bogdanm 92:4fc01daae5a5 66 {
bogdanm 92:4fc01daae5a5 67 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
bogdanm 92:4fc01daae5a5 68 The baud rate is computed using the following formula:
bogdanm 92:4fc01daae5a5 69 - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate)))
bogdanm 92:4fc01daae5a5 70 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5
bogdanm 92:4fc01daae5a5 71 Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */
bogdanm 92:4fc01daae5a5 72
bogdanm 92:4fc01daae5a5 73 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
bogdanm 92:4fc01daae5a5 74 This parameter can be a value of @ref UART_Word_Length */
bogdanm 92:4fc01daae5a5 75
bogdanm 92:4fc01daae5a5 76 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
bogdanm 92:4fc01daae5a5 77 This parameter can be a value of @ref UART_Stop_Bits */
bogdanm 92:4fc01daae5a5 78
bogdanm 92:4fc01daae5a5 79 uint32_t Parity; /*!< Specifies the parity mode.
bogdanm 92:4fc01daae5a5 80 This parameter can be a value of @ref UART_Parity
bogdanm 92:4fc01daae5a5 81 @note When parity is enabled, the computed parity is inserted
bogdanm 92:4fc01daae5a5 82 at the MSB position of the transmitted data (9th bit when
bogdanm 92:4fc01daae5a5 83 the word length is set to 9 data bits; 8th bit when the
bogdanm 92:4fc01daae5a5 84 word length is set to 8 data bits). */
bogdanm 92:4fc01daae5a5 85
Kojto 99:dbbf35b96557 86 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
bogdanm 92:4fc01daae5a5 87 This parameter can be a value of @ref UART_Mode */
bogdanm 92:4fc01daae5a5 88
Kojto 99:dbbf35b96557 89 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
bogdanm 92:4fc01daae5a5 90 or disabled.
bogdanm 92:4fc01daae5a5 91 This parameter can be a value of @ref UART_Hardware_Flow_Control */
bogdanm 92:4fc01daae5a5 92
Kojto 99:dbbf35b96557 93 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
bogdanm 92:4fc01daae5a5 94 This parameter can be a value of @ref UART_Over_Sampling */
bogdanm 92:4fc01daae5a5 95 }UART_InitTypeDef;
bogdanm 92:4fc01daae5a5 96
bogdanm 92:4fc01daae5a5 97 /**
bogdanm 92:4fc01daae5a5 98 * @brief HAL UART State structures definition
bogdanm 92:4fc01daae5a5 99 */
bogdanm 92:4fc01daae5a5 100 typedef enum
bogdanm 92:4fc01daae5a5 101 {
bogdanm 92:4fc01daae5a5 102 HAL_UART_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */
bogdanm 92:4fc01daae5a5 103 HAL_UART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
bogdanm 92:4fc01daae5a5 104 HAL_UART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
bogdanm 92:4fc01daae5a5 105 HAL_UART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
bogdanm 92:4fc01daae5a5 106 HAL_UART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
bogdanm 92:4fc01daae5a5 107 HAL_UART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
bogdanm 92:4fc01daae5a5 108 HAL_UART_STATE_TIMEOUT = 0x03, /*!< Timeout state */
bogdanm 92:4fc01daae5a5 109 HAL_UART_STATE_ERROR = 0x04 /*!< Error */
bogdanm 92:4fc01daae5a5 110 }HAL_UART_StateTypeDef;
bogdanm 92:4fc01daae5a5 111
bogdanm 92:4fc01daae5a5 112 /**
bogdanm 92:4fc01daae5a5 113 * @brief UART handle Structure definition
bogdanm 92:4fc01daae5a5 114 */
bogdanm 92:4fc01daae5a5 115 typedef struct
bogdanm 92:4fc01daae5a5 116 {
Kojto 99:dbbf35b96557 117 USART_TypeDef *Instance; /*!< UART registers base address */
bogdanm 92:4fc01daae5a5 118
Kojto 99:dbbf35b96557 119 UART_InitTypeDef Init; /*!< UART communication parameters */
bogdanm 92:4fc01daae5a5 120
Kojto 99:dbbf35b96557 121 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
bogdanm 92:4fc01daae5a5 122
Kojto 99:dbbf35b96557 123 uint16_t TxXferSize; /*!< UART Tx Transfer size */
bogdanm 92:4fc01daae5a5 124
Kojto 99:dbbf35b96557 125 uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
bogdanm 92:4fc01daae5a5 126
Kojto 99:dbbf35b96557 127 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
bogdanm 92:4fc01daae5a5 128
Kojto 99:dbbf35b96557 129 uint16_t RxXferSize; /*!< UART Rx Transfer size */
bogdanm 92:4fc01daae5a5 130
Kojto 99:dbbf35b96557 131 uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
bogdanm 92:4fc01daae5a5 132
Kojto 99:dbbf35b96557 133 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
bogdanm 92:4fc01daae5a5 134
Kojto 99:dbbf35b96557 135 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
bogdanm 92:4fc01daae5a5 136
Kojto 99:dbbf35b96557 137 HAL_LockTypeDef Lock; /*!< Locking object */
bogdanm 92:4fc01daae5a5 138
Kojto 99:dbbf35b96557 139 __IO HAL_UART_StateTypeDef State; /*!< UART communication state */
bogdanm 92:4fc01daae5a5 140
Kojto 99:dbbf35b96557 141 __IO uint32_t ErrorCode; /*!< UART Error code */
Kojto 99:dbbf35b96557 142
bogdanm 92:4fc01daae5a5 143 }UART_HandleTypeDef;
Kojto 99:dbbf35b96557 144 /**
Kojto 99:dbbf35b96557 145 * @}
Kojto 99:dbbf35b96557 146 */
bogdanm 92:4fc01daae5a5 147
bogdanm 92:4fc01daae5a5 148 /* Exported constants --------------------------------------------------------*/
Kojto 99:dbbf35b96557 149 /** @defgroup UART_Exported_Constants UART Exported constants
bogdanm 92:4fc01daae5a5 150 * @{
bogdanm 92:4fc01daae5a5 151 */
Kojto 99:dbbf35b96557 152
Kojto 99:dbbf35b96557 153 /** @defgroup UART_Error_Code UART Error Code
Kojto 99:dbbf35b96557 154 * @brief UART Error Code
Kojto 99:dbbf35b96557 155 * @{
Kojto 99:dbbf35b96557 156 */
Kojto 99:dbbf35b96557 157 #define HAL_UART_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
Kojto 99:dbbf35b96557 158 #define HAL_UART_ERROR_PE ((uint32_t)0x00000001) /*!< Parity error */
Kojto 99:dbbf35b96557 159 #define HAL_UART_ERROR_NE ((uint32_t)0x00000002) /*!< Noise error */
Kojto 99:dbbf35b96557 160 #define HAL_UART_ERROR_FE ((uint32_t)0x00000004) /*!< Frame error */
Kojto 99:dbbf35b96557 161 #define HAL_UART_ERROR_ORE ((uint32_t)0x00000008) /*!< Overrun error */
Kojto 99:dbbf35b96557 162 #define HAL_UART_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */
Kojto 99:dbbf35b96557 163 /**
Kojto 99:dbbf35b96557 164 * @}
Kojto 99:dbbf35b96557 165 */
Kojto 99:dbbf35b96557 166
Kojto 99:dbbf35b96557 167 /** @defgroup UART_Word_Length UART Word Length
bogdanm 92:4fc01daae5a5 168 * @{
bogdanm 92:4fc01daae5a5 169 */
bogdanm 92:4fc01daae5a5 170 #define UART_WORDLENGTH_8B ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 171 #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
bogdanm 92:4fc01daae5a5 172 /**
bogdanm 92:4fc01daae5a5 173 * @}
bogdanm 92:4fc01daae5a5 174 */
bogdanm 92:4fc01daae5a5 175
Kojto 99:dbbf35b96557 176 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
bogdanm 92:4fc01daae5a5 177 * @{
bogdanm 92:4fc01daae5a5 178 */
bogdanm 92:4fc01daae5a5 179 #define UART_STOPBITS_1 ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 180 #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
bogdanm 92:4fc01daae5a5 181 /**
bogdanm 92:4fc01daae5a5 182 * @}
bogdanm 92:4fc01daae5a5 183 */
bogdanm 92:4fc01daae5a5 184
Kojto 99:dbbf35b96557 185 /** @defgroup UART_Parity UART Parity
bogdanm 92:4fc01daae5a5 186 * @{
bogdanm 92:4fc01daae5a5 187 */
bogdanm 92:4fc01daae5a5 188 #define UART_PARITY_NONE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 189 #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
bogdanm 92:4fc01daae5a5 190 #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
bogdanm 92:4fc01daae5a5 191 /**
bogdanm 92:4fc01daae5a5 192 * @}
bogdanm 92:4fc01daae5a5 193 */
bogdanm 92:4fc01daae5a5 194
Kojto 99:dbbf35b96557 195 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
bogdanm 92:4fc01daae5a5 196 * @{
bogdanm 92:4fc01daae5a5 197 */
bogdanm 92:4fc01daae5a5 198 #define UART_HWCONTROL_NONE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 199 #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
bogdanm 92:4fc01daae5a5 200 #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
bogdanm 92:4fc01daae5a5 201 #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
bogdanm 92:4fc01daae5a5 202 /**
bogdanm 92:4fc01daae5a5 203 * @}
bogdanm 92:4fc01daae5a5 204 */
bogdanm 92:4fc01daae5a5 205
Kojto 99:dbbf35b96557 206 /** @defgroup UART_Mode UART Transfer Mode
bogdanm 92:4fc01daae5a5 207 * @{
bogdanm 92:4fc01daae5a5 208 */
bogdanm 92:4fc01daae5a5 209 #define UART_MODE_RX ((uint32_t)USART_CR1_RE)
bogdanm 92:4fc01daae5a5 210 #define UART_MODE_TX ((uint32_t)USART_CR1_TE)
bogdanm 92:4fc01daae5a5 211 #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
bogdanm 92:4fc01daae5a5 212 /**
bogdanm 92:4fc01daae5a5 213 * @}
bogdanm 92:4fc01daae5a5 214 */
bogdanm 92:4fc01daae5a5 215
Kojto 99:dbbf35b96557 216 /** @defgroup UART_State UART State
bogdanm 92:4fc01daae5a5 217 * @{
bogdanm 92:4fc01daae5a5 218 */
bogdanm 92:4fc01daae5a5 219 #define UART_STATE_DISABLE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 220 #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
bogdanm 92:4fc01daae5a5 221 /**
bogdanm 92:4fc01daae5a5 222 * @}
bogdanm 92:4fc01daae5a5 223 */
bogdanm 92:4fc01daae5a5 224
Kojto 99:dbbf35b96557 225 /** @defgroup UART_Over_Sampling UART Over Sampling
bogdanm 92:4fc01daae5a5 226 * @{
bogdanm 92:4fc01daae5a5 227 */
bogdanm 92:4fc01daae5a5 228 #define UART_OVERSAMPLING_16 ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 229 #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
bogdanm 92:4fc01daae5a5 230 /**
bogdanm 92:4fc01daae5a5 231 * @}
bogdanm 92:4fc01daae5a5 232 */
bogdanm 92:4fc01daae5a5 233
Kojto 99:dbbf35b96557 234 /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length
bogdanm 92:4fc01daae5a5 235 * @{
bogdanm 92:4fc01daae5a5 236 */
bogdanm 92:4fc01daae5a5 237 #define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 238 #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)0x00000020)
bogdanm 92:4fc01daae5a5 239 /**
bogdanm 92:4fc01daae5a5 240 * @}
bogdanm 92:4fc01daae5a5 241 */
bogdanm 92:4fc01daae5a5 242
Kojto 99:dbbf35b96557 243 /** @defgroup UART_WakeUp_functions UART Wakeup Functions
bogdanm 92:4fc01daae5a5 244 * @{
bogdanm 92:4fc01daae5a5 245 */
Kojto 99:dbbf35b96557 246 #define UART_WAKEUPMETHOD_IDLELINE ((uint32_t)0x00000000)
Kojto 99:dbbf35b96557 247 #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)0x00000800)
bogdanm 92:4fc01daae5a5 248 /**
bogdanm 92:4fc01daae5a5 249 * @}
bogdanm 92:4fc01daae5a5 250 */
bogdanm 92:4fc01daae5a5 251
Kojto 99:dbbf35b96557 252 /** @defgroup UART_Flags UART FLags
bogdanm 92:4fc01daae5a5 253 * Elements values convention: 0xXXXX
bogdanm 92:4fc01daae5a5 254 * - 0xXXXX : Flag mask in the SR register
bogdanm 92:4fc01daae5a5 255 * @{
bogdanm 92:4fc01daae5a5 256 */
Kojto 99:dbbf35b96557 257 #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS)
Kojto 99:dbbf35b96557 258 #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD)
Kojto 99:dbbf35b96557 259 #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE)
Kojto 99:dbbf35b96557 260 #define UART_FLAG_TC ((uint32_t)USART_SR_TC)
Kojto 99:dbbf35b96557 261 #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
Kojto 99:dbbf35b96557 262 #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
Kojto 99:dbbf35b96557 263 #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE)
Kojto 99:dbbf35b96557 264 #define UART_FLAG_NE ((uint32_t)USART_SR_NE)
Kojto 99:dbbf35b96557 265 #define UART_FLAG_FE ((uint32_t)USART_SR_FE)
Kojto 99:dbbf35b96557 266 #define UART_FLAG_PE ((uint32_t)USART_SR_PE)
bogdanm 92:4fc01daae5a5 267 /**
bogdanm 92:4fc01daae5a5 268 * @}
bogdanm 92:4fc01daae5a5 269 */
bogdanm 92:4fc01daae5a5 270
Kojto 99:dbbf35b96557 271 /** @defgroup UART_Interrupt_definition UART Interrupt Definitions
bogdanm 92:4fc01daae5a5 272 * Elements values convention: 0xY000XXXX
Kojto 99:dbbf35b96557 273 * - XXXX : Interrupt mask (16 bits) in the Y register
bogdanm 92:4fc01daae5a5 274 * - Y : Interrupt source register (2bits)
Kojto 99:dbbf35b96557 275 * - 0001: CR1 register
Kojto 99:dbbf35b96557 276 * - 0010: CR2 register
Kojto 99:dbbf35b96557 277 * - 0011: CR3 register
bogdanm 92:4fc01daae5a5 278 *
bogdanm 92:4fc01daae5a5 279 * @{
Kojto 99:dbbf35b96557 280 */
bogdanm 92:4fc01daae5a5 281
Kojto 99:dbbf35b96557 282 #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_PEIE))
Kojto 99:dbbf35b96557 283 #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_TXEIE))
Kojto 99:dbbf35b96557 284 #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_TCIE))
Kojto 99:dbbf35b96557 285 #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_RXNEIE))
Kojto 99:dbbf35b96557 286 #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_IDLEIE))
bogdanm 92:4fc01daae5a5 287
Kojto 99:dbbf35b96557 288 #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28 | USART_CR2_LBDIE))
bogdanm 92:4fc01daae5a5 289
Kojto 99:dbbf35b96557 290 #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28 | USART_CR3_CTSIE))
Kojto 99:dbbf35b96557 291 #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28 | USART_CR3_EIE))
bogdanm 92:4fc01daae5a5 292 /**
bogdanm 92:4fc01daae5a5 293 * @}
bogdanm 92:4fc01daae5a5 294 */
bogdanm 92:4fc01daae5a5 295
bogdanm 92:4fc01daae5a5 296 /**
bogdanm 92:4fc01daae5a5 297 * @}
bogdanm 92:4fc01daae5a5 298 */
bogdanm 92:4fc01daae5a5 299
bogdanm 92:4fc01daae5a5 300 /* Exported macro ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 301 /** @defgroup UART_Exported_Macros UART Exported Macros
Kojto 99:dbbf35b96557 302 * @{
Kojto 99:dbbf35b96557 303 */
bogdanm 92:4fc01daae5a5 304
bogdanm 92:4fc01daae5a5 305 /** @brief Reset UART handle state
bogdanm 92:4fc01daae5a5 306 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 307 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 308 * UART peripheral.
bogdanm 92:4fc01daae5a5 309 * @retval None
bogdanm 92:4fc01daae5a5 310 */
bogdanm 92:4fc01daae5a5 311 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_UART_STATE_RESET)
bogdanm 92:4fc01daae5a5 312
Kojto 99:dbbf35b96557 313 /** @brief Flushes the UART DR register
bogdanm 92:4fc01daae5a5 314 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 315 */
bogdanm 92:4fc01daae5a5 316 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
bogdanm 92:4fc01daae5a5 317
bogdanm 92:4fc01daae5a5 318 /** @brief Checks whether the specified UART flag is set or not.
bogdanm 92:4fc01daae5a5 319 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 320 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 321 * UART peripheral.
bogdanm 92:4fc01daae5a5 322 * @param __FLAG__: specifies the flag to check.
bogdanm 92:4fc01daae5a5 323 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 324 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
bogdanm 92:4fc01daae5a5 325 * @arg UART_FLAG_LBD: LIN Break detection flag
bogdanm 92:4fc01daae5a5 326 * @arg UART_FLAG_TXE: Transmit data register empty flag
bogdanm 92:4fc01daae5a5 327 * @arg UART_FLAG_TC: Transmission Complete flag
bogdanm 92:4fc01daae5a5 328 * @arg UART_FLAG_RXNE: Receive data register not empty flag
bogdanm 92:4fc01daae5a5 329 * @arg UART_FLAG_IDLE: Idle Line detection flag
Kojto 99:dbbf35b96557 330 * @arg UART_FLAG_ORE: Overrun Error flag
bogdanm 92:4fc01daae5a5 331 * @arg UART_FLAG_NE: Noise Error flag
bogdanm 92:4fc01daae5a5 332 * @arg UART_FLAG_FE: Framing Error flag
bogdanm 92:4fc01daae5a5 333 * @arg UART_FLAG_PE: Parity Error flag
bogdanm 92:4fc01daae5a5 334 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 92:4fc01daae5a5 335 */
bogdanm 92:4fc01daae5a5 336
bogdanm 92:4fc01daae5a5 337 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
bogdanm 92:4fc01daae5a5 338
bogdanm 92:4fc01daae5a5 339 /** @brief Clears the specified UART pending flag.
bogdanm 92:4fc01daae5a5 340 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 341 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 342 * UART peripheral.
bogdanm 92:4fc01daae5a5 343 * @param __FLAG__: specifies the flag to check.
bogdanm 92:4fc01daae5a5 344 * This parameter can be any combination of the following values:
bogdanm 92:4fc01daae5a5 345 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5).
bogdanm 92:4fc01daae5a5 346 * @arg UART_FLAG_LBD: LIN Break detection flag.
bogdanm 92:4fc01daae5a5 347 * @arg UART_FLAG_TC: Transmission Complete flag.
bogdanm 92:4fc01daae5a5 348 * @arg UART_FLAG_RXNE: Receive data register not empty flag.
bogdanm 92:4fc01daae5a5 349 *
Kojto 99:dbbf35b96557 350 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun
bogdanm 92:4fc01daae5a5 351 * error) and IDLE (Idle line detected) flags are cleared by software
bogdanm 92:4fc01daae5a5 352 * sequence: a read operation to USART_SR register followed by a read
bogdanm 92:4fc01daae5a5 353 * operation to USART_DR register.
bogdanm 92:4fc01daae5a5 354 * @note RXNE flag can be also cleared by a read to the USART_DR register.
bogdanm 92:4fc01daae5a5 355 * @note TC flag can be also cleared by software sequence: a read operation to
bogdanm 92:4fc01daae5a5 356 * USART_SR register followed by a write operation to USART_DR register.
bogdanm 92:4fc01daae5a5 357 * @note TXE flag is cleared only by a write to the USART_DR register.
bogdanm 92:4fc01daae5a5 358 *
bogdanm 92:4fc01daae5a5 359 * @retval None
bogdanm 92:4fc01daae5a5 360 */
bogdanm 92:4fc01daae5a5 361 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
bogdanm 92:4fc01daae5a5 362
bogdanm 92:4fc01daae5a5 363 /** @brief Clear the UART PE pending flag.
bogdanm 92:4fc01daae5a5 364 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 365 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 366 * UART peripheral.
bogdanm 92:4fc01daae5a5 367 * @retval None
bogdanm 92:4fc01daae5a5 368 */
Kojto 99:dbbf35b96557 369 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \
Kojto 99:dbbf35b96557 370 do{ \
Kojto 99:dbbf35b96557 371 __IO uint32_t tmpreg; \
Kojto 99:dbbf35b96557 372 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 99:dbbf35b96557 373 tmpreg = (__HANDLE__)->Instance->DR; \
Kojto 99:dbbf35b96557 374 UNUSED(tmpreg); \
Kojto 99:dbbf35b96557 375 } while(0)
Kojto 99:dbbf35b96557 376
bogdanm 92:4fc01daae5a5 377 /** @brief Clear the UART FE pending flag.
bogdanm 92:4fc01daae5a5 378 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 379 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 380 * UART peripheral.
bogdanm 92:4fc01daae5a5 381 * @retval None
bogdanm 92:4fc01daae5a5 382 */
bogdanm 92:4fc01daae5a5 383 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
bogdanm 92:4fc01daae5a5 384
bogdanm 92:4fc01daae5a5 385 /** @brief Clear the UART NE pending flag.
bogdanm 92:4fc01daae5a5 386 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 387 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 388 * UART peripheral.
bogdanm 92:4fc01daae5a5 389 * @retval None
bogdanm 92:4fc01daae5a5 390 */
bogdanm 92:4fc01daae5a5 391 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
bogdanm 92:4fc01daae5a5 392
bogdanm 92:4fc01daae5a5 393 /** @brief Clear the UART ORE pending flag.
bogdanm 92:4fc01daae5a5 394 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 395 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 396 * UART peripheral.
bogdanm 92:4fc01daae5a5 397 * @retval None
bogdanm 92:4fc01daae5a5 398 */
bogdanm 92:4fc01daae5a5 399 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
bogdanm 92:4fc01daae5a5 400
bogdanm 92:4fc01daae5a5 401 /** @brief Clear the UART IDLE pending flag.
bogdanm 92:4fc01daae5a5 402 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 403 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 404 * UART peripheral.
bogdanm 92:4fc01daae5a5 405 * @retval None
bogdanm 92:4fc01daae5a5 406 */
bogdanm 92:4fc01daae5a5 407 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
bogdanm 92:4fc01daae5a5 408
Kojto 99:dbbf35b96557 409 /** @brief Enable the specified UART interrupt.
bogdanm 92:4fc01daae5a5 410 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 411 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 412 * UART peripheral.
Kojto 99:dbbf35b96557 413 * @param __INTERRUPT__: specifies the UART interrupt source to enable.
bogdanm 92:4fc01daae5a5 414 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 415 * @arg UART_IT_CTS: CTS change interrupt
bogdanm 92:4fc01daae5a5 416 * @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm 92:4fc01daae5a5 417 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm 92:4fc01daae5a5 418 * @arg UART_IT_TC: Transmission complete interrupt
bogdanm 92:4fc01daae5a5 419 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm 92:4fc01daae5a5 420 * @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm 92:4fc01daae5a5 421 * @arg UART_IT_PE: Parity Error interrupt
bogdanm 92:4fc01daae5a5 422 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
bogdanm 92:4fc01daae5a5 423 * @retval None
bogdanm 92:4fc01daae5a5 424 */
bogdanm 92:4fc01daae5a5 425 #define UART_IT_MASK ((uint32_t)0x0000FFFF)
bogdanm 92:4fc01daae5a5 426 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \
bogdanm 92:4fc01daae5a5 427 (((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \
bogdanm 92:4fc01daae5a5 428 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK)))
Kojto 99:dbbf35b96557 429 /** @brief Disable the specified UART interrupt.
Kojto 99:dbbf35b96557 430 * @param __HANDLE__: specifies the UART Handle.
Kojto 99:dbbf35b96557 431 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
Kojto 99:dbbf35b96557 432 * UART peripheral.
Kojto 99:dbbf35b96557 433 * @param __INTERRUPT__: specifies the UART interrupt source to disable.
Kojto 99:dbbf35b96557 434 * This parameter can be one of the following values:
Kojto 99:dbbf35b96557 435 * @arg UART_IT_CTS: CTS change interrupt
Kojto 99:dbbf35b96557 436 * @arg UART_IT_LBD: LIN Break detection interrupt
Kojto 99:dbbf35b96557 437 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
Kojto 99:dbbf35b96557 438 * @arg UART_IT_TC: Transmission complete interrupt
Kojto 99:dbbf35b96557 439 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
Kojto 99:dbbf35b96557 440 * @arg UART_IT_IDLE: Idle line detection interrupt
Kojto 99:dbbf35b96557 441 * @arg UART_IT_PE: Parity Error interrupt
Kojto 99:dbbf35b96557 442 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
Kojto 99:dbbf35b96557 443 * @retval None
Kojto 99:dbbf35b96557 444 */
bogdanm 92:4fc01daae5a5 445 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
bogdanm 92:4fc01daae5a5 446 (((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
bogdanm 92:4fc01daae5a5 447 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK)))
bogdanm 92:4fc01daae5a5 448
bogdanm 92:4fc01daae5a5 449 /** @brief Checks whether the specified UART interrupt has occurred or not.
bogdanm 92:4fc01daae5a5 450 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 451 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 452 * UART peripheral.
bogdanm 92:4fc01daae5a5 453 * @param __IT__: specifies the UART interrupt source to check.
bogdanm 92:4fc01daae5a5 454 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 455 * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
bogdanm 92:4fc01daae5a5 456 * @arg UART_IT_LBD: LIN Break detection interrupt
bogdanm 92:4fc01daae5a5 457 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
bogdanm 92:4fc01daae5a5 458 * @arg UART_IT_TC: Transmission complete interrupt
bogdanm 92:4fc01daae5a5 459 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
bogdanm 92:4fc01daae5a5 460 * @arg UART_IT_IDLE: Idle line detection interrupt
bogdanm 92:4fc01daae5a5 461 * @arg USART_IT_ERR: Error interrupt
bogdanm 92:4fc01daae5a5 462 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 92:4fc01daae5a5 463 */
bogdanm 92:4fc01daae5a5 464 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28) == 1)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28) == 2)? \
bogdanm 92:4fc01daae5a5 465 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK))
bogdanm 92:4fc01daae5a5 466
bogdanm 92:4fc01daae5a5 467 /** @brief Enable CTS flow control
bogdanm 92:4fc01daae5a5 468 * This macro allows to enable CTS hardware flow control for a given UART instance,
bogdanm 92:4fc01daae5a5 469 * without need to call HAL_UART_Init() function.
bogdanm 92:4fc01daae5a5 470 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm 92:4fc01daae5a5 471 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
bogdanm 92:4fc01daae5a5 472 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm 92:4fc01daae5a5 473 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm 92:4fc01daae5a5 474 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm 92:4fc01daae5a5 475 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm 92:4fc01daae5a5 476 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 477 * The Handle Instance can be USART1, USART2 or LPUART.
bogdanm 92:4fc01daae5a5 478 * @retval None
bogdanm 92:4fc01daae5a5 479 */
bogdanm 92:4fc01daae5a5 480 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
bogdanm 92:4fc01daae5a5 481 do{ \
bogdanm 92:4fc01daae5a5 482 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
bogdanm 92:4fc01daae5a5 483 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
bogdanm 92:4fc01daae5a5 484 } while(0)
bogdanm 92:4fc01daae5a5 485
bogdanm 92:4fc01daae5a5 486 /** @brief Disable CTS flow control
bogdanm 92:4fc01daae5a5 487 * This macro allows to disable CTS hardware flow control for a given UART instance,
bogdanm 92:4fc01daae5a5 488 * without need to call HAL_UART_Init() function.
bogdanm 92:4fc01daae5a5 489 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm 92:4fc01daae5a5 490 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
bogdanm 92:4fc01daae5a5 491 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm 92:4fc01daae5a5 492 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm 92:4fc01daae5a5 493 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm 92:4fc01daae5a5 494 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm 92:4fc01daae5a5 495 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 496 * The Handle Instance can be USART1, USART2 or LPUART.
bogdanm 92:4fc01daae5a5 497 * @retval None
bogdanm 92:4fc01daae5a5 498 */
bogdanm 92:4fc01daae5a5 499 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
bogdanm 92:4fc01daae5a5 500 do{ \
bogdanm 92:4fc01daae5a5 501 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
bogdanm 92:4fc01daae5a5 502 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
bogdanm 92:4fc01daae5a5 503 } while(0)
bogdanm 92:4fc01daae5a5 504
bogdanm 92:4fc01daae5a5 505 /** @brief Enable RTS flow control
bogdanm 92:4fc01daae5a5 506 * This macro allows to enable RTS hardware flow control for a given UART instance,
bogdanm 92:4fc01daae5a5 507 * without need to call HAL_UART_Init() function.
bogdanm 92:4fc01daae5a5 508 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm 92:4fc01daae5a5 509 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
bogdanm 92:4fc01daae5a5 510 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm 92:4fc01daae5a5 511 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm 92:4fc01daae5a5 512 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm 92:4fc01daae5a5 513 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm 92:4fc01daae5a5 514 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 515 * The Handle Instance can be USART1, USART2 or LPUART.
bogdanm 92:4fc01daae5a5 516 * @retval None
bogdanm 92:4fc01daae5a5 517 */
bogdanm 92:4fc01daae5a5 518 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
bogdanm 92:4fc01daae5a5 519 do{ \
bogdanm 92:4fc01daae5a5 520 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
bogdanm 92:4fc01daae5a5 521 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
bogdanm 92:4fc01daae5a5 522 } while(0)
bogdanm 92:4fc01daae5a5 523
bogdanm 92:4fc01daae5a5 524 /** @brief Disable RTS flow control
bogdanm 92:4fc01daae5a5 525 * This macro allows to disable RTS hardware flow control for a given UART instance,
bogdanm 92:4fc01daae5a5 526 * without need to call HAL_UART_Init() function.
bogdanm 92:4fc01daae5a5 527 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
bogdanm 92:4fc01daae5a5 528 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
bogdanm 92:4fc01daae5a5 529 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
bogdanm 92:4fc01daae5a5 530 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
bogdanm 92:4fc01daae5a5 531 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
bogdanm 92:4fc01daae5a5 532 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
bogdanm 92:4fc01daae5a5 533 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 534 * The Handle Instance can be USART1, USART2 or LPUART.
bogdanm 92:4fc01daae5a5 535 * @retval None
bogdanm 92:4fc01daae5a5 536 */
bogdanm 92:4fc01daae5a5 537 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
bogdanm 92:4fc01daae5a5 538 do{ \
bogdanm 92:4fc01daae5a5 539 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
bogdanm 92:4fc01daae5a5 540 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
bogdanm 92:4fc01daae5a5 541 } while(0)
bogdanm 92:4fc01daae5a5 542
Kojto 99:dbbf35b96557 543 /** @brief macros to enables the UART's one bit sample method
bogdanm 92:4fc01daae5a5 544 * @param __HANDLE__: specifies the UART Handle.
bogdanm 92:4fc01daae5a5 545 * @retval None
bogdanm 92:4fc01daae5a5 546 */
Kojto 99:dbbf35b96557 547 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
Kojto 99:dbbf35b96557 548
Kojto 99:dbbf35b96557 549 /** @brief macros to disables the UART's one bit sample method
Kojto 99:dbbf35b96557 550 * @param __HANDLE__: specifies the UART Handle.
Kojto 99:dbbf35b96557 551 * @retval None
Kojto 99:dbbf35b96557 552 */
Kojto 99:dbbf35b96557 553 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
bogdanm 92:4fc01daae5a5 554
Kojto 99:dbbf35b96557 555 /** @brief Enable UART
Kojto 99:dbbf35b96557 556 * @param __HANDLE__: specifies the UART Handle.
Kojto 99:dbbf35b96557 557 * @retval None
Kojto 99:dbbf35b96557 558 */
bogdanm 92:4fc01daae5a5 559 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
Kojto 99:dbbf35b96557 560
Kojto 99:dbbf35b96557 561 /** @brief Disable UART
Kojto 99:dbbf35b96557 562 * @param __HANDLE__: specifies the UART Handle.
Kojto 99:dbbf35b96557 563 * @retval None
Kojto 99:dbbf35b96557 564 */
bogdanm 92:4fc01daae5a5 565 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
Kojto 99:dbbf35b96557 566 /**
Kojto 99:dbbf35b96557 567 * @}
Kojto 99:dbbf35b96557 568 */
bogdanm 92:4fc01daae5a5 569
bogdanm 92:4fc01daae5a5 570 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 571 /** @addtogroup UART_Exported_Functions
Kojto 99:dbbf35b96557 572 * @{
Kojto 99:dbbf35b96557 573 */
Kojto 99:dbbf35b96557 574
Kojto 99:dbbf35b96557 575 /** @addtogroup UART_Exported_Functions_Group1
Kojto 99:dbbf35b96557 576 * @{
Kojto 99:dbbf35b96557 577 */
bogdanm 92:4fc01daae5a5 578 /* Initialization/de-initialization functions **********************************/
bogdanm 92:4fc01daae5a5 579 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 580 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 581 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
Kojto 99:dbbf35b96557 582 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
bogdanm 92:4fc01daae5a5 583 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 584 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 585 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
Kojto 99:dbbf35b96557 586 /**
Kojto 99:dbbf35b96557 587 * @}
Kojto 99:dbbf35b96557 588 */
bogdanm 92:4fc01daae5a5 589
Kojto 99:dbbf35b96557 590 /** @addtogroup UART_Exported_Functions_Group2
Kojto 99:dbbf35b96557 591 * @{
Kojto 99:dbbf35b96557 592 */
bogdanm 92:4fc01daae5a5 593 /* IO operation functions *******************************************************/
bogdanm 92:4fc01daae5a5 594 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 595 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 596 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 597 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 598 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 599 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 600 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 601 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 602 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 603 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 604 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 605 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 606 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 607 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 608 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
Kojto 99:dbbf35b96557 609 /**
Kojto 99:dbbf35b96557 610 * @}
Kojto 99:dbbf35b96557 611 */
bogdanm 92:4fc01daae5a5 612
Kojto 99:dbbf35b96557 613 /** @addtogroup UART_Exported_Functions_Group3
Kojto 99:dbbf35b96557 614 * @{
Kojto 99:dbbf35b96557 615 */
bogdanm 92:4fc01daae5a5 616 /* Peripheral Control functions ************************************************/
bogdanm 92:4fc01daae5a5 617 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 618 HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 619 HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 620 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 621 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
Kojto 99:dbbf35b96557 622 /**
Kojto 99:dbbf35b96557 623 * @}
Kojto 99:dbbf35b96557 624 */
bogdanm 92:4fc01daae5a5 625
Kojto 99:dbbf35b96557 626 /** @addtogroup UART_Exported_Functions_Group4
Kojto 99:dbbf35b96557 627 * @{
Kojto 99:dbbf35b96557 628 */
bogdanm 92:4fc01daae5a5 629 /* Peripheral State functions **************************************************/
bogdanm 92:4fc01daae5a5 630 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
bogdanm 92:4fc01daae5a5 631 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
Kojto 99:dbbf35b96557 632 /**
Kojto 99:dbbf35b96557 633 * @}
Kojto 99:dbbf35b96557 634 */
Kojto 99:dbbf35b96557 635
Kojto 99:dbbf35b96557 636 /**
Kojto 99:dbbf35b96557 637 * @}
Kojto 99:dbbf35b96557 638 */
Kojto 99:dbbf35b96557 639 /* Private types -------------------------------------------------------------*/
Kojto 99:dbbf35b96557 640 /* Private variables ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 641 /* Private constants ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 642 /** @defgroup UART_Private_Constants UART Private Constants
Kojto 99:dbbf35b96557 643 * @{
Kojto 99:dbbf35b96557 644 */
Kojto 99:dbbf35b96557 645 /** @brief UART interruptions flag mask
Kojto 99:dbbf35b96557 646 *
Kojto 99:dbbf35b96557 647 */
Kojto 99:dbbf35b96557 648 #define UART_CR1_REG_INDEX 1
Kojto 99:dbbf35b96557 649 #define UART_CR2_REG_INDEX 2
Kojto 99:dbbf35b96557 650 #define UART_CR3_REG_INDEX 3
Kojto 99:dbbf35b96557 651 /**
Kojto 99:dbbf35b96557 652 * @}
Kojto 99:dbbf35b96557 653 */
Kojto 99:dbbf35b96557 654
Kojto 99:dbbf35b96557 655 /* Private macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 656 /** @defgroup UART_Private_Macros UART Private Macros
Kojto 99:dbbf35b96557 657 * @{
Kojto 99:dbbf35b96557 658 */
Kojto 99:dbbf35b96557 659 #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \
Kojto 99:dbbf35b96557 660 ((LENGTH) == UART_WORDLENGTH_9B))
Kojto 99:dbbf35b96557 661 #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B))
Kojto 99:dbbf35b96557 662 #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
Kojto 99:dbbf35b96557 663 ((STOPBITS) == UART_STOPBITS_2))
Kojto 99:dbbf35b96557 664 #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
Kojto 99:dbbf35b96557 665 ((PARITY) == UART_PARITY_EVEN) || \
Kojto 99:dbbf35b96557 666 ((PARITY) == UART_PARITY_ODD))
Kojto 99:dbbf35b96557 667 #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
Kojto 99:dbbf35b96557 668 (((CONTROL) == UART_HWCONTROL_NONE) || \
Kojto 99:dbbf35b96557 669 ((CONTROL) == UART_HWCONTROL_RTS) || \
Kojto 99:dbbf35b96557 670 ((CONTROL) == UART_HWCONTROL_CTS) || \
Kojto 99:dbbf35b96557 671 ((CONTROL) == UART_HWCONTROL_RTS_CTS))
Kojto 99:dbbf35b96557 672 #define IS_UART_MODE(MODE) ((((MODE) & (uint32_t)0x0000FFF3) == 0x00) && ((MODE) != (uint32_t)0x000000))
Kojto 99:dbbf35b96557 673 #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
Kojto 99:dbbf35b96557 674 ((STATE) == UART_STATE_ENABLE))
Kojto 99:dbbf35b96557 675 #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
Kojto 99:dbbf35b96557 676 ((SAMPLING) == UART_OVERSAMPLING_8))
Kojto 99:dbbf35b96557 677 #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16))
Kojto 99:dbbf35b96557 678 #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
Kojto 99:dbbf35b96557 679 ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
Kojto 99:dbbf35b96557 680 #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \
Kojto 99:dbbf35b96557 681 ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
Kojto 99:dbbf35b96557 682 #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 10500001)
Kojto 99:dbbf35b96557 683 #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
Kojto 99:dbbf35b96557 684
Kojto 99:dbbf35b96557 685 #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25)/(4*(_BAUD_)))
Kojto 99:dbbf35b96557 686 #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100)
Kojto 99:dbbf35b96557 687 #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100)
Kojto 99:dbbf35b96557 688 #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) ((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4)|(UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0F))
Kojto 99:dbbf35b96557 689
Kojto 99:dbbf35b96557 690 #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25)/(2*(_BAUD_)))
Kojto 99:dbbf35b96557 691 #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100)
Kojto 99:dbbf35b96557 692 #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100)
Kojto 99:dbbf35b96557 693 #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) ((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4)|(UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x0F))
Kojto 99:dbbf35b96557 694
Kojto 99:dbbf35b96557 695 /**
Kojto 99:dbbf35b96557 696 * @}
Kojto 99:dbbf35b96557 697 */
Kojto 99:dbbf35b96557 698
Kojto 99:dbbf35b96557 699 /* Private functions ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 700 /** @defgroup UART_Private_Functions UART Private Functions
Kojto 99:dbbf35b96557 701 * @{
Kojto 99:dbbf35b96557 702 */
Kojto 99:dbbf35b96557 703
Kojto 99:dbbf35b96557 704 /**
Kojto 99:dbbf35b96557 705 * @}
Kojto 99:dbbf35b96557 706 */
bogdanm 92:4fc01daae5a5 707
bogdanm 92:4fc01daae5a5 708 /**
bogdanm 92:4fc01daae5a5 709 * @}
bogdanm 92:4fc01daae5a5 710 */
bogdanm 92:4fc01daae5a5 711
bogdanm 92:4fc01daae5a5 712 /**
bogdanm 92:4fc01daae5a5 713 * @}
Kojto 99:dbbf35b96557 714 */
Kojto 99:dbbf35b96557 715
bogdanm 92:4fc01daae5a5 716 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 717 }
bogdanm 92:4fc01daae5a5 718 #endif
bogdanm 92:4fc01daae5a5 719
bogdanm 92:4fc01daae5a5 720 #endif /* __STM32F4xx_HAL_UART_H */
bogdanm 92:4fc01daae5a5 721
bogdanm 92:4fc01daae5a5 722 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/