Ricardo Benitez / mbed

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TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_i2s.h@99:dbbf35b96557, 2015-05-13 (annotated)

Committer:
Kojto
Date:
Wed May 13 08:08:21 2015 +0200
Revision:
99:dbbf35b96557
Parent:
92:4fc01daae5a5
Child:
106:ba1f97679dad
Release 99 of the mbed library



Changes:

 - new targets - MAXWSNENV, DISCO_L053C8

 - STM32F4xx - ST Cube driver

 - KSDK mcu - SPI timing fix

 - Nordic - update to softdevice s130

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_i2s.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
Kojto 99:dbbf35b96557 5 * @version V1.3.0
Kojto 99:dbbf35b96557 6 * @date 09-March-2015
bogdanm 92:4fc01daae5a5 7 * @brief Header file of I2S HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
Kojto 99:dbbf35b96557 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_I2S_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_I2S_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 47 #include "stm32f4xx_hal_def.h"
bogdanm 92:4fc01daae5a5 48
bogdanm 92:4fc01daae5a5 49 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 50 * @{
bogdanm 92:4fc01daae5a5 51 */
bogdanm 92:4fc01daae5a5 52
bogdanm 92:4fc01daae5a5 53 /** @addtogroup I2S
bogdanm 92:4fc01daae5a5 54 * @{
bogdanm 92:4fc01daae5a5 55 */
bogdanm 92:4fc01daae5a5 56
Kojto 99:dbbf35b96557 57 /* Exported types ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 58 /** @defgroup I2S_Exported_Types I2S Exported Types
Kojto 99:dbbf35b96557 59 * @{
Kojto 99:dbbf35b96557 60 */
Kojto 99:dbbf35b96557 61
bogdanm 92:4fc01daae5a5 62 /**
bogdanm 92:4fc01daae5a5 63 * @brief I2S Init structure definition
bogdanm 92:4fc01daae5a5 64 */
bogdanm 92:4fc01daae5a5 65 typedef struct
bogdanm 92:4fc01daae5a5 66 {
bogdanm 92:4fc01daae5a5 67 uint32_t Mode; /*!< Specifies the I2S operating mode.
bogdanm 92:4fc01daae5a5 68 This parameter can be a value of @ref I2S_Mode */
bogdanm 92:4fc01daae5a5 69
bogdanm 92:4fc01daae5a5 70 uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
bogdanm 92:4fc01daae5a5 71 This parameter can be a value of @ref I2S_Standard */
bogdanm 92:4fc01daae5a5 72
bogdanm 92:4fc01daae5a5 73 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
bogdanm 92:4fc01daae5a5 74 This parameter can be a value of @ref I2S_Data_Format */
bogdanm 92:4fc01daae5a5 75
bogdanm 92:4fc01daae5a5 76 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
bogdanm 92:4fc01daae5a5 77 This parameter can be a value of @ref I2S_MCLK_Output */
bogdanm 92:4fc01daae5a5 78
bogdanm 92:4fc01daae5a5 79 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
bogdanm 92:4fc01daae5a5 80 This parameter can be a value of @ref I2S_Audio_Frequency */
bogdanm 92:4fc01daae5a5 81
bogdanm 92:4fc01daae5a5 82 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
bogdanm 92:4fc01daae5a5 83 This parameter can be a value of @ref I2S_Clock_Polarity */
bogdanm 92:4fc01daae5a5 84
bogdanm 92:4fc01daae5a5 85 uint32_t ClockSource; /*!< Specifies the I2S Clock Source.
bogdanm 92:4fc01daae5a5 86 This parameter can be a value of @ref I2S_Clock_Source */
bogdanm 92:4fc01daae5a5 87
bogdanm 92:4fc01daae5a5 88 uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode.
bogdanm 92:4fc01daae5a5 89 This parameter can be a value of @ref I2S_FullDuplex_Mode */
bogdanm 92:4fc01daae5a5 90
bogdanm 92:4fc01daae5a5 91 }I2S_InitTypeDef;
bogdanm 92:4fc01daae5a5 92
bogdanm 92:4fc01daae5a5 93 /**
bogdanm 92:4fc01daae5a5 94 * @brief HAL State structures definition
bogdanm 92:4fc01daae5a5 95 */
bogdanm 92:4fc01daae5a5 96 typedef enum
bogdanm 92:4fc01daae5a5 97 {
bogdanm 92:4fc01daae5a5 98 HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */
bogdanm 92:4fc01daae5a5 99 HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */
bogdanm 92:4fc01daae5a5 100 HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */
bogdanm 92:4fc01daae5a5 101 HAL_I2S_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
bogdanm 92:4fc01daae5a5 102 HAL_I2S_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
bogdanm 92:4fc01daae5a5 103 HAL_I2S_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
bogdanm 92:4fc01daae5a5 104 HAL_I2S_STATE_TIMEOUT = 0x03, /*!< I2S timeout state */
bogdanm 92:4fc01daae5a5 105 HAL_I2S_STATE_ERROR = 0x04 /*!< I2S error state */
bogdanm 92:4fc01daae5a5 106
bogdanm 92:4fc01daae5a5 107 }HAL_I2S_StateTypeDef;
bogdanm 92:4fc01daae5a5 108
bogdanm 92:4fc01daae5a5 109 /**
bogdanm 92:4fc01daae5a5 110 * @brief I2S handle Structure definition
bogdanm 92:4fc01daae5a5 111 */
bogdanm 92:4fc01daae5a5 112 typedef struct
bogdanm 92:4fc01daae5a5 113 {
bogdanm 92:4fc01daae5a5 114 SPI_TypeDef *Instance; /* I2S registers base address */
bogdanm 92:4fc01daae5a5 115
bogdanm 92:4fc01daae5a5 116 I2S_InitTypeDef Init; /* I2S communication parameters */
bogdanm 92:4fc01daae5a5 117
bogdanm 92:4fc01daae5a5 118 uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */
bogdanm 92:4fc01daae5a5 119
bogdanm 92:4fc01daae5a5 120 __IO uint16_t TxXferSize; /* I2S Tx transfer size */
bogdanm 92:4fc01daae5a5 121
bogdanm 92:4fc01daae5a5 122 __IO uint16_t TxXferCount; /* I2S Tx transfer Counter */
bogdanm 92:4fc01daae5a5 123
bogdanm 92:4fc01daae5a5 124 uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */
bogdanm 92:4fc01daae5a5 125
bogdanm 92:4fc01daae5a5 126 __IO uint16_t RxXferSize; /* I2S Rx transfer size */
bogdanm 92:4fc01daae5a5 127
bogdanm 92:4fc01daae5a5 128 __IO uint16_t RxXferCount; /* I2S Rx transfer counter */
bogdanm 92:4fc01daae5a5 129
bogdanm 92:4fc01daae5a5 130 DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */
bogdanm 92:4fc01daae5a5 131
bogdanm 92:4fc01daae5a5 132 DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */
bogdanm 92:4fc01daae5a5 133
bogdanm 92:4fc01daae5a5 134 __IO HAL_LockTypeDef Lock; /* I2S locking object */
bogdanm 92:4fc01daae5a5 135
bogdanm 92:4fc01daae5a5 136 __IO HAL_I2S_StateTypeDef State; /* I2S communication state */
bogdanm 92:4fc01daae5a5 137
Kojto 99:dbbf35b96557 138 __IO uint32_t ErrorCode; /* I2S Error code */
Kojto 99:dbbf35b96557 139
bogdanm 92:4fc01daae5a5 140 }I2S_HandleTypeDef;
Kojto 99:dbbf35b96557 141 /**
Kojto 99:dbbf35b96557 142 * @}
Kojto 99:dbbf35b96557 143 */
bogdanm 92:4fc01daae5a5 144
bogdanm 92:4fc01daae5a5 145 /* Exported constants --------------------------------------------------------*/
Kojto 99:dbbf35b96557 146 /** @defgroup I2S_Exported_Constants I2S Exported Constants
bogdanm 92:4fc01daae5a5 147 * @{
bogdanm 92:4fc01daae5a5 148 */
bogdanm 92:4fc01daae5a5 149
Kojto 99:dbbf35b96557 150 /** @defgroup I2S_Error_Code I2S Error Code
Kojto 99:dbbf35b96557 151 * @brief I2S Error Code
Kojto 99:dbbf35b96557 152 * @{
Kojto 99:dbbf35b96557 153 */
Kojto 99:dbbf35b96557 154 #define HAL_I2S_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
Kojto 99:dbbf35b96557 155 #define HAL_I2S_ERROR_UDR ((uint32_t)0x00000001) /*!< I2S Underrun error */
Kojto 99:dbbf35b96557 156 #define HAL_I2S_ERROR_OVR ((uint32_t)0x00000002) /*!< I2S Overrun error */
Kojto 99:dbbf35b96557 157 #define HAL_I2SEX_ERROR_UDR ((uint32_t)0x00000004) /*!< I2S extended Underrun error */
Kojto 99:dbbf35b96557 158 #define HAL_I2SEX_ERROR_OVR ((uint32_t)0x00000008) /*!< I2S extended Overrun error */
Kojto 99:dbbf35b96557 159 #define HAL_I2S_ERROR_FRE ((uint32_t)0x00000010) /*!< I2S Frame format error */
Kojto 99:dbbf35b96557 160 #define HAL_I2S_ERROR_DMA ((uint32_t)0x00000020) /*!< DMA transfer error */
Kojto 99:dbbf35b96557 161 /**
Kojto 99:dbbf35b96557 162 * @}
Kojto 99:dbbf35b96557 163 */
Kojto 99:dbbf35b96557 164
Kojto 99:dbbf35b96557 165 /** @defgroup I2S_Clock_Source I2S Clock Source
bogdanm 92:4fc01daae5a5 166 * @{
bogdanm 92:4fc01daae5a5 167 */
bogdanm 92:4fc01daae5a5 168 #define I2S_CLOCK_PLL ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 169 #define I2S_CLOCK_EXTERNAL ((uint32_t)0x00000001)
Kojto 99:dbbf35b96557 170 #define I2S_CLOCK_PLLR ((uint32_t)0x00000002)
Kojto 99:dbbf35b96557 171 #define I2S_CLOCK_PLLSRC ((uint32_t)0x00000003)
bogdanm 92:4fc01daae5a5 172 /**
bogdanm 92:4fc01daae5a5 173 * @}
bogdanm 92:4fc01daae5a5 174 */
bogdanm 92:4fc01daae5a5 175
Kojto 99:dbbf35b96557 176 /** @defgroup I2S_Mode I2S Mode
bogdanm 92:4fc01daae5a5 177 * @{
bogdanm 92:4fc01daae5a5 178 */
bogdanm 92:4fc01daae5a5 179 #define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 180 #define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100)
bogdanm 92:4fc01daae5a5 181 #define I2S_MODE_MASTER_TX ((uint32_t)0x00000200)
bogdanm 92:4fc01daae5a5 182 #define I2S_MODE_MASTER_RX ((uint32_t)0x00000300)
bogdanm 92:4fc01daae5a5 183 /**
bogdanm 92:4fc01daae5a5 184 * @}
bogdanm 92:4fc01daae5a5 185 */
bogdanm 92:4fc01daae5a5 186
Kojto 99:dbbf35b96557 187 /** @defgroup I2S_Standard I2S Standard
bogdanm 92:4fc01daae5a5 188 * @{
bogdanm 92:4fc01daae5a5 189 */
bogdanm 92:4fc01daae5a5 190 #define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 191 #define I2S_STANDARD_MSB ((uint32_t)0x00000010)
bogdanm 92:4fc01daae5a5 192 #define I2S_STANDARD_LSB ((uint32_t)0x00000020)
bogdanm 92:4fc01daae5a5 193 #define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030)
bogdanm 92:4fc01daae5a5 194 #define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0)
bogdanm 92:4fc01daae5a5 195 /**
bogdanm 92:4fc01daae5a5 196 * @}
bogdanm 92:4fc01daae5a5 197 */
bogdanm 92:4fc01daae5a5 198
Kojto 99:dbbf35b96557 199 /** @defgroup I2S_Data_Format I2S Data Format
bogdanm 92:4fc01daae5a5 200 * @{
bogdanm 92:4fc01daae5a5 201 */
bogdanm 92:4fc01daae5a5 202 #define I2S_DATAFORMAT_16B ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 203 #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001)
bogdanm 92:4fc01daae5a5 204 #define I2S_DATAFORMAT_24B ((uint32_t)0x00000003)
bogdanm 92:4fc01daae5a5 205 #define I2S_DATAFORMAT_32B ((uint32_t)0x00000005)
bogdanm 92:4fc01daae5a5 206 /**
bogdanm 92:4fc01daae5a5 207 * @}
bogdanm 92:4fc01daae5a5 208 */
bogdanm 92:4fc01daae5a5 209
Kojto 99:dbbf35b96557 210 /** @defgroup I2S_MCLK_Output I2S Mclk Output
bogdanm 92:4fc01daae5a5 211 * @{
bogdanm 92:4fc01daae5a5 212 */
bogdanm 92:4fc01daae5a5 213 #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE)
bogdanm 92:4fc01daae5a5 214 #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 215 /**
bogdanm 92:4fc01daae5a5 216 * @}
bogdanm 92:4fc01daae5a5 217 */
bogdanm 92:4fc01daae5a5 218
Kojto 99:dbbf35b96557 219 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency
bogdanm 92:4fc01daae5a5 220 * @{
bogdanm 92:4fc01daae5a5 221 */
bogdanm 92:4fc01daae5a5 222 #define I2S_AUDIOFREQ_192K ((uint32_t)192000)
bogdanm 92:4fc01daae5a5 223 #define I2S_AUDIOFREQ_96K ((uint32_t)96000)
bogdanm 92:4fc01daae5a5 224 #define I2S_AUDIOFREQ_48K ((uint32_t)48000)
bogdanm 92:4fc01daae5a5 225 #define I2S_AUDIOFREQ_44K ((uint32_t)44100)
bogdanm 92:4fc01daae5a5 226 #define I2S_AUDIOFREQ_32K ((uint32_t)32000)
bogdanm 92:4fc01daae5a5 227 #define I2S_AUDIOFREQ_22K ((uint32_t)22050)
bogdanm 92:4fc01daae5a5 228 #define I2S_AUDIOFREQ_16K ((uint32_t)16000)
bogdanm 92:4fc01daae5a5 229 #define I2S_AUDIOFREQ_11K ((uint32_t)11025)
bogdanm 92:4fc01daae5a5 230 #define I2S_AUDIOFREQ_8K ((uint32_t)8000)
bogdanm 92:4fc01daae5a5 231 #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2)
bogdanm 92:4fc01daae5a5 232 /**
bogdanm 92:4fc01daae5a5 233 * @}
bogdanm 92:4fc01daae5a5 234 */
bogdanm 92:4fc01daae5a5 235
Kojto 99:dbbf35b96557 236 /** @defgroup I2S_FullDuplex_Mode I2S FullDuplex Mode
bogdanm 92:4fc01daae5a5 237 * @{
bogdanm 92:4fc01daae5a5 238 */
bogdanm 92:4fc01daae5a5 239 #define I2S_FULLDUPLEXMODE_DISABLE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 240 #define I2S_FULLDUPLEXMODE_ENABLE ((uint32_t)0x00000001)
bogdanm 92:4fc01daae5a5 241 /**
bogdanm 92:4fc01daae5a5 242 * @}
bogdanm 92:4fc01daae5a5 243 */
bogdanm 92:4fc01daae5a5 244
Kojto 99:dbbf35b96557 245 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity
bogdanm 92:4fc01daae5a5 246 * @{
bogdanm 92:4fc01daae5a5 247 */
bogdanm 92:4fc01daae5a5 248 #define I2S_CPOL_LOW ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 249 #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL)
bogdanm 92:4fc01daae5a5 250 /**
bogdanm 92:4fc01daae5a5 251 * @}
bogdanm 92:4fc01daae5a5 252 */
bogdanm 92:4fc01daae5a5 253
Kojto 99:dbbf35b96557 254 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
bogdanm 92:4fc01daae5a5 255 * @{
bogdanm 92:4fc01daae5a5 256 */
bogdanm 92:4fc01daae5a5 257 #define I2S_IT_TXE SPI_CR2_TXEIE
bogdanm 92:4fc01daae5a5 258 #define I2S_IT_RXNE SPI_CR2_RXNEIE
bogdanm 92:4fc01daae5a5 259 #define I2S_IT_ERR SPI_CR2_ERRIE
bogdanm 92:4fc01daae5a5 260 /**
bogdanm 92:4fc01daae5a5 261 * @}
bogdanm 92:4fc01daae5a5 262 */
bogdanm 92:4fc01daae5a5 263
Kojto 99:dbbf35b96557 264 /** @defgroup I2S_Flags_Definition I2S Flags Definition
bogdanm 92:4fc01daae5a5 265 * @{
bogdanm 92:4fc01daae5a5 266 */
bogdanm 92:4fc01daae5a5 267 #define I2S_FLAG_TXE SPI_SR_TXE
bogdanm 92:4fc01daae5a5 268 #define I2S_FLAG_RXNE SPI_SR_RXNE
bogdanm 92:4fc01daae5a5 269
bogdanm 92:4fc01daae5a5 270 #define I2S_FLAG_UDR SPI_SR_UDR
bogdanm 92:4fc01daae5a5 271 #define I2S_FLAG_OVR SPI_SR_OVR
bogdanm 92:4fc01daae5a5 272 #define I2S_FLAG_FRE SPI_SR_FRE
bogdanm 92:4fc01daae5a5 273
bogdanm 92:4fc01daae5a5 274 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
bogdanm 92:4fc01daae5a5 275 #define I2S_FLAG_BSY SPI_SR_BSY
bogdanm 92:4fc01daae5a5 276 /**
bogdanm 92:4fc01daae5a5 277 * @}
bogdanm 92:4fc01daae5a5 278 */
bogdanm 92:4fc01daae5a5 279
bogdanm 92:4fc01daae5a5 280 /**
bogdanm 92:4fc01daae5a5 281 * @}
bogdanm 92:4fc01daae5a5 282 */
Kojto 99:dbbf35b96557 283
bogdanm 92:4fc01daae5a5 284 /* Exported macro ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 285 /** @defgroup I2S_Exported_Macros I2S Exported Macros
Kojto 99:dbbf35b96557 286 * @{
Kojto 99:dbbf35b96557 287 */
bogdanm 92:4fc01daae5a5 288
bogdanm 92:4fc01daae5a5 289 /** @brief Reset I2S handle state
bogdanm 92:4fc01daae5a5 290 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 92:4fc01daae5a5 291 * @retval None
bogdanm 92:4fc01daae5a5 292 */
bogdanm 92:4fc01daae5a5 293 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
bogdanm 92:4fc01daae5a5 294
bogdanm 92:4fc01daae5a5 295 /** @brief Enable or disable the specified SPI peripheral (in I2S mode).
bogdanm 92:4fc01daae5a5 296 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 92:4fc01daae5a5 297 * @retval None
bogdanm 92:4fc01daae5a5 298 */
bogdanm 92:4fc01daae5a5 299 #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
bogdanm 92:4fc01daae5a5 300 #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= ~SPI_I2SCFGR_I2SE)
bogdanm 92:4fc01daae5a5 301
bogdanm 92:4fc01daae5a5 302 /** @brief Enable or disable the specified I2S interrupts.
bogdanm 92:4fc01daae5a5 303 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 92:4fc01daae5a5 304 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
bogdanm 92:4fc01daae5a5 305 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 306 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
bogdanm 92:4fc01daae5a5 307 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
bogdanm 92:4fc01daae5a5 308 * @arg I2S_IT_ERR: Error interrupt enable
bogdanm 92:4fc01daae5a5 309 * @retval None
bogdanm 92:4fc01daae5a5 310 */
bogdanm 92:4fc01daae5a5 311 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
bogdanm 92:4fc01daae5a5 312 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= ~(__INTERRUPT__))
bogdanm 92:4fc01daae5a5 313
bogdanm 92:4fc01daae5a5 314 /** @brief Checks if the specified I2S interrupt source is enabled or disabled.
bogdanm 92:4fc01daae5a5 315 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 92:4fc01daae5a5 316 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
bogdanm 92:4fc01daae5a5 317 * @param __INTERRUPT__: specifies the I2S interrupt source to check.
bogdanm 92:4fc01daae5a5 318 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 319 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
bogdanm 92:4fc01daae5a5 320 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
bogdanm 92:4fc01daae5a5 321 * @arg I2S_IT_ERR: Error interrupt enable
bogdanm 92:4fc01daae5a5 322 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 92:4fc01daae5a5 323 */
bogdanm 92:4fc01daae5a5 324 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
bogdanm 92:4fc01daae5a5 325
bogdanm 92:4fc01daae5a5 326 /** @brief Checks whether the specified I2S flag is set or not.
bogdanm 92:4fc01daae5a5 327 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 92:4fc01daae5a5 328 * @param __FLAG__: specifies the flag to check.
bogdanm 92:4fc01daae5a5 329 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 330 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
bogdanm 92:4fc01daae5a5 331 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
bogdanm 92:4fc01daae5a5 332 * @arg I2S_FLAG_UDR: Underrun flag
bogdanm 92:4fc01daae5a5 333 * @arg I2S_FLAG_OVR: Overrun flag
bogdanm 92:4fc01daae5a5 334 * @arg I2S_FLAG_FRE: Frame error flag
bogdanm 92:4fc01daae5a5 335 * @arg I2S_FLAG_CHSIDE: Channel Side flag
bogdanm 92:4fc01daae5a5 336 * @arg I2S_FLAG_BSY: Busy flag
bogdanm 92:4fc01daae5a5 337 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 92:4fc01daae5a5 338 */
bogdanm 92:4fc01daae5a5 339 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
bogdanm 92:4fc01daae5a5 340
bogdanm 92:4fc01daae5a5 341 /** @brief Clears the I2S OVR pending flag.
bogdanm 92:4fc01daae5a5 342 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 92:4fc01daae5a5 343 * @retval None
bogdanm 92:4fc01daae5a5 344 */
Kojto 99:dbbf35b96557 345 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) \
Kojto 99:dbbf35b96557 346 do{ \
Kojto 99:dbbf35b96557 347 __IO uint32_t tmpreg; \
Kojto 99:dbbf35b96557 348 tmpreg = (__HANDLE__)->Instance->DR; \
Kojto 99:dbbf35b96557 349 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 99:dbbf35b96557 350 UNUSED(tmpreg); \
Kojto 99:dbbf35b96557 351 } while(0)
Kojto 99:dbbf35b96557 352
bogdanm 92:4fc01daae5a5 353 /** @brief Clears the I2S UDR pending flag.
bogdanm 92:4fc01daae5a5 354 * @param __HANDLE__: specifies the I2S Handle.
bogdanm 92:4fc01daae5a5 355 * @retval None
bogdanm 92:4fc01daae5a5 356 */
Kojto 99:dbbf35b96557 357 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) \
Kojto 99:dbbf35b96557 358 do{ \
Kojto 99:dbbf35b96557 359 __IO uint32_t tmpreg; \
Kojto 99:dbbf35b96557 360 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 99:dbbf35b96557 361 UNUSED(tmpreg); \
Kojto 99:dbbf35b96557 362 } while(0)
Kojto 99:dbbf35b96557 363 /**
Kojto 99:dbbf35b96557 364 * @}
Kojto 99:dbbf35b96557 365 */
Kojto 99:dbbf35b96557 366
bogdanm 92:4fc01daae5a5 367 /* Include I2S Extension module */
bogdanm 92:4fc01daae5a5 368 #include "stm32f4xx_hal_i2s_ex.h"
bogdanm 92:4fc01daae5a5 369
bogdanm 92:4fc01daae5a5 370 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 371 /** @addtogroup I2S_Exported_Functions
Kojto 99:dbbf35b96557 372 * @{
Kojto 99:dbbf35b96557 373 */
bogdanm 92:4fc01daae5a5 374
Kojto 99:dbbf35b96557 375 /** @addtogroup I2S_Exported_Functions_Group1
Kojto 99:dbbf35b96557 376 * @{
Kojto 99:dbbf35b96557 377 */
bogdanm 92:4fc01daae5a5 378 /* Initialization/de-initialization functions **********************************/
bogdanm 92:4fc01daae5a5 379 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
bogdanm 92:4fc01daae5a5 380 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
bogdanm 92:4fc01daae5a5 381 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
bogdanm 92:4fc01daae5a5 382 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
Kojto 99:dbbf35b96557 383 /**
Kojto 99:dbbf35b96557 384 * @}
Kojto 99:dbbf35b96557 385 */
bogdanm 92:4fc01daae5a5 386
Kojto 99:dbbf35b96557 387 /** @addtogroup I2S_Exported_Functions_Group2
Kojto 99:dbbf35b96557 388 * @{
Kojto 99:dbbf35b96557 389 */
bogdanm 92:4fc01daae5a5 390 /* I/O operation functions *****************************************************/
Kojto 99:dbbf35b96557 391 /* Blocking mode: Polling */
bogdanm 92:4fc01daae5a5 392 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 393 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 394
bogdanm 92:4fc01daae5a5 395 /* Non-Blocking mode: Interrupt */
bogdanm 92:4fc01daae5a5 396 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 397 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 398 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
bogdanm 92:4fc01daae5a5 399
bogdanm 92:4fc01daae5a5 400 /* Non-Blocking mode: DMA */
bogdanm 92:4fc01daae5a5 401 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 402 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 403
bogdanm 92:4fc01daae5a5 404 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
bogdanm 92:4fc01daae5a5 405 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
bogdanm 92:4fc01daae5a5 406 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
bogdanm 92:4fc01daae5a5 407
bogdanm 92:4fc01daae5a5 408 /* Peripheral Control and State functions **************************************/
bogdanm 92:4fc01daae5a5 409 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
Kojto 99:dbbf35b96557 410 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
bogdanm 92:4fc01daae5a5 411
bogdanm 92:4fc01daae5a5 412 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
bogdanm 92:4fc01daae5a5 413 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
bogdanm 92:4fc01daae5a5 414 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
bogdanm 92:4fc01daae5a5 415 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
bogdanm 92:4fc01daae5a5 416 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
bogdanm 92:4fc01daae5a5 417 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
Kojto 99:dbbf35b96557 418 /**
Kojto 99:dbbf35b96557 419 * @}
Kojto 99:dbbf35b96557 420 */
bogdanm 92:4fc01daae5a5 421
Kojto 99:dbbf35b96557 422 /**
Kojto 99:dbbf35b96557 423 * @}
Kojto 99:dbbf35b96557 424 */
Kojto 99:dbbf35b96557 425
Kojto 99:dbbf35b96557 426 /* Private types -------------------------------------------------------------*/
Kojto 99:dbbf35b96557 427 /* Private variables ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 428 /* Private constants ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 429 /** @defgroup I2S_Private_Constants I2S Private Constants
Kojto 99:dbbf35b96557 430 * @{
Kojto 99:dbbf35b96557 431 */
Kojto 99:dbbf35b96557 432
Kojto 99:dbbf35b96557 433 /**
Kojto 99:dbbf35b96557 434 * @}
Kojto 99:dbbf35b96557 435 */
Kojto 99:dbbf35b96557 436
Kojto 99:dbbf35b96557 437 /* Private macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 438 /** @defgroup I2S_Private_Macros I2S Private Macros
Kojto 99:dbbf35b96557 439 * @{
Kojto 99:dbbf35b96557 440 */
Kojto 99:dbbf35b96557 441 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \
Kojto 99:dbbf35b96557 442 ((CLOCK) == I2S_CLOCK_PLLR) ||\
Kojto 99:dbbf35b96557 443 ((CLOCK) == I2S_CLOCK_PLLSRC) ||\
Kojto 99:dbbf35b96557 444 ((CLOCK) == I2S_CLOCK_PLL))
Kojto 99:dbbf35b96557 445
Kojto 99:dbbf35b96557 446 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
Kojto 99:dbbf35b96557 447 ((MODE) == I2S_MODE_SLAVE_RX) || \
Kojto 99:dbbf35b96557 448 ((MODE) == I2S_MODE_MASTER_TX) || \
Kojto 99:dbbf35b96557 449 ((MODE) == I2S_MODE_MASTER_RX))
Kojto 99:dbbf35b96557 450
Kojto 99:dbbf35b96557 451 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \
Kojto 99:dbbf35b96557 452 ((STANDARD) == I2S_STANDARD_MSB) || \
Kojto 99:dbbf35b96557 453 ((STANDARD) == I2S_STANDARD_LSB) || \
Kojto 99:dbbf35b96557 454 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
Kojto 99:dbbf35b96557 455 ((STANDARD) == I2S_STANDARD_PCM_LONG))
Kojto 99:dbbf35b96557 456
Kojto 99:dbbf35b96557 457 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
Kojto 99:dbbf35b96557 458 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
Kojto 99:dbbf35b96557 459 ((FORMAT) == I2S_DATAFORMAT_24B) || \
Kojto 99:dbbf35b96557 460 ((FORMAT) == I2S_DATAFORMAT_32B))
Kojto 99:dbbf35b96557 461
Kojto 99:dbbf35b96557 462 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
Kojto 99:dbbf35b96557 463 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
Kojto 99:dbbf35b96557 464
Kojto 99:dbbf35b96557 465 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
Kojto 99:dbbf35b96557 466 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
Kojto 99:dbbf35b96557 467 ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
Kojto 99:dbbf35b96557 468
Kojto 99:dbbf35b96557 469 #define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \
Kojto 99:dbbf35b96557 470 ((MODE) == I2S_FULLDUPLEXMODE_ENABLE))
Kojto 99:dbbf35b96557 471
Kojto 99:dbbf35b96557 472 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
Kojto 99:dbbf35b96557 473 ((CPOL) == I2S_CPOL_HIGH))
Kojto 99:dbbf35b96557 474
Kojto 99:dbbf35b96557 475 #define I2SxEXT(__INSTANCE__) ((__INSTANCE__) == (SPI2)? (SPI_TypeDef *)(I2S2ext_BASE): (SPI_TypeDef *)(I2S3ext_BASE))
Kojto 99:dbbf35b96557 476 /**
Kojto 99:dbbf35b96557 477 * @}
Kojto 99:dbbf35b96557 478 */
Kojto 99:dbbf35b96557 479
Kojto 99:dbbf35b96557 480 /* Private functions ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 481 /** @defgroup I2S_Private_Functions I2S Private Functions
Kojto 99:dbbf35b96557 482 * @{
Kojto 99:dbbf35b96557 483 */
bogdanm 92:4fc01daae5a5 484 void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
bogdanm 92:4fc01daae5a5 485 void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm 92:4fc01daae5a5 486 void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
bogdanm 92:4fc01daae5a5 487 void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm 92:4fc01daae5a5 488 void I2S_DMAError(DMA_HandleTypeDef *hdma);
bogdanm 92:4fc01daae5a5 489 HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout);
Kojto 99:dbbf35b96557 490 HAL_StatusTypeDef I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
Kojto 99:dbbf35b96557 491 HAL_StatusTypeDef I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
Kojto 99:dbbf35b96557 492 /**
Kojto 99:dbbf35b96557 493 * @}
Kojto 99:dbbf35b96557 494 */
bogdanm 92:4fc01daae5a5 495
bogdanm 92:4fc01daae5a5 496 /**
bogdanm 92:4fc01daae5a5 497 * @}
bogdanm 92:4fc01daae5a5 498 */
bogdanm 92:4fc01daae5a5 499
bogdanm 92:4fc01daae5a5 500 /**
bogdanm 92:4fc01daae5a5 501 * @}
Kojto 99:dbbf35b96557 502 */
bogdanm 92:4fc01daae5a5 503
bogdanm 92:4fc01daae5a5 504 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 505 }
bogdanm 92:4fc01daae5a5 506 #endif
bogdanm 92:4fc01daae5a5 507
bogdanm 92:4fc01daae5a5 508
bogdanm 92:4fc01daae5a5 509 #endif /* __STM32F4xx_HAL_I2S_H */
bogdanm 92:4fc01daae5a5 510
bogdanm 92:4fc01daae5a5 511 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/