Ricardo Benitez / mbed

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Fork of mbed by mbed official

TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_sdram.h@106:ba1f97679dad, 2015-09-02 (annotated)

Committer:
Kojto
Date:
Wed Sep 02 14:17:43 2015 +0100
Revision:
106:ba1f97679dad
Parent:
99:dbbf35b96557
Child:
110:165afa46840b
Release 106  of the mbed library



Changes:

- new platform - Nucleo F446RE

- STM32F4 Cube driver update v2.3.2

- ST cmsis driver v2.3.2

- nordic bugfix gcc linker start address

- lpc11u68 - bugfix for serial ports

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_sdram.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
Kojto 106:ba1f97679dad 5 * @version V1.3.2
Kojto 106:ba1f97679dad 6 * @date 26-June-2015
bogdanm 92:4fc01daae5a5 7 * @brief Header file of SDRAM HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
Kojto 99:dbbf35b96557 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_SDRAM_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_SDRAM_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
Kojto 99:dbbf35b96557 46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx)
bogdanm 92:4fc01daae5a5 47
bogdanm 92:4fc01daae5a5 48 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 49 #include "stm32f4xx_ll_fmc.h"
bogdanm 92:4fc01daae5a5 50
bogdanm 92:4fc01daae5a5 51 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 52 * @{
bogdanm 92:4fc01daae5a5 53 */
bogdanm 92:4fc01daae5a5 54
bogdanm 92:4fc01daae5a5 55 /** @addtogroup SDRAM
bogdanm 92:4fc01daae5a5 56 * @{
bogdanm 92:4fc01daae5a5 57 */
bogdanm 92:4fc01daae5a5 58
bogdanm 92:4fc01daae5a5 59 /* Exported typedef ----------------------------------------------------------*/
Kojto 99:dbbf35b96557 60 /** @defgroup SDRAM_Exported_Types SDRAM Exported Types
Kojto 99:dbbf35b96557 61 * @{
Kojto 99:dbbf35b96557 62 */
bogdanm 92:4fc01daae5a5 63
bogdanm 92:4fc01daae5a5 64 /**
bogdanm 92:4fc01daae5a5 65 * @brief HAL SDRAM State structure definition
bogdanm 92:4fc01daae5a5 66 */
bogdanm 92:4fc01daae5a5 67 typedef enum
bogdanm 92:4fc01daae5a5 68 {
bogdanm 92:4fc01daae5a5 69 HAL_SDRAM_STATE_RESET = 0x00, /*!< SDRAM not yet initialized or disabled */
bogdanm 92:4fc01daae5a5 70 HAL_SDRAM_STATE_READY = 0x01, /*!< SDRAM initialized and ready for use */
bogdanm 92:4fc01daae5a5 71 HAL_SDRAM_STATE_BUSY = 0x02, /*!< SDRAM internal process is ongoing */
bogdanm 92:4fc01daae5a5 72 HAL_SDRAM_STATE_ERROR = 0x03, /*!< SDRAM error state */
bogdanm 92:4fc01daae5a5 73 HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04, /*!< SDRAM device write protected */
bogdanm 92:4fc01daae5a5 74 HAL_SDRAM_STATE_PRECHARGED = 0x05 /*!< SDRAM device precharged */
bogdanm 92:4fc01daae5a5 75
bogdanm 92:4fc01daae5a5 76 }HAL_SDRAM_StateTypeDef;
bogdanm 92:4fc01daae5a5 77
bogdanm 92:4fc01daae5a5 78 /**
bogdanm 92:4fc01daae5a5 79 * @brief SDRAM handle Structure definition
bogdanm 92:4fc01daae5a5 80 */
bogdanm 92:4fc01daae5a5 81 typedef struct
bogdanm 92:4fc01daae5a5 82 {
bogdanm 92:4fc01daae5a5 83 FMC_SDRAM_TypeDef *Instance; /*!< Register base address */
bogdanm 92:4fc01daae5a5 84
bogdanm 92:4fc01daae5a5 85 FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */
bogdanm 92:4fc01daae5a5 86
bogdanm 92:4fc01daae5a5 87 __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */
bogdanm 92:4fc01daae5a5 88
bogdanm 92:4fc01daae5a5 89 HAL_LockTypeDef Lock; /*!< SDRAM locking object */
bogdanm 92:4fc01daae5a5 90
bogdanm 92:4fc01daae5a5 91 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
bogdanm 92:4fc01daae5a5 92
bogdanm 92:4fc01daae5a5 93 }SDRAM_HandleTypeDef;
Kojto 99:dbbf35b96557 94 /**
Kojto 99:dbbf35b96557 95 * @}
Kojto 99:dbbf35b96557 96 */
Kojto 99:dbbf35b96557 97
Kojto 99:dbbf35b96557 98 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 99 /* Exported macro ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 100 /** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros
Kojto 99:dbbf35b96557 101 * @{
Kojto 99:dbbf35b96557 102 */
bogdanm 92:4fc01daae5a5 103
bogdanm 92:4fc01daae5a5 104 /** @brief Reset SDRAM handle state
bogdanm 92:4fc01daae5a5 105 * @param __HANDLE__: specifies the SDRAM handle.
bogdanm 92:4fc01daae5a5 106 * @retval None
bogdanm 92:4fc01daae5a5 107 */
bogdanm 92:4fc01daae5a5 108 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET)
Kojto 99:dbbf35b96557 109 /**
Kojto 99:dbbf35b96557 110 * @}
Kojto 99:dbbf35b96557 111 */
bogdanm 92:4fc01daae5a5 112
bogdanm 92:4fc01daae5a5 113 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 114 /** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions
Kojto 99:dbbf35b96557 115 * @{
Kojto 99:dbbf35b96557 116 */
bogdanm 92:4fc01daae5a5 117
Kojto 99:dbbf35b96557 118 /** @addtogroup SDRAM_Exported_Functions_Group1
Kojto 99:dbbf35b96557 119 * @{
Kojto 99:dbbf35b96557 120 */
Kojto 99:dbbf35b96557 121
Kojto 99:dbbf35b96557 122 /* Initialization/de-initialization functions *********************************/
bogdanm 92:4fc01daae5a5 123 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing);
bogdanm 92:4fc01daae5a5 124 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram);
bogdanm 92:4fc01daae5a5 125 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram);
bogdanm 92:4fc01daae5a5 126 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram);
bogdanm 92:4fc01daae5a5 127
bogdanm 92:4fc01daae5a5 128 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram);
bogdanm 92:4fc01daae5a5 129 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram);
bogdanm 92:4fc01daae5a5 130 void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
bogdanm 92:4fc01daae5a5 131 void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
Kojto 99:dbbf35b96557 132 /**
Kojto 99:dbbf35b96557 133 * @}
Kojto 99:dbbf35b96557 134 */
bogdanm 92:4fc01daae5a5 135
Kojto 99:dbbf35b96557 136 /** @addtogroup SDRAM_Exported_Functions_Group2
Kojto 99:dbbf35b96557 137 * @{
Kojto 99:dbbf35b96557 138 */
Kojto 99:dbbf35b96557 139 /* I/O operation functions ****************************************************/
bogdanm 92:4fc01daae5a5 140 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 141 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 142 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 143 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 144 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 145 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 146
bogdanm 92:4fc01daae5a5 147 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 148 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 99:dbbf35b96557 149 /**
Kojto 99:dbbf35b96557 150 * @}
Kojto 99:dbbf35b96557 151 */
Kojto 99:dbbf35b96557 152
Kojto 99:dbbf35b96557 153 /** @addtogroup SDRAM_Exported_Functions_Group3
Kojto 99:dbbf35b96557 154 * @{
Kojto 99:dbbf35b96557 155 */
bogdanm 92:4fc01daae5a5 156 /* SDRAM Control functions *****************************************************/
bogdanm 92:4fc01daae5a5 157 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram);
bogdanm 92:4fc01daae5a5 158 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram);
bogdanm 92:4fc01daae5a5 159 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 160 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate);
bogdanm 92:4fc01daae5a5 161 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber);
bogdanm 92:4fc01daae5a5 162 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram);
Kojto 99:dbbf35b96557 163 /**
Kojto 99:dbbf35b96557 164 * @}
Kojto 99:dbbf35b96557 165 */
bogdanm 92:4fc01daae5a5 166
Kojto 99:dbbf35b96557 167 /** @addtogroup SDRAM_Exported_Functions_Group4
Kojto 99:dbbf35b96557 168 * @{
Kojto 99:dbbf35b96557 169 */
bogdanm 92:4fc01daae5a5 170 /* SDRAM State functions ********************************************************/
bogdanm 92:4fc01daae5a5 171 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram);
Kojto 99:dbbf35b96557 172 /**
Kojto 99:dbbf35b96557 173 * @}
Kojto 99:dbbf35b96557 174 */
bogdanm 92:4fc01daae5a5 175
bogdanm 92:4fc01daae5a5 176 /**
bogdanm 92:4fc01daae5a5 177 * @}
Kojto 99:dbbf35b96557 178 */
Kojto 99:dbbf35b96557 179
Kojto 99:dbbf35b96557 180 /**
Kojto 99:dbbf35b96557 181 * @}
Kojto 99:dbbf35b96557 182 */
Kojto 99:dbbf35b96557 183
Kojto 99:dbbf35b96557 184 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
bogdanm 92:4fc01daae5a5 185
bogdanm 92:4fc01daae5a5 186 /**
bogdanm 92:4fc01daae5a5 187 * @}
bogdanm 92:4fc01daae5a5 188 */
bogdanm 92:4fc01daae5a5 189
bogdanm 92:4fc01daae5a5 190 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 191 }
bogdanm 92:4fc01daae5a5 192 #endif
bogdanm 92:4fc01daae5a5 193
bogdanm 92:4fc01daae5a5 194 #endif /* __STM32F4xx_HAL_SDRAM_H */
bogdanm 92:4fc01daae5a5 195
bogdanm 92:4fc01daae5a5 196 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/