Ricardo Benitez / mbed

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Fork of mbed by mbed official

TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_nand.h@106:ba1f97679dad, 2015-09-02 (annotated)

Committer:
Kojto
Date:
Wed Sep 02 14:17:43 2015 +0100
Revision:
106:ba1f97679dad
Parent:
99:dbbf35b96557
Child:
110:165afa46840b
Release 106  of the mbed library



Changes:

- new platform - Nucleo F446RE

- STM32F4 Cube driver update v2.3.2

- ST cmsis driver v2.3.2

- nordic bugfix gcc linker start address

- lpc11u68 - bugfix for serial ports

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_nand.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
Kojto 106:ba1f97679dad 5 * @version V1.3.2
Kojto 106:ba1f97679dad 6 * @date 26-June-2015
bogdanm 92:4fc01daae5a5 7 * @brief Header file of NAND HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
Kojto 99:dbbf35b96557 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_NAND_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_NAND_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 /* Includes ------------------------------------------------------------------*/
Kojto 99:dbbf35b96557 47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
bogdanm 92:4fc01daae5a5 48 #include "stm32f4xx_ll_fsmc.h"
bogdanm 92:4fc01daae5a5 49 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
bogdanm 92:4fc01daae5a5 50
Kojto 99:dbbf35b96557 51 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx)
bogdanm 92:4fc01daae5a5 52 #include "stm32f4xx_ll_fmc.h"
Kojto 99:dbbf35b96557 53 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
bogdanm 92:4fc01daae5a5 54
bogdanm 92:4fc01daae5a5 55 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 56 * @{
bogdanm 92:4fc01daae5a5 57 */
bogdanm 92:4fc01daae5a5 58
bogdanm 92:4fc01daae5a5 59 /** @addtogroup NAND
bogdanm 92:4fc01daae5a5 60 * @{
bogdanm 92:4fc01daae5a5 61 */
bogdanm 92:4fc01daae5a5 62
Kojto 99:dbbf35b96557 63 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
Kojto 99:dbbf35b96557 64 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 99:dbbf35b96557 65 defined(STM32F446xx)
Kojto 99:dbbf35b96557 66
bogdanm 92:4fc01daae5a5 67 /* Exported typedef ----------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 68 /* Exported types ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 69 /** @defgroup NAND_Exported_Types NAND Exported Types
Kojto 99:dbbf35b96557 70 * @{
Kojto 99:dbbf35b96557 71 */
bogdanm 92:4fc01daae5a5 72
bogdanm 92:4fc01daae5a5 73 /**
bogdanm 92:4fc01daae5a5 74 * @brief HAL NAND State structures definition
bogdanm 92:4fc01daae5a5 75 */
bogdanm 92:4fc01daae5a5 76 typedef enum
bogdanm 92:4fc01daae5a5 77 {
bogdanm 92:4fc01daae5a5 78 HAL_NAND_STATE_RESET = 0x00, /*!< NAND not yet initialized or disabled */
bogdanm 92:4fc01daae5a5 79 HAL_NAND_STATE_READY = 0x01, /*!< NAND initialized and ready for use */
bogdanm 92:4fc01daae5a5 80 HAL_NAND_STATE_BUSY = 0x02, /*!< NAND internal process is ongoing */
bogdanm 92:4fc01daae5a5 81 HAL_NAND_STATE_ERROR = 0x03 /*!< NAND error state */
bogdanm 92:4fc01daae5a5 82 }HAL_NAND_StateTypeDef;
bogdanm 92:4fc01daae5a5 83
bogdanm 92:4fc01daae5a5 84 /**
bogdanm 92:4fc01daae5a5 85 * @brief NAND Memory electronic signature Structure definition
bogdanm 92:4fc01daae5a5 86 */
bogdanm 92:4fc01daae5a5 87 typedef struct
bogdanm 92:4fc01daae5a5 88 {
bogdanm 92:4fc01daae5a5 89 /*<! NAND memory electronic signature maker and device IDs */
bogdanm 92:4fc01daae5a5 90
bogdanm 92:4fc01daae5a5 91 uint8_t Maker_Id;
bogdanm 92:4fc01daae5a5 92
bogdanm 92:4fc01daae5a5 93 uint8_t Device_Id;
bogdanm 92:4fc01daae5a5 94
bogdanm 92:4fc01daae5a5 95 uint8_t Third_Id;
bogdanm 92:4fc01daae5a5 96
bogdanm 92:4fc01daae5a5 97 uint8_t Fourth_Id;
bogdanm 92:4fc01daae5a5 98 }NAND_IDTypeDef;
bogdanm 92:4fc01daae5a5 99
bogdanm 92:4fc01daae5a5 100 /**
bogdanm 92:4fc01daae5a5 101 * @brief NAND Memory address Structure definition
bogdanm 92:4fc01daae5a5 102 */
bogdanm 92:4fc01daae5a5 103 typedef struct
bogdanm 92:4fc01daae5a5 104 {
bogdanm 92:4fc01daae5a5 105 uint16_t Page; /*!< NAND memory Page address */
bogdanm 92:4fc01daae5a5 106
bogdanm 92:4fc01daae5a5 107 uint16_t Zone; /*!< NAND memory Zone address */
bogdanm 92:4fc01daae5a5 108
bogdanm 92:4fc01daae5a5 109 uint16_t Block; /*!< NAND memory Block address */
bogdanm 92:4fc01daae5a5 110
Kojto 99:dbbf35b96557 111 }NAND_AddressTypeDef;
bogdanm 92:4fc01daae5a5 112
bogdanm 92:4fc01daae5a5 113 /**
bogdanm 92:4fc01daae5a5 114 * @brief NAND Memory info Structure definition
bogdanm 92:4fc01daae5a5 115 */
bogdanm 92:4fc01daae5a5 116 typedef struct
bogdanm 92:4fc01daae5a5 117 {
bogdanm 92:4fc01daae5a5 118 uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in K. bytes */
bogdanm 92:4fc01daae5a5 119
bogdanm 92:4fc01daae5a5 120 uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in K. bytes */
bogdanm 92:4fc01daae5a5 121
bogdanm 92:4fc01daae5a5 122 uint32_t BlockSize; /*!< NAND memory block size number of pages */
bogdanm 92:4fc01daae5a5 123
bogdanm 92:4fc01daae5a5 124 uint32_t BlockNbr; /*!< NAND memory number of blocks */
bogdanm 92:4fc01daae5a5 125
bogdanm 92:4fc01daae5a5 126 uint32_t ZoneSize; /*!< NAND memory zone size measured in number of blocks */
bogdanm 92:4fc01daae5a5 127 }NAND_InfoTypeDef;
bogdanm 92:4fc01daae5a5 128
bogdanm 92:4fc01daae5a5 129 /**
bogdanm 92:4fc01daae5a5 130 * @brief NAND handle Structure definition
bogdanm 92:4fc01daae5a5 131 */
bogdanm 92:4fc01daae5a5 132 typedef struct
bogdanm 92:4fc01daae5a5 133 {
bogdanm 92:4fc01daae5a5 134 FMC_NAND_TypeDef *Instance; /*!< Register base address */
bogdanm 92:4fc01daae5a5 135
bogdanm 92:4fc01daae5a5 136 FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */
bogdanm 92:4fc01daae5a5 137
bogdanm 92:4fc01daae5a5 138 HAL_LockTypeDef Lock; /*!< NAND locking object */
bogdanm 92:4fc01daae5a5 139
bogdanm 92:4fc01daae5a5 140 __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
bogdanm 92:4fc01daae5a5 141
bogdanm 92:4fc01daae5a5 142 NAND_InfoTypeDef Info; /*!< NAND characteristic information structure */
bogdanm 92:4fc01daae5a5 143 }NAND_HandleTypeDef;
Kojto 99:dbbf35b96557 144 /**
Kojto 99:dbbf35b96557 145 * @}
Kojto 99:dbbf35b96557 146 */
bogdanm 92:4fc01daae5a5 147
bogdanm 92:4fc01daae5a5 148 /* Exported constants --------------------------------------------------------*/
Kojto 99:dbbf35b96557 149 /* Exported macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 150 /** @defgroup NAND_Exported_Macros NAND Exported Macros
bogdanm 92:4fc01daae5a5 151 * @{
bogdanm 92:4fc01daae5a5 152 */
Kojto 99:dbbf35b96557 153
Kojto 99:dbbf35b96557 154 /** @brief Reset NAND handle state
Kojto 99:dbbf35b96557 155 * @param __HANDLE__: specifies the NAND handle.
Kojto 99:dbbf35b96557 156 * @retval None
Kojto 99:dbbf35b96557 157 */
Kojto 99:dbbf35b96557 158 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
Kojto 99:dbbf35b96557 159
Kojto 99:dbbf35b96557 160 /**
Kojto 99:dbbf35b96557 161 * @}
Kojto 99:dbbf35b96557 162 */
Kojto 99:dbbf35b96557 163
Kojto 99:dbbf35b96557 164 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 165 /** @addtogroup NAND_Exported_Functions NAND Exported Functions
Kojto 99:dbbf35b96557 166 * @{
Kojto 99:dbbf35b96557 167 */
Kojto 99:dbbf35b96557 168
Kojto 99:dbbf35b96557 169 /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 99:dbbf35b96557 170 * @{
Kojto 99:dbbf35b96557 171 */
Kojto 99:dbbf35b96557 172
Kojto 99:dbbf35b96557 173 /* Initialization/de-initialization functions ********************************/
Kojto 99:dbbf35b96557 174 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
Kojto 99:dbbf35b96557 175 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 176 void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 177 void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 178 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 179 void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 180
Kojto 99:dbbf35b96557 181 /**
Kojto 99:dbbf35b96557 182 * @}
Kojto 99:dbbf35b96557 183 */
Kojto 99:dbbf35b96557 184
Kojto 99:dbbf35b96557 185 /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions
Kojto 99:dbbf35b96557 186 * @{
Kojto 99:dbbf35b96557 187 */
Kojto 99:dbbf35b96557 188
Kojto 99:dbbf35b96557 189 /* IO operation functions ****************************************************/
Kojto 99:dbbf35b96557 190 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
Kojto 99:dbbf35b96557 191 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 192 HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);
Kojto 99:dbbf35b96557 193 HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite);
Kojto 99:dbbf35b96557 194 HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
Kojto 99:dbbf35b96557 195 HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
Kojto 99:dbbf35b96557 196 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
Kojto 99:dbbf35b96557 197 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 198 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
Kojto 99:dbbf35b96557 199
Kojto 99:dbbf35b96557 200 /**
Kojto 99:dbbf35b96557 201 * @}
Kojto 99:dbbf35b96557 202 */
Kojto 99:dbbf35b96557 203
Kojto 99:dbbf35b96557 204 /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions
Kojto 99:dbbf35b96557 205 * @{
Kojto 99:dbbf35b96557 206 */
Kojto 99:dbbf35b96557 207
Kojto 99:dbbf35b96557 208 /* NAND Control functions ****************************************************/
Kojto 99:dbbf35b96557 209 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 210 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 211 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
Kojto 99:dbbf35b96557 212
Kojto 99:dbbf35b96557 213 /**
Kojto 99:dbbf35b96557 214 * @}
Kojto 99:dbbf35b96557 215 */
Kojto 99:dbbf35b96557 216
Kojto 99:dbbf35b96557 217 /** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions
Kojto 99:dbbf35b96557 218 * @{
Kojto 99:dbbf35b96557 219 */
Kojto 99:dbbf35b96557 220 /* NAND State functions *******************************************************/
Kojto 99:dbbf35b96557 221 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 222 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
Kojto 99:dbbf35b96557 223 /**
Kojto 99:dbbf35b96557 224 * @}
Kojto 99:dbbf35b96557 225 */
Kojto 99:dbbf35b96557 226
Kojto 99:dbbf35b96557 227 /**
Kojto 99:dbbf35b96557 228 * @}
Kojto 99:dbbf35b96557 229 */
Kojto 99:dbbf35b96557 230
Kojto 99:dbbf35b96557 231 /* Private types -------------------------------------------------------------*/
Kojto 99:dbbf35b96557 232 /* Private variables ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 233 /* Private constants ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 234 /** @defgroup NAND_Private_Constants NAND Private Constants
Kojto 99:dbbf35b96557 235 * @{
Kojto 99:dbbf35b96557 236 */
bogdanm 92:4fc01daae5a5 237 #define NAND_DEVICE1 ((uint32_t)0x70000000)
bogdanm 92:4fc01daae5a5 238 #define NAND_DEVICE2 ((uint32_t)0x80000000)
bogdanm 92:4fc01daae5a5 239 #define NAND_WRITE_TIMEOUT ((uint32_t)0x01000000)
bogdanm 92:4fc01daae5a5 240
bogdanm 92:4fc01daae5a5 241 #define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */
bogdanm 92:4fc01daae5a5 242 #define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */
bogdanm 92:4fc01daae5a5 243
Kojto 99:dbbf35b96557 244 #define NAND_CMD_AREA_A ((uint8_t)0x00)
Kojto 99:dbbf35b96557 245 #define NAND_CMD_AREA_B ((uint8_t)0x01)
bogdanm 92:4fc01daae5a5 246 #define NAND_CMD_AREA_C ((uint8_t)0x50)
bogdanm 92:4fc01daae5a5 247 #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30)
bogdanm 92:4fc01daae5a5 248
bogdanm 92:4fc01daae5a5 249 #define NAND_CMD_WRITE0 ((uint8_t)0x80)
Kojto 99:dbbf35b96557 250 #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10)
bogdanm 92:4fc01daae5a5 251 #define NAND_CMD_ERASE0 ((uint8_t)0x60)
bogdanm 92:4fc01daae5a5 252 #define NAND_CMD_ERASE1 ((uint8_t)0xD0)
Kojto 99:dbbf35b96557 253 #define NAND_CMD_READID ((uint8_t)0x90)
bogdanm 92:4fc01daae5a5 254 #define NAND_CMD_STATUS ((uint8_t)0x70)
bogdanm 92:4fc01daae5a5 255 #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A)
bogdanm 92:4fc01daae5a5 256 #define NAND_CMD_RESET ((uint8_t)0xFF)
bogdanm 92:4fc01daae5a5 257
bogdanm 92:4fc01daae5a5 258 /* NAND memory status */
bogdanm 92:4fc01daae5a5 259 #define NAND_VALID_ADDRESS ((uint32_t)0x00000100)
bogdanm 92:4fc01daae5a5 260 #define NAND_INVALID_ADDRESS ((uint32_t)0x00000200)
bogdanm 92:4fc01daae5a5 261 #define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400)
bogdanm 92:4fc01daae5a5 262 #define NAND_BUSY ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 263 #define NAND_ERROR ((uint32_t)0x00000001)
bogdanm 92:4fc01daae5a5 264 #define NAND_READY ((uint32_t)0x00000040)
bogdanm 92:4fc01daae5a5 265 /**
bogdanm 92:4fc01daae5a5 266 * @}
bogdanm 92:4fc01daae5a5 267 */
bogdanm 92:4fc01daae5a5 268
Kojto 99:dbbf35b96557 269 /* Private macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 270 /** @defgroup NAND_Private_Macros NAND Private Macros
Kojto 99:dbbf35b96557 271 * @{
bogdanm 92:4fc01daae5a5 272 */
bogdanm 92:4fc01daae5a5 273
bogdanm 92:4fc01daae5a5 274 /**
bogdanm 92:4fc01daae5a5 275 * @brief NAND memory address computation.
bogdanm 92:4fc01daae5a5 276 * @param __ADDRESS__: NAND memory address.
bogdanm 92:4fc01daae5a5 277 * @param __HANDLE__ : NAND handle.
bogdanm 92:4fc01daae5a5 278 * @retval NAND Raw address value
bogdanm 92:4fc01daae5a5 279 */
Kojto 99:dbbf35b96557 280 #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \
bogdanm 92:4fc01daae5a5 281 (((__ADDRESS__)->Block + (((__ADDRESS__)->Zone) * ((__HANDLE__)->Info.ZoneSize)))* ((__HANDLE__)->Info.BlockSize)))
Kojto 99:dbbf35b96557 282
bogdanm 92:4fc01daae5a5 283 /**
bogdanm 92:4fc01daae5a5 284 * @brief NAND memory address cycling.
bogdanm 92:4fc01daae5a5 285 * @param __ADDRESS__: NAND memory address.
bogdanm 92:4fc01daae5a5 286 * @retval NAND address cycling value.
bogdanm 92:4fc01daae5a5 287 */
Kojto 99:dbbf35b96557 288 #define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
Kojto 99:dbbf35b96557 289 #define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */
Kojto 99:dbbf35b96557 290 #define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */
Kojto 99:dbbf35b96557 291 #define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */
Kojto 99:dbbf35b96557 292 /**
Kojto 99:dbbf35b96557 293 * @}
Kojto 99:dbbf35b96557 294 */
Kojto 99:dbbf35b96557 295 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\
Kojto 99:dbbf35b96557 296 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\
Kojto 99:dbbf35b96557 297 STM32F446xx */
Kojto 99:dbbf35b96557 298
Kojto 99:dbbf35b96557 299 /**
Kojto 99:dbbf35b96557 300 * @}
Kojto 99:dbbf35b96557 301 */
bogdanm 92:4fc01daae5a5 302 /**
bogdanm 92:4fc01daae5a5 303 * @}
bogdanm 92:4fc01daae5a5 304 */
bogdanm 92:4fc01daae5a5 305
bogdanm 92:4fc01daae5a5 306 /**
bogdanm 92:4fc01daae5a5 307 * @}
bogdanm 92:4fc01daae5a5 308 */
bogdanm 92:4fc01daae5a5 309
bogdanm 92:4fc01daae5a5 310 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 311 }
bogdanm 92:4fc01daae5a5 312 #endif
bogdanm 92:4fc01daae5a5 313
bogdanm 92:4fc01daae5a5 314 #endif /* __STM32F4xx_HAL_NAND_H */
bogdanm 92:4fc01daae5a5 315
bogdanm 92:4fc01daae5a5 316 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/