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TARGET_MTS_DRAGONFLY_F411RE/stm32f4xx_hal_nand.h@106:ba1f97679dad, 2015-09-02 (annotated)

Committer:
Kojto
Date:
Wed Sep 02 14:17:43 2015 +0100
Revision:
106:ba1f97679dad
Parent:
101:7cff1c4259d7
Child:
110:165afa46840b
Release 106  of the mbed library



Changes:

- new platform - Nucleo F446RE

- STM32F4 Cube driver update v2.3.2

- ST cmsis driver v2.3.2

- nordic bugfix gcc linker start address

- lpc11u68 - bugfix for serial ports

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 101:7cff1c4259d7 1 /**
Kojto 101:7cff1c4259d7 2 ******************************************************************************
Kojto 101:7cff1c4259d7 3 * @file stm32f4xx_hal_nand.h
Kojto 101:7cff1c4259d7 4 * @author MCD Application Team
Kojto 106:ba1f97679dad 5 * @version V1.3.2
Kojto 106:ba1f97679dad 6 * @date 26-June-2015
Kojto 101:7cff1c4259d7 7 * @brief Header file of NAND HAL module.
Kojto 101:7cff1c4259d7 8 ******************************************************************************
Kojto 101:7cff1c4259d7 9 * @attention
Kojto 101:7cff1c4259d7 10 *
Kojto 101:7cff1c4259d7 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 101:7cff1c4259d7 12 *
Kojto 101:7cff1c4259d7 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 101:7cff1c4259d7 14 * are permitted provided that the following conditions are met:
Kojto 101:7cff1c4259d7 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 101:7cff1c4259d7 16 * this list of conditions and the following disclaimer.
Kojto 101:7cff1c4259d7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 101:7cff1c4259d7 18 * this list of conditions and the following disclaimer in the documentation
Kojto 101:7cff1c4259d7 19 * and/or other materials provided with the distribution.
Kojto 101:7cff1c4259d7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 101:7cff1c4259d7 21 * may be used to endorse or promote products derived from this software
Kojto 101:7cff1c4259d7 22 * without specific prior written permission.
Kojto 101:7cff1c4259d7 23 *
Kojto 101:7cff1c4259d7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 101:7cff1c4259d7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 101:7cff1c4259d7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 101:7cff1c4259d7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 101:7cff1c4259d7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 101:7cff1c4259d7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 101:7cff1c4259d7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 101:7cff1c4259d7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 101:7cff1c4259d7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 101:7cff1c4259d7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 101:7cff1c4259d7 34 *
Kojto 101:7cff1c4259d7 35 ******************************************************************************
Kojto 101:7cff1c4259d7 36 */
Kojto 101:7cff1c4259d7 37
Kojto 101:7cff1c4259d7 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 101:7cff1c4259d7 39 #ifndef __STM32F4xx_HAL_NAND_H
Kojto 101:7cff1c4259d7 40 #define __STM32F4xx_HAL_NAND_H
Kojto 101:7cff1c4259d7 41
Kojto 101:7cff1c4259d7 42 #ifdef __cplusplus
Kojto 101:7cff1c4259d7 43 extern "C" {
Kojto 101:7cff1c4259d7 44 #endif
Kojto 101:7cff1c4259d7 45
Kojto 101:7cff1c4259d7 46 /* Includes ------------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
Kojto 101:7cff1c4259d7 48 #include "stm32f4xx_ll_fsmc.h"
Kojto 101:7cff1c4259d7 49 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
Kojto 101:7cff1c4259d7 50
Kojto 101:7cff1c4259d7 51 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx)
Kojto 101:7cff1c4259d7 52 #include "stm32f4xx_ll_fmc.h"
Kojto 101:7cff1c4259d7 53 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
Kojto 101:7cff1c4259d7 54
Kojto 101:7cff1c4259d7 55 /** @addtogroup STM32F4xx_HAL_Driver
Kojto 101:7cff1c4259d7 56 * @{
Kojto 101:7cff1c4259d7 57 */
Kojto 101:7cff1c4259d7 58
Kojto 101:7cff1c4259d7 59 /** @addtogroup NAND
Kojto 101:7cff1c4259d7 60 * @{
Kojto 101:7cff1c4259d7 61 */
Kojto 101:7cff1c4259d7 62
Kojto 101:7cff1c4259d7 63 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
Kojto 101:7cff1c4259d7 64 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 101:7cff1c4259d7 65 defined(STM32F446xx)
Kojto 101:7cff1c4259d7 66
Kojto 101:7cff1c4259d7 67 /* Exported typedef ----------------------------------------------------------*/
Kojto 101:7cff1c4259d7 68 /* Exported types ------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 69 /** @defgroup NAND_Exported_Types NAND Exported Types
Kojto 101:7cff1c4259d7 70 * @{
Kojto 101:7cff1c4259d7 71 */
Kojto 101:7cff1c4259d7 72
Kojto 101:7cff1c4259d7 73 /**
Kojto 101:7cff1c4259d7 74 * @brief HAL NAND State structures definition
Kojto 101:7cff1c4259d7 75 */
Kojto 101:7cff1c4259d7 76 typedef enum
Kojto 101:7cff1c4259d7 77 {
Kojto 101:7cff1c4259d7 78 HAL_NAND_STATE_RESET = 0x00, /*!< NAND not yet initialized or disabled */
Kojto 101:7cff1c4259d7 79 HAL_NAND_STATE_READY = 0x01, /*!< NAND initialized and ready for use */
Kojto 101:7cff1c4259d7 80 HAL_NAND_STATE_BUSY = 0x02, /*!< NAND internal process is ongoing */
Kojto 101:7cff1c4259d7 81 HAL_NAND_STATE_ERROR = 0x03 /*!< NAND error state */
Kojto 101:7cff1c4259d7 82 }HAL_NAND_StateTypeDef;
Kojto 101:7cff1c4259d7 83
Kojto 101:7cff1c4259d7 84 /**
Kojto 101:7cff1c4259d7 85 * @brief NAND Memory electronic signature Structure definition
Kojto 101:7cff1c4259d7 86 */
Kojto 101:7cff1c4259d7 87 typedef struct
Kojto 101:7cff1c4259d7 88 {
Kojto 101:7cff1c4259d7 89 /*<! NAND memory electronic signature maker and device IDs */
Kojto 101:7cff1c4259d7 90
Kojto 101:7cff1c4259d7 91 uint8_t Maker_Id;
Kojto 101:7cff1c4259d7 92
Kojto 101:7cff1c4259d7 93 uint8_t Device_Id;
Kojto 101:7cff1c4259d7 94
Kojto 101:7cff1c4259d7 95 uint8_t Third_Id;
Kojto 101:7cff1c4259d7 96
Kojto 101:7cff1c4259d7 97 uint8_t Fourth_Id;
Kojto 101:7cff1c4259d7 98 }NAND_IDTypeDef;
Kojto 101:7cff1c4259d7 99
Kojto 101:7cff1c4259d7 100 /**
Kojto 101:7cff1c4259d7 101 * @brief NAND Memory address Structure definition
Kojto 101:7cff1c4259d7 102 */
Kojto 101:7cff1c4259d7 103 typedef struct
Kojto 101:7cff1c4259d7 104 {
Kojto 101:7cff1c4259d7 105 uint16_t Page; /*!< NAND memory Page address */
Kojto 101:7cff1c4259d7 106
Kojto 101:7cff1c4259d7 107 uint16_t Zone; /*!< NAND memory Zone address */
Kojto 101:7cff1c4259d7 108
Kojto 101:7cff1c4259d7 109 uint16_t Block; /*!< NAND memory Block address */
Kojto 101:7cff1c4259d7 110
Kojto 101:7cff1c4259d7 111 }NAND_AddressTypeDef;
Kojto 101:7cff1c4259d7 112
Kojto 101:7cff1c4259d7 113 /**
Kojto 101:7cff1c4259d7 114 * @brief NAND Memory info Structure definition
Kojto 101:7cff1c4259d7 115 */
Kojto 101:7cff1c4259d7 116 typedef struct
Kojto 101:7cff1c4259d7 117 {
Kojto 101:7cff1c4259d7 118 uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in K. bytes */
Kojto 101:7cff1c4259d7 119
Kojto 101:7cff1c4259d7 120 uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in K. bytes */
Kojto 101:7cff1c4259d7 121
Kojto 101:7cff1c4259d7 122 uint32_t BlockSize; /*!< NAND memory block size number of pages */
Kojto 101:7cff1c4259d7 123
Kojto 101:7cff1c4259d7 124 uint32_t BlockNbr; /*!< NAND memory number of blocks */
Kojto 101:7cff1c4259d7 125
Kojto 101:7cff1c4259d7 126 uint32_t ZoneSize; /*!< NAND memory zone size measured in number of blocks */
Kojto 101:7cff1c4259d7 127 }NAND_InfoTypeDef;
Kojto 101:7cff1c4259d7 128
Kojto 101:7cff1c4259d7 129 /**
Kojto 101:7cff1c4259d7 130 * @brief NAND handle Structure definition
Kojto 101:7cff1c4259d7 131 */
Kojto 101:7cff1c4259d7 132 typedef struct
Kojto 101:7cff1c4259d7 133 {
Kojto 101:7cff1c4259d7 134 FMC_NAND_TypeDef *Instance; /*!< Register base address */
Kojto 101:7cff1c4259d7 135
Kojto 101:7cff1c4259d7 136 FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */
Kojto 101:7cff1c4259d7 137
Kojto 101:7cff1c4259d7 138 HAL_LockTypeDef Lock; /*!< NAND locking object */
Kojto 101:7cff1c4259d7 139
Kojto 101:7cff1c4259d7 140 __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
Kojto 101:7cff1c4259d7 141
Kojto 101:7cff1c4259d7 142 NAND_InfoTypeDef Info; /*!< NAND characteristic information structure */
Kojto 101:7cff1c4259d7 143 }NAND_HandleTypeDef;
Kojto 101:7cff1c4259d7 144 /**
Kojto 101:7cff1c4259d7 145 * @}
Kojto 101:7cff1c4259d7 146 */
Kojto 101:7cff1c4259d7 147
Kojto 101:7cff1c4259d7 148 /* Exported constants --------------------------------------------------------*/
Kojto 101:7cff1c4259d7 149 /* Exported macros ------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 150 /** @defgroup NAND_Exported_Macros NAND Exported Macros
Kojto 101:7cff1c4259d7 151 * @{
Kojto 101:7cff1c4259d7 152 */
Kojto 101:7cff1c4259d7 153
Kojto 101:7cff1c4259d7 154 /** @brief Reset NAND handle state
Kojto 101:7cff1c4259d7 155 * @param __HANDLE__: specifies the NAND handle.
Kojto 101:7cff1c4259d7 156 * @retval None
Kojto 101:7cff1c4259d7 157 */
Kojto 101:7cff1c4259d7 158 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
Kojto 101:7cff1c4259d7 159
Kojto 101:7cff1c4259d7 160 /**
Kojto 101:7cff1c4259d7 161 * @}
Kojto 101:7cff1c4259d7 162 */
Kojto 101:7cff1c4259d7 163
Kojto 101:7cff1c4259d7 164 /* Exported functions --------------------------------------------------------*/
Kojto 101:7cff1c4259d7 165 /** @addtogroup NAND_Exported_Functions NAND Exported Functions
Kojto 101:7cff1c4259d7 166 * @{
Kojto 101:7cff1c4259d7 167 */
Kojto 101:7cff1c4259d7 168
Kojto 101:7cff1c4259d7 169 /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 101:7cff1c4259d7 170 * @{
Kojto 101:7cff1c4259d7 171 */
Kojto 101:7cff1c4259d7 172
Kojto 101:7cff1c4259d7 173 /* Initialization/de-initialization functions ********************************/
Kojto 101:7cff1c4259d7 174 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
Kojto 101:7cff1c4259d7 175 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
Kojto 101:7cff1c4259d7 176 void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
Kojto 101:7cff1c4259d7 177 void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
Kojto 101:7cff1c4259d7 178 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
Kojto 101:7cff1c4259d7 179 void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
Kojto 101:7cff1c4259d7 180
Kojto 101:7cff1c4259d7 181 /**
Kojto 101:7cff1c4259d7 182 * @}
Kojto 101:7cff1c4259d7 183 */
Kojto 101:7cff1c4259d7 184
Kojto 101:7cff1c4259d7 185 /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions
Kojto 101:7cff1c4259d7 186 * @{
Kojto 101:7cff1c4259d7 187 */
Kojto 101:7cff1c4259d7 188
Kojto 101:7cff1c4259d7 189 /* IO operation functions ****************************************************/
Kojto 101:7cff1c4259d7 190 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
Kojto 101:7cff1c4259d7 191 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
Kojto 101:7cff1c4259d7 192 HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);
Kojto 101:7cff1c4259d7 193 HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite);
Kojto 101:7cff1c4259d7 194 HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
Kojto 101:7cff1c4259d7 195 HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
Kojto 101:7cff1c4259d7 196 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
Kojto 101:7cff1c4259d7 197 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
Kojto 101:7cff1c4259d7 198 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
Kojto 101:7cff1c4259d7 199
Kojto 101:7cff1c4259d7 200 /**
Kojto 101:7cff1c4259d7 201 * @}
Kojto 101:7cff1c4259d7 202 */
Kojto 101:7cff1c4259d7 203
Kojto 101:7cff1c4259d7 204 /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions
Kojto 101:7cff1c4259d7 205 * @{
Kojto 101:7cff1c4259d7 206 */
Kojto 101:7cff1c4259d7 207
Kojto 101:7cff1c4259d7 208 /* NAND Control functions ****************************************************/
Kojto 101:7cff1c4259d7 209 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
Kojto 101:7cff1c4259d7 210 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
Kojto 101:7cff1c4259d7 211 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
Kojto 101:7cff1c4259d7 212
Kojto 101:7cff1c4259d7 213 /**
Kojto 101:7cff1c4259d7 214 * @}
Kojto 101:7cff1c4259d7 215 */
Kojto 101:7cff1c4259d7 216
Kojto 101:7cff1c4259d7 217 /** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions
Kojto 101:7cff1c4259d7 218 * @{
Kojto 101:7cff1c4259d7 219 */
Kojto 101:7cff1c4259d7 220 /* NAND State functions *******************************************************/
Kojto 101:7cff1c4259d7 221 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
Kojto 101:7cff1c4259d7 222 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
Kojto 101:7cff1c4259d7 223 /**
Kojto 101:7cff1c4259d7 224 * @}
Kojto 101:7cff1c4259d7 225 */
Kojto 101:7cff1c4259d7 226
Kojto 101:7cff1c4259d7 227 /**
Kojto 101:7cff1c4259d7 228 * @}
Kojto 101:7cff1c4259d7 229 */
Kojto 101:7cff1c4259d7 230
Kojto 101:7cff1c4259d7 231 /* Private types -------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 232 /* Private variables ---------------------------------------------------------*/
Kojto 101:7cff1c4259d7 233 /* Private constants ---------------------------------------------------------*/
Kojto 101:7cff1c4259d7 234 /** @defgroup NAND_Private_Constants NAND Private Constants
Kojto 101:7cff1c4259d7 235 * @{
Kojto 101:7cff1c4259d7 236 */
Kojto 101:7cff1c4259d7 237 #define NAND_DEVICE1 ((uint32_t)0x70000000)
Kojto 101:7cff1c4259d7 238 #define NAND_DEVICE2 ((uint32_t)0x80000000)
Kojto 101:7cff1c4259d7 239 #define NAND_WRITE_TIMEOUT ((uint32_t)0x01000000)
Kojto 101:7cff1c4259d7 240
Kojto 101:7cff1c4259d7 241 #define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */
Kojto 101:7cff1c4259d7 242 #define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */
Kojto 101:7cff1c4259d7 243
Kojto 101:7cff1c4259d7 244 #define NAND_CMD_AREA_A ((uint8_t)0x00)
Kojto 101:7cff1c4259d7 245 #define NAND_CMD_AREA_B ((uint8_t)0x01)
Kojto 101:7cff1c4259d7 246 #define NAND_CMD_AREA_C ((uint8_t)0x50)
Kojto 101:7cff1c4259d7 247 #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30)
Kojto 101:7cff1c4259d7 248
Kojto 101:7cff1c4259d7 249 #define NAND_CMD_WRITE0 ((uint8_t)0x80)
Kojto 101:7cff1c4259d7 250 #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10)
Kojto 101:7cff1c4259d7 251 #define NAND_CMD_ERASE0 ((uint8_t)0x60)
Kojto 101:7cff1c4259d7 252 #define NAND_CMD_ERASE1 ((uint8_t)0xD0)
Kojto 101:7cff1c4259d7 253 #define NAND_CMD_READID ((uint8_t)0x90)
Kojto 101:7cff1c4259d7 254 #define NAND_CMD_STATUS ((uint8_t)0x70)
Kojto 101:7cff1c4259d7 255 #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A)
Kojto 101:7cff1c4259d7 256 #define NAND_CMD_RESET ((uint8_t)0xFF)
Kojto 101:7cff1c4259d7 257
Kojto 101:7cff1c4259d7 258 /* NAND memory status */
Kojto 101:7cff1c4259d7 259 #define NAND_VALID_ADDRESS ((uint32_t)0x00000100)
Kojto 101:7cff1c4259d7 260 #define NAND_INVALID_ADDRESS ((uint32_t)0x00000200)
Kojto 101:7cff1c4259d7 261 #define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400)
Kojto 101:7cff1c4259d7 262 #define NAND_BUSY ((uint32_t)0x00000000)
Kojto 101:7cff1c4259d7 263 #define NAND_ERROR ((uint32_t)0x00000001)
Kojto 101:7cff1c4259d7 264 #define NAND_READY ((uint32_t)0x00000040)
Kojto 101:7cff1c4259d7 265 /**
Kojto 101:7cff1c4259d7 266 * @}
Kojto 101:7cff1c4259d7 267 */
Kojto 101:7cff1c4259d7 268
Kojto 101:7cff1c4259d7 269 /* Private macros ------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 270 /** @defgroup NAND_Private_Macros NAND Private Macros
Kojto 101:7cff1c4259d7 271 * @{
Kojto 101:7cff1c4259d7 272 */
Kojto 101:7cff1c4259d7 273
Kojto 101:7cff1c4259d7 274 /**
Kojto 101:7cff1c4259d7 275 * @brief NAND memory address computation.
Kojto 101:7cff1c4259d7 276 * @param __ADDRESS__: NAND memory address.
Kojto 101:7cff1c4259d7 277 * @param __HANDLE__ : NAND handle.
Kojto 101:7cff1c4259d7 278 * @retval NAND Raw address value
Kojto 101:7cff1c4259d7 279 */
Kojto 101:7cff1c4259d7 280 #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \
Kojto 101:7cff1c4259d7 281 (((__ADDRESS__)->Block + (((__ADDRESS__)->Zone) * ((__HANDLE__)->Info.ZoneSize)))* ((__HANDLE__)->Info.BlockSize)))
Kojto 101:7cff1c4259d7 282
Kojto 101:7cff1c4259d7 283 /**
Kojto 101:7cff1c4259d7 284 * @brief NAND memory address cycling.
Kojto 101:7cff1c4259d7 285 * @param __ADDRESS__: NAND memory address.
Kojto 101:7cff1c4259d7 286 * @retval NAND address cycling value.
Kojto 101:7cff1c4259d7 287 */
Kojto 101:7cff1c4259d7 288 #define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
Kojto 101:7cff1c4259d7 289 #define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */
Kojto 101:7cff1c4259d7 290 #define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */
Kojto 101:7cff1c4259d7 291 #define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */
Kojto 101:7cff1c4259d7 292 /**
Kojto 101:7cff1c4259d7 293 * @}
Kojto 101:7cff1c4259d7 294 */
Kojto 101:7cff1c4259d7 295 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\
Kojto 101:7cff1c4259d7 296 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\
Kojto 101:7cff1c4259d7 297 STM32F446xx */
Kojto 101:7cff1c4259d7 298
Kojto 101:7cff1c4259d7 299 /**
Kojto 101:7cff1c4259d7 300 * @}
Kojto 101:7cff1c4259d7 301 */
Kojto 101:7cff1c4259d7 302 /**
Kojto 101:7cff1c4259d7 303 * @}
Kojto 101:7cff1c4259d7 304 */
Kojto 101:7cff1c4259d7 305
Kojto 101:7cff1c4259d7 306 /**
Kojto 101:7cff1c4259d7 307 * @}
Kojto 101:7cff1c4259d7 308 */
Kojto 101:7cff1c4259d7 309
Kojto 101:7cff1c4259d7 310 #ifdef __cplusplus
Kojto 101:7cff1c4259d7 311 }
Kojto 101:7cff1c4259d7 312 #endif
Kojto 101:7cff1c4259d7 313
Kojto 101:7cff1c4259d7 314 #endif /* __STM32F4xx_HAL_NAND_H */
Kojto 101:7cff1c4259d7 315
Kojto 101:7cff1c4259d7 316 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/