meh
Fork of mbed by
TARGET_NUCLEO_F401RE/stm32f4xx_hal_sdram.h@81:7d30d6019079, 2014-03-19 (annotated)
- Committer:
- bogdanm
- Date:
- Wed Mar 19 18:28:32 2014 +0000
- Revision:
- 81:7d30d6019079
- Parent:
- 77:869cf507173a
- Child:
- 85:024bf7f99721
Release 81 of the mbed library
Main changes:
- Updates and fixes for many targets
- LPC1768: serial interface code fixes
- nRF51822 targets now output a .hex file
- More exporters
- More flexible GPIO API
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
emilmont | 77:869cf507173a | 1 | /** |
emilmont | 77:869cf507173a | 2 | ****************************************************************************** |
emilmont | 77:869cf507173a | 3 | * @file stm32f4xx_hal_sdram.h |
emilmont | 77:869cf507173a | 4 | * @author MCD Application Team |
bogdanm | 81:7d30d6019079 | 5 | * @version V1.0.0 |
bogdanm | 81:7d30d6019079 | 6 | * @date 18-February-2014 |
emilmont | 77:869cf507173a | 7 | * @brief Header file of SDRAM HAL module. |
emilmont | 77:869cf507173a | 8 | ****************************************************************************** |
emilmont | 77:869cf507173a | 9 | * @attention |
emilmont | 77:869cf507173a | 10 | * |
emilmont | 77:869cf507173a | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
emilmont | 77:869cf507173a | 12 | * |
emilmont | 77:869cf507173a | 13 | * Redistribution and use in source and binary forms, with or without modification, |
emilmont | 77:869cf507173a | 14 | * are permitted provided that the following conditions are met: |
emilmont | 77:869cf507173a | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
emilmont | 77:869cf507173a | 16 | * this list of conditions and the following disclaimer. |
emilmont | 77:869cf507173a | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
emilmont | 77:869cf507173a | 18 | * this list of conditions and the following disclaimer in the documentation |
emilmont | 77:869cf507173a | 19 | * and/or other materials provided with the distribution. |
emilmont | 77:869cf507173a | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
emilmont | 77:869cf507173a | 21 | * may be used to endorse or promote products derived from this software |
emilmont | 77:869cf507173a | 22 | * without specific prior written permission. |
emilmont | 77:869cf507173a | 23 | * |
emilmont | 77:869cf507173a | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
emilmont | 77:869cf507173a | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
emilmont | 77:869cf507173a | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
emilmont | 77:869cf507173a | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
emilmont | 77:869cf507173a | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
emilmont | 77:869cf507173a | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
emilmont | 77:869cf507173a | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
emilmont | 77:869cf507173a | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
emilmont | 77:869cf507173a | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
emilmont | 77:869cf507173a | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
emilmont | 77:869cf507173a | 34 | * |
emilmont | 77:869cf507173a | 35 | ****************************************************************************** |
emilmont | 77:869cf507173a | 36 | */ |
emilmont | 77:869cf507173a | 37 | |
emilmont | 77:869cf507173a | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
emilmont | 77:869cf507173a | 39 | #ifndef __STM32F4xx_HAL_SDRAM_H |
emilmont | 77:869cf507173a | 40 | #define __STM32F4xx_HAL_SDRAM_H |
emilmont | 77:869cf507173a | 41 | |
emilmont | 77:869cf507173a | 42 | #ifdef __cplusplus |
emilmont | 77:869cf507173a | 43 | extern "C" { |
emilmont | 77:869cf507173a | 44 | #endif |
emilmont | 77:869cf507173a | 45 | |
emilmont | 77:869cf507173a | 46 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
emilmont | 77:869cf507173a | 47 | |
emilmont | 77:869cf507173a | 48 | /* Includes ------------------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 49 | #include "stm32f4xx_ll_fmc.h" |
emilmont | 77:869cf507173a | 50 | |
emilmont | 77:869cf507173a | 51 | /** @addtogroup STM32F4xx_HAL_Driver |
emilmont | 77:869cf507173a | 52 | * @{ |
emilmont | 77:869cf507173a | 53 | */ |
emilmont | 77:869cf507173a | 54 | |
emilmont | 77:869cf507173a | 55 | /** @addtogroup SDRAM |
emilmont | 77:869cf507173a | 56 | * @{ |
emilmont | 77:869cf507173a | 57 | */ |
emilmont | 77:869cf507173a | 58 | |
emilmont | 77:869cf507173a | 59 | /* Exported typedef ----------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 60 | |
emilmont | 77:869cf507173a | 61 | /** |
emilmont | 77:869cf507173a | 62 | * @brief HAL SDRAM State structure definition |
emilmont | 77:869cf507173a | 63 | */ |
emilmont | 77:869cf507173a | 64 | typedef enum |
emilmont | 77:869cf507173a | 65 | { |
emilmont | 77:869cf507173a | 66 | HAL_SDRAM_STATE_RESET = 0x00, /*!< SDRAM not yet initialized or disabled */ |
emilmont | 77:869cf507173a | 67 | HAL_SDRAM_STATE_READY = 0x01, /*!< SDRAM initialized and ready for use */ |
emilmont | 77:869cf507173a | 68 | HAL_SDRAM_STATE_BUSY = 0x02, /*!< SDRAM internal process is ongoing */ |
emilmont | 77:869cf507173a | 69 | HAL_SDRAM_STATE_ERROR = 0x03, /*!< SDRAM error state */ |
emilmont | 77:869cf507173a | 70 | HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04, /*!< SDRAM device write protected */ |
emilmont | 77:869cf507173a | 71 | HAL_SDRAM_STATE_PRECHARGED = 0x05 /*!< SDRAM device precharged */ |
emilmont | 77:869cf507173a | 72 | |
emilmont | 77:869cf507173a | 73 | }HAL_SDRAM_StateTypeDef; |
emilmont | 77:869cf507173a | 74 | |
emilmont | 77:869cf507173a | 75 | /** |
emilmont | 77:869cf507173a | 76 | * @brief SDRAM handle Structure definition |
emilmont | 77:869cf507173a | 77 | */ |
emilmont | 77:869cf507173a | 78 | typedef struct |
emilmont | 77:869cf507173a | 79 | { |
emilmont | 77:869cf507173a | 80 | FMC_SDRAM_TypeDef *Instance; /*!< Register base address */ |
emilmont | 77:869cf507173a | 81 | |
emilmont | 77:869cf507173a | 82 | FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */ |
emilmont | 77:869cf507173a | 83 | |
emilmont | 77:869cf507173a | 84 | __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */ |
emilmont | 77:869cf507173a | 85 | |
emilmont | 77:869cf507173a | 86 | HAL_LockTypeDef Lock; /*!< SDRAM locking object */ |
emilmont | 77:869cf507173a | 87 | |
emilmont | 77:869cf507173a | 88 | DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */ |
emilmont | 77:869cf507173a | 89 | |
emilmont | 77:869cf507173a | 90 | }SDRAM_HandleTypeDef; |
emilmont | 77:869cf507173a | 91 | |
emilmont | 77:869cf507173a | 92 | /* Exported types ------------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 93 | /* Exported macro ------------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 94 | /* Exported functions --------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 95 | |
emilmont | 77:869cf507173a | 96 | /* Initialization/de-initialization functions **********************************/ |
emilmont | 77:869cf507173a | 97 | HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing); |
emilmont | 77:869cf507173a | 98 | HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram); |
bogdanm | 81:7d30d6019079 | 99 | void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram); |
bogdanm | 81:7d30d6019079 | 100 | void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram); |
emilmont | 77:869cf507173a | 101 | |
emilmont | 77:869cf507173a | 102 | void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram); |
bogdanm | 81:7d30d6019079 | 103 | void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram); |
bogdanm | 81:7d30d6019079 | 104 | void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma); |
bogdanm | 81:7d30d6019079 | 105 | void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma); |
emilmont | 77:869cf507173a | 106 | |
emilmont | 77:869cf507173a | 107 | /* I/O operation functions *****************************************************/ |
emilmont | 77:869cf507173a | 108 | HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize); |
emilmont | 77:869cf507173a | 109 | HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize); |
emilmont | 77:869cf507173a | 110 | HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize); |
emilmont | 77:869cf507173a | 111 | HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize); |
emilmont | 77:869cf507173a | 112 | HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); |
emilmont | 77:869cf507173a | 113 | HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); |
emilmont | 77:869cf507173a | 114 | |
emilmont | 77:869cf507173a | 115 | HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); |
emilmont | 77:869cf507173a | 116 | HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); |
emilmont | 77:869cf507173a | 117 | |
emilmont | 77:869cf507173a | 118 | /* SDRAM Control functions *****************************************************/ |
emilmont | 77:869cf507173a | 119 | HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram); |
emilmont | 77:869cf507173a | 120 | HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram); |
emilmont | 77:869cf507173a | 121 | HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout); |
emilmont | 77:869cf507173a | 122 | HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate); |
emilmont | 77:869cf507173a | 123 | HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber); |
emilmont | 77:869cf507173a | 124 | uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram); |
emilmont | 77:869cf507173a | 125 | |
emilmont | 77:869cf507173a | 126 | /* SDRAM State functions ********************************************************/ |
emilmont | 77:869cf507173a | 127 | HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram); |
emilmont | 77:869cf507173a | 128 | |
emilmont | 77:869cf507173a | 129 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
emilmont | 77:869cf507173a | 130 | /** |
emilmont | 77:869cf507173a | 131 | * @} |
emilmont | 77:869cf507173a | 132 | */ |
emilmont | 77:869cf507173a | 133 | |
emilmont | 77:869cf507173a | 134 | /** |
emilmont | 77:869cf507173a | 135 | * @} |
emilmont | 77:869cf507173a | 136 | */ |
emilmont | 77:869cf507173a | 137 | |
emilmont | 77:869cf507173a | 138 | #ifdef __cplusplus |
emilmont | 77:869cf507173a | 139 | } |
emilmont | 77:869cf507173a | 140 | #endif |
emilmont | 77:869cf507173a | 141 | |
emilmont | 77:869cf507173a | 142 | #endif /* __STM32F4xx_HAL_SDRAM_H */ |
emilmont | 77:869cf507173a | 143 | |
emilmont | 77:869cf507173a | 144 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |