meh

Fork of mbed by mbed official

Committer:
bogdanm
Date:
Thu Nov 27 13:33:22 2014 +0000
Revision:
92:4fc01daae5a5
Parent:
84:0b3ab51c8877
Child:
96:487b796308b0
Release 92 of the mbed libray

Main changes:

- nRF51822: fixed pin assignment issues
- ST targets moving to the STM32Cube driver
- LPC1439: fixed serial interrupt issue
- first Cortex-A platform supported in mbed (RZ_A1H)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 84:0b3ab51c8877 1 /**
bogdanm 84:0b3ab51c8877 2 ******************************************************************************
bogdanm 84:0b3ab51c8877 3 * @file stm32l0xx_hal_lptim.h
bogdanm 84:0b3ab51c8877 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 18-June-2014
bogdanm 84:0b3ab51c8877 7 * @brief Header file of LPTIM HAL module.
bogdanm 84:0b3ab51c8877 8 ******************************************************************************
bogdanm 84:0b3ab51c8877 9 * @attention
bogdanm 84:0b3ab51c8877 10 *
bogdanm 84:0b3ab51c8877 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 84:0b3ab51c8877 12 *
bogdanm 84:0b3ab51c8877 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 84:0b3ab51c8877 14 * are permitted provided that the following conditions are met:
bogdanm 84:0b3ab51c8877 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 84:0b3ab51c8877 16 * this list of conditions and the following disclaimer.
bogdanm 84:0b3ab51c8877 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 84:0b3ab51c8877 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 84:0b3ab51c8877 19 * and/or other materials provided with the distribution.
bogdanm 84:0b3ab51c8877 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 84:0b3ab51c8877 21 * may be used to endorse or promote products derived from this software
bogdanm 84:0b3ab51c8877 22 * without specific prior written permission.
bogdanm 84:0b3ab51c8877 23 *
bogdanm 84:0b3ab51c8877 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 84:0b3ab51c8877 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 84:0b3ab51c8877 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 84:0b3ab51c8877 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 84:0b3ab51c8877 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 84:0b3ab51c8877 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 84:0b3ab51c8877 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 84:0b3ab51c8877 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 84:0b3ab51c8877 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 84:0b3ab51c8877 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 84:0b3ab51c8877 34 *
bogdanm 84:0b3ab51c8877 35 ******************************************************************************
bogdanm 84:0b3ab51c8877 36 */
bogdanm 84:0b3ab51c8877 37
bogdanm 84:0b3ab51c8877 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 84:0b3ab51c8877 39 #ifndef __STM32L0xx_HAL_LPTIM_H
bogdanm 84:0b3ab51c8877 40 #define __STM32L0xx_HAL_LPTIM_H
bogdanm 84:0b3ab51c8877 41
bogdanm 84:0b3ab51c8877 42 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 43 extern "C" {
bogdanm 84:0b3ab51c8877 44 #endif
bogdanm 84:0b3ab51c8877 45
bogdanm 84:0b3ab51c8877 46 /* Includes ------------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 47 #include "stm32l0xx_hal_def.h"
bogdanm 84:0b3ab51c8877 48
bogdanm 84:0b3ab51c8877 49 /** @addtogroup STM32L0xx_HAL_Driver
bogdanm 84:0b3ab51c8877 50 * @{
bogdanm 84:0b3ab51c8877 51 */
bogdanm 84:0b3ab51c8877 52
bogdanm 84:0b3ab51c8877 53 /** @addtogroup LPTIM
bogdanm 84:0b3ab51c8877 54 * @{
bogdanm 84:0b3ab51c8877 55 */
bogdanm 84:0b3ab51c8877 56
bogdanm 84:0b3ab51c8877 57 /* Exported types ------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 58
bogdanm 84:0b3ab51c8877 59 /**
bogdanm 84:0b3ab51c8877 60 * @brief LPTIM Clock configuration definition
bogdanm 84:0b3ab51c8877 61 */
bogdanm 84:0b3ab51c8877 62 typedef struct
bogdanm 84:0b3ab51c8877 63 {
bogdanm 84:0b3ab51c8877 64 uint32_t Source; /*!< Selects the clock source.
bogdanm 84:0b3ab51c8877 65 This parameter can be a value of @ref LPTIM_Clock_Source */
bogdanm 84:0b3ab51c8877 66
bogdanm 84:0b3ab51c8877 67 uint32_t Prescaler; /*!< Specifies the counter clock Prescaler.
bogdanm 84:0b3ab51c8877 68 This parameter can be a value of @ref LPTIM_Clock_Prescaler */
bogdanm 84:0b3ab51c8877 69
bogdanm 84:0b3ab51c8877 70 }LPTIM_ClockConfigTypeDef;
bogdanm 84:0b3ab51c8877 71
bogdanm 84:0b3ab51c8877 72 /**
bogdanm 84:0b3ab51c8877 73 * @brief LPTIM Clock configuration definition
bogdanm 84:0b3ab51c8877 74 */
bogdanm 84:0b3ab51c8877 75 typedef struct
bogdanm 84:0b3ab51c8877 76 {
bogdanm 84:0b3ab51c8877 77 uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit
bogdanm 84:0b3ab51c8877 78 if the ULPTIM input is selected.
bogdanm 84:0b3ab51c8877 79 Note: This parameter is used only when Ultra low power clock source is used.
bogdanm 84:0b3ab51c8877 80 Note: If the polarity is configured on 'both edges', an auxiliary clock
bogdanm 84:0b3ab51c8877 81 (one of the Low power oscillator) must be active.
bogdanm 84:0b3ab51c8877 82 This parameter can be a value of @ref LPTIM_Clock_Polarity */
bogdanm 84:0b3ab51c8877 83
bogdanm 84:0b3ab51c8877 84 uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter.
bogdanm 84:0b3ab51c8877 85 Note: This parameter is used only when Ultra low power clock source is used.
bogdanm 84:0b3ab51c8877 86 This parameter can be a value of @ref LPTIM_Clock_Sample_Time */
bogdanm 84:0b3ab51c8877 87
bogdanm 84:0b3ab51c8877 88 }LPTIM_ULPClockConfigTypeDef;
bogdanm 84:0b3ab51c8877 89
bogdanm 84:0b3ab51c8877 90 /**
bogdanm 84:0b3ab51c8877 91 * @brief LPTIM Trigger configuration definition
bogdanm 84:0b3ab51c8877 92 */
bogdanm 84:0b3ab51c8877 93 typedef struct
bogdanm 84:0b3ab51c8877 94 {
bogdanm 84:0b3ab51c8877 95 uint32_t Source; /*!< Selects the Trigger source.
bogdanm 84:0b3ab51c8877 96 This parameter can be a value of @ref LPTIM_Trigger_Source */
bogdanm 84:0b3ab51c8877 97
bogdanm 84:0b3ab51c8877 98 uint32_t ActiveEdge; /*!< Selects the Trigger active edge.
bogdanm 84:0b3ab51c8877 99 Note: This parameter is used only when an external trigger is used.
bogdanm 84:0b3ab51c8877 100 This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */
bogdanm 84:0b3ab51c8877 101
bogdanm 84:0b3ab51c8877 102 uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter.
bogdanm 84:0b3ab51c8877 103 Note: This parameter is used only when an external trigger is used.
bogdanm 84:0b3ab51c8877 104 This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */
bogdanm 84:0b3ab51c8877 105 }LPTIM_TriggerConfigTypeDef;
bogdanm 84:0b3ab51c8877 106
bogdanm 84:0b3ab51c8877 107 /**
bogdanm 84:0b3ab51c8877 108 * @brief LPTIM Initialization Structure definition
bogdanm 84:0b3ab51c8877 109 */
bogdanm 84:0b3ab51c8877 110 typedef struct
bogdanm 84:0b3ab51c8877 111 {
bogdanm 84:0b3ab51c8877 112 LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */
bogdanm 84:0b3ab51c8877 113
bogdanm 84:0b3ab51c8877 114 LPTIM_ULPClockConfigTypeDef UltraLowPowerClock; /*!< Specifies the Ultra Low Power clock parameters */
bogdanm 84:0b3ab51c8877 115
bogdanm 84:0b3ab51c8877 116 LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */
bogdanm 84:0b3ab51c8877 117
bogdanm 84:0b3ab51c8877 118 uint32_t OutputPolarity; /*!< Specifies the Output polarity.
bogdanm 84:0b3ab51c8877 119 This parameter can be a value of @ref LPTIM_Output_Polarity */
bogdanm 84:0b3ab51c8877 120
bogdanm 84:0b3ab51c8877 121 uint32_t UpdateMode; /*!< Specifies whether the update of the autorelaod and the compare
bogdanm 84:0b3ab51c8877 122 values is done immediately or after the end of current period.
bogdanm 84:0b3ab51c8877 123 This parameter can be a value of @ref LPTIM_Updating_Mode */
bogdanm 84:0b3ab51c8877 124
bogdanm 84:0b3ab51c8877 125 uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event
bogdanm 84:0b3ab51c8877 126 or each external event.
bogdanm 84:0b3ab51c8877 127 This parameter can be a value of @ref LPTIM_Counter_Source */
bogdanm 84:0b3ab51c8877 128
bogdanm 84:0b3ab51c8877 129 }LPTIM_InitTypeDef;
bogdanm 84:0b3ab51c8877 130
bogdanm 84:0b3ab51c8877 131 /**
bogdanm 84:0b3ab51c8877 132 * @brief HAL LPTIM State structure definition
bogdanm 84:0b3ab51c8877 133 */
bogdanm 84:0b3ab51c8877 134 typedef enum __HAL_LPTIM_StateTypeDef
bogdanm 84:0b3ab51c8877 135 {
bogdanm 84:0b3ab51c8877 136 HAL_LPTIM_STATE_RESET = 0x00, /*!< Peripheral not yet initialized or disabled */
bogdanm 84:0b3ab51c8877 137 HAL_LPTIM_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
bogdanm 84:0b3ab51c8877 138 HAL_LPTIM_STATE_BUSY = 0x02, /*!< An internal process is ongoing */
bogdanm 84:0b3ab51c8877 139 HAL_LPTIM_STATE_TIMEOUT = 0x03, /*!< Timeout state */
bogdanm 84:0b3ab51c8877 140 HAL_LPTIM_STATE_ERROR = 0x04 /*!< Internal Process is ongoing */
bogdanm 84:0b3ab51c8877 141 }HAL_LPTIM_StateTypeDef;
bogdanm 84:0b3ab51c8877 142
bogdanm 84:0b3ab51c8877 143 /**
bogdanm 84:0b3ab51c8877 144 * @brief LPTIM handle Structure definition
bogdanm 84:0b3ab51c8877 145 */
bogdanm 84:0b3ab51c8877 146 typedef struct
bogdanm 84:0b3ab51c8877 147 {
bogdanm 84:0b3ab51c8877 148 LPTIM_TypeDef *Instance; /*!< Register base address */
bogdanm 84:0b3ab51c8877 149
bogdanm 84:0b3ab51c8877 150 LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */
bogdanm 84:0b3ab51c8877 151
bogdanm 84:0b3ab51c8877 152 HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */
bogdanm 84:0b3ab51c8877 153
bogdanm 84:0b3ab51c8877 154 HAL_LockTypeDef Lock; /*!< LPTIM locking object */
bogdanm 84:0b3ab51c8877 155
bogdanm 84:0b3ab51c8877 156 __IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */
bogdanm 84:0b3ab51c8877 157
bogdanm 84:0b3ab51c8877 158 }LPTIM_HandleTypeDef;
bogdanm 84:0b3ab51c8877 159
bogdanm 84:0b3ab51c8877 160 /* Exported constants --------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 161
bogdanm 84:0b3ab51c8877 162 /** @defgroup LPTIM_Exported_Constants
bogdanm 84:0b3ab51c8877 163 * @{
bogdanm 84:0b3ab51c8877 164 */
bogdanm 84:0b3ab51c8877 165
bogdanm 84:0b3ab51c8877 166 /** @defgroup LPTIM_Autorelaod_Value
bogdanm 84:0b3ab51c8877 167 * @{
bogdanm 84:0b3ab51c8877 168 */
bogdanm 84:0b3ab51c8877 169 #define IS_LPTIM_AUTORELOAD(AUTORELOAD) ((AUTORELOAD) <= 0x0000FFFF)
bogdanm 84:0b3ab51c8877 170 /**
bogdanm 84:0b3ab51c8877 171 * @}
bogdanm 84:0b3ab51c8877 172 */
bogdanm 84:0b3ab51c8877 173
bogdanm 84:0b3ab51c8877 174 /** @defgroup LPTIM_Compare_Value
bogdanm 84:0b3ab51c8877 175 * @{
bogdanm 84:0b3ab51c8877 176 */
bogdanm 84:0b3ab51c8877 177 #define IS_LPTIM_COMPARE(COMPARE) ((COMPARE) <= 0x0000FFFF)
bogdanm 84:0b3ab51c8877 178 /**
bogdanm 84:0b3ab51c8877 179 * @}
bogdanm 84:0b3ab51c8877 180 */
bogdanm 84:0b3ab51c8877 181
bogdanm 84:0b3ab51c8877 182 /** @defgroup LPTIM_Clock_Source
bogdanm 84:0b3ab51c8877 183 * @{
bogdanm 84:0b3ab51c8877 184 */
bogdanm 84:0b3ab51c8877 185 #define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC ((uint32_t)0x00)
bogdanm 84:0b3ab51c8877 186 #define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL
bogdanm 84:0b3ab51c8877 187
bogdanm 84:0b3ab51c8877 188 #define IS_LPTIM_CLOCK_SOURCE(SOURCE) (((SOURCE) == LPTIM_CLOCKSOURCE_ULPTIM) || \
bogdanm 84:0b3ab51c8877 189 ((SOURCE) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC))
bogdanm 84:0b3ab51c8877 190 /**
bogdanm 84:0b3ab51c8877 191 * @}
bogdanm 84:0b3ab51c8877 192 */
bogdanm 84:0b3ab51c8877 193
bogdanm 84:0b3ab51c8877 194 /** @defgroup LPTIM_Clock_Prescaler
bogdanm 84:0b3ab51c8877 195 * @{
bogdanm 84:0b3ab51c8877 196 */
bogdanm 84:0b3ab51c8877 197 #define LPTIM_PRESCALER_DIV1 ((uint32_t)0x000000)
bogdanm 84:0b3ab51c8877 198 #define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0
bogdanm 84:0b3ab51c8877 199 #define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1
bogdanm 84:0b3ab51c8877 200 #define LPTIM_PRESCALER_DIV8 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1))
bogdanm 84:0b3ab51c8877 201 #define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2
bogdanm 84:0b3ab51c8877 202 #define LPTIM_PRESCALER_DIV32 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2))
bogdanm 84:0b3ab51c8877 203 #define LPTIM_PRESCALER_DIV64 ((uint32_t)(LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2))
bogdanm 84:0b3ab51c8877 204 #define LPTIM_PRESCALER_DIV128 ((uint32_t)LPTIM_CFGR_PRESC)
bogdanm 84:0b3ab51c8877 205
bogdanm 84:0b3ab51c8877 206 #define IS_LPTIM_CLOCK_PRESCALER(PRESCALER) (((PRESCALER) == LPTIM_PRESCALER_DIV1 ) || \
bogdanm 84:0b3ab51c8877 207 ((PRESCALER) == LPTIM_PRESCALER_DIV2 ) || \
bogdanm 84:0b3ab51c8877 208 ((PRESCALER) == LPTIM_PRESCALER_DIV4 ) || \
bogdanm 84:0b3ab51c8877 209 ((PRESCALER) == LPTIM_PRESCALER_DIV8 ) || \
bogdanm 84:0b3ab51c8877 210 ((PRESCALER) == LPTIM_PRESCALER_DIV16 ) || \
bogdanm 84:0b3ab51c8877 211 ((PRESCALER) == LPTIM_PRESCALER_DIV32 ) || \
bogdanm 84:0b3ab51c8877 212 ((PRESCALER) == LPTIM_PRESCALER_DIV64 ) || \
bogdanm 84:0b3ab51c8877 213 ((PRESCALER) == LPTIM_PRESCALER_DIV128))
bogdanm 92:4fc01daae5a5 214 #define IS_LPTIM_CLOCK_PRESCALERDIV1(PRESCALER) ((PRESCALER) == LPTIM_PRESCALER_DIV1)
bogdanm 84:0b3ab51c8877 215 /**
bogdanm 84:0b3ab51c8877 216 * @}
bogdanm 84:0b3ab51c8877 217 */
bogdanm 84:0b3ab51c8877 218
bogdanm 84:0b3ab51c8877 219 /** @defgroup LPTIM_Output_Polarity
bogdanm 84:0b3ab51c8877 220 * @{
bogdanm 84:0b3ab51c8877 221 */
bogdanm 84:0b3ab51c8877 222
bogdanm 84:0b3ab51c8877 223 #define LPTIM_OUTPUTPOLARITY_HIGH ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 224 #define LPTIM_OUTPUTPOLARITY_LOW (LPTIM_CFGR_WAVPOL)
bogdanm 84:0b3ab51c8877 225 #define IS_LPTIM_OUTPUT_POLARITY(POLARITY) (((POLARITY) == LPTIM_OUTPUTPOLARITY_LOW ) || \
bogdanm 84:0b3ab51c8877 226 ((POLARITY) == LPTIM_OUTPUTPOLARITY_HIGH))
bogdanm 84:0b3ab51c8877 227 /**
bogdanm 84:0b3ab51c8877 228 * @}
bogdanm 84:0b3ab51c8877 229 */
bogdanm 84:0b3ab51c8877 230
bogdanm 84:0b3ab51c8877 231 /** @defgroup LPTIM_Clock_Sample_Time
bogdanm 84:0b3ab51c8877 232 * @{
bogdanm 84:0b3ab51c8877 233 */
bogdanm 84:0b3ab51c8877 234 #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 235 #define LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS LPTIM_CFGR_CKFLT_0
bogdanm 84:0b3ab51c8877 236 #define LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS LPTIM_CFGR_CKFLT_1
bogdanm 84:0b3ab51c8877 237 #define LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS LPTIM_CFGR_CKFLT
bogdanm 84:0b3ab51c8877 238 #define IS_LPTIM_CLOCK_SAMPLE_TIME(SAMPLETIME) (((SAMPLETIME) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION) || \
bogdanm 84:0b3ab51c8877 239 ((SAMPLETIME) == LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS) || \
bogdanm 84:0b3ab51c8877 240 ((SAMPLETIME) == LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS) || \
bogdanm 84:0b3ab51c8877 241 ((SAMPLETIME) == LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS))
bogdanm 84:0b3ab51c8877 242 /**
bogdanm 84:0b3ab51c8877 243 * @}
bogdanm 84:0b3ab51c8877 244 */
bogdanm 84:0b3ab51c8877 245
bogdanm 84:0b3ab51c8877 246 /** @defgroup LPTIM_Clock_Polarity
bogdanm 84:0b3ab51c8877 247 * @{
bogdanm 84:0b3ab51c8877 248 */
bogdanm 84:0b3ab51c8877 249
bogdanm 84:0b3ab51c8877 250 #define LPTIM_CLOCKPOLARITY_RISINGEDGE ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 251 #define LPTIM_CLOCKPOLARITY_FALLINGEDGE LPTIM_CFGR_CKPOL_0
bogdanm 84:0b3ab51c8877 252 #define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CFGR_CKPOL_1
bogdanm 84:0b3ab51c8877 253 #define IS_LPTIM_CLOCK_POLARITY(POLARITY) (((POLARITY) == LPTIM_CLOCKPOLARITY_RISINGEDGE) || \
bogdanm 84:0b3ab51c8877 254 ((POLARITY) == LPTIM_CLOCKPOLARITY_FALLINGEDGE) || \
bogdanm 84:0b3ab51c8877 255 ((POLARITY) == LPTIM_CLOCKPOLARITY_BOTHEDGES))
bogdanm 84:0b3ab51c8877 256
bogdanm 84:0b3ab51c8877 257 /**
bogdanm 84:0b3ab51c8877 258 * @}
bogdanm 84:0b3ab51c8877 259 */
bogdanm 84:0b3ab51c8877 260
bogdanm 84:0b3ab51c8877 261 /** @defgroup LPTIM_Trigger_Source
bogdanm 84:0b3ab51c8877 262 * @{
bogdanm 84:0b3ab51c8877 263 */
bogdanm 84:0b3ab51c8877 264 #define LPTIM_TRIGSOURCE_SOFTWARE ((uint32_t)0x0000FFFF)
bogdanm 84:0b3ab51c8877 265 #define LPTIM_TRIGSOURCE_0 ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 266 #define LPTIM_TRIGSOURCE_1 ((uint32_t)LPTIM_CFGR_TRIGSEL_0)
bogdanm 84:0b3ab51c8877 267 #define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1
bogdanm 84:0b3ab51c8877 268 #define LPTIM_TRIGSOURCE_3 ((uint32_t)LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1)
bogdanm 84:0b3ab51c8877 269 #define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2
bogdanm 84:0b3ab51c8877 270 #define LPTIM_TRIGSOURCE_6 ((uint32_t)LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_2)
bogdanm 84:0b3ab51c8877 271 #define LPTIM_TRIGSOURCE_7 LPTIM_CFGR_TRIGSEL
bogdanm 84:0b3ab51c8877 272 #define IS_LPTIM_TRG_SOURCE(TRIG) (((TRIG) == LPTIM_TRIGSOURCE_SOFTWARE) || \
bogdanm 84:0b3ab51c8877 273 ((TRIG) == LPTIM_TRIGSOURCE_0) || \
bogdanm 84:0b3ab51c8877 274 ((TRIG) == LPTIM_TRIGSOURCE_1) || \
bogdanm 84:0b3ab51c8877 275 ((TRIG) == LPTIM_TRIGSOURCE_2) || \
bogdanm 84:0b3ab51c8877 276 ((TRIG) == LPTIM_TRIGSOURCE_3) || \
bogdanm 84:0b3ab51c8877 277 ((TRIG) == LPTIM_TRIGSOURCE_4) || \
bogdanm 84:0b3ab51c8877 278 ((TRIG) == LPTIM_TRIGSOURCE_6) || \
bogdanm 84:0b3ab51c8877 279 ((TRIG) == LPTIM_TRIGSOURCE_7))
bogdanm 84:0b3ab51c8877 280 /**
bogdanm 84:0b3ab51c8877 281 * @}
bogdanm 84:0b3ab51c8877 282 */
bogdanm 84:0b3ab51c8877 283
bogdanm 84:0b3ab51c8877 284 /** @defgroup LPTIM_External_Trigger_Polarity
bogdanm 84:0b3ab51c8877 285 * @{
bogdanm 84:0b3ab51c8877 286 */
bogdanm 84:0b3ab51c8877 287 #define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0
bogdanm 84:0b3ab51c8877 288 #define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1
bogdanm 84:0b3ab51c8877 289 #define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN
bogdanm 84:0b3ab51c8877 290 #define IS_LPTIM_EXT_TRG_POLARITY(POLAR) (((POLAR) == LPTIM_ACTIVEEDGE_RISING ) || \
bogdanm 84:0b3ab51c8877 291 ((POLAR) == LPTIM_ACTIVEEDGE_FALLING ) || \
bogdanm 84:0b3ab51c8877 292 ((POLAR) == LPTIM_ACTIVEEDGE_RISING_FALLING ))
bogdanm 84:0b3ab51c8877 293
bogdanm 84:0b3ab51c8877 294 /**
bogdanm 84:0b3ab51c8877 295 * @}
bogdanm 84:0b3ab51c8877 296 */
bogdanm 84:0b3ab51c8877 297
bogdanm 84:0b3ab51c8877 298 /** @defgroup LPTIM_Trigger_Sample_Time
bogdanm 84:0b3ab51c8877 299 * @{
bogdanm 84:0b3ab51c8877 300 */
bogdanm 84:0b3ab51c8877 301 #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 302 #define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS LPTIM_CFGR_TRGFLT_0
bogdanm 84:0b3ab51c8877 303 #define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS LPTIM_CFGR_TRGFLT_1
bogdanm 84:0b3ab51c8877 304 #define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS LPTIM_CFGR_TRGFLT
bogdanm 84:0b3ab51c8877 305 #define IS_LPTIM_TRIG_SAMPLE_TIME(SAMPLETIME) (((SAMPLETIME) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION) || \
bogdanm 84:0b3ab51c8877 306 ((SAMPLETIME) == LPTIM_TRIGSAMPLETIME_2TRANSISTIONS ) || \
bogdanm 84:0b3ab51c8877 307 ((SAMPLETIME) == LPTIM_TRIGSAMPLETIME_4TRANSISTIONS ) || \
bogdanm 84:0b3ab51c8877 308 ((SAMPLETIME) == LPTIM_TRIGSAMPLETIME_8TRANSISTIONS ))
bogdanm 84:0b3ab51c8877 309 /**
bogdanm 84:0b3ab51c8877 310 * @}
bogdanm 84:0b3ab51c8877 311 */
bogdanm 84:0b3ab51c8877 312
bogdanm 84:0b3ab51c8877 313 /** @defgroup LPTIM_Updating_Mode
bogdanm 84:0b3ab51c8877 314 * @{
bogdanm 84:0b3ab51c8877 315 */
bogdanm 84:0b3ab51c8877 316
bogdanm 84:0b3ab51c8877 317 #define LPTIM_UPDATE_IMMEDIATE ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 318 #define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD
bogdanm 84:0b3ab51c8877 319 #define IS_LPTIM_UPDATE_MODE(MODE) (((MODE) == LPTIM_UPDATE_IMMEDIATE) || \
bogdanm 84:0b3ab51c8877 320 ((MODE) == LPTIM_UPDATE_ENDOFPERIOD))
bogdanm 84:0b3ab51c8877 321
bogdanm 84:0b3ab51c8877 322 /**
bogdanm 84:0b3ab51c8877 323 * @}
bogdanm 84:0b3ab51c8877 324 */
bogdanm 84:0b3ab51c8877 325
bogdanm 84:0b3ab51c8877 326 /** @defgroup LPTIM_Counter_Source
bogdanm 84:0b3ab51c8877 327 * @{
bogdanm 84:0b3ab51c8877 328 */
bogdanm 84:0b3ab51c8877 329
bogdanm 84:0b3ab51c8877 330 #define LPTIM_COUNTERSOURCE_INTERNAL ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 331 #define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE
bogdanm 84:0b3ab51c8877 332 #define IS_LPTIM_COUNTER_SOURCE(SOURCE) (((SOURCE) == LPTIM_COUNTERSOURCE_INTERNAL) || \
bogdanm 84:0b3ab51c8877 333 ((SOURCE) == LPTIM_COUNTERSOURCE_EXTERNAL))
bogdanm 84:0b3ab51c8877 334
bogdanm 84:0b3ab51c8877 335 /**
bogdanm 84:0b3ab51c8877 336 * @}
bogdanm 84:0b3ab51c8877 337 */
bogdanm 84:0b3ab51c8877 338
bogdanm 84:0b3ab51c8877 339 /** @defgroup LPTIM_Autorelaod_Value
bogdanm 84:0b3ab51c8877 340 * @{
bogdanm 84:0b3ab51c8877 341 */
bogdanm 84:0b3ab51c8877 342 #define IS_LPTIM_PERIOD(PERIOD) ((PERIOD) <= 0x0000FFFF)
bogdanm 84:0b3ab51c8877 343 /**
bogdanm 84:0b3ab51c8877 344 * @}
bogdanm 84:0b3ab51c8877 345 */
bogdanm 84:0b3ab51c8877 346
bogdanm 84:0b3ab51c8877 347 /** @defgroup LPTIM_Compare_Value
bogdanm 84:0b3ab51c8877 348 * @{
bogdanm 84:0b3ab51c8877 349 */
bogdanm 84:0b3ab51c8877 350 #define IS_LPTIM_PULSE(PULSE) ((PULSE) <= 0x0000FFFF)
bogdanm 84:0b3ab51c8877 351 /**
bogdanm 84:0b3ab51c8877 352 * @}
bogdanm 84:0b3ab51c8877 353 */
bogdanm 84:0b3ab51c8877 354
bogdanm 84:0b3ab51c8877 355 /** @defgroup LPTIM_Flag_Definition
bogdanm 84:0b3ab51c8877 356 * @{
bogdanm 84:0b3ab51c8877 357 */
bogdanm 84:0b3ab51c8877 358
bogdanm 84:0b3ab51c8877 359 #define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN
bogdanm 84:0b3ab51c8877 360 #define LPTIM_FLAG_UP LPTIM_ISR_UP
bogdanm 84:0b3ab51c8877 361 #define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK
bogdanm 84:0b3ab51c8877 362 #define LPTIM_FLAG_CMPOK LPTIM_ISR_CMPOK
bogdanm 84:0b3ab51c8877 363 #define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG
bogdanm 84:0b3ab51c8877 364 #define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM
bogdanm 84:0b3ab51c8877 365 #define LPTIM_FLAG_CMPM LPTIM_ISR_CMPM
bogdanm 84:0b3ab51c8877 366 #define IS_LPTIM_FLAG_(FLAG) (((FLAG) == LPTIM_FLAG_DOWN) || \
bogdanm 84:0b3ab51c8877 367 ((FLAG) == LPTIM_FLAG_UP) || \
bogdanm 84:0b3ab51c8877 368 ((FLAG) == LPTIM_FLAG_ARROK) || \
bogdanm 84:0b3ab51c8877 369 ((FLAG) == LPTIM_FLAG_CMPOK) || \
bogdanm 84:0b3ab51c8877 370 ((FLAG) == LPTIM_FLAG_EXTTRIG) || \
bogdanm 84:0b3ab51c8877 371 ((FLAG) == LPTIM_FLAG_ARRM) || \
bogdanm 84:0b3ab51c8877 372 ((FLAG) == LPTIM_FLAG_CMPM))
bogdanm 84:0b3ab51c8877 373 /**
bogdanm 84:0b3ab51c8877 374 * @}
bogdanm 84:0b3ab51c8877 375 */
bogdanm 84:0b3ab51c8877 376 /** @defgroup LPTIM_Interrupts_Definition
bogdanm 84:0b3ab51c8877 377 * @{
bogdanm 84:0b3ab51c8877 378 */
bogdanm 84:0b3ab51c8877 379
bogdanm 84:0b3ab51c8877 380 #define LPTIM_IT_DOWN LPTIM_IER_DOWNIE
bogdanm 84:0b3ab51c8877 381 #define LPTIM_IT_UP LPTIM_IER_UPIE
bogdanm 84:0b3ab51c8877 382 #define LPTIM_IT_ARROK LPTIM_IER_ARROKIE
bogdanm 84:0b3ab51c8877 383 #define LPTIM_IT_CMPOK LPTIM_IER_CMPOKIE
bogdanm 84:0b3ab51c8877 384 #define LPTIM_IT_EXTTRIG LPTIM_IER_EXTTRIGIE
bogdanm 84:0b3ab51c8877 385 #define LPTIM_IT_ARRM LPTIM_IER_ARRMIE
bogdanm 84:0b3ab51c8877 386 #define LPTIM_IT_CMPM LPTIM_IER_CMPMIE
bogdanm 84:0b3ab51c8877 387 #define IS_LPTIM_IT(IT) (((IT) == LPTIM_IT_DOWN) || \
bogdanm 84:0b3ab51c8877 388 ((IT) == LPTIM_IT_UP) || \
bogdanm 84:0b3ab51c8877 389 ((IT) == LPTIM_IT_ARROK) || \
bogdanm 84:0b3ab51c8877 390 ((IT) == LPTIM_IT_CMPOK) || \
bogdanm 84:0b3ab51c8877 391 ((IT) == LPTIM_IT_EXTTRIG) || \
bogdanm 84:0b3ab51c8877 392 ((IT) == LPTIM_IT_ARRM) || \
bogdanm 84:0b3ab51c8877 393 ((IT) == LPTIM_IT_CMPM))
bogdanm 84:0b3ab51c8877 394 /**
bogdanm 84:0b3ab51c8877 395 * @}
bogdanm 84:0b3ab51c8877 396 */
bogdanm 84:0b3ab51c8877 397
bogdanm 84:0b3ab51c8877 398 /**
bogdanm 84:0b3ab51c8877 399 * @}
bogdanm 84:0b3ab51c8877 400 */
bogdanm 84:0b3ab51c8877 401
bogdanm 84:0b3ab51c8877 402 /* Exported macro ------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 403
bogdanm 92:4fc01daae5a5 404 /** @defgroup LPTIM_Exported_Macros
bogdanm 92:4fc01daae5a5 405 * @{
bogdanm 92:4fc01daae5a5 406 */
bogdanm 92:4fc01daae5a5 407
bogdanm 84:0b3ab51c8877 408 /** @brief Reset LPTIM handle state
bogdanm 84:0b3ab51c8877 409 * @param __HANDLE__: LPTIM handle
bogdanm 84:0b3ab51c8877 410 * @retval None
bogdanm 84:0b3ab51c8877 411 */
bogdanm 84:0b3ab51c8877 412 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET)
bogdanm 84:0b3ab51c8877 413
bogdanm 84:0b3ab51c8877 414 /**
bogdanm 84:0b3ab51c8877 415 * @brief Enable/Disable the LPTIM peripheral.
bogdanm 84:0b3ab51c8877 416 * @param __HANDLE__: LPTIM handle
bogdanm 84:0b3ab51c8877 417 * @retval None
bogdanm 84:0b3ab51c8877 418 */
bogdanm 84:0b3ab51c8877 419 #define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE))
bogdanm 84:0b3ab51c8877 420 #define __HAL_LPTIM_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(LPTIM_CR_ENABLE))
bogdanm 84:0b3ab51c8877 421
bogdanm 84:0b3ab51c8877 422 /**
bogdanm 84:0b3ab51c8877 423 * @brief Starts the LPTIM peripheral in Continuous or in single mode.
bogdanm 84:0b3ab51c8877 424 * @param __HANDLE__: DMA handle
bogdanm 84:0b3ab51c8877 425 * @retval None
bogdanm 84:0b3ab51c8877 426 */
bogdanm 84:0b3ab51c8877 427 #define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT)
bogdanm 84:0b3ab51c8877 428 #define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT)
bogdanm 84:0b3ab51c8877 429
bogdanm 84:0b3ab51c8877 430
bogdanm 84:0b3ab51c8877 431 /**
bogdanm 84:0b3ab51c8877 432 * @brief Writes the passed parameter in the Autoreload register.
bogdanm 84:0b3ab51c8877 433 * @param __HANDLE__: LPTIM handle
bogdanm 84:0b3ab51c8877 434 * @param __VALUE__ : Autoreload value
bogdanm 84:0b3ab51c8877 435 * @retval None
bogdanm 84:0b3ab51c8877 436 */
bogdanm 84:0b3ab51c8877 437 #define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__))
bogdanm 84:0b3ab51c8877 438
bogdanm 84:0b3ab51c8877 439 /**
bogdanm 84:0b3ab51c8877 440 * @brief Writes the passed parameter in the Compare register.
bogdanm 84:0b3ab51c8877 441 * @param __HANDLE__: LPTIM handle
bogdanm 84:0b3ab51c8877 442 * @param __VALUE__ : Compare value
bogdanm 84:0b3ab51c8877 443 * @retval None
bogdanm 84:0b3ab51c8877 444 */
bogdanm 84:0b3ab51c8877 445 #define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__))
bogdanm 84:0b3ab51c8877 446
bogdanm 84:0b3ab51c8877 447 /**
bogdanm 84:0b3ab51c8877 448 * @brief Checks whether the specified LPTIM flag is set or not.
bogdanm 84:0b3ab51c8877 449 * @param __HANDLE__: LPTIM handle
bogdanm 84:0b3ab51c8877 450 * @param __FLAG__ : LPTIM flag to check
bogdanm 84:0b3ab51c8877 451 * This parameter can be a value of:
bogdanm 84:0b3ab51c8877 452 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag.
bogdanm 84:0b3ab51c8877 453 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag.
bogdanm 84:0b3ab51c8877 454 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag.
bogdanm 84:0b3ab51c8877 455 * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag.
bogdanm 84:0b3ab51c8877 456 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
bogdanm 84:0b3ab51c8877 457 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag.
bogdanm 84:0b3ab51c8877 458 * @arg LPTIM_FLAG_CMPM : Compare match Flag.
bogdanm 84:0b3ab51c8877 459 * @retval The state of the specified flag (SET or RESET).
bogdanm 84:0b3ab51c8877 460 */
bogdanm 84:0b3ab51c8877 461 #define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__))
bogdanm 84:0b3ab51c8877 462
bogdanm 84:0b3ab51c8877 463 /**
bogdanm 84:0b3ab51c8877 464 * @brief Clears the specified LPTIM flag.
bogdanm 84:0b3ab51c8877 465 * @param __HANDLE__: LPTIM handle.
bogdanm 84:0b3ab51c8877 466 * @param __FLAG__ : LPTIM flag to clear.
bogdanm 84:0b3ab51c8877 467 * This parameter can be a value of:
bogdanm 84:0b3ab51c8877 468 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag.
bogdanm 84:0b3ab51c8877 469 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag.
bogdanm 84:0b3ab51c8877 470 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag.
bogdanm 84:0b3ab51c8877 471 * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag.
bogdanm 84:0b3ab51c8877 472 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
bogdanm 84:0b3ab51c8877 473 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag.
bogdanm 84:0b3ab51c8877 474 * @arg LPTIM_FLAG_CMPM : Compare match Flag.
bogdanm 84:0b3ab51c8877 475 * @retval None.
bogdanm 84:0b3ab51c8877 476 */
bogdanm 92:4fc01daae5a5 477 #define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
bogdanm 84:0b3ab51c8877 478
bogdanm 84:0b3ab51c8877 479 /**
bogdanm 84:0b3ab51c8877 480 * @brief Enable the specified LPTIM interrupt.
bogdanm 84:0b3ab51c8877 481 * @param __HANDLE__ : LPTIM handle.
bogdanm 84:0b3ab51c8877 482 * @param __INTERRUPT__ : LPTIM interrupt to set.
bogdanm 84:0b3ab51c8877 483 * This parameter can be a value of:
bogdanm 84:0b3ab51c8877 484 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
bogdanm 84:0b3ab51c8877 485 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
bogdanm 84:0b3ab51c8877 486 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
bogdanm 84:0b3ab51c8877 487 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
bogdanm 84:0b3ab51c8877 488 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
bogdanm 84:0b3ab51c8877 489 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
bogdanm 84:0b3ab51c8877 490 * @arg LPTIM_IT_CMPM : Compare match Interrupt.
bogdanm 84:0b3ab51c8877 491 * @retval None.
bogdanm 84:0b3ab51c8877 492 */
bogdanm 84:0b3ab51c8877 493 #define __HAL_LPTIM_ENABLE_INTERRUPT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
bogdanm 84:0b3ab51c8877 494
bogdanm 84:0b3ab51c8877 495 /**
bogdanm 84:0b3ab51c8877 496 * @brief Disable the specified LPTIM interrupt.
bogdanm 84:0b3ab51c8877 497 * @param __HANDLE__ : LPTIM handle.
bogdanm 84:0b3ab51c8877 498 * @param __INTERRUPT__ : LPTIM interrupt to set.
bogdanm 84:0b3ab51c8877 499 * This parameter can be a value of:
bogdanm 84:0b3ab51c8877 500 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
bogdanm 84:0b3ab51c8877 501 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
bogdanm 84:0b3ab51c8877 502 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
bogdanm 84:0b3ab51c8877 503 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
bogdanm 84:0b3ab51c8877 504 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
bogdanm 84:0b3ab51c8877 505 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
bogdanm 84:0b3ab51c8877 506 * @arg LPTIM_IT_CMPM : Compare match Interrupt.
bogdanm 84:0b3ab51c8877 507 * @retval None.
bogdanm 84:0b3ab51c8877 508 */
bogdanm 84:0b3ab51c8877 509 #define __HAL_LPTIM_DISABLE_INTERRUPT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
bogdanm 84:0b3ab51c8877 510
bogdanm 84:0b3ab51c8877 511 /**
bogdanm 84:0b3ab51c8877 512 * @brief Checks whether the specified LPTIM interrupt is set or not.
bogdanm 84:0b3ab51c8877 513 * @param __HANDLE__ : LPTIM handle.
bogdanm 84:0b3ab51c8877 514 * @param __INTERRUPT__ : LPTIM interrupt to check.
bogdanm 84:0b3ab51c8877 515 * This parameter can be a value of:
bogdanm 84:0b3ab51c8877 516 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
bogdanm 84:0b3ab51c8877 517 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
bogdanm 84:0b3ab51c8877 518 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
bogdanm 84:0b3ab51c8877 519 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
bogdanm 84:0b3ab51c8877 520 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
bogdanm 84:0b3ab51c8877 521 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
bogdanm 84:0b3ab51c8877 522 * @arg LPTIM_IT_CMPM : Compare match Interrupt.
bogdanm 84:0b3ab51c8877 523 * @retval Interrupt status.
bogdanm 84:0b3ab51c8877 524 */
bogdanm 84:0b3ab51c8877 525
bogdanm 92:4fc01daae5a5 526 #define __HAL_LPTIM_GET_ITSTATUS(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
bogdanm 92:4fc01daae5a5 527
bogdanm 92:4fc01daae5a5 528 /**
bogdanm 92:4fc01daae5a5 529 * @}
bogdanm 92:4fc01daae5a5 530 */
bogdanm 92:4fc01daae5a5 531
bogdanm 84:0b3ab51c8877 532 /* Exported functions --------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 533 /* Initialization/de-initialization functions ********************************/
bogdanm 84:0b3ab51c8877 534 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 535 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 536
bogdanm 84:0b3ab51c8877 537 /* MSP functions *************************************************************/
bogdanm 84:0b3ab51c8877 538 void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 539 void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 540
bogdanm 84:0b3ab51c8877 541 /* Start/Stop operation functions *********************************************/
bogdanm 84:0b3ab51c8877 542 /* ################################# PWM Mode ################################*/
bogdanm 84:0b3ab51c8877 543 /* Blocking mode: Polling */
bogdanm 84:0b3ab51c8877 544 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
bogdanm 84:0b3ab51c8877 545 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 546 /* Non-Blocking mode: Interrupt */
bogdanm 84:0b3ab51c8877 547 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
bogdanm 84:0b3ab51c8877 548 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 549
bogdanm 84:0b3ab51c8877 550 /* ############################# One Pulse Mode ##############################*/
bogdanm 84:0b3ab51c8877 551 /* Blocking mode: Polling */
bogdanm 84:0b3ab51c8877 552 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
bogdanm 84:0b3ab51c8877 553 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 554 /* Non-Blocking mode: Interrupt */
bogdanm 84:0b3ab51c8877 555 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
bogdanm 84:0b3ab51c8877 556 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 557
bogdanm 84:0b3ab51c8877 558 /* ############################## Set once Mode ##############################*/
bogdanm 84:0b3ab51c8877 559 /* Blocking mode: Polling */
bogdanm 84:0b3ab51c8877 560 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
bogdanm 84:0b3ab51c8877 561 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 562 /* Non-Blocking mode: Interrupt */
bogdanm 84:0b3ab51c8877 563 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
bogdanm 84:0b3ab51c8877 564 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 565
bogdanm 84:0b3ab51c8877 566 /* ############################### Encoder Mode ##############################*/
bogdanm 84:0b3ab51c8877 567 /* Blocking mode: Polling */
bogdanm 84:0b3ab51c8877 568 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
bogdanm 84:0b3ab51c8877 569 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 570 /* Non-Blocking mode: Interrupt */
bogdanm 84:0b3ab51c8877 571 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
bogdanm 84:0b3ab51c8877 572 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 573
bogdanm 84:0b3ab51c8877 574 /* ############################# Time out Mode ##############################*/
bogdanm 84:0b3ab51c8877 575 /* Blocking mode: Polling */
bogdanm 84:0b3ab51c8877 576 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
bogdanm 84:0b3ab51c8877 577 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 578 /* Non-Blocking mode: Interrupt */
bogdanm 84:0b3ab51c8877 579 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
bogdanm 84:0b3ab51c8877 580 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 581
bogdanm 84:0b3ab51c8877 582 /* ############################## Counter Mode ###############################*/
bogdanm 84:0b3ab51c8877 583 /* Blocking mode: Polling */
bogdanm 84:0b3ab51c8877 584 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
bogdanm 84:0b3ab51c8877 585 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 586 /* Non-Blocking mode: Interrupt */
bogdanm 84:0b3ab51c8877 587 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
bogdanm 84:0b3ab51c8877 588 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 589
bogdanm 84:0b3ab51c8877 590 /* Reading operation functions ************************************************/
bogdanm 84:0b3ab51c8877 591 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 592 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 593 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 594
bogdanm 84:0b3ab51c8877 595 /* LPTIM IRQ functions *******************************************************/
bogdanm 84:0b3ab51c8877 596 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 597
bogdanm 84:0b3ab51c8877 598 /* CallBack functions ********************************************************/
bogdanm 84:0b3ab51c8877 599 void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 600 void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 601 void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 602 void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 603 void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 604 void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 605 void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 606
bogdanm 84:0b3ab51c8877 607 /* Peripheral State functions ************************************************/
bogdanm 84:0b3ab51c8877 608 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim);
bogdanm 84:0b3ab51c8877 609
bogdanm 84:0b3ab51c8877 610 /**
bogdanm 84:0b3ab51c8877 611 * @}
bogdanm 84:0b3ab51c8877 612 */
bogdanm 84:0b3ab51c8877 613
bogdanm 84:0b3ab51c8877 614 /**
bogdanm 84:0b3ab51c8877 615 * @}
bogdanm 84:0b3ab51c8877 616 */
bogdanm 84:0b3ab51c8877 617
bogdanm 84:0b3ab51c8877 618 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 619 }
bogdanm 84:0b3ab51c8877 620 #endif
bogdanm 84:0b3ab51c8877 621
bogdanm 84:0b3ab51c8877 622 #endif /* __STM32L0xx_HAL_LPTIM_H */
bogdanm 84:0b3ab51c8877 623
bogdanm 84:0b3ab51c8877 624 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/