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TARGET_NUCLEO_L053R8/stm32l0xx_hal_iwdg.h@92:4fc01daae5a5, 2014-11-27 (annotated)

Committer:
bogdanm
Date:
Thu Nov 27 13:33:22 2014 +0000
Revision:
92:4fc01daae5a5
Parent:
84:0b3ab51c8877
Child:
96:487b796308b0
Release 92 of the mbed libray



Main changes:



- nRF51822: fixed pin assignment issues

- ST targets moving to the STM32Cube driver

- LPC1439: fixed serial interrupt issue

- first Cortex-A platform supported in mbed (RZ_A1H)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 84:0b3ab51c8877 1 /**
bogdanm 84:0b3ab51c8877 2 ******************************************************************************
bogdanm 84:0b3ab51c8877 3 * @file stm32l0xx_hal_iwdg.h
bogdanm 84:0b3ab51c8877 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 18-June-2014
bogdanm 84:0b3ab51c8877 7 * @brief Header file of IWDG HAL module.
bogdanm 84:0b3ab51c8877 8 ******************************************************************************
bogdanm 84:0b3ab51c8877 9 * @attention
bogdanm 84:0b3ab51c8877 10 *
bogdanm 84:0b3ab51c8877 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 84:0b3ab51c8877 12 *
bogdanm 84:0b3ab51c8877 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 84:0b3ab51c8877 14 * are permitted provided that the following conditions are met:
bogdanm 84:0b3ab51c8877 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 84:0b3ab51c8877 16 * this list of conditions and the following disclaimer.
bogdanm 84:0b3ab51c8877 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 84:0b3ab51c8877 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 84:0b3ab51c8877 19 * and/or other materials provided with the distribution.
bogdanm 84:0b3ab51c8877 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 84:0b3ab51c8877 21 * may be used to endorse or promote products derived from this software
bogdanm 84:0b3ab51c8877 22 * without specific prior written permission.
bogdanm 84:0b3ab51c8877 23 *
bogdanm 84:0b3ab51c8877 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 84:0b3ab51c8877 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 84:0b3ab51c8877 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 84:0b3ab51c8877 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 84:0b3ab51c8877 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 84:0b3ab51c8877 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 84:0b3ab51c8877 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 84:0b3ab51c8877 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 84:0b3ab51c8877 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 84:0b3ab51c8877 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 84:0b3ab51c8877 34 *
bogdanm 84:0b3ab51c8877 35 ******************************************************************************
bogdanm 84:0b3ab51c8877 36 */
bogdanm 84:0b3ab51c8877 37
bogdanm 84:0b3ab51c8877 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 84:0b3ab51c8877 39 #ifndef __STM32L0xx_HAL_IWDG_H
bogdanm 84:0b3ab51c8877 40 #define __STM32L0xx_HAL_IWDG_H
bogdanm 84:0b3ab51c8877 41
bogdanm 84:0b3ab51c8877 42 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 43 extern "C" {
bogdanm 84:0b3ab51c8877 44 #endif
bogdanm 84:0b3ab51c8877 45
bogdanm 84:0b3ab51c8877 46 /* Includes ------------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 47 #include "stm32l0xx_hal_def.h"
bogdanm 84:0b3ab51c8877 48
bogdanm 84:0b3ab51c8877 49 /** @addtogroup STM32L0xx_HAL_Driver
bogdanm 84:0b3ab51c8877 50 * @{
bogdanm 84:0b3ab51c8877 51 */
bogdanm 84:0b3ab51c8877 52
bogdanm 84:0b3ab51c8877 53 /** @addtogroup IWDG
bogdanm 84:0b3ab51c8877 54 * @{
bogdanm 84:0b3ab51c8877 55 */
bogdanm 84:0b3ab51c8877 56
bogdanm 84:0b3ab51c8877 57 /* Exported types ------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 58
bogdanm 92:4fc01daae5a5 59 /** @defgroup IWDG_Exported_Types IWDG Exported Types
bogdanm 92:4fc01daae5a5 60 * @{
bogdanm 92:4fc01daae5a5 61 */
bogdanm 92:4fc01daae5a5 62
bogdanm 84:0b3ab51c8877 63 /**
bogdanm 84:0b3ab51c8877 64 * @brief IWDG HAL State Structure definition
bogdanm 84:0b3ab51c8877 65 */
bogdanm 84:0b3ab51c8877 66 typedef enum
bogdanm 84:0b3ab51c8877 67 {
bogdanm 84:0b3ab51c8877 68 HAL_IWDG_STATE_RESET = 0x00, /*!< IWDG not yet initialized or disabled */
bogdanm 84:0b3ab51c8877 69 HAL_IWDG_STATE_READY = 0x01, /*!< IWDG initialized and ready for use */
bogdanm 84:0b3ab51c8877 70 HAL_IWDG_STATE_BUSY = 0x02, /*!< IWDG internal process is ongoing */
bogdanm 84:0b3ab51c8877 71 HAL_IWDG_STATE_TIMEOUT = 0x03, /*!< IWDG timeout state */
bogdanm 84:0b3ab51c8877 72 HAL_IWDG_STATE_ERROR = 0x04 /*!< IWDG error state */
bogdanm 84:0b3ab51c8877 73
bogdanm 84:0b3ab51c8877 74 }HAL_IWDG_StateTypeDef;
bogdanm 84:0b3ab51c8877 75
bogdanm 84:0b3ab51c8877 76 /**
bogdanm 84:0b3ab51c8877 77 * @brief IWDG Init structure definition
bogdanm 84:0b3ab51c8877 78 */
bogdanm 84:0b3ab51c8877 79 typedef struct
bogdanm 84:0b3ab51c8877 80 {
bogdanm 84:0b3ab51c8877 81 uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
bogdanm 84:0b3ab51c8877 82 This parameter can be a value of @ref IWDG_Prescaler */
bogdanm 84:0b3ab51c8877 83
bogdanm 84:0b3ab51c8877 84 uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
bogdanm 84:0b3ab51c8877 85 This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
bogdanm 84:0b3ab51c8877 86
bogdanm 84:0b3ab51c8877 87 uint32_t Window; /*!< Specifies the window value to be compared to the down-counter.
bogdanm 84:0b3ab51c8877 88 This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
bogdanm 84:0b3ab51c8877 89
bogdanm 84:0b3ab51c8877 90 } IWDG_InitTypeDef;
bogdanm 84:0b3ab51c8877 91
bogdanm 84:0b3ab51c8877 92 /**
bogdanm 92:4fc01daae5a5 93 * @brief IWDG Handle Structure definition
bogdanm 84:0b3ab51c8877 94 */
bogdanm 84:0b3ab51c8877 95 typedef struct
bogdanm 84:0b3ab51c8877 96 {
bogdanm 84:0b3ab51c8877 97 IWDG_TypeDef *Instance; /*!< Register base address */
bogdanm 84:0b3ab51c8877 98
bogdanm 84:0b3ab51c8877 99 IWDG_InitTypeDef Init; /*!< IWDG required parameters */
bogdanm 84:0b3ab51c8877 100
bogdanm 92:4fc01daae5a5 101 HAL_LockTypeDef Lock; /*!< IWDG Locking object */
bogdanm 84:0b3ab51c8877 102
bogdanm 84:0b3ab51c8877 103 __IO HAL_IWDG_StateTypeDef State; /*!< IWDG communication state */
bogdanm 84:0b3ab51c8877 104
bogdanm 84:0b3ab51c8877 105 }IWDG_HandleTypeDef;
bogdanm 84:0b3ab51c8877 106
bogdanm 92:4fc01daae5a5 107 /**
bogdanm 92:4fc01daae5a5 108 * @}
bogdanm 92:4fc01daae5a5 109 */
bogdanm 92:4fc01daae5a5 110
bogdanm 84:0b3ab51c8877 111 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 112
bogdanm 92:4fc01daae5a5 113 /** @defgroup IWDG_Exported_Constants IWDG Exported Constants
bogdanm 84:0b3ab51c8877 114 * @{
bogdanm 84:0b3ab51c8877 115 */
bogdanm 84:0b3ab51c8877 116
bogdanm 92:4fc01daae5a5 117 /** @defgroup IWDG_Registers_BitMask IWDG_Registers_BitMask
bogdanm 84:0b3ab51c8877 118 * @brief IWDG registers bit mask
bogdanm 84:0b3ab51c8877 119 * @{
bogdanm 84:0b3ab51c8877 120 */
bogdanm 84:0b3ab51c8877 121 /* --- KR Register ---*/
bogdanm 84:0b3ab51c8877 122 /* KR register bit mask */
bogdanm 92:4fc01daae5a5 123 #define KR_KEY_RELOAD ((uint32_t)0xAAAA) /*!< IWDG Reload Counter Enable */
bogdanm 92:4fc01daae5a5 124 #define KR_KEY_ENABLE ((uint32_t)0xCCCC) /*!< IWDG Peripheral Enable */
bogdanm 92:4fc01daae5a5 125 #define KR_KEY_EWA ((uint32_t)0x5555) /*!< IWDG KR Write Access Enable */
bogdanm 92:4fc01daae5a5 126 #define KR_KEY_DWA ((uint32_t)0x0000) /*!< IWDG KR Write Access Disable */
bogdanm 84:0b3ab51c8877 127
bogdanm 92:4fc01daae5a5 128 #define IS_IWDG_KR(__KR__) (((__KR__) == KR_KEY_RELOAD) || \
bogdanm 92:4fc01daae5a5 129 ((__KR__) == KR_KEY_ENABLE))|| \
bogdanm 92:4fc01daae5a5 130 ((__KR__) == KR_KEY_EWA)) || \
bogdanm 92:4fc01daae5a5 131 ((__KR__) == KR_KEY_DWA))
bogdanm 84:0b3ab51c8877 132 /**
bogdanm 84:0b3ab51c8877 133 * @}
bogdanm 84:0b3ab51c8877 134 */
bogdanm 84:0b3ab51c8877 135
bogdanm 92:4fc01daae5a5 136 /** @defgroup IWDG_Flag_definition IWDG_Flag_definition
bogdanm 84:0b3ab51c8877 137 * @{
bogdanm 84:0b3ab51c8877 138 */
bogdanm 92:4fc01daae5a5 139 #define IWDG_FLAG_PVU ((uint32_t)IWDG_SR_PVU) /*!< Watchdog counter prescaler value update flag */
bogdanm 92:4fc01daae5a5 140 #define IWDG_FLAG_RVU ((uint32_t)IWDG_SR_RVU) /*!< Watchdog counter reload value update flag */
bogdanm 92:4fc01daae5a5 141 #define IWDG_FLAG_WVU ((uint32_t)IWDG_SR_WVU) /*!< Watchdog counter window value update Flag */
bogdanm 84:0b3ab51c8877 142
bogdanm 84:0b3ab51c8877 143 #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || \
bogdanm 84:0b3ab51c8877 144 ((FLAG) == IWDG_FLAG_RVU) || \
bogdanm 84:0b3ab51c8877 145 ((FLAG) == IWDG_FLAG_WVU))
bogdanm 84:0b3ab51c8877 146
bogdanm 84:0b3ab51c8877 147 /**
bogdanm 84:0b3ab51c8877 148 * @}
bogdanm 84:0b3ab51c8877 149 */
bogdanm 84:0b3ab51c8877 150
bogdanm 92:4fc01daae5a5 151 /** @defgroup IWDG_Prescaler IWDG_Prescaler
bogdanm 84:0b3ab51c8877 152 * @{
bogdanm 84:0b3ab51c8877 153 */
bogdanm 84:0b3ab51c8877 154 #define IWDG_PRESCALER_4 ((uint8_t)0x00) /*!< IWDG prescaler set to 4 */
bogdanm 92:4fc01daae5a5 155 #define IWDG_PRESCALER_8 ((uint8_t)(IWDG_PR_PR_0)) /*!< IWDG prescaler set to 8 */
bogdanm 92:4fc01daae5a5 156 #define IWDG_PRESCALER_16 ((uint8_t)(IWDG_PR_PR_1)) /*!< IWDG prescaler set to 16 */
bogdanm 92:4fc01daae5a5 157 #define IWDG_PRESCALER_32 ((uint8_t)(IWDG_PR_PR_1 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 32 */
bogdanm 92:4fc01daae5a5 158 #define IWDG_PRESCALER_64 ((uint8_t)(IWDG_PR_PR_2)) /*!< IWDG prescaler set to 64 */
bogdanm 92:4fc01daae5a5 159 #define IWDG_PRESCALER_128 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 128 */
bogdanm 92:4fc01daae5a5 160 #define IWDG_PRESCALER_256 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_1)) /*!< IWDG prescaler set to 256 */
bogdanm 84:0b3ab51c8877 161
bogdanm 92:4fc01daae5a5 162 #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
bogdanm 92:4fc01daae5a5 163 ((__PRESCALER__) == IWDG_PRESCALER_8) || \
bogdanm 92:4fc01daae5a5 164 ((__PRESCALER__) == IWDG_PRESCALER_16) || \
bogdanm 92:4fc01daae5a5 165 ((__PRESCALER__) == IWDG_PRESCALER_32) || \
bogdanm 92:4fc01daae5a5 166 ((__PRESCALER__) == IWDG_PRESCALER_64) || \
bogdanm 92:4fc01daae5a5 167 ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
bogdanm 92:4fc01daae5a5 168 ((__PRESCALER__) == IWDG_PRESCALER_256))
bogdanm 84:0b3ab51c8877 169
bogdanm 84:0b3ab51c8877 170 /**
bogdanm 84:0b3ab51c8877 171 * @}
bogdanm 84:0b3ab51c8877 172 */
bogdanm 84:0b3ab51c8877 173
bogdanm 92:4fc01daae5a5 174 /** @defgroup IWDG_Reload_Value IWDG_Reload_Value
bogdanm 84:0b3ab51c8877 175 * @{
bogdanm 84:0b3ab51c8877 176 */
bogdanm 92:4fc01daae5a5 177 #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= 0xFFF)
bogdanm 84:0b3ab51c8877 178
bogdanm 84:0b3ab51c8877 179 /**
bogdanm 84:0b3ab51c8877 180 * @}
bogdanm 84:0b3ab51c8877 181 */
bogdanm 84:0b3ab51c8877 182
bogdanm 84:0b3ab51c8877 183 /** @defgroup IWDG_CounterWindow_Value
bogdanm 84:0b3ab51c8877 184 * @{
bogdanm 84:0b3ab51c8877 185 */
bogdanm 84:0b3ab51c8877 186 #define IS_IWDG_WINDOW(VALUE) ((VALUE) <= 0xFFF)
bogdanm 84:0b3ab51c8877 187
bogdanm 84:0b3ab51c8877 188 /**
bogdanm 84:0b3ab51c8877 189 * @}
bogdanm 84:0b3ab51c8877 190 */
bogdanm 84:0b3ab51c8877 191
bogdanm 92:4fc01daae5a5 192 /** @defgroup IWDG_Window
bogdanm 84:0b3ab51c8877 193 * @{
bogdanm 84:0b3ab51c8877 194 */
bogdanm 84:0b3ab51c8877 195
bogdanm 84:0b3ab51c8877 196 #define IWDG_WINDOW_DISABLE 0xFFF
bogdanm 84:0b3ab51c8877 197 /**
bogdanm 84:0b3ab51c8877 198 * @}
bogdanm 84:0b3ab51c8877 199 */
bogdanm 84:0b3ab51c8877 200
bogdanm 84:0b3ab51c8877 201 /**
bogdanm 84:0b3ab51c8877 202 * @}
bogdanm 84:0b3ab51c8877 203 */
bogdanm 84:0b3ab51c8877 204
bogdanm 84:0b3ab51c8877 205 /* Exported macro ------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 206 /** @defgroup IWDG_Exported_Macro
bogdanm 84:0b3ab51c8877 207 * @{
bogdanm 84:0b3ab51c8877 208 */
bogdanm 84:0b3ab51c8877 209
bogdanm 84:0b3ab51c8877 210 /** @brief Reset IWDG handle state
bogdanm 84:0b3ab51c8877 211 * @param __HANDLE__: IWDG handle
bogdanm 84:0b3ab51c8877 212 * @retval None
bogdanm 84:0b3ab51c8877 213 */
bogdanm 84:0b3ab51c8877 214 #define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IWDG_STATE_RESET)
bogdanm 84:0b3ab51c8877 215
bogdanm 84:0b3ab51c8877 216 /**
bogdanm 84:0b3ab51c8877 217 * @brief Enables the IWDG peripheral.
bogdanm 84:0b3ab51c8877 218 * @param __HANDLE__: IWDG handle
bogdanm 84:0b3ab51c8877 219 * @retval None
bogdanm 84:0b3ab51c8877 220 */
bogdanm 92:4fc01daae5a5 221 #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, KR_KEY_ENABLE)
bogdanm 84:0b3ab51c8877 222
bogdanm 84:0b3ab51c8877 223 /**
bogdanm 84:0b3ab51c8877 224 * @brief Reloads IWDG counter with value defined in the reload register
bogdanm 84:0b3ab51c8877 225 * (write access to IWDG_PR and IWDG_RLR registers disabled).
bogdanm 84:0b3ab51c8877 226 * @param __HANDLE__: IWDG handle
bogdanm 84:0b3ab51c8877 227 * @retval None
bogdanm 84:0b3ab51c8877 228 */
bogdanm 92:4fc01daae5a5 229 #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, KR_KEY_RELOAD)
bogdanm 84:0b3ab51c8877 230
bogdanm 84:0b3ab51c8877 231 /**
bogdanm 84:0b3ab51c8877 232 * @brief Enables write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
bogdanm 84:0b3ab51c8877 233 * @param __HANDLE__: IWDG handle
bogdanm 84:0b3ab51c8877 234 * @retval None
bogdanm 84:0b3ab51c8877 235 */
bogdanm 92:4fc01daae5a5 236 #define __HAL_IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, KR_KEY_EWA)
bogdanm 84:0b3ab51c8877 237
bogdanm 84:0b3ab51c8877 238 /**
bogdanm 84:0b3ab51c8877 239 * @brief Disables write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
bogdanm 84:0b3ab51c8877 240 * @param __HANDLE__: IWDG handle
bogdanm 84:0b3ab51c8877 241 * @retval None
bogdanm 84:0b3ab51c8877 242 */
bogdanm 92:4fc01daae5a5 243 #define __HAL_IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, KR_KEY_DWA)
bogdanm 84:0b3ab51c8877 244
bogdanm 84:0b3ab51c8877 245 /**
bogdanm 84:0b3ab51c8877 246 * @brief Gets the selected IWDG's flag status.
bogdanm 84:0b3ab51c8877 247 * @param __HANDLE__: IWDG handle
bogdanm 84:0b3ab51c8877 248 * @param __FLAG__: specifies the flag to check.
bogdanm 84:0b3ab51c8877 249 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 250 * @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag
bogdanm 84:0b3ab51c8877 251 * @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag
bogdanm 84:0b3ab51c8877 252 * @arg IWDG_FLAG_WVU: Watchdog counter window value flag
bogdanm 84:0b3ab51c8877 253 * @retval The new state of __FLAG__ (TRUE or FALSE) .
bogdanm 84:0b3ab51c8877 254 */
bogdanm 84:0b3ab51c8877 255 #define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
bogdanm 84:0b3ab51c8877 256
bogdanm 84:0b3ab51c8877 257 /**
bogdanm 84:0b3ab51c8877 258 * @}
bogdanm 84:0b3ab51c8877 259 */
bogdanm 84:0b3ab51c8877 260
bogdanm 92:4fc01daae5a5 261 /* Exported functions --------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 262
bogdanm 92:4fc01daae5a5 263 /** @addtogroup IWDG_Exported_Functions
bogdanm 92:4fc01daae5a5 264 * @{
bogdanm 92:4fc01daae5a5 265 */
bogdanm 84:0b3ab51c8877 266
bogdanm 84:0b3ab51c8877 267 /* Initialization/de-initialization functions ********************************/
bogdanm 84:0b3ab51c8877 268 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
bogdanm 84:0b3ab51c8877 269 void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg);
bogdanm 84:0b3ab51c8877 270
bogdanm 84:0b3ab51c8877 271 /* I/O operation functions ****************************************************/
bogdanm 84:0b3ab51c8877 272 HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg);
bogdanm 84:0b3ab51c8877 273 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
bogdanm 84:0b3ab51c8877 274
bogdanm 84:0b3ab51c8877 275 /* Peripheral State functions ************************************************/
bogdanm 84:0b3ab51c8877 276 HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg);
bogdanm 84:0b3ab51c8877 277
bogdanm 84:0b3ab51c8877 278 /**
bogdanm 84:0b3ab51c8877 279 * @}
bogdanm 92:4fc01daae5a5 280 */
bogdanm 92:4fc01daae5a5 281
bogdanm 92:4fc01daae5a5 282 /**
bogdanm 92:4fc01daae5a5 283 * @}
bogdanm 84:0b3ab51c8877 284 */
bogdanm 84:0b3ab51c8877 285
bogdanm 84:0b3ab51c8877 286 /**
bogdanm 84:0b3ab51c8877 287 * @}
bogdanm 84:0b3ab51c8877 288 */
bogdanm 84:0b3ab51c8877 289
bogdanm 84:0b3ab51c8877 290 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 291 }
bogdanm 84:0b3ab51c8877 292 #endif
bogdanm 84:0b3ab51c8877 293
bogdanm 84:0b3ab51c8877 294 #endif /* __STM32L0xx_HAL_IWDG_H */
bogdanm 84:0b3ab51c8877 295
bogdanm 84:0b3ab51c8877 296 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/