Ricardo Benitez / mbed

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TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_wwdg.h@92:4fc01daae5a5, 2014-11-27 (annotated)

Committer:
bogdanm
Date:
Thu Nov 27 13:33:22 2014 +0000
Revision:
92:4fc01daae5a5
Child:
99:dbbf35b96557
Release 92 of the mbed libray



Main changes:



- nRF51822: fixed pin assignment issues

- ST targets moving to the STM32Cube driver

- LPC1439: fixed serial interrupt issue

- first Cortex-A platform supported in mbed (RZ_A1H)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_wwdg.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 19-June-2014
bogdanm 92:4fc01daae5a5 7 * @brief Header file of WWDG HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
bogdanm 92:4fc01daae5a5 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_WWDG_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_WWDG_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 47 #include "stm32f4xx_hal_def.h"
bogdanm 92:4fc01daae5a5 48
bogdanm 92:4fc01daae5a5 49 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 50 * @{
bogdanm 92:4fc01daae5a5 51 */
bogdanm 92:4fc01daae5a5 52
bogdanm 92:4fc01daae5a5 53 /** @addtogroup WWDG
bogdanm 92:4fc01daae5a5 54 * @{
bogdanm 92:4fc01daae5a5 55 */
bogdanm 92:4fc01daae5a5 56
bogdanm 92:4fc01daae5a5 57 /* Exported types ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 58
bogdanm 92:4fc01daae5a5 59 /**
bogdanm 92:4fc01daae5a5 60 * @brief WWDG HAL State Structure definition
bogdanm 92:4fc01daae5a5 61 */
bogdanm 92:4fc01daae5a5 62 typedef enum
bogdanm 92:4fc01daae5a5 63 {
bogdanm 92:4fc01daae5a5 64 HAL_WWDG_STATE_RESET = 0x00, /*!< WWDG not yet initialized or disabled */
bogdanm 92:4fc01daae5a5 65 HAL_WWDG_STATE_READY = 0x01, /*!< WWDG initialized and ready for use */
bogdanm 92:4fc01daae5a5 66 HAL_WWDG_STATE_BUSY = 0x02, /*!< WWDG internal process is ongoing */
bogdanm 92:4fc01daae5a5 67 HAL_WWDG_STATE_TIMEOUT = 0x03, /*!< WWDG timeout state */
bogdanm 92:4fc01daae5a5 68 HAL_WWDG_STATE_ERROR = 0x04 /*!< WWDG error state */
bogdanm 92:4fc01daae5a5 69 }HAL_WWDG_StateTypeDef;
bogdanm 92:4fc01daae5a5 70
bogdanm 92:4fc01daae5a5 71 /**
bogdanm 92:4fc01daae5a5 72 * @brief WWDG Init structure definition
bogdanm 92:4fc01daae5a5 73 */
bogdanm 92:4fc01daae5a5 74 typedef struct
bogdanm 92:4fc01daae5a5 75 {
bogdanm 92:4fc01daae5a5 76 uint32_t Prescaler; /*!< Specifies the prescaler value of the WWDG.
bogdanm 92:4fc01daae5a5 77 This parameter can be a value of @ref WWDG_Prescaler */
bogdanm 92:4fc01daae5a5 78
bogdanm 92:4fc01daae5a5 79 uint32_t Window; /*!< Specifies the WWDG window value to be compared to the downcounter.
bogdanm 92:4fc01daae5a5 80 This parameter must be a number lower than Max_Data = 0x80 */
bogdanm 92:4fc01daae5a5 81
bogdanm 92:4fc01daae5a5 82 uint32_t Counter; /*!< Specifies the WWDG free-running downcounter value.
bogdanm 92:4fc01daae5a5 83 This parameter must be a number between Min_Data = 0x40 and Max_Data = 0x7F */
bogdanm 92:4fc01daae5a5 84
bogdanm 92:4fc01daae5a5 85 }WWDG_InitTypeDef;
bogdanm 92:4fc01daae5a5 86
bogdanm 92:4fc01daae5a5 87 /**
bogdanm 92:4fc01daae5a5 88 * @brief WWDG handle Structure definition
bogdanm 92:4fc01daae5a5 89 */
bogdanm 92:4fc01daae5a5 90 typedef struct
bogdanm 92:4fc01daae5a5 91 {
bogdanm 92:4fc01daae5a5 92 WWDG_TypeDef *Instance; /*!< Register base address */
bogdanm 92:4fc01daae5a5 93
bogdanm 92:4fc01daae5a5 94 WWDG_InitTypeDef Init; /*!< WWDG required parameters */
bogdanm 92:4fc01daae5a5 95
bogdanm 92:4fc01daae5a5 96 HAL_LockTypeDef Lock; /*!< WWDG locking object */
bogdanm 92:4fc01daae5a5 97
bogdanm 92:4fc01daae5a5 98 __IO HAL_WWDG_StateTypeDef State; /*!< WWDG communication state */
bogdanm 92:4fc01daae5a5 99
bogdanm 92:4fc01daae5a5 100 }WWDG_HandleTypeDef;
bogdanm 92:4fc01daae5a5 101
bogdanm 92:4fc01daae5a5 102 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 103
bogdanm 92:4fc01daae5a5 104 /** @defgroup WWDG_Exported_Constants
bogdanm 92:4fc01daae5a5 105 * @{
bogdanm 92:4fc01daae5a5 106 */
bogdanm 92:4fc01daae5a5 107
bogdanm 92:4fc01daae5a5 108 /** @defgroup WWDG_BitAddress_AliasRegion
bogdanm 92:4fc01daae5a5 109 * @brief WWDG registers bit address in the alias region
bogdanm 92:4fc01daae5a5 110 * @{
bogdanm 92:4fc01daae5a5 111 */
bogdanm 92:4fc01daae5a5 112
bogdanm 92:4fc01daae5a5 113 /* --- CFR Register ---*/
bogdanm 92:4fc01daae5a5 114 /* Alias word address of EWI bit */
bogdanm 92:4fc01daae5a5 115 #define CFR_BASE (uint32_t)(WWDG_BASE + 0x04)
bogdanm 92:4fc01daae5a5 116
bogdanm 92:4fc01daae5a5 117 /**
bogdanm 92:4fc01daae5a5 118 * @}
bogdanm 92:4fc01daae5a5 119 */
bogdanm 92:4fc01daae5a5 120
bogdanm 92:4fc01daae5a5 121 /** @defgroup WWDG_Interrupt_definition
bogdanm 92:4fc01daae5a5 122 * @{
bogdanm 92:4fc01daae5a5 123 */
bogdanm 92:4fc01daae5a5 124 #define WWDG_IT_EWI ((uint32_t)WWDG_CFR_EWI)
bogdanm 92:4fc01daae5a5 125
bogdanm 92:4fc01daae5a5 126 #define IS_WWDG_IT(__IT__) ((__IT__) == WWDG_IT_EWI)
bogdanm 92:4fc01daae5a5 127
bogdanm 92:4fc01daae5a5 128 /**
bogdanm 92:4fc01daae5a5 129 * @}
bogdanm 92:4fc01daae5a5 130 */
bogdanm 92:4fc01daae5a5 131
bogdanm 92:4fc01daae5a5 132 /** @defgroup WWDG_Flag_definition
bogdanm 92:4fc01daae5a5 133 * @brief WWDG Flag definition
bogdanm 92:4fc01daae5a5 134 * @{
bogdanm 92:4fc01daae5a5 135 */
bogdanm 92:4fc01daae5a5 136 #define WWDG_FLAG_EWIF ((uint32_t)WWDG_SR_EWIF) /*!< Early wakeup interrupt flag */
bogdanm 92:4fc01daae5a5 137 #define IS_WWDG_FLAG(__FLAG__) ((__FLAG__) == WWDG_FLAG_EWIF))
bogdanm 92:4fc01daae5a5 138
bogdanm 92:4fc01daae5a5 139
bogdanm 92:4fc01daae5a5 140 /**
bogdanm 92:4fc01daae5a5 141 * @}
bogdanm 92:4fc01daae5a5 142 */
bogdanm 92:4fc01daae5a5 143
bogdanm 92:4fc01daae5a5 144 /** @defgroup WWDG_Prescaler
bogdanm 92:4fc01daae5a5 145 * @{
bogdanm 92:4fc01daae5a5 146 */
bogdanm 92:4fc01daae5a5 147 #define WWDG_PRESCALER_1 ((uint32_t)0x00000000) /*!< WWDG counter clock = (PCLK1/4096)/1 */
bogdanm 92:4fc01daae5a5 148 #define WWDG_PRESCALER_2 ((uint32_t)WWDG_CFR_WDGTB0) /*!< WWDG counter clock = (PCLK1/4096)/2 */
bogdanm 92:4fc01daae5a5 149 #define WWDG_PRESCALER_4 ((uint32_t)WWDG_CFR_WDGTB1) /*!< WWDG counter clock = (PCLK1/4096)/4 */
bogdanm 92:4fc01daae5a5 150 #define WWDG_PRESCALER_8 ((uint32_t)WWDG_CFR_WDGTB) /*!< WWDG counter clock = (PCLK1/4096)/8 */
bogdanm 92:4fc01daae5a5 151
bogdanm 92:4fc01daae5a5 152 #define IS_WWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == WWDG_PRESCALER_1) || \
bogdanm 92:4fc01daae5a5 153 ((__PRESCALER__) == WWDG_PRESCALER_2) || \
bogdanm 92:4fc01daae5a5 154 ((__PRESCALER__) == WWDG_PRESCALER_4) || \
bogdanm 92:4fc01daae5a5 155 ((__PRESCALER__) == WWDG_PRESCALER_8))
bogdanm 92:4fc01daae5a5 156
bogdanm 92:4fc01daae5a5 157 /**
bogdanm 92:4fc01daae5a5 158 * @}
bogdanm 92:4fc01daae5a5 159 */
bogdanm 92:4fc01daae5a5 160
bogdanm 92:4fc01daae5a5 161 /** @defgroup WWDG_Window
bogdanm 92:4fc01daae5a5 162 * @{
bogdanm 92:4fc01daae5a5 163 */
bogdanm 92:4fc01daae5a5 164 #define IS_WWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= 0x7F)
bogdanm 92:4fc01daae5a5 165
bogdanm 92:4fc01daae5a5 166 /**
bogdanm 92:4fc01daae5a5 167 * @}
bogdanm 92:4fc01daae5a5 168 */
bogdanm 92:4fc01daae5a5 169
bogdanm 92:4fc01daae5a5 170 /** @defgroup WWDG_Counter
bogdanm 92:4fc01daae5a5 171 * @{
bogdanm 92:4fc01daae5a5 172 */
bogdanm 92:4fc01daae5a5 173 #define IS_WWDG_COUNTER(__COUNTER__) (((__COUNTER__) >= 0x40) && ((__COUNTER__) <= 0x7F))
bogdanm 92:4fc01daae5a5 174
bogdanm 92:4fc01daae5a5 175 /**
bogdanm 92:4fc01daae5a5 176 * @}
bogdanm 92:4fc01daae5a5 177 */
bogdanm 92:4fc01daae5a5 178
bogdanm 92:4fc01daae5a5 179 /**
bogdanm 92:4fc01daae5a5 180 * @}
bogdanm 92:4fc01daae5a5 181 */
bogdanm 92:4fc01daae5a5 182
bogdanm 92:4fc01daae5a5 183 /* Exported macro ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 184
bogdanm 92:4fc01daae5a5 185 /** @brief Reset WWDG handle state
bogdanm 92:4fc01daae5a5 186 * @param __HANDLE__: WWDG handle
bogdanm 92:4fc01daae5a5 187 * @retval None
bogdanm 92:4fc01daae5a5 188 */
bogdanm 92:4fc01daae5a5 189 #define __HAL_WWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_WWDG_STATE_RESET)
bogdanm 92:4fc01daae5a5 190
bogdanm 92:4fc01daae5a5 191 /**
bogdanm 92:4fc01daae5a5 192 * @brief Enables the WWDG peripheral.
bogdanm 92:4fc01daae5a5 193 * @param __HANDLE__: WWDG handle
bogdanm 92:4fc01daae5a5 194 * @retval None
bogdanm 92:4fc01daae5a5 195 */
bogdanm 92:4fc01daae5a5 196 #define __HAL_WWDG_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, WWDG_CR_WDGA)
bogdanm 92:4fc01daae5a5 197
bogdanm 92:4fc01daae5a5 198 /**
bogdanm 92:4fc01daae5a5 199 * @brief Gets the selected WWDG's flag status.
bogdanm 92:4fc01daae5a5 200 * @param __HANDLE__: WWDG handle
bogdanm 92:4fc01daae5a5 201 * @param __FLAG__: specifies the flag to check.
bogdanm 92:4fc01daae5a5 202 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 203 * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag
bogdanm 92:4fc01daae5a5 204 * @retval The new state of WWDG_FLAG (SET or RESET).
bogdanm 92:4fc01daae5a5 205 */
bogdanm 92:4fc01daae5a5 206 #define __HAL_WWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
bogdanm 92:4fc01daae5a5 207
bogdanm 92:4fc01daae5a5 208 /**
bogdanm 92:4fc01daae5a5 209 * @brief Clears the WWDG's pending flags.
bogdanm 92:4fc01daae5a5 210 * @param __HANDLE__: WWDG handle
bogdanm 92:4fc01daae5a5 211 * @param __FLAG__: specifies the flag to clear.
bogdanm 92:4fc01daae5a5 212 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 213 * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag
bogdanm 92:4fc01daae5a5 214 * @retval None
bogdanm 92:4fc01daae5a5 215 */
bogdanm 92:4fc01daae5a5 216 #define __HAL_WWDG_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = ~(__FLAG__))
bogdanm 92:4fc01daae5a5 217
bogdanm 92:4fc01daae5a5 218 /**
bogdanm 92:4fc01daae5a5 219 * @brief Enables the WWDG early wakeup interrupt.
bogdanm 92:4fc01daae5a5 220 * @param __INTERRUPT__: specifies the interrupt to enable.
bogdanm 92:4fc01daae5a5 221 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 222 * @arg WWDG_IT_EWI: Early wakeup interrupt
bogdanm 92:4fc01daae5a5 223 * @note Once enabled this interrupt cannot be disabled except by a system reset.
bogdanm 92:4fc01daae5a5 224 * @retval None
bogdanm 92:4fc01daae5a5 225 */
bogdanm 92:4fc01daae5a5 226 #define __HAL_WWDG_ENABLE_IT(__INTERRUPT__) (*(__IO uint32_t *) CFR_BASE |= (__INTERRUPT__))
bogdanm 92:4fc01daae5a5 227
bogdanm 92:4fc01daae5a5 228 /** @brief Clear the WWDG's interrupt pending bits
bogdanm 92:4fc01daae5a5 229 * bits to clear the selected interrupt pending bits.
bogdanm 92:4fc01daae5a5 230 * @param __HANDLE__: WWDG handle
bogdanm 92:4fc01daae5a5 231 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
bogdanm 92:4fc01daae5a5 232 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 233 * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag
bogdanm 92:4fc01daae5a5 234 */
bogdanm 92:4fc01daae5a5 235 #define __HAL_WWDG_CLEAR_IT(__HANDLE__, __INTERRUPT__) __HAL_WWDG_CLEAR_FLAG((__HANDLE__), (__INTERRUPT__))
bogdanm 92:4fc01daae5a5 236 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 237
bogdanm 92:4fc01daae5a5 238 /* Initialization/de-initialization functions **********************************/
bogdanm 92:4fc01daae5a5 239 HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg);
bogdanm 92:4fc01daae5a5 240 HAL_StatusTypeDef HAL_WWDG_DeInit(WWDG_HandleTypeDef *hwwdg);
bogdanm 92:4fc01daae5a5 241 void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg);
bogdanm 92:4fc01daae5a5 242 void HAL_WWDG_MspDeInit(WWDG_HandleTypeDef *hwwdg);
bogdanm 92:4fc01daae5a5 243 void HAL_WWDG_WakeupCallback(WWDG_HandleTypeDef* hwwdg);
bogdanm 92:4fc01daae5a5 244
bogdanm 92:4fc01daae5a5 245 /* I/O operation functions ******************************************************/
bogdanm 92:4fc01daae5a5 246 HAL_StatusTypeDef HAL_WWDG_Start(WWDG_HandleTypeDef *hwwdg);
bogdanm 92:4fc01daae5a5 247 HAL_StatusTypeDef HAL_WWDG_Start_IT(WWDG_HandleTypeDef *hwwdg);
bogdanm 92:4fc01daae5a5 248 HAL_StatusTypeDef HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg, uint32_t Counter);
bogdanm 92:4fc01daae5a5 249 void HAL_WWDG_IRQHandler(WWDG_HandleTypeDef *hwwdg);
bogdanm 92:4fc01daae5a5 250
bogdanm 92:4fc01daae5a5 251 /* Peripheral State functions **************************************************/
bogdanm 92:4fc01daae5a5 252 HAL_WWDG_StateTypeDef HAL_WWDG_GetState(WWDG_HandleTypeDef *hwwdg);
bogdanm 92:4fc01daae5a5 253
bogdanm 92:4fc01daae5a5 254 /**
bogdanm 92:4fc01daae5a5 255 * @}
bogdanm 92:4fc01daae5a5 256 */
bogdanm 92:4fc01daae5a5 257
bogdanm 92:4fc01daae5a5 258 /**
bogdanm 92:4fc01daae5a5 259 * @}
bogdanm 92:4fc01daae5a5 260 */
bogdanm 92:4fc01daae5a5 261
bogdanm 92:4fc01daae5a5 262 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 263 }
bogdanm 92:4fc01daae5a5 264 #endif
bogdanm 92:4fc01daae5a5 265
bogdanm 92:4fc01daae5a5 266 #endif /* __STM32F4xx_HAL_WWDG_H */
bogdanm 92:4fc01daae5a5 267
bogdanm 92:4fc01daae5a5 268 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/