Ricardo Benitez / mbed

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TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_hash.h@92:4fc01daae5a5, 2014-11-27 (annotated)

Committer:
bogdanm
Date:
Thu Nov 27 13:33:22 2014 +0000
Revision:
92:4fc01daae5a5
Child:
99:dbbf35b96557
Release 92 of the mbed libray



Main changes:



- nRF51822: fixed pin assignment issues

- ST targets moving to the STM32Cube driver

- LPC1439: fixed serial interrupt issue

- first Cortex-A platform supported in mbed (RZ_A1H)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_hash.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 19-June-2014
bogdanm 92:4fc01daae5a5 7 * @brief Header file of HASH HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
bogdanm 92:4fc01daae5a5 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_HASH_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_HASH_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 #if defined(STM32F415xx) || defined(STM32F417xx) || defined(STM32F437xx) || defined(STM32F439xx)
bogdanm 92:4fc01daae5a5 47
bogdanm 92:4fc01daae5a5 48 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 49 #include "stm32f4xx_hal_def.h"
bogdanm 92:4fc01daae5a5 50
bogdanm 92:4fc01daae5a5 51 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 52 * @{
bogdanm 92:4fc01daae5a5 53 */
bogdanm 92:4fc01daae5a5 54
bogdanm 92:4fc01daae5a5 55 /** @addtogroup HASH
bogdanm 92:4fc01daae5a5 56 * @{
bogdanm 92:4fc01daae5a5 57 */
bogdanm 92:4fc01daae5a5 58
bogdanm 92:4fc01daae5a5 59 /* Exported types ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 60
bogdanm 92:4fc01daae5a5 61 /**
bogdanm 92:4fc01daae5a5 62 * @brief HASH Configuration Structure definition
bogdanm 92:4fc01daae5a5 63 */
bogdanm 92:4fc01daae5a5 64 typedef struct
bogdanm 92:4fc01daae5a5 65 {
bogdanm 92:4fc01daae5a5 66 uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string.
bogdanm 92:4fc01daae5a5 67 This parameter can be a value of @ref HASH_Data_Type */
bogdanm 92:4fc01daae5a5 68
bogdanm 92:4fc01daae5a5 69 uint32_t KeySize; /*!< The key size is used only in HMAC operation */
bogdanm 92:4fc01daae5a5 70
bogdanm 92:4fc01daae5a5 71 uint8_t* pKey; /*!< The key is used only in HMAC operation */
bogdanm 92:4fc01daae5a5 72 }HASH_InitTypeDef;
bogdanm 92:4fc01daae5a5 73
bogdanm 92:4fc01daae5a5 74 /**
bogdanm 92:4fc01daae5a5 75 * @brief HAL State structures definition
bogdanm 92:4fc01daae5a5 76 */
bogdanm 92:4fc01daae5a5 77 typedef enum
bogdanm 92:4fc01daae5a5 78 {
bogdanm 92:4fc01daae5a5 79 HAL_HASH_STATE_RESET = 0x00, /*!< HASH not yet initialized or disabled */
bogdanm 92:4fc01daae5a5 80 HAL_HASH_STATE_READY = 0x01, /*!< HASH initialized and ready for use */
bogdanm 92:4fc01daae5a5 81 HAL_HASH_STATE_BUSY = 0x02, /*!< HASH internal process is ongoing */
bogdanm 92:4fc01daae5a5 82 HAL_HASH_STATE_TIMEOUT = 0x03, /*!< HASH timeout state */
bogdanm 92:4fc01daae5a5 83 HAL_HASH_STATE_ERROR = 0x04 /*!< HASH error state */
bogdanm 92:4fc01daae5a5 84 }HAL_HASH_STATETypeDef;
bogdanm 92:4fc01daae5a5 85
bogdanm 92:4fc01daae5a5 86 /**
bogdanm 92:4fc01daae5a5 87 * @brief HAL phase structures definition
bogdanm 92:4fc01daae5a5 88 */
bogdanm 92:4fc01daae5a5 89 typedef enum
bogdanm 92:4fc01daae5a5 90 {
bogdanm 92:4fc01daae5a5 91 HAL_HASH_PHASE_READY = 0x01, /*!< HASH peripheral is ready for initialization */
bogdanm 92:4fc01daae5a5 92 HAL_HASH_PHASE_PROCESS = 0x02, /*!< HASH peripheral is in processing phase */
bogdanm 92:4fc01daae5a5 93 }HAL_HASHPhaseTypeDef;
bogdanm 92:4fc01daae5a5 94
bogdanm 92:4fc01daae5a5 95 /**
bogdanm 92:4fc01daae5a5 96 * @brief HASH Handle Structure definition
bogdanm 92:4fc01daae5a5 97 */
bogdanm 92:4fc01daae5a5 98 typedef struct
bogdanm 92:4fc01daae5a5 99 {
bogdanm 92:4fc01daae5a5 100 HASH_InitTypeDef Init; /*!< HASH required parameters */
bogdanm 92:4fc01daae5a5 101
bogdanm 92:4fc01daae5a5 102 uint8_t *pHashInBuffPtr; /*!< Pointer to input buffer */
bogdanm 92:4fc01daae5a5 103
bogdanm 92:4fc01daae5a5 104 uint8_t *pHashOutBuffPtr; /*!< Pointer to input buffer */
bogdanm 92:4fc01daae5a5 105
bogdanm 92:4fc01daae5a5 106 __IO uint32_t HashBuffSize; /*!< Size of buffer to be processed */
bogdanm 92:4fc01daae5a5 107
bogdanm 92:4fc01daae5a5 108 __IO uint32_t HashInCount; /*!< Counter of inputed data */
bogdanm 92:4fc01daae5a5 109
bogdanm 92:4fc01daae5a5 110 __IO uint32_t HashITCounter; /*!< Counter of issued interrupts */
bogdanm 92:4fc01daae5a5 111
bogdanm 92:4fc01daae5a5 112 HAL_StatusTypeDef Status; /*!< HASH peripheral status */
bogdanm 92:4fc01daae5a5 113
bogdanm 92:4fc01daae5a5 114 HAL_HASHPhaseTypeDef Phase; /*!< HASH peripheral phase */
bogdanm 92:4fc01daae5a5 115
bogdanm 92:4fc01daae5a5 116 DMA_HandleTypeDef *hdmain; /*!< HASH In DMA handle parameters */
bogdanm 92:4fc01daae5a5 117
bogdanm 92:4fc01daae5a5 118 HAL_LockTypeDef Lock; /*!< HASH locking object */
bogdanm 92:4fc01daae5a5 119
bogdanm 92:4fc01daae5a5 120 __IO HAL_HASH_STATETypeDef State; /*!< HASH peripheral state */
bogdanm 92:4fc01daae5a5 121 } HASH_HandleTypeDef;
bogdanm 92:4fc01daae5a5 122
bogdanm 92:4fc01daae5a5 123 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 124
bogdanm 92:4fc01daae5a5 125 /** @defgroup HASH_Exported_Constants
bogdanm 92:4fc01daae5a5 126 * @{
bogdanm 92:4fc01daae5a5 127 */
bogdanm 92:4fc01daae5a5 128
bogdanm 92:4fc01daae5a5 129 /** @defgroup HASH_Algo_Selection
bogdanm 92:4fc01daae5a5 130 * @{
bogdanm 92:4fc01daae5a5 131 */
bogdanm 92:4fc01daae5a5 132 #define HASH_AlgoSelection_SHA1 ((uint32_t)0x0000) /*!< HASH function is SHA1 */
bogdanm 92:4fc01daae5a5 133 #define HASH_AlgoSelection_SHA224 HASH_CR_ALGO_1 /*!< HASH function is SHA224 */
bogdanm 92:4fc01daae5a5 134 #define HASH_AlgoSelection_SHA256 HASH_CR_ALGO /*!< HASH function is SHA256 */
bogdanm 92:4fc01daae5a5 135 #define HASH_AlgoSelection_MD5 HASH_CR_ALGO_0 /*!< HASH function is MD5 */
bogdanm 92:4fc01daae5a5 136
bogdanm 92:4fc01daae5a5 137 #define IS_HASH_ALGOSELECTION(ALGOSELECTION) (((ALGOSELECTION) == HASH_AlgoSelection_SHA1) || \
bogdanm 92:4fc01daae5a5 138 ((ALGOSELECTION) == HASH_AlgoSelection_SHA224) || \
bogdanm 92:4fc01daae5a5 139 ((ALGOSELECTION) == HASH_AlgoSelection_SHA256) || \
bogdanm 92:4fc01daae5a5 140 ((ALGOSELECTION) == HASH_AlgoSelection_MD5))
bogdanm 92:4fc01daae5a5 141 /**
bogdanm 92:4fc01daae5a5 142 * @}
bogdanm 92:4fc01daae5a5 143 */
bogdanm 92:4fc01daae5a5 144
bogdanm 92:4fc01daae5a5 145 /** @defgroup HASH_Algorithm_Mode
bogdanm 92:4fc01daae5a5 146 * @{
bogdanm 92:4fc01daae5a5 147 */
bogdanm 92:4fc01daae5a5 148 #define HASH_AlgoMode_HASH ((uint32_t)0x00000000) /*!< Algorithm is HASH */
bogdanm 92:4fc01daae5a5 149 #define HASH_AlgoMode_HMAC HASH_CR_MODE /*!< Algorithm is HMAC */
bogdanm 92:4fc01daae5a5 150
bogdanm 92:4fc01daae5a5 151 #define IS_HASH_ALGOMODE(ALGOMODE) (((ALGOMODE) == HASH_AlgoMode_HASH) || \
bogdanm 92:4fc01daae5a5 152 ((ALGOMODE) == HASH_AlgoMode_HMAC))
bogdanm 92:4fc01daae5a5 153 /**
bogdanm 92:4fc01daae5a5 154 * @}
bogdanm 92:4fc01daae5a5 155 */
bogdanm 92:4fc01daae5a5 156
bogdanm 92:4fc01daae5a5 157 /** @defgroup HASH_Data_Type
bogdanm 92:4fc01daae5a5 158 * @{
bogdanm 92:4fc01daae5a5 159 */
bogdanm 92:4fc01daae5a5 160 #define HASH_DATATYPE_32B ((uint32_t)0x0000) /*!< 32-bit data. No swapping */
bogdanm 92:4fc01daae5a5 161 #define HASH_DATATYPE_16B HASH_CR_DATATYPE_0 /*!< 16-bit data. Each half word is swapped */
bogdanm 92:4fc01daae5a5 162 #define HASH_DATATYPE_8B HASH_CR_DATATYPE_1 /*!< 8-bit data. All bytes are swapped */
bogdanm 92:4fc01daae5a5 163 #define HASH_DATATYPE_1B HASH_CR_DATATYPE /*!< 1-bit data. In the word all bits are swapped */
bogdanm 92:4fc01daae5a5 164
bogdanm 92:4fc01daae5a5 165 #define IS_HASH_DATATYPE(DATATYPE) (((DATATYPE) == HASH_DATATYPE_32B)|| \
bogdanm 92:4fc01daae5a5 166 ((DATATYPE) == HASH_DATATYPE_16B)|| \
bogdanm 92:4fc01daae5a5 167 ((DATATYPE) == HASH_DATATYPE_8B) || \
bogdanm 92:4fc01daae5a5 168 ((DATATYPE) == HASH_DATATYPE_1B))
bogdanm 92:4fc01daae5a5 169 /**
bogdanm 92:4fc01daae5a5 170 * @}
bogdanm 92:4fc01daae5a5 171 */
bogdanm 92:4fc01daae5a5 172
bogdanm 92:4fc01daae5a5 173 /** @defgroup HASH_HMAC_Long_key_only_for_HMAC_mode
bogdanm 92:4fc01daae5a5 174 * @{
bogdanm 92:4fc01daae5a5 175 */
bogdanm 92:4fc01daae5a5 176 #define HASH_HMACKeyType_ShortKey ((uint32_t)0x00000000) /*!< HMAC Key is <= 64 bytes */
bogdanm 92:4fc01daae5a5 177 #define HASH_HMACKeyType_LongKey HASH_CR_LKEY /*!< HMAC Key is > 64 bytes */
bogdanm 92:4fc01daae5a5 178
bogdanm 92:4fc01daae5a5 179 #define IS_HASH_HMAC_KEYTYPE(KEYTYPE) (((KEYTYPE) == HASH_HMACKeyType_ShortKey) || \
bogdanm 92:4fc01daae5a5 180 ((KEYTYPE) == HASH_HMACKeyType_LongKey))
bogdanm 92:4fc01daae5a5 181 /**
bogdanm 92:4fc01daae5a5 182 * @}
bogdanm 92:4fc01daae5a5 183 */
bogdanm 92:4fc01daae5a5 184
bogdanm 92:4fc01daae5a5 185 /** @defgroup HASH_flags_definition
bogdanm 92:4fc01daae5a5 186 * @{
bogdanm 92:4fc01daae5a5 187 */
bogdanm 92:4fc01daae5a5 188 #define HASH_FLAG_DINIS HASH_SR_DINIS /*!< 16 locations are free in the DIN : A new block can be entered into the input buffer */
bogdanm 92:4fc01daae5a5 189 #define HASH_FLAG_DCIS HASH_SR_DCIS /*!< Digest calculation complete */
bogdanm 92:4fc01daae5a5 190 #define HASH_FLAG_DMAS HASH_SR_DMAS /*!< DMA interface is enabled (DMAE=1) or a transfer is ongoing */
bogdanm 92:4fc01daae5a5 191 #define HASH_FLAG_BUSY HASH_SR_BUSY /*!< The hash core is Busy : processing a block of data */
bogdanm 92:4fc01daae5a5 192 #define HASH_FLAG_DINNE HASH_CR_DINNE /*!< DIN not empty : The input buffer contains at least one word of data */
bogdanm 92:4fc01daae5a5 193 /**
bogdanm 92:4fc01daae5a5 194 * @}
bogdanm 92:4fc01daae5a5 195 */
bogdanm 92:4fc01daae5a5 196
bogdanm 92:4fc01daae5a5 197 /** @defgroup HASH_interrupts_definition
bogdanm 92:4fc01daae5a5 198 * @{
bogdanm 92:4fc01daae5a5 199 */
bogdanm 92:4fc01daae5a5 200 #define HASH_IT_DINI HASH_IMR_DINIM /*!< A new block can be entered into the input buffer (DIN) */
bogdanm 92:4fc01daae5a5 201 #define HASH_IT_DCI HASH_IMR_DCIM /*!< Digest calculation complete */
bogdanm 92:4fc01daae5a5 202 /**
bogdanm 92:4fc01daae5a5 203 * @}
bogdanm 92:4fc01daae5a5 204 */
bogdanm 92:4fc01daae5a5 205
bogdanm 92:4fc01daae5a5 206 /**
bogdanm 92:4fc01daae5a5 207 * @}
bogdanm 92:4fc01daae5a5 208 */
bogdanm 92:4fc01daae5a5 209
bogdanm 92:4fc01daae5a5 210 /* Exported macro ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 211
bogdanm 92:4fc01daae5a5 212 /** @brief Reset HASH handle state
bogdanm 92:4fc01daae5a5 213 * @param __HANDLE__: specifies the HASH handle.
bogdanm 92:4fc01daae5a5 214 * @retval None
bogdanm 92:4fc01daae5a5 215 */
bogdanm 92:4fc01daae5a5 216 #define __HAL_HASH_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_HASH_STATE_RESET)
bogdanm 92:4fc01daae5a5 217
bogdanm 92:4fc01daae5a5 218 /** @brief Check whether the specified HASH flag is set or not.
bogdanm 92:4fc01daae5a5 219 * @param __FLAG__: specifies the flag to check.
bogdanm 92:4fc01daae5a5 220 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 221 * @arg HASH_FLAG_DINIS: A new block can be entered into the input buffer.
bogdanm 92:4fc01daae5a5 222 * @arg HASH_FLAG_DCIS: Digest calculation complete
bogdanm 92:4fc01daae5a5 223 * @arg HASH_FLAG_DMAS: DMA interface is enabled (DMAE=1) or a transfer is ongoing
bogdanm 92:4fc01daae5a5 224 * @arg HASH_FLAG_BUSY: The hash core is Busy : processing a block of data
bogdanm 92:4fc01daae5a5 225 * @arg HASH_FLAG_DINNE: DIN not empty : The input buffer contains at least one word of data
bogdanm 92:4fc01daae5a5 226 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 92:4fc01daae5a5 227 */
bogdanm 92:4fc01daae5a5 228 #define __HAL_HASH_GET_FLAG(__FLAG__) ((HASH->SR & (__FLAG__)) == (__FLAG__))
bogdanm 92:4fc01daae5a5 229
bogdanm 92:4fc01daae5a5 230 /**
bogdanm 92:4fc01daae5a5 231 * @brief Macros for HMAC finish.
bogdanm 92:4fc01daae5a5 232 * @param None
bogdanm 92:4fc01daae5a5 233 * @retval None
bogdanm 92:4fc01daae5a5 234 */
bogdanm 92:4fc01daae5a5 235 #define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish
bogdanm 92:4fc01daae5a5 236 #define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish
bogdanm 92:4fc01daae5a5 237 #define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish
bogdanm 92:4fc01daae5a5 238 #define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish
bogdanm 92:4fc01daae5a5 239
bogdanm 92:4fc01daae5a5 240 /**
bogdanm 92:4fc01daae5a5 241 * @brief Enable the multiple DMA mode.
bogdanm 92:4fc01daae5a5 242 * This feature is available only in STM32F429x and STM32F439x devices.
bogdanm 92:4fc01daae5a5 243 * @param None
bogdanm 92:4fc01daae5a5 244 * @retval None
bogdanm 92:4fc01daae5a5 245 */
bogdanm 92:4fc01daae5a5 246 #define __HAL_HASH_SET_MDMAT() HASH->CR |= HASH_CR_MDMAT
bogdanm 92:4fc01daae5a5 247
bogdanm 92:4fc01daae5a5 248 /**
bogdanm 92:4fc01daae5a5 249 * @brief Disable the multiple DMA mode.
bogdanm 92:4fc01daae5a5 250 * @param None
bogdanm 92:4fc01daae5a5 251 * @retval None
bogdanm 92:4fc01daae5a5 252 */
bogdanm 92:4fc01daae5a5 253 #define __HAL_HASH_RESET_MDMAT() HASH->CR &= (uint32_t)(~HASH_CR_MDMAT)
bogdanm 92:4fc01daae5a5 254
bogdanm 92:4fc01daae5a5 255 /**
bogdanm 92:4fc01daae5a5 256 * @brief Start the digest computation
bogdanm 92:4fc01daae5a5 257 * @param None
bogdanm 92:4fc01daae5a5 258 * @retval None
bogdanm 92:4fc01daae5a5 259 */
bogdanm 92:4fc01daae5a5 260 #define __HAL_HASH_START_DIGEST() HASH->STR |= HASH_STR_DCAL
bogdanm 92:4fc01daae5a5 261
bogdanm 92:4fc01daae5a5 262 /**
bogdanm 92:4fc01daae5a5 263 * @brief Set the number of valid bits in last word written in Data register
bogdanm 92:4fc01daae5a5 264 * @param SIZE: size in byte of last data written in Data register.
bogdanm 92:4fc01daae5a5 265 * @retval None
bogdanm 92:4fc01daae5a5 266 */
bogdanm 92:4fc01daae5a5 267 #define __HAL_HASH_SET_NBVALIDBITS(SIZE) do{HASH->STR &= ~(HASH_STR_NBW);\
bogdanm 92:4fc01daae5a5 268 HASH->STR |= 8 * ((SIZE) % 4);\
bogdanm 92:4fc01daae5a5 269 }while(0)
bogdanm 92:4fc01daae5a5 270
bogdanm 92:4fc01daae5a5 271 /* Include HASH HAL Extension module */
bogdanm 92:4fc01daae5a5 272 #include "stm32f4xx_hal_hash_ex.h"
bogdanm 92:4fc01daae5a5 273
bogdanm 92:4fc01daae5a5 274 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 275
bogdanm 92:4fc01daae5a5 276 /* Initialization and de-initialization functions **********************************/
bogdanm 92:4fc01daae5a5 277 HAL_StatusTypeDef HAL_HASH_Init(HASH_HandleTypeDef *hhash);
bogdanm 92:4fc01daae5a5 278 HAL_StatusTypeDef HAL_HASH_DeInit(HASH_HandleTypeDef *hhash);
bogdanm 92:4fc01daae5a5 279
bogdanm 92:4fc01daae5a5 280 /* HASH processing using polling *********************************************/
bogdanm 92:4fc01daae5a5 281 HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 282 HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 283 HAL_StatusTypeDef HAL_HASH_MD5_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
bogdanm 92:4fc01daae5a5 284 HAL_StatusTypeDef HAL_HASH_SHA1_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
bogdanm 92:4fc01daae5a5 285
bogdanm 92:4fc01daae5a5 286 /* HASH-MAC processing using polling *****************************************/
bogdanm 92:4fc01daae5a5 287 HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 288 HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 289
bogdanm 92:4fc01daae5a5 290 /* HASH processing using interrupt *******************************************/
bogdanm 92:4fc01daae5a5 291 HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer);
bogdanm 92:4fc01daae5a5 292 HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer);
bogdanm 92:4fc01daae5a5 293
bogdanm 92:4fc01daae5a5 294 /* HASH processing using DMA *************************************************/
bogdanm 92:4fc01daae5a5 295 HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
bogdanm 92:4fc01daae5a5 296 HAL_StatusTypeDef HAL_HASH_SHA1_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 297 HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
bogdanm 92:4fc01daae5a5 298 HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 299
bogdanm 92:4fc01daae5a5 300 /* HASH-HMAC processing using DMA ********************************************/
bogdanm 92:4fc01daae5a5 301 HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
bogdanm 92:4fc01daae5a5 302 HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
bogdanm 92:4fc01daae5a5 303
bogdanm 92:4fc01daae5a5 304 /* Processing functions ******************************************************/
bogdanm 92:4fc01daae5a5 305 void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash);
bogdanm 92:4fc01daae5a5 306
bogdanm 92:4fc01daae5a5 307 /* Peripheral State functions ************************************************/
bogdanm 92:4fc01daae5a5 308 HAL_HASH_STATETypeDef HAL_HASH_GetState(HASH_HandleTypeDef *hhash);
bogdanm 92:4fc01daae5a5 309 void HAL_HASH_MspInit(HASH_HandleTypeDef *hhash);
bogdanm 92:4fc01daae5a5 310 void HAL_HASH_MspDeInit(HASH_HandleTypeDef *hhash);
bogdanm 92:4fc01daae5a5 311 void HAL_HASH_InCpltCallback(HASH_HandleTypeDef *hhash);
bogdanm 92:4fc01daae5a5 312 void HAL_HASH_DgstCpltCallback(HASH_HandleTypeDef *hhash);
bogdanm 92:4fc01daae5a5 313 void HAL_HASH_ErrorCallback(HASH_HandleTypeDef *hhash);
bogdanm 92:4fc01daae5a5 314
bogdanm 92:4fc01daae5a5 315 #endif /* STM32F415xx || STM32F417xx || STM32F437xx || STM32F439xx */
bogdanm 92:4fc01daae5a5 316 /**
bogdanm 92:4fc01daae5a5 317 * @}
bogdanm 92:4fc01daae5a5 318 */
bogdanm 92:4fc01daae5a5 319
bogdanm 92:4fc01daae5a5 320 /**
bogdanm 92:4fc01daae5a5 321 * @}
bogdanm 92:4fc01daae5a5 322 */
bogdanm 92:4fc01daae5a5 323
bogdanm 92:4fc01daae5a5 324 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 325 }
bogdanm 92:4fc01daae5a5 326 #endif
bogdanm 92:4fc01daae5a5 327
bogdanm 92:4fc01daae5a5 328
bogdanm 92:4fc01daae5a5 329 #endif /* __STM32F4xx_HAL_HASH_H */
bogdanm 92:4fc01daae5a5 330
bogdanm 92:4fc01daae5a5 331 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/