Ricardo Benitez / mbed

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TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_dcmi.h@92:4fc01daae5a5, 2014-11-27 (annotated)

Committer:
bogdanm
Date:
Thu Nov 27 13:33:22 2014 +0000
Revision:
92:4fc01daae5a5
Child:
99:dbbf35b96557
Release 92 of the mbed libray



Main changes:



- nRF51822: fixed pin assignment issues

- ST targets moving to the STM32Cube driver

- LPC1439: fixed serial interrupt issue

- first Cortex-A platform supported in mbed (RZ_A1H)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_dcmi.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 19-June-2014
bogdanm 92:4fc01daae5a5 7 * @brief Header file of DCMI HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
bogdanm 92:4fc01daae5a5 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_DCMI_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_DCMI_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 #if defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
bogdanm 92:4fc01daae5a5 47 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 48 #include "stm32f4xx_hal_def.h"
bogdanm 92:4fc01daae5a5 49
bogdanm 92:4fc01daae5a5 50
bogdanm 92:4fc01daae5a5 51 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 52 * @{
bogdanm 92:4fc01daae5a5 53 */
bogdanm 92:4fc01daae5a5 54
bogdanm 92:4fc01daae5a5 55 /** @addtogroup DCMI
bogdanm 92:4fc01daae5a5 56 * @{
bogdanm 92:4fc01daae5a5 57 */
bogdanm 92:4fc01daae5a5 58
bogdanm 92:4fc01daae5a5 59 /* Exported types ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 60
bogdanm 92:4fc01daae5a5 61 /**
bogdanm 92:4fc01daae5a5 62 * @brief DCMI Error source
bogdanm 92:4fc01daae5a5 63 */
bogdanm 92:4fc01daae5a5 64 typedef enum
bogdanm 92:4fc01daae5a5 65 {
bogdanm 92:4fc01daae5a5 66 DCMI_ERROR_SYNC = 1, /*!< Synchronisation error */
bogdanm 92:4fc01daae5a5 67 DCMI_OVERRUN = 2, /*!< DCMI Overrun */
bogdanm 92:4fc01daae5a5 68 }DCMI_ErrorTypeDef;
bogdanm 92:4fc01daae5a5 69
bogdanm 92:4fc01daae5a5 70 /**
bogdanm 92:4fc01daae5a5 71 * @brief DCMI Embedded Synchronisation CODE Init structure definition
bogdanm 92:4fc01daae5a5 72 */
bogdanm 92:4fc01daae5a5 73 typedef struct
bogdanm 92:4fc01daae5a5 74 {
bogdanm 92:4fc01daae5a5 75 uint8_t FrameStartCode; /*!< Specifies the code of the frame start delimiter. */
bogdanm 92:4fc01daae5a5 76 uint8_t LineStartCode; /*!< Specifies the code of the line start delimiter. */
bogdanm 92:4fc01daae5a5 77 uint8_t LineEndCode; /*!< Specifies the code of the line end delimiter. */
bogdanm 92:4fc01daae5a5 78 uint8_t FrameEndCode; /*!< Specifies the code of the frame end delimiter. */
bogdanm 92:4fc01daae5a5 79 }DCMI_CodesInitTypeDef;
bogdanm 92:4fc01daae5a5 80
bogdanm 92:4fc01daae5a5 81 /**
bogdanm 92:4fc01daae5a5 82 * @brief DCMI Init structure definition
bogdanm 92:4fc01daae5a5 83 */
bogdanm 92:4fc01daae5a5 84 typedef struct
bogdanm 92:4fc01daae5a5 85 {
bogdanm 92:4fc01daae5a5 86 uint32_t SynchroMode; /*!< Specifies the Synchronization Mode: Hardware or Embedded.
bogdanm 92:4fc01daae5a5 87 This parameter can be a value of @ref DCMI_Synchronization_Mode */
bogdanm 92:4fc01daae5a5 88
bogdanm 92:4fc01daae5a5 89 uint32_t PCKPolarity; /*!< Specifies the Pixel clock polarity: Falling or Rising.
bogdanm 92:4fc01daae5a5 90 This parameter can be a value of @ref DCMI_PIXCK_Polarity */
bogdanm 92:4fc01daae5a5 91
bogdanm 92:4fc01daae5a5 92 uint32_t VSPolarity; /*!< Specifies the Vertical synchronization polarity: High or Low.
bogdanm 92:4fc01daae5a5 93 This parameter can be a value of @ref DCMI_VSYNC_Polarity */
bogdanm 92:4fc01daae5a5 94
bogdanm 92:4fc01daae5a5 95 uint32_t HSPolarity; /*!< Specifies the Horizontal synchronization polarity: High or Low.
bogdanm 92:4fc01daae5a5 96 This parameter can be a value of @ref DCMI_HSYNC_Polarity */
bogdanm 92:4fc01daae5a5 97
bogdanm 92:4fc01daae5a5 98 uint32_t CaptureRate; /*!< Specifies the frequency of frame capture: All, 1/2 or 1/4.
bogdanm 92:4fc01daae5a5 99 This parameter can be a value of @ref DCMI_Capture_Rate */
bogdanm 92:4fc01daae5a5 100
bogdanm 92:4fc01daae5a5 101 uint32_t ExtendedDataMode; /*!< Specifies the data width: 8-bit, 10-bit, 12-bit or 14-bit.
bogdanm 92:4fc01daae5a5 102 This parameter can be a value of @ref DCMI_Extended_Data_Mode */
bogdanm 92:4fc01daae5a5 103
bogdanm 92:4fc01daae5a5 104 DCMI_CodesInitTypeDef SyncroCode; /*!< Specifies the code of the frame start delimiter. */
bogdanm 92:4fc01daae5a5 105
bogdanm 92:4fc01daae5a5 106 uint32_t JPEGMode; /*!< Enable or Disable the JPEG mode.
bogdanm 92:4fc01daae5a5 107 This parameter can be a value of @ref DCMI_MODE_JPEG */
bogdanm 92:4fc01daae5a5 108
bogdanm 92:4fc01daae5a5 109 }DCMI_InitTypeDef;
bogdanm 92:4fc01daae5a5 110
bogdanm 92:4fc01daae5a5 111 /**
bogdanm 92:4fc01daae5a5 112 * @brief HAL DCMI State structures definition
bogdanm 92:4fc01daae5a5 113 */
bogdanm 92:4fc01daae5a5 114 typedef enum
bogdanm 92:4fc01daae5a5 115 {
bogdanm 92:4fc01daae5a5 116 HAL_DCMI_STATE_RESET = 0x00, /*!< DCMI not yet initialized or disabled */
bogdanm 92:4fc01daae5a5 117 HAL_DCMI_STATE_READY = 0x01, /*!< DCMI initialized and ready for use */
bogdanm 92:4fc01daae5a5 118 HAL_DCMI_STATE_BUSY = 0x02, /*!< DCMI internal processing is ongoing */
bogdanm 92:4fc01daae5a5 119 HAL_DCMI_STATE_TIMEOUT = 0x03, /*!< DCMI timeout state */
bogdanm 92:4fc01daae5a5 120 HAL_DCMI_STATE_ERROR = 0x04 /*!< DCMI error state */
bogdanm 92:4fc01daae5a5 121 }HAL_DCMI_StateTypeDef;
bogdanm 92:4fc01daae5a5 122
bogdanm 92:4fc01daae5a5 123 /**
bogdanm 92:4fc01daae5a5 124 * @brief DCMI handle Structure definition
bogdanm 92:4fc01daae5a5 125 */
bogdanm 92:4fc01daae5a5 126 typedef struct
bogdanm 92:4fc01daae5a5 127 {
bogdanm 92:4fc01daae5a5 128 DCMI_TypeDef *Instance; /*!< DCMI Register base address */
bogdanm 92:4fc01daae5a5 129
bogdanm 92:4fc01daae5a5 130 DCMI_InitTypeDef Init; /*!< DCMI parameters */
bogdanm 92:4fc01daae5a5 131
bogdanm 92:4fc01daae5a5 132 HAL_LockTypeDef Lock; /*!< DCMI locking object */
bogdanm 92:4fc01daae5a5 133
bogdanm 92:4fc01daae5a5 134 __IO HAL_DCMI_StateTypeDef State; /*!< DCMI state */
bogdanm 92:4fc01daae5a5 135
bogdanm 92:4fc01daae5a5 136 __IO uint32_t XferCount; /*!< DMA transfer counter */
bogdanm 92:4fc01daae5a5 137
bogdanm 92:4fc01daae5a5 138 __IO uint32_t XferSize; /*!< DMA transfer size */
bogdanm 92:4fc01daae5a5 139
bogdanm 92:4fc01daae5a5 140 uint32_t XferTransferNumber; /*!< DMA transfer number */
bogdanm 92:4fc01daae5a5 141
bogdanm 92:4fc01daae5a5 142 uint32_t pBuffPtr; /*!< Pointer to DMA output buffer */
bogdanm 92:4fc01daae5a5 143
bogdanm 92:4fc01daae5a5 144 DMA_HandleTypeDef *DMA_Handle; /*!< Pointer to the DMA handler */
bogdanm 92:4fc01daae5a5 145
bogdanm 92:4fc01daae5a5 146 __IO uint32_t ErrorCode; /*!< DCMI Error code */
bogdanm 92:4fc01daae5a5 147
bogdanm 92:4fc01daae5a5 148 }DCMI_HandleTypeDef;
bogdanm 92:4fc01daae5a5 149
bogdanm 92:4fc01daae5a5 150 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 151
bogdanm 92:4fc01daae5a5 152 /** @defgroup DCMI_Exported_Constants
bogdanm 92:4fc01daae5a5 153 * @{
bogdanm 92:4fc01daae5a5 154 */
bogdanm 92:4fc01daae5a5 155
bogdanm 92:4fc01daae5a5 156 /** @defgroup DCMI_Error_Code
bogdanm 92:4fc01daae5a5 157 * @{
bogdanm 92:4fc01daae5a5 158 */
bogdanm 92:4fc01daae5a5 159 #define HAL_DCMI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
bogdanm 92:4fc01daae5a5 160 #define HAL_DCMI_ERROR_OVF ((uint32_t)0x00000001) /*!< Overflow error */
bogdanm 92:4fc01daae5a5 161 #define HAL_DCMI_ERROR_SYNC ((uint32_t)0x00000002) /*!< Synchronization error */
bogdanm 92:4fc01daae5a5 162 #define HAL_DCMI_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
bogdanm 92:4fc01daae5a5 163 /**
bogdanm 92:4fc01daae5a5 164 * @}
bogdanm 92:4fc01daae5a5 165 */
bogdanm 92:4fc01daae5a5 166
bogdanm 92:4fc01daae5a5 167 /** @defgroup DCMI_Capture_Mode
bogdanm 92:4fc01daae5a5 168 * @{
bogdanm 92:4fc01daae5a5 169 */
bogdanm 92:4fc01daae5a5 170 #define DCMI_MODE_CONTINUOUS ((uint32_t)0x00000000) /*!< The received data are transferred continuously
bogdanm 92:4fc01daae5a5 171 into the destination memory through the DMA */
bogdanm 92:4fc01daae5a5 172 #define DCMI_MODE_SNAPSHOT ((uint32_t)DCMI_CR_CM) /*!< Once activated, the interface waits for the start of
bogdanm 92:4fc01daae5a5 173 frame and then transfers a single frame through the DMA */
bogdanm 92:4fc01daae5a5 174
bogdanm 92:4fc01daae5a5 175 #define IS_DCMI_CAPTURE_MODE(MODE)(((MODE) == DCMI_MODE_CONTINUOUS) || \
bogdanm 92:4fc01daae5a5 176 ((MODE) == DCMI_MODE_SNAPSHOT))
bogdanm 92:4fc01daae5a5 177 /**
bogdanm 92:4fc01daae5a5 178 * @}
bogdanm 92:4fc01daae5a5 179 */
bogdanm 92:4fc01daae5a5 180
bogdanm 92:4fc01daae5a5 181 /** @defgroup DCMI_Synchronization_Mode
bogdanm 92:4fc01daae5a5 182 * @{
bogdanm 92:4fc01daae5a5 183 */
bogdanm 92:4fc01daae5a5 184 #define DCMI_SYNCHRO_HARDWARE ((uint32_t)0x00000000) /*!< Hardware synchronization data capture (frame/line start/stop)
bogdanm 92:4fc01daae5a5 185 is synchronized with the HSYNC/VSYNC signals */
bogdanm 92:4fc01daae5a5 186 #define DCMI_SYNCHRO_EMBEDDED ((uint32_t)DCMI_CR_ESS) /*!< Embedded synchronization data capture is synchronized with
bogdanm 92:4fc01daae5a5 187 synchronization codes embedded in the data flow */
bogdanm 92:4fc01daae5a5 188
bogdanm 92:4fc01daae5a5 189 #define IS_DCMI_SYNCHRO(MODE)(((MODE) == DCMI_SYNCHRO_HARDWARE) || \
bogdanm 92:4fc01daae5a5 190 ((MODE) == DCMI_SYNCHRO_EMBEDDED))
bogdanm 92:4fc01daae5a5 191 /**
bogdanm 92:4fc01daae5a5 192 * @}
bogdanm 92:4fc01daae5a5 193 */
bogdanm 92:4fc01daae5a5 194
bogdanm 92:4fc01daae5a5 195 /** @defgroup DCMI_PIXCK_Polarity
bogdanm 92:4fc01daae5a5 196 * @{
bogdanm 92:4fc01daae5a5 197 */
bogdanm 92:4fc01daae5a5 198 #define DCMI_PCKPOLARITY_FALLING ((uint32_t)0x00000000) /*!< Pixel clock active on Falling edge */
bogdanm 92:4fc01daae5a5 199 #define DCMI_PCKPOLARITY_RISING ((uint32_t)DCMI_CR_PCKPOL) /*!< Pixel clock active on Rising edge */
bogdanm 92:4fc01daae5a5 200
bogdanm 92:4fc01daae5a5 201 #define IS_DCMI_PCKPOLARITY(POLARITY)(((POLARITY) == DCMI_PCKPOLARITY_FALLING) || \
bogdanm 92:4fc01daae5a5 202 ((POLARITY) == DCMI_PCKPOLARITY_RISING))
bogdanm 92:4fc01daae5a5 203 /**
bogdanm 92:4fc01daae5a5 204 * @}
bogdanm 92:4fc01daae5a5 205 */
bogdanm 92:4fc01daae5a5 206
bogdanm 92:4fc01daae5a5 207 /** @defgroup DCMI_VSYNC_Polarity
bogdanm 92:4fc01daae5a5 208 * @{
bogdanm 92:4fc01daae5a5 209 */
bogdanm 92:4fc01daae5a5 210 #define DCMI_VSPOLARITY_LOW ((uint32_t)0x00000000) /*!< Vertical synchronization active Low */
bogdanm 92:4fc01daae5a5 211 #define DCMI_VSPOLARITY_HIGH ((uint32_t)DCMI_CR_VSPOL) /*!< Vertical synchronization active High */
bogdanm 92:4fc01daae5a5 212
bogdanm 92:4fc01daae5a5 213 #define IS_DCMI_VSPOLARITY(POLARITY)(((POLARITY) == DCMI_VSPOLARITY_LOW) || \
bogdanm 92:4fc01daae5a5 214 ((POLARITY) == DCMI_VSPOLARITY_HIGH))
bogdanm 92:4fc01daae5a5 215 /**
bogdanm 92:4fc01daae5a5 216 * @}
bogdanm 92:4fc01daae5a5 217 */
bogdanm 92:4fc01daae5a5 218
bogdanm 92:4fc01daae5a5 219 /** @defgroup DCMI_HSYNC_Polarity
bogdanm 92:4fc01daae5a5 220 * @{
bogdanm 92:4fc01daae5a5 221 */
bogdanm 92:4fc01daae5a5 222 #define DCMI_HSPOLARITY_LOW ((uint32_t)0x00000000) /*!< Horizontal synchronization active Low */
bogdanm 92:4fc01daae5a5 223 #define DCMI_HSPOLARITY_HIGH ((uint32_t)DCMI_CR_HSPOL) /*!< Horizontal synchronization active High */
bogdanm 92:4fc01daae5a5 224
bogdanm 92:4fc01daae5a5 225 #define IS_DCMI_HSPOLARITY(POLARITY)(((POLARITY) == DCMI_HSPOLARITY_LOW) || \
bogdanm 92:4fc01daae5a5 226 ((POLARITY) == DCMI_HSPOLARITY_HIGH))
bogdanm 92:4fc01daae5a5 227 /**
bogdanm 92:4fc01daae5a5 228 * @}
bogdanm 92:4fc01daae5a5 229 */
bogdanm 92:4fc01daae5a5 230
bogdanm 92:4fc01daae5a5 231 /** @defgroup DCMI_MODE_JPEG
bogdanm 92:4fc01daae5a5 232 * @{
bogdanm 92:4fc01daae5a5 233 */
bogdanm 92:4fc01daae5a5 234 #define DCMI_JPEG_DISABLE ((uint32_t)0x00000000) /*!< Mode JPEG Disabled */
bogdanm 92:4fc01daae5a5 235 #define DCMI_JPEG_ENABLE ((uint32_t)DCMI_CR_JPEG) /*!< Mode JPEG Enabled */
bogdanm 92:4fc01daae5a5 236
bogdanm 92:4fc01daae5a5 237 #define IS_DCMI_MODE_JPEG(JPEG_MODE)(((JPEG_MODE) == DCMI_JPEG_DISABLE) || \
bogdanm 92:4fc01daae5a5 238 ((JPEG_MODE) == DCMI_JPEG_ENABLE))
bogdanm 92:4fc01daae5a5 239 /**
bogdanm 92:4fc01daae5a5 240 * @}
bogdanm 92:4fc01daae5a5 241 */
bogdanm 92:4fc01daae5a5 242
bogdanm 92:4fc01daae5a5 243 /** @defgroup DCMI_Capture_Rate
bogdanm 92:4fc01daae5a5 244 * @{
bogdanm 92:4fc01daae5a5 245 */
bogdanm 92:4fc01daae5a5 246 #define DCMI_CR_ALL_FRAME ((uint32_t)0x00000000) /*!< All frames are captured */
bogdanm 92:4fc01daae5a5 247 #define DCMI_CR_ALTERNATE_2_FRAME ((uint32_t)DCMI_CR_FCRC_0) /*!< Every alternate frame captured */
bogdanm 92:4fc01daae5a5 248 #define DCMI_CR_ALTERNATE_4_FRAME ((uint32_t)DCMI_CR_FCRC_1) /*!< One frame in 4 frames captured */
bogdanm 92:4fc01daae5a5 249
bogdanm 92:4fc01daae5a5 250 #define IS_DCMI_CAPTURE_RATE(RATE) (((RATE) == DCMI_CR_ALL_FRAME) || \
bogdanm 92:4fc01daae5a5 251 ((RATE) == DCMI_CR_ALTERNATE_2_FRAME) || \
bogdanm 92:4fc01daae5a5 252 ((RATE) == DCMI_CR_ALTERNATE_4_FRAME))
bogdanm 92:4fc01daae5a5 253 /**
bogdanm 92:4fc01daae5a5 254 * @}
bogdanm 92:4fc01daae5a5 255 */
bogdanm 92:4fc01daae5a5 256
bogdanm 92:4fc01daae5a5 257 /** @defgroup DCMI_Extended_Data_Mode
bogdanm 92:4fc01daae5a5 258 * @{
bogdanm 92:4fc01daae5a5 259 */
bogdanm 92:4fc01daae5a5 260 #define DCMI_EXTEND_DATA_8B ((uint32_t)0x00000000) /*!< Interface captures 8-bit data on every pixel clock */
bogdanm 92:4fc01daae5a5 261 #define DCMI_EXTEND_DATA_10B ((uint32_t)DCMI_CR_EDM_0) /*!< Interface captures 10-bit data on every pixel clock */
bogdanm 92:4fc01daae5a5 262 #define DCMI_EXTEND_DATA_12B ((uint32_t)DCMI_CR_EDM_1) /*!< Interface captures 12-bit data on every pixel clock */
bogdanm 92:4fc01daae5a5 263 #define DCMI_EXTEND_DATA_14B ((uint32_t)(DCMI_CR_EDM_0 | DCMI_CR_EDM_1)) /*!< Interface captures 14-bit data on every pixel clock */
bogdanm 92:4fc01daae5a5 264
bogdanm 92:4fc01daae5a5 265 #define IS_DCMI_EXTENDED_DATA(DATA)(((DATA) == DCMI_EXTEND_DATA_8B) || \
bogdanm 92:4fc01daae5a5 266 ((DATA) == DCMI_EXTEND_DATA_10B) || \
bogdanm 92:4fc01daae5a5 267 ((DATA) == DCMI_EXTEND_DATA_12B) || \
bogdanm 92:4fc01daae5a5 268 ((DATA) == DCMI_EXTEND_DATA_14B))
bogdanm 92:4fc01daae5a5 269 /**
bogdanm 92:4fc01daae5a5 270 * @}
bogdanm 92:4fc01daae5a5 271 */
bogdanm 92:4fc01daae5a5 272
bogdanm 92:4fc01daae5a5 273 /** @defgroup DCMI_Window_Coordinate
bogdanm 92:4fc01daae5a5 274 * @{
bogdanm 92:4fc01daae5a5 275 */
bogdanm 92:4fc01daae5a5 276 #define DCMI_WINDOW_COORDINATE ((uint32_t)0x3FFF) /*!< Window coordinate */
bogdanm 92:4fc01daae5a5 277
bogdanm 92:4fc01daae5a5 278 #define IS_DCMI_WINDOW_COORDINATE(COORDINATE) ((COORDINATE) <= DCMI_WINDOW_COORDINATE)
bogdanm 92:4fc01daae5a5 279 /**
bogdanm 92:4fc01daae5a5 280 * @}
bogdanm 92:4fc01daae5a5 281 */
bogdanm 92:4fc01daae5a5 282
bogdanm 92:4fc01daae5a5 283 /** @defgroup DCMI_Window_Height
bogdanm 92:4fc01daae5a5 284 * @{
bogdanm 92:4fc01daae5a5 285 */
bogdanm 92:4fc01daae5a5 286 #define DCMI_WINDOW_HEIGHT ((uint32_t)0x1FFF) /*!< Window Height */
bogdanm 92:4fc01daae5a5 287
bogdanm 92:4fc01daae5a5 288 #define IS_DCMI_WINDOW_HEIGHT(HEIGHT) ((HEIGHT) <= DCMI_WINDOW_HEIGHT)
bogdanm 92:4fc01daae5a5 289 /**
bogdanm 92:4fc01daae5a5 290 * @}
bogdanm 92:4fc01daae5a5 291 */
bogdanm 92:4fc01daae5a5 292
bogdanm 92:4fc01daae5a5 293 /** @defgroup DCMI_interrupt_sources
bogdanm 92:4fc01daae5a5 294 * @{
bogdanm 92:4fc01daae5a5 295 */
bogdanm 92:4fc01daae5a5 296 #define DCMI_IT_FRAME ((uint32_t)DCMI_IER_FRAME_IE)
bogdanm 92:4fc01daae5a5 297 #define DCMI_IT_OVF ((uint32_t)DCMI_IER_OVF_IE)
bogdanm 92:4fc01daae5a5 298 #define DCMI_IT_ERR ((uint32_t)DCMI_IER_ERR_IE)
bogdanm 92:4fc01daae5a5 299 #define DCMI_IT_VSYNC ((uint32_t)DCMI_IER_VSYNC_IE)
bogdanm 92:4fc01daae5a5 300 #define DCMI_IT_LINE ((uint32_t)DCMI_IER_LINE_IE)
bogdanm 92:4fc01daae5a5 301
bogdanm 92:4fc01daae5a5 302 #define IS_DCMI_CONFIG_IT(IT) ((((IT) & (uint16_t)0xFFE0) == 0x0000) && ((IT) != 0x0000))
bogdanm 92:4fc01daae5a5 303
bogdanm 92:4fc01daae5a5 304 #define IS_DCMI_GET_IT(IT) (((IT) == DCMI_IT_FRAME) || \
bogdanm 92:4fc01daae5a5 305 ((IT) == DCMI_IT_OVF) || \
bogdanm 92:4fc01daae5a5 306 ((IT) == DCMI_IT_ERR) || \
bogdanm 92:4fc01daae5a5 307 ((IT) == DCMI_IT_VSYNC) || \
bogdanm 92:4fc01daae5a5 308 ((IT) == DCMI_IT_LINE))
bogdanm 92:4fc01daae5a5 309 /**
bogdanm 92:4fc01daae5a5 310 * @}
bogdanm 92:4fc01daae5a5 311 */
bogdanm 92:4fc01daae5a5 312
bogdanm 92:4fc01daae5a5 313 /** @defgroup DCMI_Flags
bogdanm 92:4fc01daae5a5 314 * @{
bogdanm 92:4fc01daae5a5 315 */
bogdanm 92:4fc01daae5a5 316
bogdanm 92:4fc01daae5a5 317 /**
bogdanm 92:4fc01daae5a5 318 * @brief DCMI SR register
bogdanm 92:4fc01daae5a5 319 */
bogdanm 92:4fc01daae5a5 320 #define DCMI_FLAG_HSYNC ((uint32_t)0x2001)
bogdanm 92:4fc01daae5a5 321 #define DCMI_FLAG_VSYNC ((uint32_t)0x2002)
bogdanm 92:4fc01daae5a5 322 #define DCMI_FLAG_FNE ((uint32_t)0x2004)
bogdanm 92:4fc01daae5a5 323 /**
bogdanm 92:4fc01daae5a5 324 * @brief DCMI RISR register
bogdanm 92:4fc01daae5a5 325 */
bogdanm 92:4fc01daae5a5 326 #define DCMI_FLAG_FRAMERI ((uint32_t)DCMI_RISR_FRAME_RIS)
bogdanm 92:4fc01daae5a5 327 #define DCMI_FLAG_OVFRI ((uint32_t)DCMI_RISR_OVF_RIS)
bogdanm 92:4fc01daae5a5 328 #define DCMI_FLAG_ERRRI ((uint32_t)DCMI_RISR_ERR_RIS)
bogdanm 92:4fc01daae5a5 329 #define DCMI_FLAG_VSYNCRI ((uint32_t)DCMI_RISR_VSYNC_RIS)
bogdanm 92:4fc01daae5a5 330 #define DCMI_FLAG_LINERI ((uint32_t)DCMI_RISR_LINE_RIS)
bogdanm 92:4fc01daae5a5 331 /**
bogdanm 92:4fc01daae5a5 332 * @brief DCMI MISR register
bogdanm 92:4fc01daae5a5 333 */
bogdanm 92:4fc01daae5a5 334 #define DCMI_FLAG_FRAMEMI ((uint32_t)0x1001)
bogdanm 92:4fc01daae5a5 335 #define DCMI_FLAG_OVFMI ((uint32_t)0x1002)
bogdanm 92:4fc01daae5a5 336 #define DCMI_FLAG_ERRMI ((uint32_t)0x1004)
bogdanm 92:4fc01daae5a5 337 #define DCMI_FLAG_VSYNCMI ((uint32_t)0x1008)
bogdanm 92:4fc01daae5a5 338 #define DCMI_FLAG_LINEMI ((uint32_t)0x1010)
bogdanm 92:4fc01daae5a5 339 #define IS_DCMI_GET_FLAG(FLAG) (((FLAG) == DCMI_FLAG_HSYNC) || \
bogdanm 92:4fc01daae5a5 340 ((FLAG) == DCMI_FLAG_VSYNC) || \
bogdanm 92:4fc01daae5a5 341 ((FLAG) == DCMI_FLAG_FNE) || \
bogdanm 92:4fc01daae5a5 342 ((FLAG) == DCMI_FLAG_FRAMERI) || \
bogdanm 92:4fc01daae5a5 343 ((FLAG) == DCMI_FLAG_OVFRI) || \
bogdanm 92:4fc01daae5a5 344 ((FLAG) == DCMI_FLAG_ERRRI) || \
bogdanm 92:4fc01daae5a5 345 ((FLAG) == DCMI_FLAG_VSYNCRI) || \
bogdanm 92:4fc01daae5a5 346 ((FLAG) == DCMI_FLAG_LINERI) || \
bogdanm 92:4fc01daae5a5 347 ((FLAG) == DCMI_FLAG_FRAMEMI) || \
bogdanm 92:4fc01daae5a5 348 ((FLAG) == DCMI_FLAG_OVFMI) || \
bogdanm 92:4fc01daae5a5 349 ((FLAG) == DCMI_FLAG_ERRMI) || \
bogdanm 92:4fc01daae5a5 350 ((FLAG) == DCMI_FLAG_VSYNCMI) || \
bogdanm 92:4fc01daae5a5 351 ((FLAG) == DCMI_FLAG_LINEMI))
bogdanm 92:4fc01daae5a5 352
bogdanm 92:4fc01daae5a5 353 #define IS_DCMI_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFE0) == 0x0000) && ((FLAG) != 0x0000))
bogdanm 92:4fc01daae5a5 354 /**
bogdanm 92:4fc01daae5a5 355 * @}
bogdanm 92:4fc01daae5a5 356 */
bogdanm 92:4fc01daae5a5 357
bogdanm 92:4fc01daae5a5 358 /**
bogdanm 92:4fc01daae5a5 359 * @}
bogdanm 92:4fc01daae5a5 360 */
bogdanm 92:4fc01daae5a5 361
bogdanm 92:4fc01daae5a5 362 /* Exported macro ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 363
bogdanm 92:4fc01daae5a5 364 /** @brief Reset DCMI handle state
bogdanm 92:4fc01daae5a5 365 * @param __HANDLE__: specifies the DCMI handle.
bogdanm 92:4fc01daae5a5 366 * @retval None
bogdanm 92:4fc01daae5a5 367 */
bogdanm 92:4fc01daae5a5 368 #define __HAL_DCMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DCMI_STATE_RESET)
bogdanm 92:4fc01daae5a5 369
bogdanm 92:4fc01daae5a5 370 /**
bogdanm 92:4fc01daae5a5 371 * @brief Enable the DCMI.
bogdanm 92:4fc01daae5a5 372 * @param __HANDLE__: DCMI handle
bogdanm 92:4fc01daae5a5 373 * @retval None
bogdanm 92:4fc01daae5a5 374 */
bogdanm 92:4fc01daae5a5 375 #define __HAL_DCMI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DCMI_CR_ENABLE)
bogdanm 92:4fc01daae5a5 376
bogdanm 92:4fc01daae5a5 377 /**
bogdanm 92:4fc01daae5a5 378 * @brief Disable the DCMI.
bogdanm 92:4fc01daae5a5 379 * @param __HANDLE__: DCMI handle
bogdanm 92:4fc01daae5a5 380 * @retval None
bogdanm 92:4fc01daae5a5 381 */
bogdanm 92:4fc01daae5a5 382 #define __HAL_DCMI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(DCMI_CR_ENABLE))
bogdanm 92:4fc01daae5a5 383
bogdanm 92:4fc01daae5a5 384 /* Interrupt & Flag management */
bogdanm 92:4fc01daae5a5 385 /**
bogdanm 92:4fc01daae5a5 386 * @brief Get the DCMI pending flags.
bogdanm 92:4fc01daae5a5 387 * @param __HANDLE__: DCMI handle
bogdanm 92:4fc01daae5a5 388 * @param __FLAG__: Get the specified flag.
bogdanm 92:4fc01daae5a5 389 * This parameter can be any combination of the following values:
bogdanm 92:4fc01daae5a5 390 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
bogdanm 92:4fc01daae5a5 391 * @arg DCMI_FLAG_OVFRI: Overflow flag mask
bogdanm 92:4fc01daae5a5 392 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
bogdanm 92:4fc01daae5a5 393 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
bogdanm 92:4fc01daae5a5 394 * @arg DCMI_FLAG_LINERI: Line flag mask
bogdanm 92:4fc01daae5a5 395 * @retval The state of FLAG.
bogdanm 92:4fc01daae5a5 396 */
bogdanm 92:4fc01daae5a5 397 #define __HAL_DCMI_GET_FLAG(__HANDLE__, __FLAG__)\
bogdanm 92:4fc01daae5a5 398 ((((__FLAG__) & 0x3000) == 0x0)? ((__HANDLE__)->Instance->RISR & (__FLAG__)) :\
bogdanm 92:4fc01daae5a5 399 (((__FLAG__) & 0x2000) == 0x0)? ((__HANDLE__)->Instance->MISR & (__FLAG__)) : ((__HANDLE__)->Instance->SR & (__FLAG__)))
bogdanm 92:4fc01daae5a5 400
bogdanm 92:4fc01daae5a5 401 /**
bogdanm 92:4fc01daae5a5 402 * @brief Clear the DCMI pending flags.
bogdanm 92:4fc01daae5a5 403 * @param __HANDLE__: DCMI handle
bogdanm 92:4fc01daae5a5 404 * @param __FLAG__: specifies the flag to clear.
bogdanm 92:4fc01daae5a5 405 * This parameter can be any combination of the following values:
bogdanm 92:4fc01daae5a5 406 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
bogdanm 92:4fc01daae5a5 407 * @arg DCMI_FLAG_OVFRI: Overflow flag mask
bogdanm 92:4fc01daae5a5 408 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
bogdanm 92:4fc01daae5a5 409 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
bogdanm 92:4fc01daae5a5 410 * @arg DCMI_FLAG_LINERI: Line flag mask
bogdanm 92:4fc01daae5a5 411 * @retval None
bogdanm 92:4fc01daae5a5 412 */
bogdanm 92:4fc01daae5a5 413 #define __HAL_DCMI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
bogdanm 92:4fc01daae5a5 414
bogdanm 92:4fc01daae5a5 415 /**
bogdanm 92:4fc01daae5a5 416 * @brief Enable the specified DCMI interrupts.
bogdanm 92:4fc01daae5a5 417 * @param __HANDLE__: DCMI handle
bogdanm 92:4fc01daae5a5 418 * @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled.
bogdanm 92:4fc01daae5a5 419 * This parameter can be any combination of the following values:
bogdanm 92:4fc01daae5a5 420 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
bogdanm 92:4fc01daae5a5 421 * @arg DCMI_IT_OVF: Overflow interrupt mask
bogdanm 92:4fc01daae5a5 422 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
bogdanm 92:4fc01daae5a5 423 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
bogdanm 92:4fc01daae5a5 424 * @arg DCMI_IT_LINE: Line interrupt mask
bogdanm 92:4fc01daae5a5 425 * @retval None
bogdanm 92:4fc01daae5a5 426 */
bogdanm 92:4fc01daae5a5 427 #define __HAL_DCMI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
bogdanm 92:4fc01daae5a5 428
bogdanm 92:4fc01daae5a5 429 /**
bogdanm 92:4fc01daae5a5 430 * @brief Disable the specified DCMI interrupts.
bogdanm 92:4fc01daae5a5 431 * @param __HANDLE__: DCMI handle
bogdanm 92:4fc01daae5a5 432 * @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled.
bogdanm 92:4fc01daae5a5 433 * This parameter can be any combination of the following values:
bogdanm 92:4fc01daae5a5 434 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
bogdanm 92:4fc01daae5a5 435 * @arg DCMI_IT_OVF: Overflow interrupt mask
bogdanm 92:4fc01daae5a5 436 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
bogdanm 92:4fc01daae5a5 437 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
bogdanm 92:4fc01daae5a5 438 * @arg DCMI_IT_LINE: Line interrupt mask
bogdanm 92:4fc01daae5a5 439 * @retval None
bogdanm 92:4fc01daae5a5 440 */
bogdanm 92:4fc01daae5a5 441 #define __HAL_DCMI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__))
bogdanm 92:4fc01daae5a5 442
bogdanm 92:4fc01daae5a5 443 /**
bogdanm 92:4fc01daae5a5 444 * @brief Check whether the specified DCMI interrupt has occurred or not.
bogdanm 92:4fc01daae5a5 445 * @param __HANDLE__: DCMI handle
bogdanm 92:4fc01daae5a5 446 * @param __INTERRUPT__: specifies the DCMI interrupt source to check.
bogdanm 92:4fc01daae5a5 447 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 448 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
bogdanm 92:4fc01daae5a5 449 * @arg DCMI_IT_OVF: Overflow interrupt mask
bogdanm 92:4fc01daae5a5 450 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
bogdanm 92:4fc01daae5a5 451 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
bogdanm 92:4fc01daae5a5 452 * @arg DCMI_IT_LINE: Line interrupt mask
bogdanm 92:4fc01daae5a5 453 * @retval The state of INTERRUPT.
bogdanm 92:4fc01daae5a5 454 */
bogdanm 92:4fc01daae5a5 455 #define __HAL_DCMI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MISR & (__INTERRUPT__))
bogdanm 92:4fc01daae5a5 456
bogdanm 92:4fc01daae5a5 457 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 458
bogdanm 92:4fc01daae5a5 459 /* Initialization and de-initialization functions *****************************/
bogdanm 92:4fc01daae5a5 460 HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi);
bogdanm 92:4fc01daae5a5 461 HAL_StatusTypeDef HAL_DCMI_DeInit(DCMI_HandleTypeDef *hdcmi);
bogdanm 92:4fc01daae5a5 462 void HAL_DCMI_MspInit(DCMI_HandleTypeDef* hdcmi);
bogdanm 92:4fc01daae5a5 463 void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi);
bogdanm 92:4fc01daae5a5 464
bogdanm 92:4fc01daae5a5 465 /* IO operation functions *****************************************************/
bogdanm 92:4fc01daae5a5 466 HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mode, uint32_t pData, uint32_t Length);
bogdanm 92:4fc01daae5a5 467 HAL_StatusTypeDef HAL_DCMI_Stop(DCMI_HandleTypeDef* hdcmi);
bogdanm 92:4fc01daae5a5 468 void HAL_DCMI_ErrorCallback(DCMI_HandleTypeDef *hdcmi);
bogdanm 92:4fc01daae5a5 469 void HAL_DCMI_LineEventCallback(DCMI_HandleTypeDef *hdcmi);
bogdanm 92:4fc01daae5a5 470 void HAL_DCMI_FrameEventCallback(DCMI_HandleTypeDef *hdcmi);
bogdanm 92:4fc01daae5a5 471 void HAL_DCMI_VsyncEventCallback(DCMI_HandleTypeDef *hdcmi);
bogdanm 92:4fc01daae5a5 472 void HAL_DCMI_IRQHandler(DCMI_HandleTypeDef *hdcmi);
bogdanm 92:4fc01daae5a5 473
bogdanm 92:4fc01daae5a5 474 /* Peripheral Control functions ***********************************************/
bogdanm 92:4fc01daae5a5 475 HAL_StatusTypeDef HAL_DCMI_ConfigCROP(DCMI_HandleTypeDef *hdcmi, uint32_t X0, uint32_t Y0, uint32_t XSize, uint32_t YSize);
bogdanm 92:4fc01daae5a5 476 HAL_StatusTypeDef HAL_DCMI_EnableCROP(DCMI_HandleTypeDef *hdcmi);
bogdanm 92:4fc01daae5a5 477 HAL_StatusTypeDef HAL_DCMI_DisableCROP(DCMI_HandleTypeDef *hdcmi);
bogdanm 92:4fc01daae5a5 478
bogdanm 92:4fc01daae5a5 479 /* Peripheral State functions *************************************************/
bogdanm 92:4fc01daae5a5 480 HAL_DCMI_StateTypeDef HAL_DCMI_GetState(DCMI_HandleTypeDef *hdcmi);
bogdanm 92:4fc01daae5a5 481 uint32_t HAL_DCMI_GetError(DCMI_HandleTypeDef *hdcmi);
bogdanm 92:4fc01daae5a5 482
bogdanm 92:4fc01daae5a5 483 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
bogdanm 92:4fc01daae5a5 484 /**
bogdanm 92:4fc01daae5a5 485 * @}
bogdanm 92:4fc01daae5a5 486 */
bogdanm 92:4fc01daae5a5 487
bogdanm 92:4fc01daae5a5 488 /**
bogdanm 92:4fc01daae5a5 489 * @}
bogdanm 92:4fc01daae5a5 490 */
bogdanm 92:4fc01daae5a5 491
bogdanm 92:4fc01daae5a5 492 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 493 }
bogdanm 92:4fc01daae5a5 494 #endif
bogdanm 92:4fc01daae5a5 495
bogdanm 92:4fc01daae5a5 496 #endif /* __STM32F4xx_HAL_DCMI_H */
bogdanm 92:4fc01daae5a5 497
bogdanm 92:4fc01daae5a5 498 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/