meh

Fork of mbed by mbed official

Committer:
Kojto
Date:
Tue Mar 17 14:27:45 2015 +0000
Revision:
96:487b796308b0
Parent:
92:4fc01daae5a5
Release 96 of the mbed library

Changes:
- IAR support for ble boards, lpc, ethernet stack
- RTC - attach function to redirect time functions
- Nucleo F103RB - cube driver
- k20xx - fixes for teensy and k20 platforms in sleep/deepsleep and usb
- STM32L0, Nucleo/Disco L053 - refactoring

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 84:0b3ab51c8877 1 /**
bogdanm 84:0b3ab51c8877 2 ******************************************************************************
bogdanm 84:0b3ab51c8877 3 * @file stm32l0xx_hal_lcd.h
bogdanm 84:0b3ab51c8877 4 * @author MCD Application Team
Kojto 96:487b796308b0 5 * @version V1.2.0
Kojto 96:487b796308b0 6 * @date 06-February-2015
bogdanm 84:0b3ab51c8877 7 * @brief Header file of LCD Controller HAL module.
bogdanm 84:0b3ab51c8877 8 ******************************************************************************
bogdanm 84:0b3ab51c8877 9 * @attention
bogdanm 84:0b3ab51c8877 10 *
Kojto 96:487b796308b0 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 84:0b3ab51c8877 12 *
bogdanm 84:0b3ab51c8877 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 84:0b3ab51c8877 14 * are permitted provided that the following conditions are met:
bogdanm 84:0b3ab51c8877 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 84:0b3ab51c8877 16 * this list of conditions and the following disclaimer.
bogdanm 84:0b3ab51c8877 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 84:0b3ab51c8877 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 84:0b3ab51c8877 19 * and/or other materials provided with the distribution.
bogdanm 84:0b3ab51c8877 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 84:0b3ab51c8877 21 * may be used to endorse or promote products derived from this software
bogdanm 84:0b3ab51c8877 22 * without specific prior written permission.
bogdanm 84:0b3ab51c8877 23 *
bogdanm 84:0b3ab51c8877 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 84:0b3ab51c8877 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 84:0b3ab51c8877 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 84:0b3ab51c8877 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 84:0b3ab51c8877 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 84:0b3ab51c8877 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 84:0b3ab51c8877 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 84:0b3ab51c8877 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 84:0b3ab51c8877 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 84:0b3ab51c8877 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 84:0b3ab51c8877 34 *
bogdanm 84:0b3ab51c8877 35 ******************************************************************************
bogdanm 84:0b3ab51c8877 36 */
bogdanm 84:0b3ab51c8877 37
Kojto 96:487b796308b0 38 #if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx)
Kojto 96:487b796308b0 39
bogdanm 84:0b3ab51c8877 40 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 84:0b3ab51c8877 41 #ifndef __STM32L0xx_HAL_LCD_H
bogdanm 84:0b3ab51c8877 42 #define __STM32L0xx_HAL_LCD_H
bogdanm 84:0b3ab51c8877 43
bogdanm 84:0b3ab51c8877 44 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 45 extern "C" {
bogdanm 84:0b3ab51c8877 46 #endif
bogdanm 84:0b3ab51c8877 47
bogdanm 84:0b3ab51c8877 48
bogdanm 84:0b3ab51c8877 49 /* Includes ------------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 50 #include "stm32l0xx_hal_def.h"
bogdanm 84:0b3ab51c8877 51
bogdanm 84:0b3ab51c8877 52 /** @addtogroup STM32L0xx_HAL_Driver
bogdanm 84:0b3ab51c8877 53 * @{
bogdanm 84:0b3ab51c8877 54 */
bogdanm 84:0b3ab51c8877 55
Kojto 96:487b796308b0 56 /** @addtogroup LCD LCD
bogdanm 84:0b3ab51c8877 57 * @{
bogdanm 84:0b3ab51c8877 58 */
bogdanm 84:0b3ab51c8877 59
bogdanm 84:0b3ab51c8877 60 /* Exported types ------------------------------------------------------------*/
Kojto 96:487b796308b0 61 /** @defgroup LCD_Exported_Types LCD Exported Types
Kojto 96:487b796308b0 62 * @{
Kojto 96:487b796308b0 63 */
bogdanm 84:0b3ab51c8877 64
bogdanm 84:0b3ab51c8877 65 /**
bogdanm 84:0b3ab51c8877 66 * @brief LCD Init structure definition
bogdanm 84:0b3ab51c8877 67 */
bogdanm 84:0b3ab51c8877 68
bogdanm 84:0b3ab51c8877 69 typedef struct
bogdanm 84:0b3ab51c8877 70 {
bogdanm 84:0b3ab51c8877 71 uint32_t Prescaler; /*!< Configures the LCD Prescaler.
bogdanm 84:0b3ab51c8877 72 This parameter can be one value of @ref LCD_Prescaler */
bogdanm 84:0b3ab51c8877 73 uint32_t Divider; /*!< Configures the LCD Divider.
bogdanm 84:0b3ab51c8877 74 This parameter can be one value of @ref LCD_Divider */
bogdanm 84:0b3ab51c8877 75 uint32_t Duty; /*!< Configures the LCD Duty.
bogdanm 84:0b3ab51c8877 76 This parameter can be one value of @ref LCD_Duty */
bogdanm 84:0b3ab51c8877 77 uint32_t Bias; /*!< Configures the LCD Bias.
bogdanm 84:0b3ab51c8877 78 This parameter can be one value of @ref LCD_Bias */
bogdanm 84:0b3ab51c8877 79 uint32_t VoltageSource; /*!< Selects the LCD Voltage source.
bogdanm 84:0b3ab51c8877 80 This parameter can be one value of @ref LCD_Voltage_Source */
bogdanm 84:0b3ab51c8877 81 uint32_t Contrast; /*!< Configures the LCD Contrast.
bogdanm 84:0b3ab51c8877 82 This parameter can be one value of @ref LCD_Contrast */
bogdanm 84:0b3ab51c8877 83 uint32_t DeadTime; /*!< Configures the LCD Dead Time.
bogdanm 84:0b3ab51c8877 84 This parameter can be one value of @ref LCD_DeadTime */
bogdanm 84:0b3ab51c8877 85 uint32_t PulseOnDuration; /*!< Configures the LCD Pulse On Duration.
bogdanm 84:0b3ab51c8877 86 This parameter can be one value of @ref LCD_PulseOnDuration */
Kojto 96:487b796308b0 87 uint32_t HighDrive; /*!< Configures the LCD High Drive.
Kojto 96:487b796308b0 88 This parameter can be one value of @ref LCD_HighDrive */
bogdanm 84:0b3ab51c8877 89 uint32_t BlinkMode; /*!< Configures the LCD Blink Mode.
bogdanm 84:0b3ab51c8877 90 This parameter can be one value of @ref LCD_BlinkMode */
bogdanm 84:0b3ab51c8877 91 uint32_t BlinkFrequency; /*!< Configures the LCD Blink frequency.
bogdanm 84:0b3ab51c8877 92 This parameter can be one value of @ref LCD_BlinkFrequency */
bogdanm 84:0b3ab51c8877 93 }LCD_InitTypeDef;
bogdanm 84:0b3ab51c8877 94
bogdanm 84:0b3ab51c8877 95 /**
bogdanm 84:0b3ab51c8877 96 * @brief HAL LCD State structures definition
bogdanm 84:0b3ab51c8877 97 */
bogdanm 84:0b3ab51c8877 98 typedef enum
bogdanm 84:0b3ab51c8877 99 {
bogdanm 84:0b3ab51c8877 100 HAL_LCD_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */
bogdanm 84:0b3ab51c8877 101 HAL_LCD_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
bogdanm 84:0b3ab51c8877 102 HAL_LCD_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
bogdanm 84:0b3ab51c8877 103 HAL_LCD_STATE_TIMEOUT = 0x03, /*!< Timeout state */
bogdanm 84:0b3ab51c8877 104 HAL_LCD_STATE_ERROR = 0x04 /*!< Error */
bogdanm 84:0b3ab51c8877 105 }HAL_LCD_StateTypeDef;
bogdanm 84:0b3ab51c8877 106
bogdanm 84:0b3ab51c8877 107 /**
bogdanm 84:0b3ab51c8877 108 * @brief UART handle Structure definition
bogdanm 84:0b3ab51c8877 109 */
bogdanm 84:0b3ab51c8877 110 typedef struct
bogdanm 84:0b3ab51c8877 111 {
Kojto 96:487b796308b0 112 LCD_TypeDef *Instance; /* LCD registers base address */
bogdanm 84:0b3ab51c8877 113
Kojto 96:487b796308b0 114 LCD_InitTypeDef Init; /* LCD communication parameters */
bogdanm 84:0b3ab51c8877 115
Kojto 96:487b796308b0 116 HAL_LockTypeDef Lock; /* Locking object */
bogdanm 84:0b3ab51c8877 117
Kojto 96:487b796308b0 118 __IO HAL_LCD_StateTypeDef State; /* LCD communication state */
bogdanm 84:0b3ab51c8877 119
Kojto 96:487b796308b0 120 __IO uint32_t ErrorCode; /* LCD Error code */
bogdanm 84:0b3ab51c8877 121
bogdanm 84:0b3ab51c8877 122 }LCD_HandleTypeDef;
bogdanm 84:0b3ab51c8877 123
Kojto 96:487b796308b0 124 /**
Kojto 96:487b796308b0 125 * @}
Kojto 96:487b796308b0 126 */
Kojto 96:487b796308b0 127
bogdanm 84:0b3ab51c8877 128 /* Exported constants --------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 129
Kojto 96:487b796308b0 130 /** @defgroup LCD_Exported_Constants LCD Exported Constants
bogdanm 84:0b3ab51c8877 131 * @{
bogdanm 84:0b3ab51c8877 132 */
bogdanm 84:0b3ab51c8877 133
Kojto 96:487b796308b0 134 /** @defgroup LCD_ErrorCode LCD Error Code
Kojto 96:487b796308b0 135 * @{
Kojto 96:487b796308b0 136 */
Kojto 96:487b796308b0 137 #define HAL_LCD_ERROR_NONE ((uint32_t)0x00) /*!< No error */
Kojto 96:487b796308b0 138 #define HAL_LCD_ERROR_FCRSF ((uint32_t)0x01) /*!< Synchro flag timeout error */
Kojto 96:487b796308b0 139 #define HAL_LCD_ERROR_UDR ((uint32_t)0x02) /*!< Update display request flag timeout error */
Kojto 96:487b796308b0 140 #define HAL_LCD_ERROR_UDD ((uint32_t)0x04) /*!< Update display done flag timeout error */
Kojto 96:487b796308b0 141 #define HAL_LCD_ERROR_ENS ((uint32_t)0x08) /*!< LCD enabled status flag timeout error */
Kojto 96:487b796308b0 142 #define HAL_LCD_ERROR_RDY ((uint32_t)0x10) /*!< LCD Booster ready timeout error */
Kojto 96:487b796308b0 143 /**
Kojto 96:487b796308b0 144 * @}
Kojto 96:487b796308b0 145 */
Kojto 96:487b796308b0 146
Kojto 96:487b796308b0 147 /** @defgroup LCD_Prescaler LCD Prescaler
bogdanm 84:0b3ab51c8877 148 * @{
bogdanm 84:0b3ab51c8877 149 */
bogdanm 84:0b3ab51c8877 150
bogdanm 84:0b3ab51c8877 151 #define LCD_PRESCALER_1 ((uint32_t)0x00000000) /*!< CLKPS = LCDCLK */
bogdanm 84:0b3ab51c8877 152 #define LCD_PRESCALER_2 ((uint32_t)0x00400000) /*!< CLKPS = LCDCLK/2 */
bogdanm 84:0b3ab51c8877 153 #define LCD_PRESCALER_4 ((uint32_t)0x00800000) /*!< CLKPS = LCDCLK/4 */
bogdanm 84:0b3ab51c8877 154 #define LCD_PRESCALER_8 ((uint32_t)0x00C00000) /*!< CLKPS = LCDCLK/8 */
bogdanm 84:0b3ab51c8877 155 #define LCD_PRESCALER_16 ((uint32_t)0x01000000) /*!< CLKPS = LCDCLK/16 */
bogdanm 84:0b3ab51c8877 156 #define LCD_PRESCALER_32 ((uint32_t)0x01400000) /*!< CLKPS = LCDCLK/32 */
bogdanm 84:0b3ab51c8877 157 #define LCD_PRESCALER_64 ((uint32_t)0x01800000) /*!< CLKPS = LCDCLK/64 */
bogdanm 84:0b3ab51c8877 158 #define LCD_PRESCALER_128 ((uint32_t)0x01C00000) /*!< CLKPS = LCDCLK/128 */
bogdanm 84:0b3ab51c8877 159 #define LCD_PRESCALER_256 ((uint32_t)0x02000000) /*!< CLKPS = LCDCLK/256 */
bogdanm 84:0b3ab51c8877 160 #define LCD_PRESCALER_512 ((uint32_t)0x02400000) /*!< CLKPS = LCDCLK/512 */
bogdanm 84:0b3ab51c8877 161 #define LCD_PRESCALER_1024 ((uint32_t)0x02800000) /*!< CLKPS = LCDCLK/1024 */
bogdanm 84:0b3ab51c8877 162 #define LCD_PRESCALER_2048 ((uint32_t)0x02C00000) /*!< CLKPS = LCDCLK/2048 */
bogdanm 84:0b3ab51c8877 163 #define LCD_PRESCALER_4096 ((uint32_t)0x03000000) /*!< CLKPS = LCDCLK/4096 */
bogdanm 84:0b3ab51c8877 164 #define LCD_PRESCALER_8192 ((uint32_t)0x03400000) /*!< CLKPS = LCDCLK/8192 */
bogdanm 84:0b3ab51c8877 165 #define LCD_PRESCALER_16384 ((uint32_t)0x03800000) /*!< CLKPS = LCDCLK/16384 */
Kojto 96:487b796308b0 166 #define LCD_PRESCALER_32768 ((uint32_t)LCD_FCR_PS) /*!< CLKPS = LCDCLK/32768 */
bogdanm 84:0b3ab51c8877 167
Kojto 96:487b796308b0 168 #define IS_LCD_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LCD_PRESCALER_1) || \
Kojto 96:487b796308b0 169 ((__PRESCALER__) == LCD_PRESCALER_2) || \
Kojto 96:487b796308b0 170 ((__PRESCALER__) == LCD_PRESCALER_4) || \
Kojto 96:487b796308b0 171 ((__PRESCALER__) == LCD_PRESCALER_8) || \
Kojto 96:487b796308b0 172 ((__PRESCALER__) == LCD_PRESCALER_16) || \
Kojto 96:487b796308b0 173 ((__PRESCALER__) == LCD_PRESCALER_32) || \
Kojto 96:487b796308b0 174 ((__PRESCALER__) == LCD_PRESCALER_64) || \
Kojto 96:487b796308b0 175 ((__PRESCALER__) == LCD_PRESCALER_128) || \
Kojto 96:487b796308b0 176 ((__PRESCALER__) == LCD_PRESCALER_256) || \
Kojto 96:487b796308b0 177 ((__PRESCALER__) == LCD_PRESCALER_512) || \
Kojto 96:487b796308b0 178 ((__PRESCALER__) == LCD_PRESCALER_1024) || \
Kojto 96:487b796308b0 179 ((__PRESCALER__) == LCD_PRESCALER_2048) || \
Kojto 96:487b796308b0 180 ((__PRESCALER__) == LCD_PRESCALER_4096) || \
Kojto 96:487b796308b0 181 ((__PRESCALER__) == LCD_PRESCALER_8192) || \
Kojto 96:487b796308b0 182 ((__PRESCALER__) == LCD_PRESCALER_16384) || \
Kojto 96:487b796308b0 183 ((__PRESCALER__) == LCD_PRESCALER_32768))
bogdanm 84:0b3ab51c8877 184
bogdanm 84:0b3ab51c8877 185 /**
bogdanm 84:0b3ab51c8877 186 * @}
bogdanm 84:0b3ab51c8877 187 */
bogdanm 84:0b3ab51c8877 188
Kojto 96:487b796308b0 189 /** @defgroup LCD_Divider LCD Divider
bogdanm 84:0b3ab51c8877 190 * @{
bogdanm 84:0b3ab51c8877 191 */
bogdanm 84:0b3ab51c8877 192
bogdanm 84:0b3ab51c8877 193 #define LCD_DIVIDER_16 ((uint32_t)0x00000000) /*!< LCD frequency = CLKPS/16 */
bogdanm 84:0b3ab51c8877 194 #define LCD_DIVIDER_17 ((uint32_t)0x00040000) /*!< LCD frequency = CLKPS/17 */
bogdanm 84:0b3ab51c8877 195 #define LCD_DIVIDER_18 ((uint32_t)0x00080000) /*!< LCD frequency = CLKPS/18 */
bogdanm 84:0b3ab51c8877 196 #define LCD_DIVIDER_19 ((uint32_t)0x000C0000) /*!< LCD frequency = CLKPS/19 */
bogdanm 84:0b3ab51c8877 197 #define LCD_DIVIDER_20 ((uint32_t)0x00100000) /*!< LCD frequency = CLKPS/20 */
bogdanm 84:0b3ab51c8877 198 #define LCD_DIVIDER_21 ((uint32_t)0x00140000) /*!< LCD frequency = CLKPS/21 */
bogdanm 84:0b3ab51c8877 199 #define LCD_DIVIDER_22 ((uint32_t)0x00180000) /*!< LCD frequency = CLKPS/22 */
bogdanm 84:0b3ab51c8877 200 #define LCD_DIVIDER_23 ((uint32_t)0x001C0000) /*!< LCD frequency = CLKPS/23 */
bogdanm 84:0b3ab51c8877 201 #define LCD_DIVIDER_24 ((uint32_t)0x00200000) /*!< LCD frequency = CLKPS/24 */
bogdanm 84:0b3ab51c8877 202 #define LCD_DIVIDER_25 ((uint32_t)0x00240000) /*!< LCD frequency = CLKPS/25 */
bogdanm 84:0b3ab51c8877 203 #define LCD_DIVIDER_26 ((uint32_t)0x00280000) /*!< LCD frequency = CLKPS/26 */
bogdanm 84:0b3ab51c8877 204 #define LCD_DIVIDER_27 ((uint32_t)0x002C0000) /*!< LCD frequency = CLKPS/27 */
bogdanm 84:0b3ab51c8877 205 #define LCD_DIVIDER_28 ((uint32_t)0x00300000) /*!< LCD frequency = CLKPS/28 */
bogdanm 84:0b3ab51c8877 206 #define LCD_DIVIDER_29 ((uint32_t)0x00340000) /*!< LCD frequency = CLKPS/29 */
bogdanm 84:0b3ab51c8877 207 #define LCD_DIVIDER_30 ((uint32_t)0x00380000) /*!< LCD frequency = CLKPS/30 */
Kojto 96:487b796308b0 208 #define LCD_DIVIDER_31 ((uint32_t)LCD_FCR_DIV) /*!< LCD frequency = CLKPS/31 */
bogdanm 84:0b3ab51c8877 209
Kojto 96:487b796308b0 210 #define IS_LCD_DIVIDER(__DIVIDER__) (((__DIVIDER__) == LCD_DIVIDER_16) || \
Kojto 96:487b796308b0 211 ((__DIVIDER__) == LCD_DIVIDER_17) || \
Kojto 96:487b796308b0 212 ((__DIVIDER__) == LCD_DIVIDER_18) || \
Kojto 96:487b796308b0 213 ((__DIVIDER__) == LCD_DIVIDER_19) || \
Kojto 96:487b796308b0 214 ((__DIVIDER__) == LCD_DIVIDER_20) || \
Kojto 96:487b796308b0 215 ((__DIVIDER__) == LCD_DIVIDER_21) || \
Kojto 96:487b796308b0 216 ((__DIVIDER__) == LCD_DIVIDER_22) || \
Kojto 96:487b796308b0 217 ((__DIVIDER__) == LCD_DIVIDER_23) || \
Kojto 96:487b796308b0 218 ((__DIVIDER__) == LCD_DIVIDER_24) || \
Kojto 96:487b796308b0 219 ((__DIVIDER__) == LCD_DIVIDER_25) || \
Kojto 96:487b796308b0 220 ((__DIVIDER__) == LCD_DIVIDER_26) || \
Kojto 96:487b796308b0 221 ((__DIVIDER__) == LCD_DIVIDER_27) || \
Kojto 96:487b796308b0 222 ((__DIVIDER__) == LCD_DIVIDER_28) || \
Kojto 96:487b796308b0 223 ((__DIVIDER__) == LCD_DIVIDER_29) || \
Kojto 96:487b796308b0 224 ((__DIVIDER__) == LCD_DIVIDER_30) || \
Kojto 96:487b796308b0 225 ((__DIVIDER__) == LCD_DIVIDER_31))
bogdanm 84:0b3ab51c8877 226
bogdanm 84:0b3ab51c8877 227 /**
bogdanm 84:0b3ab51c8877 228 * @}
bogdanm 84:0b3ab51c8877 229 */
bogdanm 84:0b3ab51c8877 230
bogdanm 84:0b3ab51c8877 231
Kojto 96:487b796308b0 232 /** @defgroup LCD_Duty LCD Duty
bogdanm 84:0b3ab51c8877 233 * @{
bogdanm 84:0b3ab51c8877 234 */
bogdanm 84:0b3ab51c8877 235
Kojto 96:487b796308b0 236 #define LCD_DUTY_STATIC ((uint32_t)0x00000000) /*!< Static duty */
Kojto 96:487b796308b0 237 #define LCD_DUTY_1_2 (LCD_CR_DUTY_0) /*!< 1/2 duty */
Kojto 96:487b796308b0 238 #define LCD_DUTY_1_3 (LCD_CR_DUTY_1) /*!< 1/3 duty */
Kojto 96:487b796308b0 239 #define LCD_DUTY_1_4 ((LCD_CR_DUTY_1 | LCD_CR_DUTY_0)) /*!< 1/4 duty */
Kojto 96:487b796308b0 240 #define LCD_DUTY_1_8 (LCD_CR_DUTY_2) /*!< 1/8 duty */
bogdanm 84:0b3ab51c8877 241
Kojto 96:487b796308b0 242 #define IS_LCD_DUTY(__DUTY__) (((__DUTY__) == LCD_DUTY_STATIC) || \
Kojto 96:487b796308b0 243 ((__DUTY__) == LCD_DUTY_1_2) || \
Kojto 96:487b796308b0 244 ((__DUTY__) == LCD_DUTY_1_3) || \
Kojto 96:487b796308b0 245 ((__DUTY__) == LCD_DUTY_1_4) || \
Kojto 96:487b796308b0 246 ((__DUTY__) == LCD_DUTY_1_8))
bogdanm 84:0b3ab51c8877 247
bogdanm 84:0b3ab51c8877 248 /**
bogdanm 84:0b3ab51c8877 249 * @}
bogdanm 84:0b3ab51c8877 250 */
bogdanm 84:0b3ab51c8877 251
bogdanm 84:0b3ab51c8877 252
Kojto 96:487b796308b0 253 /** @defgroup LCD_Bias LCD Bias
bogdanm 84:0b3ab51c8877 254 * @{
bogdanm 84:0b3ab51c8877 255 */
bogdanm 84:0b3ab51c8877 256
bogdanm 84:0b3ab51c8877 257 #define LCD_BIAS_1_4 ((uint32_t)0x00000000) /*!< 1/4 Bias */
bogdanm 84:0b3ab51c8877 258 #define LCD_BIAS_1_2 LCD_CR_BIAS_0 /*!< 1/2 Bias */
bogdanm 84:0b3ab51c8877 259 #define LCD_BIAS_1_3 LCD_CR_BIAS_1 /*!< 1/3 Bias */
bogdanm 84:0b3ab51c8877 260
Kojto 96:487b796308b0 261 #define IS_LCD_BIAS(__BIAS__) (((__BIAS__) == LCD_BIAS_1_4) || \
Kojto 96:487b796308b0 262 ((__BIAS__) == LCD_BIAS_1_2) || \
Kojto 96:487b796308b0 263 ((__BIAS__) == LCD_BIAS_1_3))
bogdanm 84:0b3ab51c8877 264 /**
bogdanm 84:0b3ab51c8877 265 * @}
bogdanm 84:0b3ab51c8877 266 */
bogdanm 84:0b3ab51c8877 267
Kojto 96:487b796308b0 268 /** @defgroup LCD_Voltage_Source LCD Voltage Source
bogdanm 84:0b3ab51c8877 269 * @{
bogdanm 84:0b3ab51c8877 270 */
bogdanm 84:0b3ab51c8877 271
bogdanm 84:0b3ab51c8877 272 #define LCD_VOLTAGESOURCE_INTERNAL ((uint32_t)0x00000000) /*!< Internal voltage source for the LCD */
bogdanm 84:0b3ab51c8877 273 #define LCD_VOLTAGESOURCE_EXTERNAL LCD_CR_VSEL /*!< External voltage source for the LCD */
bogdanm 84:0b3ab51c8877 274
bogdanm 84:0b3ab51c8877 275 #define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VOLTAGESOURCE_INTERNAL) || \
bogdanm 84:0b3ab51c8877 276 ((SOURCE) == LCD_VOLTAGESOURCE_EXTERNAL))
bogdanm 84:0b3ab51c8877 277
bogdanm 84:0b3ab51c8877 278 /**
bogdanm 84:0b3ab51c8877 279 * @}
bogdanm 84:0b3ab51c8877 280 */
bogdanm 84:0b3ab51c8877 281
Kojto 96:487b796308b0 282 /** @defgroup LCD_Interrupts LCD Interrupts
bogdanm 84:0b3ab51c8877 283 * @{
bogdanm 84:0b3ab51c8877 284 */
bogdanm 84:0b3ab51c8877 285 #define LCD_IT_SOF LCD_FCR_SOFIE
bogdanm 84:0b3ab51c8877 286 #define LCD_IT_UDD LCD_FCR_UDDIE
bogdanm 84:0b3ab51c8877 287
Kojto 96:487b796308b0 288 /**
Kojto 96:487b796308b0 289 * @}
Kojto 96:487b796308b0 290 */
Kojto 96:487b796308b0 291
Kojto 96:487b796308b0 292 /** @defgroup LCD_PulseOnDuration LCD Pulse On Duration
Kojto 96:487b796308b0 293 * @{
Kojto 96:487b796308b0 294 */
bogdanm 84:0b3ab51c8877 295
Kojto 96:487b796308b0 296 #define LCD_PULSEONDURATION_0 ((uint32_t)0x00000000) /*!< Pulse ON duration = 0 pulse */
Kojto 96:487b796308b0 297 #define LCD_PULSEONDURATION_1 (LCD_FCR_PON_0) /*!< Pulse ON duration = 1/CK_PS */
Kojto 96:487b796308b0 298 #define LCD_PULSEONDURATION_2 (LCD_FCR_PON_1) /*!< Pulse ON duration = 2/CK_PS */
Kojto 96:487b796308b0 299 #define LCD_PULSEONDURATION_3 (LCD_FCR_PON_1 | LCD_FCR_PON_0) /*!< Pulse ON duration = 3/CK_PS */
Kojto 96:487b796308b0 300 #define LCD_PULSEONDURATION_4 (LCD_FCR_PON_2) /*!< Pulse ON duration = 4/CK_PS */
Kojto 96:487b796308b0 301 #define LCD_PULSEONDURATION_5 (LCD_FCR_PON_2 | LCD_FCR_PON_0) /*!< Pulse ON duration = 5/CK_PS */
Kojto 96:487b796308b0 302 #define LCD_PULSEONDURATION_6 (LCD_FCR_PON_2 | LCD_FCR_PON_1) /*!< Pulse ON duration = 6/CK_PS */
Kojto 96:487b796308b0 303 #define LCD_PULSEONDURATION_7 (LCD_FCR_PON) /*!< Pulse ON duration = 7/CK_PS */
Kojto 96:487b796308b0 304
Kojto 96:487b796308b0 305 #define IS_LCD_PULSE_ON_DURATION(__DURATION__) (((__DURATION__) == LCD_PULSEONDURATION_0) || \
Kojto 96:487b796308b0 306 ((__DURATION__) == LCD_PULSEONDURATION_1) || \
Kojto 96:487b796308b0 307 ((__DURATION__) == LCD_PULSEONDURATION_2) || \
Kojto 96:487b796308b0 308 ((__DURATION__) == LCD_PULSEONDURATION_3) || \
Kojto 96:487b796308b0 309 ((__DURATION__) == LCD_PULSEONDURATION_4) || \
Kojto 96:487b796308b0 310 ((__DURATION__) == LCD_PULSEONDURATION_5) || \
Kojto 96:487b796308b0 311 ((__DURATION__) == LCD_PULSEONDURATION_6) || \
Kojto 96:487b796308b0 312 ((__DURATION__) == LCD_PULSEONDURATION_7))
bogdanm 84:0b3ab51c8877 313 /**
bogdanm 84:0b3ab51c8877 314 * @}
bogdanm 84:0b3ab51c8877 315 */
bogdanm 84:0b3ab51c8877 316
Kojto 96:487b796308b0 317 /** @defgroup LCD_HighDrive LCD HighDrive
bogdanm 84:0b3ab51c8877 318 * @{
bogdanm 84:0b3ab51c8877 319 */
bogdanm 84:0b3ab51c8877 320
Kojto 96:487b796308b0 321 #define LCD_HIGHDRIVE_0 ((uint32_t)0x00000000) /*!< Low resistance Drive */
Kojto 96:487b796308b0 322 #define LCD_HIGHDRIVE_1 (LCD_FCR_HD) /*!< High resistance Drive */
bogdanm 84:0b3ab51c8877 323
Kojto 96:487b796308b0 324 #define IS_LCD_HIGHDRIVE(__HIGHDRIVE__) (((__HIGHDRIVE__) == LCD_HIGHDRIVE_0) || \
Kojto 96:487b796308b0 325 ((__HIGHDRIVE__) == LCD_HIGHDRIVE_1))
bogdanm 84:0b3ab51c8877 326 /**
bogdanm 84:0b3ab51c8877 327 * @}
bogdanm 84:0b3ab51c8877 328 */
bogdanm 84:0b3ab51c8877 329
Kojto 96:487b796308b0 330 /** @defgroup LCD_DeadTime LCD Dead Time
bogdanm 84:0b3ab51c8877 331 * @{
bogdanm 84:0b3ab51c8877 332 */
bogdanm 84:0b3ab51c8877 333
Kojto 96:487b796308b0 334 #define LCD_DEADTIME_0 ((uint32_t)0x00000000) /*!< No dead Time */
Kojto 96:487b796308b0 335 #define LCD_DEADTIME_1 (LCD_FCR_DEAD_0) /*!< One Phase between different couple of Frame */
Kojto 96:487b796308b0 336 #define LCD_DEADTIME_2 (LCD_FCR_DEAD_1) /*!< Two Phase between different couple of Frame */
Kojto 96:487b796308b0 337 #define LCD_DEADTIME_3 (LCD_FCR_DEAD_1 | LCD_FCR_DEAD_0) /*!< Three Phase between different couple of Frame */
Kojto 96:487b796308b0 338 #define LCD_DEADTIME_4 (LCD_FCR_DEAD_2) /*!< Four Phase between different couple of Frame */
Kojto 96:487b796308b0 339 #define LCD_DEADTIME_5 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_0) /*!< Five Phase between different couple of Frame */
Kojto 96:487b796308b0 340 #define LCD_DEADTIME_6 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_1) /*!< Six Phase between different couple of Frame */
Kojto 96:487b796308b0 341 #define LCD_DEADTIME_7 (LCD_FCR_DEAD) /*!< Seven Phase between different couple of Frame */
bogdanm 84:0b3ab51c8877 342
Kojto 96:487b796308b0 343 #define IS_LCD_DEAD_TIME(__TIME__) (((__TIME__) == LCD_DEADTIME_0) || \
Kojto 96:487b796308b0 344 ((__TIME__) == LCD_DEADTIME_1) || \
Kojto 96:487b796308b0 345 ((__TIME__) == LCD_DEADTIME_2) || \
Kojto 96:487b796308b0 346 ((__TIME__) == LCD_DEADTIME_3) || \
Kojto 96:487b796308b0 347 ((__TIME__) == LCD_DEADTIME_4) || \
Kojto 96:487b796308b0 348 ((__TIME__) == LCD_DEADTIME_5) || \
Kojto 96:487b796308b0 349 ((__TIME__) == LCD_DEADTIME_6) || \
Kojto 96:487b796308b0 350 ((__TIME__) == LCD_DEADTIME_7))
bogdanm 84:0b3ab51c8877 351 /**
bogdanm 84:0b3ab51c8877 352 * @}
bogdanm 84:0b3ab51c8877 353 */
bogdanm 84:0b3ab51c8877 354
Kojto 96:487b796308b0 355 /** @defgroup LCD_BlinkMode LCD Blink Mode
bogdanm 84:0b3ab51c8877 356 * @{
bogdanm 84:0b3ab51c8877 357 */
bogdanm 84:0b3ab51c8877 358
Kojto 96:487b796308b0 359 #define LCD_BLINKMODE_OFF ((uint32_t)0x00000000) /*!< Blink disabled */
Kojto 96:487b796308b0 360 #define LCD_BLINKMODE_SEG0_COM0 (LCD_FCR_BLINK_0) /*!< Blink enabled on SEG[0], COM[0] (1 pixel) */
Kojto 96:487b796308b0 361 #define LCD_BLINKMODE_SEG0_ALLCOM (LCD_FCR_BLINK_1) /*!< Blink enabled on SEG[0], all COM (up to
bogdanm 84:0b3ab51c8877 362 8 pixels according to the programmed duty) */
Kojto 96:487b796308b0 363 #define LCD_BLINKMODE_ALLSEG_ALLCOM (LCD_FCR_BLINK) /*!< Blink enabled on all SEG and all COM (all pixels) */
bogdanm 84:0b3ab51c8877 364
Kojto 96:487b796308b0 365 #define IS_LCD_BLINK_MODE(__MODE__) (((__MODE__) == LCD_BLINKMODE_OFF) || \
Kojto 96:487b796308b0 366 ((__MODE__) == LCD_BLINKMODE_SEG0_COM0) || \
Kojto 96:487b796308b0 367 ((__MODE__) == LCD_BLINKMODE_SEG0_ALLCOM) || \
Kojto 96:487b796308b0 368 ((__MODE__) == LCD_BLINKMODE_ALLSEG_ALLCOM))
bogdanm 84:0b3ab51c8877 369 /**
bogdanm 84:0b3ab51c8877 370 * @}
bogdanm 84:0b3ab51c8877 371 */
bogdanm 84:0b3ab51c8877 372
Kojto 96:487b796308b0 373 /** @defgroup LCD_BlinkFrequency LCD Blink Frequency
bogdanm 84:0b3ab51c8877 374 * @{
bogdanm 84:0b3ab51c8877 375 */
bogdanm 84:0b3ab51c8877 376
Kojto 96:487b796308b0 377 #define LCD_BLINKFREQUENCY_DIV8 ((uint32_t)0x00000000) /*!< The Blink frequency = fLCD/8 */
Kojto 96:487b796308b0 378 #define LCD_BLINKFREQUENCY_DIV16 (LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/16 */
Kojto 96:487b796308b0 379 #define LCD_BLINKFREQUENCY_DIV32 (LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/32 */
Kojto 96:487b796308b0 380 #define LCD_BLINKFREQUENCY_DIV64 (LCD_FCR_BLINKF_1 | LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/64 */
Kojto 96:487b796308b0 381 #define LCD_BLINKFREQUENCY_DIV128 (LCD_FCR_BLINKF_2) /*!< The Blink frequency = fLCD/128 */
Kojto 96:487b796308b0 382 #define LCD_BLINKFREQUENCY_DIV256 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/256 */
Kojto 96:487b796308b0 383 #define LCD_BLINKFREQUENCY_DIV512 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/512 */
Kojto 96:487b796308b0 384 #define LCD_BLINKFREQUENCY_DIV1024 (LCD_FCR_BLINKF) /*!< The Blink frequency = fLCD/1024 */
bogdanm 84:0b3ab51c8877 385
Kojto 96:487b796308b0 386 #define IS_LCD_BLINK_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV8) || \
Kojto 96:487b796308b0 387 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV16) || \
Kojto 96:487b796308b0 388 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV32) || \
Kojto 96:487b796308b0 389 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV64) || \
Kojto 96:487b796308b0 390 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV128) || \
Kojto 96:487b796308b0 391 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV256) || \
Kojto 96:487b796308b0 392 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV512) || \
Kojto 96:487b796308b0 393 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV1024))
bogdanm 84:0b3ab51c8877 394 /**
bogdanm 84:0b3ab51c8877 395 * @}
bogdanm 84:0b3ab51c8877 396 */
bogdanm 84:0b3ab51c8877 397
Kojto 96:487b796308b0 398 /** @defgroup LCD_Contrast LCD Contrast
bogdanm 84:0b3ab51c8877 399 * @{
bogdanm 84:0b3ab51c8877 400 */
bogdanm 84:0b3ab51c8877 401
Kojto 96:487b796308b0 402 #define LCD_CONTRASTLEVEL_0 ((uint32_t)0x00000000) /*!< Maximum Voltage = 2.60V */
Kojto 96:487b796308b0 403 #define LCD_CONTRASTLEVEL_1 (LCD_FCR_CC_0) /*!< Maximum Voltage = 2.73V */
Kojto 96:487b796308b0 404 #define LCD_CONTRASTLEVEL_2 (LCD_FCR_CC_1) /*!< Maximum Voltage = 2.86V */
Kojto 96:487b796308b0 405 #define LCD_CONTRASTLEVEL_3 (LCD_FCR_CC_1 | LCD_FCR_CC_0) /*!< Maximum Voltage = 2.99V */
Kojto 96:487b796308b0 406 #define LCD_CONTRASTLEVEL_4 (LCD_FCR_CC_2) /*!< Maximum Voltage = 3.12V */
Kojto 96:487b796308b0 407 #define LCD_CONTRASTLEVEL_5 (LCD_FCR_CC_2 | LCD_FCR_CC_0) /*!< Maximum Voltage = 3.25V */
Kojto 96:487b796308b0 408 #define LCD_CONTRASTLEVEL_6 (LCD_FCR_CC_2 | LCD_FCR_CC_1) /*!< Maximum Voltage = 3.38V */
Kojto 96:487b796308b0 409 #define LCD_CONTRASTLEVEL_7 (LCD_FCR_CC) /*!< Maximum Voltage = 3.51V */
bogdanm 84:0b3ab51c8877 410
Kojto 96:487b796308b0 411 #define IS_LCD_CONTRAST(__CONTRAST__) (((__CONTRAST__) == LCD_CONTRASTLEVEL_0) || \
Kojto 96:487b796308b0 412 ((__CONTRAST__) == LCD_CONTRASTLEVEL_1) || \
Kojto 96:487b796308b0 413 ((__CONTRAST__) == LCD_CONTRASTLEVEL_2) || \
Kojto 96:487b796308b0 414 ((__CONTRAST__) == LCD_CONTRASTLEVEL_3) || \
Kojto 96:487b796308b0 415 ((__CONTRAST__) == LCD_CONTRASTLEVEL_4) || \
Kojto 96:487b796308b0 416 ((__CONTRAST__) == LCD_CONTRASTLEVEL_5) || \
Kojto 96:487b796308b0 417 ((__CONTRAST__) == LCD_CONTRASTLEVEL_6) || \
Kojto 96:487b796308b0 418 ((__CONTRAST__) == LCD_CONTRASTLEVEL_7))
bogdanm 84:0b3ab51c8877 419 /**
bogdanm 84:0b3ab51c8877 420 * @}
bogdanm 84:0b3ab51c8877 421 */
bogdanm 84:0b3ab51c8877 422
Kojto 96:487b796308b0 423 /** @defgroup LCD_Flag LCD Flag
bogdanm 84:0b3ab51c8877 424 * @{
bogdanm 84:0b3ab51c8877 425 */
bogdanm 84:0b3ab51c8877 426
bogdanm 84:0b3ab51c8877 427 #define LCD_FLAG_ENS LCD_SR_ENS
bogdanm 84:0b3ab51c8877 428 #define LCD_FLAG_SOF LCD_SR_SOF
bogdanm 84:0b3ab51c8877 429 #define LCD_FLAG_UDR LCD_SR_UDR
bogdanm 84:0b3ab51c8877 430 #define LCD_FLAG_UDD LCD_SR_UDD
bogdanm 84:0b3ab51c8877 431 #define LCD_FLAG_RDY LCD_SR_RDY
bogdanm 84:0b3ab51c8877 432 #define LCD_FLAG_FCRSF LCD_SR_FCRSR
bogdanm 84:0b3ab51c8877 433
bogdanm 84:0b3ab51c8877 434 /**
bogdanm 84:0b3ab51c8877 435 * @}
bogdanm 84:0b3ab51c8877 436 */
bogdanm 84:0b3ab51c8877 437
Kojto 96:487b796308b0 438 /** @defgroup LCD_RAMRegister LCD RAMRegister
bogdanm 84:0b3ab51c8877 439 * @{
bogdanm 84:0b3ab51c8877 440 */
bogdanm 84:0b3ab51c8877 441
bogdanm 84:0b3ab51c8877 442 #define LCD_RAM_REGISTER0 ((uint32_t)0x00000000) /*!< LCD RAM Register 0 */
bogdanm 84:0b3ab51c8877 443 #define LCD_RAM_REGISTER1 ((uint32_t)0x00000001) /*!< LCD RAM Register 1 */
bogdanm 84:0b3ab51c8877 444 #define LCD_RAM_REGISTER2 ((uint32_t)0x00000002) /*!< LCD RAM Register 2 */
bogdanm 84:0b3ab51c8877 445 #define LCD_RAM_REGISTER3 ((uint32_t)0x00000003) /*!< LCD RAM Register 3 */
bogdanm 84:0b3ab51c8877 446 #define LCD_RAM_REGISTER4 ((uint32_t)0x00000004) /*!< LCD RAM Register 4 */
bogdanm 84:0b3ab51c8877 447 #define LCD_RAM_REGISTER5 ((uint32_t)0x00000005) /*!< LCD RAM Register 5 */
bogdanm 84:0b3ab51c8877 448 #define LCD_RAM_REGISTER6 ((uint32_t)0x00000006) /*!< LCD RAM Register 6 */
bogdanm 84:0b3ab51c8877 449 #define LCD_RAM_REGISTER7 ((uint32_t)0x00000007) /*!< LCD RAM Register 7 */
bogdanm 84:0b3ab51c8877 450 #define LCD_RAM_REGISTER8 ((uint32_t)0x00000008) /*!< LCD RAM Register 8 */
bogdanm 84:0b3ab51c8877 451 #define LCD_RAM_REGISTER9 ((uint32_t)0x00000009) /*!< LCD RAM Register 9 */
bogdanm 84:0b3ab51c8877 452 #define LCD_RAM_REGISTER10 ((uint32_t)0x0000000A) /*!< LCD RAM Register 10 */
bogdanm 84:0b3ab51c8877 453 #define LCD_RAM_REGISTER11 ((uint32_t)0x0000000B) /*!< LCD RAM Register 11 */
bogdanm 84:0b3ab51c8877 454 #define LCD_RAM_REGISTER12 ((uint32_t)0x0000000C) /*!< LCD RAM Register 12 */
bogdanm 84:0b3ab51c8877 455 #define LCD_RAM_REGISTER13 ((uint32_t)0x0000000D) /*!< LCD RAM Register 13 */
bogdanm 84:0b3ab51c8877 456 #define LCD_RAM_REGISTER14 ((uint32_t)0x0000000E) /*!< LCD RAM Register 14 */
bogdanm 84:0b3ab51c8877 457 #define LCD_RAM_REGISTER15 ((uint32_t)0x0000000F) /*!< LCD RAM Register 15 */
bogdanm 84:0b3ab51c8877 458
Kojto 96:487b796308b0 459 #define IS_LCD_RAM_REGISTER(__REGISTER__) (((__REGISTER__) == LCD_RAM_REGISTER0) || \
Kojto 96:487b796308b0 460 ((__REGISTER__) == LCD_RAM_REGISTER1) || \
Kojto 96:487b796308b0 461 ((__REGISTER__) == LCD_RAM_REGISTER2) || \
Kojto 96:487b796308b0 462 ((__REGISTER__) == LCD_RAM_REGISTER3) || \
Kojto 96:487b796308b0 463 ((__REGISTER__) == LCD_RAM_REGISTER4) || \
Kojto 96:487b796308b0 464 ((__REGISTER__) == LCD_RAM_REGISTER5) || \
Kojto 96:487b796308b0 465 ((__REGISTER__) == LCD_RAM_REGISTER6) || \
Kojto 96:487b796308b0 466 ((__REGISTER__) == LCD_RAM_REGISTER7) || \
Kojto 96:487b796308b0 467 ((__REGISTER__) == LCD_RAM_REGISTER8) || \
Kojto 96:487b796308b0 468 ((__REGISTER__) == LCD_RAM_REGISTER9) || \
Kojto 96:487b796308b0 469 ((__REGISTER__) == LCD_RAM_REGISTER10) || \
Kojto 96:487b796308b0 470 ((__REGISTER__) == LCD_RAM_REGISTER11) || \
Kojto 96:487b796308b0 471 ((__REGISTER__) == LCD_RAM_REGISTER12) || \
Kojto 96:487b796308b0 472 ((__REGISTER__) == LCD_RAM_REGISTER13) || \
Kojto 96:487b796308b0 473 ((__REGISTER__) == LCD_RAM_REGISTER14) || \
Kojto 96:487b796308b0 474 ((__REGISTER__) == LCD_RAM_REGISTER15))
bogdanm 84:0b3ab51c8877 475
bogdanm 84:0b3ab51c8877 476 /**
bogdanm 84:0b3ab51c8877 477 * @}
bogdanm 84:0b3ab51c8877 478 */
bogdanm 84:0b3ab51c8877 479
bogdanm 84:0b3ab51c8877 480 /**
bogdanm 84:0b3ab51c8877 481 * @}
bogdanm 84:0b3ab51c8877 482 */
bogdanm 84:0b3ab51c8877 483
bogdanm 84:0b3ab51c8877 484 /* Exported macro ------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 485
Kojto 96:487b796308b0 486 /** @defgroup LCD_Exported_Macros LCD Exported Macros
bogdanm 92:4fc01daae5a5 487 * @{
bogdanm 92:4fc01daae5a5 488 */
bogdanm 92:4fc01daae5a5 489
bogdanm 84:0b3ab51c8877 490 /** @brief Reset LCD handle state
bogdanm 84:0b3ab51c8877 491 * @param __HANDLE__: specifies the LCD Handle.
bogdanm 84:0b3ab51c8877 492 * @retval None
bogdanm 84:0b3ab51c8877 493 */
Kojto 96:487b796308b0 494 #define __HAL_LCD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LCD_STATE_RESET)
bogdanm 84:0b3ab51c8877 495
bogdanm 84:0b3ab51c8877 496 /** @brief macros to enables or disables the LCD
bogdanm 84:0b3ab51c8877 497 * @param __HANDLE__: specifies the LCD Handle.
bogdanm 84:0b3ab51c8877 498 * @retval None
bogdanm 84:0b3ab51c8877 499 */
Kojto 96:487b796308b0 500 #define __HAL_LCD_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN))
Kojto 96:487b796308b0 501 #define __HAL_LCD_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN))
bogdanm 84:0b3ab51c8877 502
bogdanm 84:0b3ab51c8877 503 /** @brief Macros to enable or disable the low resistance divider. Displays with high
bogdanm 84:0b3ab51c8877 504 * internal resistance may need a longer drive time to achieve
bogdanm 84:0b3ab51c8877 505 * satisfactory contrast. This function is useful in this case if some
bogdanm 84:0b3ab51c8877 506 * additional power consumption can be tolerated.
bogdanm 84:0b3ab51c8877 507 * @param __HANDLE__: specifies the LCD Handle.
bogdanm 84:0b3ab51c8877 508 * @note When this mode is enabled, the PulseOn Duration (PON) have to be
bogdanm 84:0b3ab51c8877 509 * programmed to 1/CK_PS (LCD_PULSEONDURATION_1).
bogdanm 84:0b3ab51c8877 510 * @retval None
bogdanm 84:0b3ab51c8877 511 */
bogdanm 84:0b3ab51c8877 512 #define __HAL_LCD_HIGHDRIVER_ENABLE(__HANDLE__) \
bogdanm 84:0b3ab51c8877 513 do{ \
Kojto 96:487b796308b0 514 SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
bogdanm 84:0b3ab51c8877 515 LCD_WaitForSynchro(__HANDLE__); \
bogdanm 84:0b3ab51c8877 516 }while(0)
bogdanm 84:0b3ab51c8877 517
bogdanm 84:0b3ab51c8877 518 #define __HAL_LCD_HIGHDRIVER_DISABLE(__HANDLE__) \
bogdanm 84:0b3ab51c8877 519 do{ \
Kojto 96:487b796308b0 520 CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
bogdanm 84:0b3ab51c8877 521 LCD_WaitForSynchro(__HANDLE__); \
bogdanm 84:0b3ab51c8877 522 }while(0)
Kojto 96:487b796308b0 523
bogdanm 84:0b3ab51c8877 524 /**
bogdanm 84:0b3ab51c8877 525 * @brief Macro to configure the LCD pulses on duration.
bogdanm 84:0b3ab51c8877 526 * @param __HANDLE__: specifies the LCD Handle.
bogdanm 84:0b3ab51c8877 527 * @param __DURATION__: specifies the LCD pulse on duration in terms of
bogdanm 84:0b3ab51c8877 528 * CK_PS (prescaled LCD clock period) pulses.
bogdanm 84:0b3ab51c8877 529 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 530 * @arg LCD_PULSEONDURATION_0: 0 pulse
bogdanm 84:0b3ab51c8877 531 * @arg LCD_PULSEONDURATION_1: Pulse ON duration = 1/CK_PS
bogdanm 84:0b3ab51c8877 532 * @arg LCD_PULSEONDURATION_2: Pulse ON duration = 2/CK_PS
bogdanm 84:0b3ab51c8877 533 * @arg LCD_PULSEONDURATION_3: Pulse ON duration = 3/CK_PS
bogdanm 84:0b3ab51c8877 534 * @arg LCD_PULSEONDURATION_4: Pulse ON duration = 4/CK_PS
bogdanm 84:0b3ab51c8877 535 * @arg LCD_PULSEONDURATION_5: Pulse ON duration = 5/CK_PS
bogdanm 84:0b3ab51c8877 536 * @arg LCD_PULSEONDURATION_6: Pulse ON duration = 6/CK_PS
bogdanm 84:0b3ab51c8877 537 * @arg LCD_PULSEONDURATION_7: Pulse ON duration = 7/CK_PS
bogdanm 84:0b3ab51c8877 538 * @retval None
bogdanm 84:0b3ab51c8877 539 */
bogdanm 84:0b3ab51c8877 540 #define __HAL_LCD_PULSEONDURATION_CONFIG(__HANDLE__, __DURATION__) \
bogdanm 84:0b3ab51c8877 541 do{ \
bogdanm 84:0b3ab51c8877 542 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \
bogdanm 84:0b3ab51c8877 543 LCD_WaitForSynchro(__HANDLE__); \
bogdanm 84:0b3ab51c8877 544 }while(0)
bogdanm 84:0b3ab51c8877 545
bogdanm 84:0b3ab51c8877 546 /**
bogdanm 84:0b3ab51c8877 547 * @brief Macro to configure the LCD dead time.
bogdanm 84:0b3ab51c8877 548 * @param __HANDLE__: specifies the LCD Handle.
bogdanm 84:0b3ab51c8877 549 * @param __DEADTIME__: specifies the LCD dead time.
bogdanm 84:0b3ab51c8877 550 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 551 * @arg LCD_DEADTIME_0: No dead Time
bogdanm 84:0b3ab51c8877 552 * @arg LCD_DEADTIME_1: One Phase between different couple of Frame
bogdanm 84:0b3ab51c8877 553 * @arg LCD_DEADTIME_2: Two Phase between different couple of Frame
bogdanm 84:0b3ab51c8877 554 * @arg LCD_DEADTIME_3: Three Phase between different couple of Frame
bogdanm 84:0b3ab51c8877 555 * @arg LCD_DEADTIME_4: Four Phase between different couple of Frame
bogdanm 84:0b3ab51c8877 556 * @arg LCD_DEADTIME_5: Five Phase between different couple of Frame
bogdanm 84:0b3ab51c8877 557 * @arg LCD_DEADTIME_6: Six Phase between different couple of Frame
bogdanm 84:0b3ab51c8877 558 * @arg LCD_DEADTIME_7: Seven Phase between different couple of Frame
bogdanm 84:0b3ab51c8877 559 * @retval None
bogdanm 84:0b3ab51c8877 560 */
bogdanm 84:0b3ab51c8877 561 #define __HAL_LCD_DEADTIME_CONFIG(__HANDLE__, __DEADTIME__) \
bogdanm 84:0b3ab51c8877 562 do{ \
bogdanm 84:0b3ab51c8877 563 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \
bogdanm 84:0b3ab51c8877 564 LCD_WaitForSynchro(__HANDLE__); \
bogdanm 84:0b3ab51c8877 565 }while(0)
bogdanm 84:0b3ab51c8877 566
bogdanm 84:0b3ab51c8877 567 /**
bogdanm 84:0b3ab51c8877 568 * @brief Macro to configure the LCD Contrast.
bogdanm 84:0b3ab51c8877 569 * @param __HANDLE__: specifies the LCD Handle.
bogdanm 84:0b3ab51c8877 570 * @param __CONTRAST__: specifies the LCD Contrast.
bogdanm 84:0b3ab51c8877 571 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 572 * @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V
bogdanm 84:0b3ab51c8877 573 * @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V
bogdanm 84:0b3ab51c8877 574 * @arg LCD_CONTRASTLEVEL_2: Maximum Voltage = 2.86V
bogdanm 84:0b3ab51c8877 575 * @arg LCD_CONTRASTLEVEL_3: Maximum Voltage = 2.99V
bogdanm 84:0b3ab51c8877 576 * @arg LCD_CONTRASTLEVEL_4: Maximum Voltage = 3.12V
bogdanm 84:0b3ab51c8877 577 * @arg LCD_CONTRASTLEVEL_5: Maximum Voltage = 3.25V
bogdanm 84:0b3ab51c8877 578 * @arg LCD_CONTRASTLEVEL_6: Maximum Voltage = 3.38V
bogdanm 84:0b3ab51c8877 579 * @arg LCD_CONTRASTLEVEL_7: Maximum Voltage = 3.51V
bogdanm 84:0b3ab51c8877 580 * @retval None
bogdanm 84:0b3ab51c8877 581 */
bogdanm 84:0b3ab51c8877 582 #define __HAL_LCD_CONTRAST_CONFIG(__HANDLE__, __CONTRAST__) \
bogdanm 84:0b3ab51c8877 583 do{ \
bogdanm 84:0b3ab51c8877 584 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \
bogdanm 84:0b3ab51c8877 585 LCD_WaitForSynchro(__HANDLE__); \
bogdanm 84:0b3ab51c8877 586 } while(0)
Kojto 96:487b796308b0 587
bogdanm 84:0b3ab51c8877 588 /**
bogdanm 84:0b3ab51c8877 589 * @brief Macro to configure the LCD Blink mode and Blink frequency.
bogdanm 84:0b3ab51c8877 590 * @param __HANDLE__: specifies the LCD Handle.
bogdanm 84:0b3ab51c8877 591 * @param __BLINKMODE__: specifies the LCD blink mode.
bogdanm 84:0b3ab51c8877 592 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 593 * @arg LCD_BLINKMODE_OFF: Blink disabled
bogdanm 84:0b3ab51c8877 594 * @arg LCD_BLINKMODE_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel)
bogdanm 84:0b3ab51c8877 595 * @arg LCD_BLINKMODE_SEG0_ALLCOM: Blink enabled on SEG[0], all COM (up to 8
bogdanm 84:0b3ab51c8877 596 * pixels according to the programmed duty)
bogdanm 84:0b3ab51c8877 597 * @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM
bogdanm 84:0b3ab51c8877 598 * (all pixels)
bogdanm 84:0b3ab51c8877 599 * @param __BLINKFREQUENCY__: specifies the LCD blink frequency.
bogdanm 84:0b3ab51c8877 600 * @arg LCD_BLINKFREQUENCY_DIV8: The Blink frequency = fLcd/8
bogdanm 84:0b3ab51c8877 601 * @arg LCD_BLINKFREQUENCY_DIV16: The Blink frequency = fLcd/16
bogdanm 84:0b3ab51c8877 602 * @arg LCD_BLINKFREQUENCY_DIV32: The Blink frequency = fLcd/32
bogdanm 84:0b3ab51c8877 603 * @arg LCD_BLINKFREQUENCY_DIV64: The Blink frequency = fLcd/64
bogdanm 84:0b3ab51c8877 604 * @arg LCD_BLINKFREQUENCY_DIV128: The Blink frequency = fLcd/128
bogdanm 84:0b3ab51c8877 605 * @arg LCD_BLINKFREQUENCY_DIV256: The Blink frequency = fLcd/256
bogdanm 84:0b3ab51c8877 606 * @arg LCD_BLINKFREQUENCY_DIV512: The Blink frequency = fLcd/512
bogdanm 84:0b3ab51c8877 607 * @arg LCD_BLINKFREQUENCY_DIV1024: The Blink frequency = fLcd/1024
bogdanm 84:0b3ab51c8877 608 * @retval None
bogdanm 84:0b3ab51c8877 609 */
bogdanm 84:0b3ab51c8877 610 #define __HAL_LCD_BLINK_CONFIG(__HANDLE__, __BLINKMODE__, __BLINKFREQUENCY__) \
bogdanm 84:0b3ab51c8877 611 do{ \
bogdanm 84:0b3ab51c8877 612 MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BLINKFREQUENCY__))); \
bogdanm 84:0b3ab51c8877 613 LCD_WaitForSynchro(__HANDLE__); \
bogdanm 84:0b3ab51c8877 614 }while(0)
bogdanm 84:0b3ab51c8877 615
bogdanm 84:0b3ab51c8877 616 /** @brief Enables or disables the specified LCD interrupt.
bogdanm 84:0b3ab51c8877 617 * @param __HANDLE__: specifies the LCD Handle.
bogdanm 84:0b3ab51c8877 618 * @param __INTERRUPT__: specifies the LCD interrupt source to be enabled or disabled.
bogdanm 84:0b3ab51c8877 619 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 620 * @arg LCD_IT_SOF: Start of Frame Interrupt
bogdanm 84:0b3ab51c8877 621 * @arg LCD_IT_UDD: Update Display Done Interrupt
bogdanm 84:0b3ab51c8877 622 * @retval None
bogdanm 84:0b3ab51c8877 623 */
Kojto 96:487b796308b0 624 #define __HAL_LCD_ENABLE_IT(__HANDLE__, __INTERRUPT__) \
Kojto 96:487b796308b0 625 do{ \
Kojto 96:487b796308b0 626 SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
Kojto 96:487b796308b0 627 LCD_WaitForSynchro(__HANDLE__); \
bogdanm 84:0b3ab51c8877 628 }while(0)
Kojto 96:487b796308b0 629 #define __HAL_LCD_DISABLE_IT(__HANDLE__, __INTERRUPT__) \
Kojto 96:487b796308b0 630 do{ \
Kojto 96:487b796308b0 631 CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
Kojto 96:487b796308b0 632 LCD_WaitForSynchro(__HANDLE__); \
Kojto 96:487b796308b0 633 }while(0)
Kojto 96:487b796308b0 634
bogdanm 84:0b3ab51c8877 635 /** @brief Checks whether the specified LCD interrupt is enabled or not.
bogdanm 84:0b3ab51c8877 636 * @param __HANDLE__: specifies the LCD Handle.
bogdanm 84:0b3ab51c8877 637 * @param __IT__: specifies the LCD interrupt source to check.
bogdanm 84:0b3ab51c8877 638 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 639 * @arg LCD_IT_SOF: Start of Frame Interrupt
bogdanm 84:0b3ab51c8877 640 * @arg LCD_IT_UDD: Update Display Done Interrupt.
bogdanm 84:0b3ab51c8877 641 * @note If the device is in STOP mode (PCLK not provided) UDD will not
bogdanm 84:0b3ab51c8877 642 * generate an interrupt even if UDDIE = 1.
bogdanm 84:0b3ab51c8877 643 * If the display is not enabled the UDD interrupt will never occur.
bogdanm 84:0b3ab51c8877 644 * @retval The state of __IT__ (TRUE or FALSE).
bogdanm 84:0b3ab51c8877 645 */
bogdanm 84:0b3ab51c8877 646 #define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__))
bogdanm 84:0b3ab51c8877 647
bogdanm 84:0b3ab51c8877 648 /** @brief Checks whether the specified LCD flag is set or not.
bogdanm 84:0b3ab51c8877 649 * @param __HANDLE__: specifies the LCD Handle.
bogdanm 84:0b3ab51c8877 650 * @param __FLAG__: specifies the flag to check.
bogdanm 84:0b3ab51c8877 651 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 652 * @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status.
bogdanm 84:0b3ab51c8877 653 * @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR
bogdanm 84:0b3ab51c8877 654 * goes from 0 to 1. On deactivation it reflects the real status of
bogdanm 84:0b3ab51c8877 655 * LCD so it becomes 0 at the end of the last displayed frame.
bogdanm 84:0b3ab51c8877 656 * @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at
bogdanm 84:0b3ab51c8877 657 * the beginning of a new frame, at the same time as the display data is
bogdanm 84:0b3ab51c8877 658 * updated.
bogdanm 84:0b3ab51c8877 659 * @arg LCD_FLAG_UDR: Update Display Request flag.
bogdanm 84:0b3ab51c8877 660 * @arg LCD_FLAG_UDD: Update Display Done flag.
bogdanm 84:0b3ab51c8877 661 * @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status
bogdanm 84:0b3ab51c8877 662 * of the step-up converter.
bogdanm 84:0b3ab51c8877 663 * @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag.
bogdanm 84:0b3ab51c8877 664 * This flag is set by hardware each time the LCD_FCR register is updated
bogdanm 84:0b3ab51c8877 665 * in the LCDCLK domain.
bogdanm 84:0b3ab51c8877 666 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 84:0b3ab51c8877 667 */
Kojto 96:487b796308b0 668 #define __HAL_LCD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
bogdanm 84:0b3ab51c8877 669
bogdanm 84:0b3ab51c8877 670 /** @brief Clears the specified LCD pending flag.
bogdanm 84:0b3ab51c8877 671 * @param __HANDLE__: specifies the LCD Handle.
Kojto 96:487b796308b0 672 * @param __FLAG__: specifies the flag to clear.
bogdanm 84:0b3ab51c8877 673 * This parameter can be any combination of the following values:
bogdanm 84:0b3ab51c8877 674 * @arg LCD_FLAG_SOF: Start of Frame Interrupt
bogdanm 84:0b3ab51c8877 675 * @arg LCD_FLAG_UDD: Update Display Done Interrupt
bogdanm 84:0b3ab51c8877 676 * @retval None
bogdanm 84:0b3ab51c8877 677 */
Kojto 96:487b796308b0 678 #define __HAL_LCD_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLR = (__FLAG__))
bogdanm 84:0b3ab51c8877 679
bogdanm 92:4fc01daae5a5 680 /**
bogdanm 92:4fc01daae5a5 681 * @}
bogdanm 92:4fc01daae5a5 682 */
bogdanm 92:4fc01daae5a5 683
bogdanm 84:0b3ab51c8877 684 /* Exported functions ------------------------------------------------------- */
Kojto 96:487b796308b0 685
Kojto 96:487b796308b0 686 /** @addtogroup LCD_Exported_Functions
Kojto 96:487b796308b0 687 * @{
Kojto 96:487b796308b0 688 */
Kojto 96:487b796308b0 689
Kojto 96:487b796308b0 690 /** @addtogroup LCD_Exported_Functions_Group1
Kojto 96:487b796308b0 691 * @{
Kojto 96:487b796308b0 692 */
Kojto 96:487b796308b0 693
bogdanm 84:0b3ab51c8877 694 /* Initialization/de-initialization methods **********************************/
Kojto 96:487b796308b0 695 HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd);
Kojto 96:487b796308b0 696 HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd);
Kojto 96:487b796308b0 697 void HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd);
Kojto 96:487b796308b0 698 void HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd);
Kojto 96:487b796308b0 699
Kojto 96:487b796308b0 700 /**
Kojto 96:487b796308b0 701 * @}
Kojto 96:487b796308b0 702 */
Kojto 96:487b796308b0 703
Kojto 96:487b796308b0 704 /** @addtogroup LCD_Exported_Functions_Group2
Kojto 96:487b796308b0 705 * @{
Kojto 96:487b796308b0 706 */
Kojto 96:487b796308b0 707
bogdanm 84:0b3ab51c8877 708 /* IO operation methods *******************************************************/
Kojto 96:487b796308b0 709 HAL_StatusTypeDef HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data);
Kojto 96:487b796308b0 710 HAL_StatusTypeDef HAL_LCD_Clear(LCD_HandleTypeDef *hlcd);
Kojto 96:487b796308b0 711 HAL_StatusTypeDef HAL_LCD_UpdateDisplayRequest(LCD_HandleTypeDef *hlcd);
Kojto 96:487b796308b0 712
Kojto 96:487b796308b0 713 /**
Kojto 96:487b796308b0 714 * @}
Kojto 96:487b796308b0 715 */
Kojto 96:487b796308b0 716
Kojto 96:487b796308b0 717 /** @addtogroup LCD_Exported_Functions_Group3
Kojto 96:487b796308b0 718 * @{
Kojto 96:487b796308b0 719 */
bogdanm 84:0b3ab51c8877 720
bogdanm 84:0b3ab51c8877 721 /* Peripheral State methods **************************************************/
Kojto 96:487b796308b0 722 HAL_LCD_StateTypeDef HAL_LCD_GetState(LCD_HandleTypeDef *hlcd);
Kojto 96:487b796308b0 723 uint32_t HAL_LCD_GetError(LCD_HandleTypeDef *hlcd);
bogdanm 84:0b3ab51c8877 724
bogdanm 84:0b3ab51c8877 725 /**
bogdanm 84:0b3ab51c8877 726 * @}
bogdanm 84:0b3ab51c8877 727 */
bogdanm 84:0b3ab51c8877 728
bogdanm 84:0b3ab51c8877 729 /**
bogdanm 84:0b3ab51c8877 730 * @}
bogdanm 84:0b3ab51c8877 731 */
bogdanm 84:0b3ab51c8877 732
Kojto 96:487b796308b0 733 /** @addtogroup LCD_Private_Functions
Kojto 96:487b796308b0 734 * @{
Kojto 96:487b796308b0 735 */
Kojto 96:487b796308b0 736
Kojto 96:487b796308b0 737 /* Private functions ---------------------------------------------------------*/
Kojto 96:487b796308b0 738 HAL_StatusTypeDef LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd);
Kojto 96:487b796308b0 739
Kojto 96:487b796308b0 740 /**
Kojto 96:487b796308b0 741 * @}
Kojto 96:487b796308b0 742 */
Kojto 96:487b796308b0 743
Kojto 96:487b796308b0 744 /**
Kojto 96:487b796308b0 745 * @}
Kojto 96:487b796308b0 746 */
Kojto 96:487b796308b0 747
Kojto 96:487b796308b0 748 /**
Kojto 96:487b796308b0 749 * @}
Kojto 96:487b796308b0 750 */
Kojto 96:487b796308b0 751
Kojto 96:487b796308b0 752 #ifdef __cplusplus
Kojto 96:487b796308b0 753 }
Kojto 96:487b796308b0 754 #endif
Kojto 96:487b796308b0 755
Kojto 96:487b796308b0 756 #endif /* __STM32L0xx_HAL_LCD_H */
Kojto 96:487b796308b0 757
Kojto 96:487b796308b0 758
Kojto 96:487b796308b0 759 #endif /* STM32L053xx || STM32L063xx || STM32L073xx || STM32L083xx */
Kojto 96:487b796308b0 760
Kojto 96:487b796308b0 761 /******************* (C) COPYRIGHT 2015 STMicroelectronics *****END OF FILE****/
Kojto 96:487b796308b0 762