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TARGET_RZ_A1H/rspi_iodefine.h@118:16969dd821af, 2016-04-05 (annotated)
- Committer:
- ricardobtez
- Date:
- Tue Apr 05 23:51:21 2016 +0000
- Revision:
- 118:16969dd821af
- Parent:
- 92:4fc01daae5a5
dgdgr
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 92:4fc01daae5a5 | 1 | /******************************************************************************* |
bogdanm | 92:4fc01daae5a5 | 2 | * DISCLAIMER |
bogdanm | 92:4fc01daae5a5 | 3 | * This software is supplied by Renesas Electronics Corporation and is only |
bogdanm | 92:4fc01daae5a5 | 4 | * intended for use with Renesas products. No other uses are authorized. This |
bogdanm | 92:4fc01daae5a5 | 5 | * software is owned by Renesas Electronics Corporation and is protected under |
bogdanm | 92:4fc01daae5a5 | 6 | * all applicable laws, including copyright laws. |
bogdanm | 92:4fc01daae5a5 | 7 | * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING |
bogdanm | 92:4fc01daae5a5 | 8 | * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT |
bogdanm | 92:4fc01daae5a5 | 9 | * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE |
bogdanm | 92:4fc01daae5a5 | 10 | * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. |
bogdanm | 92:4fc01daae5a5 | 11 | * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS |
bogdanm | 92:4fc01daae5a5 | 12 | * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE |
bogdanm | 92:4fc01daae5a5 | 13 | * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR |
bogdanm | 92:4fc01daae5a5 | 14 | * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE |
bogdanm | 92:4fc01daae5a5 | 15 | * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
bogdanm | 92:4fc01daae5a5 | 16 | * Renesas reserves the right, without notice, to make changes to this software |
bogdanm | 92:4fc01daae5a5 | 17 | * and to discontinue the availability of this software. By using this software, |
bogdanm | 92:4fc01daae5a5 | 18 | * you agree to the additional terms and conditions found by accessing the |
bogdanm | 92:4fc01daae5a5 | 19 | * following link: |
bogdanm | 92:4fc01daae5a5 | 20 | * http://www.renesas.com/disclaimer* |
bogdanm | 92:4fc01daae5a5 | 21 | * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved. |
bogdanm | 92:4fc01daae5a5 | 22 | *******************************************************************************/ |
bogdanm | 92:4fc01daae5a5 | 23 | /******************************************************************************* |
bogdanm | 92:4fc01daae5a5 | 24 | * File Name : rspi_iodefine.h |
bogdanm | 92:4fc01daae5a5 | 25 | * $Rev: $ |
bogdanm | 92:4fc01daae5a5 | 26 | * $Date:: $ |
bogdanm | 92:4fc01daae5a5 | 27 | * Description : Definition of I/O Register (V1.00a) |
bogdanm | 92:4fc01daae5a5 | 28 | ******************************************************************************/ |
bogdanm | 92:4fc01daae5a5 | 29 | #ifndef RSPI_IODEFINE_H |
bogdanm | 92:4fc01daae5a5 | 30 | #define RSPI_IODEFINE_H |
bogdanm | 92:4fc01daae5a5 | 31 | /* ->SEC M1.10.1 : Not magic number */ |
bogdanm | 92:4fc01daae5a5 | 32 | |
bogdanm | 92:4fc01daae5a5 | 33 | #include "reg32_t.h" |
bogdanm | 92:4fc01daae5a5 | 34 | |
bogdanm | 92:4fc01daae5a5 | 35 | struct st_rspi |
bogdanm | 92:4fc01daae5a5 | 36 | { /* RSPI */ |
bogdanm | 92:4fc01daae5a5 | 37 | volatile uint8_t SPCR; /* SPCR */ |
bogdanm | 92:4fc01daae5a5 | 38 | volatile uint8_t SSLP; /* SSLP */ |
bogdanm | 92:4fc01daae5a5 | 39 | volatile uint8_t SPPCR; /* SPPCR */ |
bogdanm | 92:4fc01daae5a5 | 40 | volatile uint8_t SPSR; /* SPSR */ |
bogdanm | 92:4fc01daae5a5 | 41 | union reg32_t SPDR; /* SPDR */ |
bogdanm | 92:4fc01daae5a5 | 42 | |
bogdanm | 92:4fc01daae5a5 | 43 | volatile uint8_t SPSCR; /* SPSCR */ |
bogdanm | 92:4fc01daae5a5 | 44 | volatile uint8_t SPSSR; /* SPSSR */ |
bogdanm | 92:4fc01daae5a5 | 45 | volatile uint8_t SPBR; /* SPBR */ |
bogdanm | 92:4fc01daae5a5 | 46 | volatile uint8_t SPDCR; /* SPDCR */ |
bogdanm | 92:4fc01daae5a5 | 47 | volatile uint8_t SPCKD; /* SPCKD */ |
bogdanm | 92:4fc01daae5a5 | 48 | volatile uint8_t SSLND; /* SSLND */ |
bogdanm | 92:4fc01daae5a5 | 49 | volatile uint8_t SPND; /* SPND */ |
bogdanm | 92:4fc01daae5a5 | 50 | volatile uint8_t dummy1[1]; /* */ |
bogdanm | 92:4fc01daae5a5 | 51 | #define SPCMD_COUNT 4 |
bogdanm | 92:4fc01daae5a5 | 52 | volatile uint16_t SPCMD0; /* SPCMD0 */ |
bogdanm | 92:4fc01daae5a5 | 53 | volatile uint16_t SPCMD1; /* SPCMD1 */ |
bogdanm | 92:4fc01daae5a5 | 54 | volatile uint16_t SPCMD2; /* SPCMD2 */ |
bogdanm | 92:4fc01daae5a5 | 55 | volatile uint16_t SPCMD3; /* SPCMD3 */ |
bogdanm | 92:4fc01daae5a5 | 56 | volatile uint8_t dummy2[8]; /* */ |
bogdanm | 92:4fc01daae5a5 | 57 | volatile uint8_t SPBFCR; /* SPBFCR */ |
bogdanm | 92:4fc01daae5a5 | 58 | volatile uint8_t dummy3[1]; /* */ |
bogdanm | 92:4fc01daae5a5 | 59 | volatile uint16_t SPBFDR; /* SPBFDR */ |
bogdanm | 92:4fc01daae5a5 | 60 | }; |
bogdanm | 92:4fc01daae5a5 | 61 | |
bogdanm | 92:4fc01daae5a5 | 62 | |
bogdanm | 92:4fc01daae5a5 | 63 | #define RSPI0 (*(struct st_rspi *)0xE800C800uL) /* RSPI0 */ |
bogdanm | 92:4fc01daae5a5 | 64 | #define RSPI1 (*(struct st_rspi *)0xE800D000uL) /* RSPI1 */ |
bogdanm | 92:4fc01daae5a5 | 65 | #define RSPI2 (*(struct st_rspi *)0xE800D800uL) /* RSPI2 */ |
bogdanm | 92:4fc01daae5a5 | 66 | #define RSPI3 (*(struct st_rspi *)0xE800E000uL) /* RSPI3 */ |
bogdanm | 92:4fc01daae5a5 | 67 | #define RSPI4 (*(struct st_rspi *)0xE800E800uL) /* RSPI4 */ |
bogdanm | 92:4fc01daae5a5 | 68 | |
bogdanm | 92:4fc01daae5a5 | 69 | |
bogdanm | 92:4fc01daae5a5 | 70 | /* Start of channnel array defines of RSPI */ |
bogdanm | 92:4fc01daae5a5 | 71 | |
bogdanm | 92:4fc01daae5a5 | 72 | /* Channnel array defines of RSPI */ |
bogdanm | 92:4fc01daae5a5 | 73 | /*(Sample) value = RSPI[ channel ]->SPCR; */ |
bogdanm | 92:4fc01daae5a5 | 74 | #define RSPI_COUNT 5 |
bogdanm | 92:4fc01daae5a5 | 75 | #define RSPI_ADDRESS_LIST \ |
bogdanm | 92:4fc01daae5a5 | 76 | { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \ |
bogdanm | 92:4fc01daae5a5 | 77 | &RSPI0, &RSPI1, &RSPI2, &RSPI3, &RSPI4 \ |
bogdanm | 92:4fc01daae5a5 | 78 | } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */ |
bogdanm | 92:4fc01daae5a5 | 79 | |
bogdanm | 92:4fc01daae5a5 | 80 | /* End of channnel array defines of RSPI */ |
bogdanm | 92:4fc01daae5a5 | 81 | |
bogdanm | 92:4fc01daae5a5 | 82 | |
bogdanm | 92:4fc01daae5a5 | 83 | #define SPCR_0 RSPI0.SPCR |
bogdanm | 92:4fc01daae5a5 | 84 | #define SSLP_0 RSPI0.SSLP |
bogdanm | 92:4fc01daae5a5 | 85 | #define SPPCR_0 RSPI0.SPPCR |
bogdanm | 92:4fc01daae5a5 | 86 | #define SPSR_0 RSPI0.SPSR |
bogdanm | 92:4fc01daae5a5 | 87 | #define SPDR_0 RSPI0.SPDR.UINT32 |
bogdanm | 92:4fc01daae5a5 | 88 | #define SPDR_0L RSPI0.SPDR.UINT16[L] |
bogdanm | 92:4fc01daae5a5 | 89 | #define SPDR_0H RSPI0.SPDR.UINT16[H] |
bogdanm | 92:4fc01daae5a5 | 90 | #define SPDR_0LL RSPI0.SPDR.UINT8[LL] |
bogdanm | 92:4fc01daae5a5 | 91 | #define SPDR_0LH RSPI0.SPDR.UINT8[LH] |
bogdanm | 92:4fc01daae5a5 | 92 | #define SPDR_0HL RSPI0.SPDR.UINT8[HL] |
bogdanm | 92:4fc01daae5a5 | 93 | #define SPDR_0HH RSPI0.SPDR.UINT8[HH] |
bogdanm | 92:4fc01daae5a5 | 94 | #define SPSCR_0 RSPI0.SPSCR |
bogdanm | 92:4fc01daae5a5 | 95 | #define SPSSR_0 RSPI0.SPSSR |
bogdanm | 92:4fc01daae5a5 | 96 | #define SPBR_0 RSPI0.SPBR |
bogdanm | 92:4fc01daae5a5 | 97 | #define SPDCR_0 RSPI0.SPDCR |
bogdanm | 92:4fc01daae5a5 | 98 | #define SPCKD_0 RSPI0.SPCKD |
bogdanm | 92:4fc01daae5a5 | 99 | #define SSLND_0 RSPI0.SSLND |
bogdanm | 92:4fc01daae5a5 | 100 | #define SPND_0 RSPI0.SPND |
bogdanm | 92:4fc01daae5a5 | 101 | #define SPCMD0_0 RSPI0.SPCMD0 |
bogdanm | 92:4fc01daae5a5 | 102 | #define SPCMD1_0 RSPI0.SPCMD1 |
bogdanm | 92:4fc01daae5a5 | 103 | #define SPCMD2_0 RSPI0.SPCMD2 |
bogdanm | 92:4fc01daae5a5 | 104 | #define SPCMD3_0 RSPI0.SPCMD3 |
bogdanm | 92:4fc01daae5a5 | 105 | #define SPBFCR_0 RSPI0.SPBFCR |
bogdanm | 92:4fc01daae5a5 | 106 | #define SPBFDR_0 RSPI0.SPBFDR |
bogdanm | 92:4fc01daae5a5 | 107 | #define SPCR_1 RSPI1.SPCR |
bogdanm | 92:4fc01daae5a5 | 108 | #define SSLP_1 RSPI1.SSLP |
bogdanm | 92:4fc01daae5a5 | 109 | #define SPPCR_1 RSPI1.SPPCR |
bogdanm | 92:4fc01daae5a5 | 110 | #define SPSR_1 RSPI1.SPSR |
bogdanm | 92:4fc01daae5a5 | 111 | #define SPDR_1 RSPI1.SPDR.UINT32 |
bogdanm | 92:4fc01daae5a5 | 112 | #define SPDR_1L RSPI1.SPDR.UINT16[L] |
bogdanm | 92:4fc01daae5a5 | 113 | #define SPDR_1H RSPI1.SPDR.UINT16[H] |
bogdanm | 92:4fc01daae5a5 | 114 | #define SPDR_1LL RSPI1.SPDR.UINT8[LL] |
bogdanm | 92:4fc01daae5a5 | 115 | #define SPDR_1LH RSPI1.SPDR.UINT8[LH] |
bogdanm | 92:4fc01daae5a5 | 116 | #define SPDR_1HL RSPI1.SPDR.UINT8[HL] |
bogdanm | 92:4fc01daae5a5 | 117 | #define SPDR_1HH RSPI1.SPDR.UINT8[HH] |
bogdanm | 92:4fc01daae5a5 | 118 | #define SPSCR_1 RSPI1.SPSCR |
bogdanm | 92:4fc01daae5a5 | 119 | #define SPSSR_1 RSPI1.SPSSR |
bogdanm | 92:4fc01daae5a5 | 120 | #define SPBR_1 RSPI1.SPBR |
bogdanm | 92:4fc01daae5a5 | 121 | #define SPDCR_1 RSPI1.SPDCR |
bogdanm | 92:4fc01daae5a5 | 122 | #define SPCKD_1 RSPI1.SPCKD |
bogdanm | 92:4fc01daae5a5 | 123 | #define SSLND_1 RSPI1.SSLND |
bogdanm | 92:4fc01daae5a5 | 124 | #define SPND_1 RSPI1.SPND |
bogdanm | 92:4fc01daae5a5 | 125 | #define SPCMD0_1 RSPI1.SPCMD0 |
bogdanm | 92:4fc01daae5a5 | 126 | #define SPCMD1_1 RSPI1.SPCMD1 |
bogdanm | 92:4fc01daae5a5 | 127 | #define SPCMD2_1 RSPI1.SPCMD2 |
bogdanm | 92:4fc01daae5a5 | 128 | #define SPCMD3_1 RSPI1.SPCMD3 |
bogdanm | 92:4fc01daae5a5 | 129 | #define SPBFCR_1 RSPI1.SPBFCR |
bogdanm | 92:4fc01daae5a5 | 130 | #define SPBFDR_1 RSPI1.SPBFDR |
bogdanm | 92:4fc01daae5a5 | 131 | #define SPCR_2 RSPI2.SPCR |
bogdanm | 92:4fc01daae5a5 | 132 | #define SSLP_2 RSPI2.SSLP |
bogdanm | 92:4fc01daae5a5 | 133 | #define SPPCR_2 RSPI2.SPPCR |
bogdanm | 92:4fc01daae5a5 | 134 | #define SPSR_2 RSPI2.SPSR |
bogdanm | 92:4fc01daae5a5 | 135 | #define SPDR_2 RSPI2.SPDR.UINT32 |
bogdanm | 92:4fc01daae5a5 | 136 | #define SPDR_2L RSPI2.SPDR.UINT16[L] |
bogdanm | 92:4fc01daae5a5 | 137 | #define SPDR_2H RSPI2.SPDR.UINT16[H] |
bogdanm | 92:4fc01daae5a5 | 138 | #define SPDR_2LL RSPI2.SPDR.UINT8[LL] |
bogdanm | 92:4fc01daae5a5 | 139 | #define SPDR_2LH RSPI2.SPDR.UINT8[LH] |
bogdanm | 92:4fc01daae5a5 | 140 | #define SPDR_2HL RSPI2.SPDR.UINT8[HL] |
bogdanm | 92:4fc01daae5a5 | 141 | #define SPDR_2HH RSPI2.SPDR.UINT8[HH] |
bogdanm | 92:4fc01daae5a5 | 142 | #define SPSCR_2 RSPI2.SPSCR |
bogdanm | 92:4fc01daae5a5 | 143 | #define SPSSR_2 RSPI2.SPSSR |
bogdanm | 92:4fc01daae5a5 | 144 | #define SPBR_2 RSPI2.SPBR |
bogdanm | 92:4fc01daae5a5 | 145 | #define SPDCR_2 RSPI2.SPDCR |
bogdanm | 92:4fc01daae5a5 | 146 | #define SPCKD_2 RSPI2.SPCKD |
bogdanm | 92:4fc01daae5a5 | 147 | #define SSLND_2 RSPI2.SSLND |
bogdanm | 92:4fc01daae5a5 | 148 | #define SPND_2 RSPI2.SPND |
bogdanm | 92:4fc01daae5a5 | 149 | #define SPCMD0_2 RSPI2.SPCMD0 |
bogdanm | 92:4fc01daae5a5 | 150 | #define SPCMD1_2 RSPI2.SPCMD1 |
bogdanm | 92:4fc01daae5a5 | 151 | #define SPCMD2_2 RSPI2.SPCMD2 |
bogdanm | 92:4fc01daae5a5 | 152 | #define SPCMD3_2 RSPI2.SPCMD3 |
bogdanm | 92:4fc01daae5a5 | 153 | #define SPBFCR_2 RSPI2.SPBFCR |
bogdanm | 92:4fc01daae5a5 | 154 | #define SPBFDR_2 RSPI2.SPBFDR |
bogdanm | 92:4fc01daae5a5 | 155 | #define SPCR_3 RSPI3.SPCR |
bogdanm | 92:4fc01daae5a5 | 156 | #define SSLP_3 RSPI3.SSLP |
bogdanm | 92:4fc01daae5a5 | 157 | #define SPPCR_3 RSPI3.SPPCR |
bogdanm | 92:4fc01daae5a5 | 158 | #define SPSR_3 RSPI3.SPSR |
bogdanm | 92:4fc01daae5a5 | 159 | #define SPDR_3 RSPI3.SPDR.UINT32 |
bogdanm | 92:4fc01daae5a5 | 160 | #define SPDR_3L RSPI3.SPDR.UINT16[L] |
bogdanm | 92:4fc01daae5a5 | 161 | #define SPDR_3H RSPI3.SPDR.UINT16[H] |
bogdanm | 92:4fc01daae5a5 | 162 | #define SPDR_3LL RSPI3.SPDR.UINT8[LL] |
bogdanm | 92:4fc01daae5a5 | 163 | #define SPDR_3LH RSPI3.SPDR.UINT8[LH] |
bogdanm | 92:4fc01daae5a5 | 164 | #define SPDR_3HL RSPI3.SPDR.UINT8[HL] |
bogdanm | 92:4fc01daae5a5 | 165 | #define SPDR_3HH RSPI3.SPDR.UINT8[HH] |
bogdanm | 92:4fc01daae5a5 | 166 | #define SPSCR_3 RSPI3.SPSCR |
bogdanm | 92:4fc01daae5a5 | 167 | #define SPSSR_3 RSPI3.SPSSR |
bogdanm | 92:4fc01daae5a5 | 168 | #define SPBR_3 RSPI3.SPBR |
bogdanm | 92:4fc01daae5a5 | 169 | #define SPDCR_3 RSPI3.SPDCR |
bogdanm | 92:4fc01daae5a5 | 170 | #define SPCKD_3 RSPI3.SPCKD |
bogdanm | 92:4fc01daae5a5 | 171 | #define SSLND_3 RSPI3.SSLND |
bogdanm | 92:4fc01daae5a5 | 172 | #define SPND_3 RSPI3.SPND |
bogdanm | 92:4fc01daae5a5 | 173 | #define SPCMD0_3 RSPI3.SPCMD0 |
bogdanm | 92:4fc01daae5a5 | 174 | #define SPCMD1_3 RSPI3.SPCMD1 |
bogdanm | 92:4fc01daae5a5 | 175 | #define SPCMD2_3 RSPI3.SPCMD2 |
bogdanm | 92:4fc01daae5a5 | 176 | #define SPCMD3_3 RSPI3.SPCMD3 |
bogdanm | 92:4fc01daae5a5 | 177 | #define SPBFCR_3 RSPI3.SPBFCR |
bogdanm | 92:4fc01daae5a5 | 178 | #define SPBFDR_3 RSPI3.SPBFDR |
bogdanm | 92:4fc01daae5a5 | 179 | #define SPCR_4 RSPI4.SPCR |
bogdanm | 92:4fc01daae5a5 | 180 | #define SSLP_4 RSPI4.SSLP |
bogdanm | 92:4fc01daae5a5 | 181 | #define SPPCR_4 RSPI4.SPPCR |
bogdanm | 92:4fc01daae5a5 | 182 | #define SPSR_4 RSPI4.SPSR |
bogdanm | 92:4fc01daae5a5 | 183 | #define SPDR_4 RSPI4.SPDR.UINT32 |
bogdanm | 92:4fc01daae5a5 | 184 | #define SPDR_4L RSPI4.SPDR.UINT16[L] |
bogdanm | 92:4fc01daae5a5 | 185 | #define SPDR_4H RSPI4.SPDR.UINT16[H] |
bogdanm | 92:4fc01daae5a5 | 186 | #define SPDR_4LL RSPI4.SPDR.UINT8[LL] |
bogdanm | 92:4fc01daae5a5 | 187 | #define SPDR_4LH RSPI4.SPDR.UINT8[LH] |
bogdanm | 92:4fc01daae5a5 | 188 | #define SPDR_4HL RSPI4.SPDR.UINT8[HL] |
bogdanm | 92:4fc01daae5a5 | 189 | #define SPDR_4HH RSPI4.SPDR.UINT8[HH] |
bogdanm | 92:4fc01daae5a5 | 190 | #define SPSCR_4 RSPI4.SPSCR |
bogdanm | 92:4fc01daae5a5 | 191 | #define SPSSR_4 RSPI4.SPSSR |
bogdanm | 92:4fc01daae5a5 | 192 | #define SPBR_4 RSPI4.SPBR |
bogdanm | 92:4fc01daae5a5 | 193 | #define SPDCR_4 RSPI4.SPDCR |
bogdanm | 92:4fc01daae5a5 | 194 | #define SPCKD_4 RSPI4.SPCKD |
bogdanm | 92:4fc01daae5a5 | 195 | #define SSLND_4 RSPI4.SSLND |
bogdanm | 92:4fc01daae5a5 | 196 | #define SPND_4 RSPI4.SPND |
bogdanm | 92:4fc01daae5a5 | 197 | #define SPCMD0_4 RSPI4.SPCMD0 |
bogdanm | 92:4fc01daae5a5 | 198 | #define SPCMD1_4 RSPI4.SPCMD1 |
bogdanm | 92:4fc01daae5a5 | 199 | #define SPCMD2_4 RSPI4.SPCMD2 |
bogdanm | 92:4fc01daae5a5 | 200 | #define SPCMD3_4 RSPI4.SPCMD3 |
bogdanm | 92:4fc01daae5a5 | 201 | #define SPBFCR_4 RSPI4.SPBFCR |
bogdanm | 92:4fc01daae5a5 | 202 | #define SPBFDR_4 RSPI4.SPBFDR |
bogdanm | 92:4fc01daae5a5 | 203 | /* <-SEC M1.10.1 */ |
bogdanm | 92:4fc01daae5a5 | 204 | #endif |