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TARGET_NUCLEO_F334R8/stm32f3xx_hal_i2s.h@118:16969dd821af, 2016-04-05 (annotated)
- Committer:
- ricardobtez
- Date:
- Tue Apr 05 23:51:21 2016 +0000
- Revision:
- 118:16969dd821af
- Parent:
- 92:4fc01daae5a5
dgdgr
Who changed what in which revision?
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bogdanm | 86:04dd9b1680ae | 1 | /** |
bogdanm | 86:04dd9b1680ae | 2 | ****************************************************************************** |
bogdanm | 86:04dd9b1680ae | 3 | * @file stm32f3xx_hal_i2s.h |
bogdanm | 86:04dd9b1680ae | 4 | * @author MCD Application Team |
bogdanm | 92:4fc01daae5a5 | 5 | * @version V1.1.0 |
bogdanm | 92:4fc01daae5a5 | 6 | * @date 12-Sept-2014 |
bogdanm | 86:04dd9b1680ae | 7 | * @brief Header file of I2S HAL module. |
bogdanm | 86:04dd9b1680ae | 8 | ****************************************************************************** |
bogdanm | 86:04dd9b1680ae | 9 | * @attention |
bogdanm | 86:04dd9b1680ae | 10 | * |
bogdanm | 86:04dd9b1680ae | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
bogdanm | 86:04dd9b1680ae | 12 | * |
bogdanm | 86:04dd9b1680ae | 13 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 86:04dd9b1680ae | 14 | * are permitted provided that the following conditions are met: |
bogdanm | 86:04dd9b1680ae | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 86:04dd9b1680ae | 16 | * this list of conditions and the following disclaimer. |
bogdanm | 86:04dd9b1680ae | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 86:04dd9b1680ae | 18 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 86:04dd9b1680ae | 19 | * and/or other materials provided with the distribution. |
bogdanm | 86:04dd9b1680ae | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 86:04dd9b1680ae | 21 | * may be used to endorse or promote products derived from this software |
bogdanm | 86:04dd9b1680ae | 22 | * without specific prior written permission. |
bogdanm | 86:04dd9b1680ae | 23 | * |
bogdanm | 86:04dd9b1680ae | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 86:04dd9b1680ae | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 86:04dd9b1680ae | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 86:04dd9b1680ae | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 86:04dd9b1680ae | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 86:04dd9b1680ae | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 86:04dd9b1680ae | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 86:04dd9b1680ae | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 86:04dd9b1680ae | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 86:04dd9b1680ae | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 86:04dd9b1680ae | 34 | * |
bogdanm | 86:04dd9b1680ae | 35 | ****************************************************************************** |
bogdanm | 86:04dd9b1680ae | 36 | */ |
bogdanm | 86:04dd9b1680ae | 37 | |
bogdanm | 86:04dd9b1680ae | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bogdanm | 86:04dd9b1680ae | 39 | #ifndef __STM32F3xx_HAL_I2S_H |
bogdanm | 86:04dd9b1680ae | 40 | #define __STM32F3xx_HAL_I2S_H |
bogdanm | 86:04dd9b1680ae | 41 | |
bogdanm | 86:04dd9b1680ae | 42 | #ifdef __cplusplus |
bogdanm | 86:04dd9b1680ae | 43 | extern "C" { |
bogdanm | 86:04dd9b1680ae | 44 | #endif |
bogdanm | 86:04dd9b1680ae | 45 | |
bogdanm | 92:4fc01daae5a5 | 46 | #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \ |
bogdanm | 92:4fc01daae5a5 | 47 | defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ |
bogdanm | 92:4fc01daae5a5 | 48 | defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \ |
bogdanm | 92:4fc01daae5a5 | 49 | defined(STM32F373xC) || defined(STM32F378xx) |
bogdanm | 86:04dd9b1680ae | 50 | |
bogdanm | 86:04dd9b1680ae | 51 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 86:04dd9b1680ae | 52 | #include "stm32f3xx_hal_def.h" |
bogdanm | 86:04dd9b1680ae | 53 | |
bogdanm | 86:04dd9b1680ae | 54 | /** @addtogroup STM32F3xx_HAL_Driver |
bogdanm | 86:04dd9b1680ae | 55 | * @{ |
bogdanm | 86:04dd9b1680ae | 56 | */ |
bogdanm | 86:04dd9b1680ae | 57 | |
bogdanm | 92:4fc01daae5a5 | 58 | /** @addtogroup I2S I2S HAL module driver |
bogdanm | 86:04dd9b1680ae | 59 | * @{ |
bogdanm | 86:04dd9b1680ae | 60 | */ |
bogdanm | 86:04dd9b1680ae | 61 | |
bogdanm | 86:04dd9b1680ae | 62 | /* Exported types ------------------------------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 63 | /** @defgroup I2S_Exported_Types I2S Exported Types |
bogdanm | 92:4fc01daae5a5 | 64 | * @{ |
bogdanm | 92:4fc01daae5a5 | 65 | */ |
bogdanm | 92:4fc01daae5a5 | 66 | |
bogdanm | 86:04dd9b1680ae | 67 | /** |
bogdanm | 86:04dd9b1680ae | 68 | * @brief I2S Init structure definition |
bogdanm | 86:04dd9b1680ae | 69 | */ |
bogdanm | 86:04dd9b1680ae | 70 | typedef struct |
bogdanm | 86:04dd9b1680ae | 71 | { |
bogdanm | 86:04dd9b1680ae | 72 | uint32_t Mode; /*!< Specifies the I2S operating mode. |
bogdanm | 86:04dd9b1680ae | 73 | This parameter can be a value of @ref I2S_Mode */ |
bogdanm | 86:04dd9b1680ae | 74 | |
bogdanm | 86:04dd9b1680ae | 75 | uint32_t Standard; /*!< Specifies the standard used for the I2S communication. |
bogdanm | 86:04dd9b1680ae | 76 | This parameter can be a value of @ref I2S_Standard */ |
bogdanm | 86:04dd9b1680ae | 77 | |
bogdanm | 86:04dd9b1680ae | 78 | uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. |
bogdanm | 86:04dd9b1680ae | 79 | This parameter can be a value of @ref I2S_Data_Format */ |
bogdanm | 86:04dd9b1680ae | 80 | |
bogdanm | 86:04dd9b1680ae | 81 | uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. |
bogdanm | 86:04dd9b1680ae | 82 | This parameter can be a value of @ref I2S_MCLK_Output */ |
bogdanm | 86:04dd9b1680ae | 83 | |
bogdanm | 86:04dd9b1680ae | 84 | uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. |
bogdanm | 86:04dd9b1680ae | 85 | This parameter can be a value of @ref I2S_Audio_Frequency */ |
bogdanm | 86:04dd9b1680ae | 86 | |
bogdanm | 86:04dd9b1680ae | 87 | uint32_t CPOL; /*!< Specifies the idle state of the I2S clock. |
bogdanm | 86:04dd9b1680ae | 88 | This parameter can be a value of @ref I2S_Clock_Polarity */ |
bogdanm | 86:04dd9b1680ae | 89 | |
bogdanm | 86:04dd9b1680ae | 90 | uint32_t ClockSource; /*!< Specifies the I2S Clock Source. |
bogdanm | 86:04dd9b1680ae | 91 | This parameter can be a value of @ref I2S_Clock_Source */ |
bogdanm | 86:04dd9b1680ae | 92 | |
bogdanm | 86:04dd9b1680ae | 93 | uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode. |
bogdanm | 86:04dd9b1680ae | 94 | This parameter can be a value of @ref I2S_FullDuplex_Mode */ |
bogdanm | 86:04dd9b1680ae | 95 | |
bogdanm | 86:04dd9b1680ae | 96 | }I2S_InitTypeDef; |
bogdanm | 86:04dd9b1680ae | 97 | |
bogdanm | 86:04dd9b1680ae | 98 | /** |
bogdanm | 86:04dd9b1680ae | 99 | * @brief HAL State structures definition |
bogdanm | 86:04dd9b1680ae | 100 | */ |
bogdanm | 86:04dd9b1680ae | 101 | typedef enum |
bogdanm | 86:04dd9b1680ae | 102 | { |
bogdanm | 86:04dd9b1680ae | 103 | HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */ |
bogdanm | 86:04dd9b1680ae | 104 | HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */ |
bogdanm | 86:04dd9b1680ae | 105 | HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */ |
bogdanm | 86:04dd9b1680ae | 106 | HAL_I2S_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */ |
bogdanm | 86:04dd9b1680ae | 107 | HAL_I2S_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */ |
bogdanm | 86:04dd9b1680ae | 108 | HAL_I2S_STATE_BUSY_TX_RX = 0x05, /*!< Data Transmission and Reception process is ongoing */ |
bogdanm | 86:04dd9b1680ae | 109 | HAL_I2S_STATE_TIMEOUT = 0x06, /*!< I2S timeout state */ |
bogdanm | 86:04dd9b1680ae | 110 | HAL_I2S_STATE_ERROR = 0x07 /*!< I2S error state */ |
bogdanm | 86:04dd9b1680ae | 111 | |
bogdanm | 86:04dd9b1680ae | 112 | }HAL_I2S_StateTypeDef; |
bogdanm | 86:04dd9b1680ae | 113 | |
bogdanm | 86:04dd9b1680ae | 114 | /** |
bogdanm | 86:04dd9b1680ae | 115 | * @brief HAL I2S Error Code structure definition |
bogdanm | 86:04dd9b1680ae | 116 | */ |
bogdanm | 86:04dd9b1680ae | 117 | typedef enum |
bogdanm | 86:04dd9b1680ae | 118 | { |
bogdanm | 86:04dd9b1680ae | 119 | HAL_I2S_ERROR_NONE = 0x00, /*!< No error */ |
bogdanm | 86:04dd9b1680ae | 120 | HAL_I2S_ERROR_TIMEOUT = 0x01, /*!< Timeout error */ |
bogdanm | 86:04dd9b1680ae | 121 | HAL_I2S_ERROR_OVR = 0x02, /*!< OVR error */ |
bogdanm | 86:04dd9b1680ae | 122 | HAL_I2S_ERROR_UDR = 0x04, /*!< UDR error */ |
bogdanm | 86:04dd9b1680ae | 123 | HAL_I2S_ERROR_DMA = 0x08, /*!< DMA transfer error */ |
bogdanm | 86:04dd9b1680ae | 124 | HAL_I2S_ERROR_UNKNOW = 0x10 /*!< Unknow Error error */ |
bogdanm | 86:04dd9b1680ae | 125 | }HAL_I2S_ErrorTypeDef; |
bogdanm | 86:04dd9b1680ae | 126 | |
bogdanm | 86:04dd9b1680ae | 127 | /** |
bogdanm | 86:04dd9b1680ae | 128 | * @brief I2S handle Structure definition |
bogdanm | 86:04dd9b1680ae | 129 | */ |
bogdanm | 86:04dd9b1680ae | 130 | typedef struct |
bogdanm | 86:04dd9b1680ae | 131 | { |
bogdanm | 86:04dd9b1680ae | 132 | SPI_TypeDef *Instance; /* I2S registers base address */ |
bogdanm | 86:04dd9b1680ae | 133 | |
bogdanm | 86:04dd9b1680ae | 134 | I2S_InitTypeDef Init; /* I2S communication parameters */ |
bogdanm | 86:04dd9b1680ae | 135 | |
bogdanm | 86:04dd9b1680ae | 136 | uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */ |
bogdanm | 86:04dd9b1680ae | 137 | |
bogdanm | 86:04dd9b1680ae | 138 | __IO uint16_t TxXferSize; /* I2S Tx transfer size */ |
bogdanm | 86:04dd9b1680ae | 139 | |
bogdanm | 86:04dd9b1680ae | 140 | __IO uint16_t TxXferCount; /* I2S Tx transfer Counter */ |
bogdanm | 86:04dd9b1680ae | 141 | |
bogdanm | 86:04dd9b1680ae | 142 | uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */ |
bogdanm | 86:04dd9b1680ae | 143 | |
bogdanm | 86:04dd9b1680ae | 144 | __IO uint16_t RxXferSize; /* I2S Rx transfer size */ |
bogdanm | 86:04dd9b1680ae | 145 | |
bogdanm | 86:04dd9b1680ae | 146 | __IO uint16_t RxXferCount; /* I2S Rx transfer counter |
bogdanm | 86:04dd9b1680ae | 147 | (This field is initialized at the |
bogdanm | 86:04dd9b1680ae | 148 | same value as transfer size at the |
bogdanm | 86:04dd9b1680ae | 149 | beginning of the transfer and |
bogdanm | 86:04dd9b1680ae | 150 | decremented when a sample is received. |
bogdanm | 86:04dd9b1680ae | 151 | NbSamplesReceived = RxBufferSize-RxBufferCount) */ |
bogdanm | 86:04dd9b1680ae | 152 | |
bogdanm | 86:04dd9b1680ae | 153 | DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */ |
bogdanm | 86:04dd9b1680ae | 154 | |
bogdanm | 86:04dd9b1680ae | 155 | DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */ |
bogdanm | 86:04dd9b1680ae | 156 | |
bogdanm | 86:04dd9b1680ae | 157 | __IO HAL_LockTypeDef Lock; /* I2S locking object */ |
bogdanm | 86:04dd9b1680ae | 158 | |
bogdanm | 86:04dd9b1680ae | 159 | __IO HAL_I2S_StateTypeDef State; /* I2S communication state */ |
bogdanm | 86:04dd9b1680ae | 160 | |
bogdanm | 86:04dd9b1680ae | 161 | __IO HAL_I2S_ErrorTypeDef ErrorCode; /* I2S Error code */ |
bogdanm | 86:04dd9b1680ae | 162 | |
bogdanm | 86:04dd9b1680ae | 163 | }I2S_HandleTypeDef; |
bogdanm | 92:4fc01daae5a5 | 164 | /** |
bogdanm | 92:4fc01daae5a5 | 165 | * @} |
bogdanm | 92:4fc01daae5a5 | 166 | */ |
bogdanm | 86:04dd9b1680ae | 167 | |
bogdanm | 86:04dd9b1680ae | 168 | /* Exported constants --------------------------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 169 | /** @defgroup I2S_Exported_Constants I2S Exported Constants |
bogdanm | 86:04dd9b1680ae | 170 | * @{ |
bogdanm | 86:04dd9b1680ae | 171 | */ |
bogdanm | 86:04dd9b1680ae | 172 | |
bogdanm | 92:4fc01daae5a5 | 173 | /** @defgroup I2S_Clock_Source I2S Clock Source |
bogdanm | 86:04dd9b1680ae | 174 | * @{ |
bogdanm | 86:04dd9b1680ae | 175 | */ |
bogdanm | 86:04dd9b1680ae | 176 | #define I2S_CLOCK_EXTERNAL ((uint32_t)0x00000001) |
bogdanm | 86:04dd9b1680ae | 177 | #define I2S_CLOCK_SYSCLK ((uint32_t)0x00000002) |
bogdanm | 86:04dd9b1680ae | 178 | |
bogdanm | 86:04dd9b1680ae | 179 | #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \ |
bogdanm | 86:04dd9b1680ae | 180 | ((CLOCK) == I2S_CLOCK_SYSCLK)) |
bogdanm | 86:04dd9b1680ae | 181 | /** |
bogdanm | 86:04dd9b1680ae | 182 | * @} |
bogdanm | 86:04dd9b1680ae | 183 | */ |
bogdanm | 86:04dd9b1680ae | 184 | |
bogdanm | 92:4fc01daae5a5 | 185 | /** @defgroup I2S_Mode I2S Mode |
bogdanm | 86:04dd9b1680ae | 186 | * @{ |
bogdanm | 86:04dd9b1680ae | 187 | */ |
bogdanm | 86:04dd9b1680ae | 188 | #define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000) |
bogdanm | 86:04dd9b1680ae | 189 | #define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100) |
bogdanm | 86:04dd9b1680ae | 190 | #define I2S_MODE_MASTER_TX ((uint32_t)0x00000200) |
bogdanm | 86:04dd9b1680ae | 191 | #define I2S_MODE_MASTER_RX ((uint32_t)0x00000300) |
bogdanm | 86:04dd9b1680ae | 192 | |
bogdanm | 86:04dd9b1680ae | 193 | #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ |
bogdanm | 86:04dd9b1680ae | 194 | ((MODE) == I2S_MODE_SLAVE_RX) || \ |
bogdanm | 86:04dd9b1680ae | 195 | ((MODE) == I2S_MODE_MASTER_TX)|| \ |
bogdanm | 86:04dd9b1680ae | 196 | ((MODE) == I2S_MODE_MASTER_RX)) |
bogdanm | 86:04dd9b1680ae | 197 | /** |
bogdanm | 86:04dd9b1680ae | 198 | * @} |
bogdanm | 86:04dd9b1680ae | 199 | */ |
bogdanm | 86:04dd9b1680ae | 200 | |
bogdanm | 92:4fc01daae5a5 | 201 | /** @defgroup I2S_Standard I2S Standard |
bogdanm | 86:04dd9b1680ae | 202 | * @{ |
bogdanm | 86:04dd9b1680ae | 203 | */ |
bogdanm | 86:04dd9b1680ae | 204 | #define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000) |
bogdanm | 86:04dd9b1680ae | 205 | #define I2S_STANDARD_MSB ((uint32_t)0x00000010) |
bogdanm | 86:04dd9b1680ae | 206 | #define I2S_STANDARD_LSB ((uint32_t)0x00000020) |
bogdanm | 86:04dd9b1680ae | 207 | #define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030) |
bogdanm | 86:04dd9b1680ae | 208 | #define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0) |
bogdanm | 86:04dd9b1680ae | 209 | |
bogdanm | 86:04dd9b1680ae | 210 | #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \ |
bogdanm | 86:04dd9b1680ae | 211 | ((STANDARD) == I2S_STANDARD_MSB) || \ |
bogdanm | 86:04dd9b1680ae | 212 | ((STANDARD) == I2S_STANDARD_LSB) || \ |
bogdanm | 86:04dd9b1680ae | 213 | ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \ |
bogdanm | 86:04dd9b1680ae | 214 | ((STANDARD) == I2S_STANDARD_PCM_LONG)) |
bogdanm | 86:04dd9b1680ae | 215 | /** |
bogdanm | 86:04dd9b1680ae | 216 | * @} |
bogdanm | 86:04dd9b1680ae | 217 | */ |
bogdanm | 86:04dd9b1680ae | 218 | |
bogdanm | 92:4fc01daae5a5 | 219 | /** @defgroup I2S_Data_Format I2S Data Format |
bogdanm | 86:04dd9b1680ae | 220 | * @{ |
bogdanm | 86:04dd9b1680ae | 221 | */ |
bogdanm | 86:04dd9b1680ae | 222 | #define I2S_DATAFORMAT_16B ((uint32_t)0x00000000) |
bogdanm | 86:04dd9b1680ae | 223 | #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001) |
bogdanm | 86:04dd9b1680ae | 224 | #define I2S_DATAFORMAT_24B ((uint32_t)0x00000003) |
bogdanm | 86:04dd9b1680ae | 225 | #define I2S_DATAFORMAT_32B ((uint32_t)0x00000005) |
bogdanm | 86:04dd9b1680ae | 226 | |
bogdanm | 86:04dd9b1680ae | 227 | #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \ |
bogdanm | 86:04dd9b1680ae | 228 | ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \ |
bogdanm | 86:04dd9b1680ae | 229 | ((FORMAT) == I2S_DATAFORMAT_24B) || \ |
bogdanm | 86:04dd9b1680ae | 230 | ((FORMAT) == I2S_DATAFORMAT_32B)) |
bogdanm | 86:04dd9b1680ae | 231 | /** |
bogdanm | 86:04dd9b1680ae | 232 | * @} |
bogdanm | 86:04dd9b1680ae | 233 | */ |
bogdanm | 86:04dd9b1680ae | 234 | |
bogdanm | 92:4fc01daae5a5 | 235 | /** @defgroup I2S_MCLK_Output I2S MCLK Output |
bogdanm | 86:04dd9b1680ae | 236 | * @{ |
bogdanm | 86:04dd9b1680ae | 237 | */ |
bogdanm | 86:04dd9b1680ae | 238 | #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE) |
bogdanm | 86:04dd9b1680ae | 239 | #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000) |
bogdanm | 86:04dd9b1680ae | 240 | |
bogdanm | 86:04dd9b1680ae | 241 | #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \ |
bogdanm | 86:04dd9b1680ae | 242 | ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE)) |
bogdanm | 86:04dd9b1680ae | 243 | /** |
bogdanm | 86:04dd9b1680ae | 244 | * @} |
bogdanm | 86:04dd9b1680ae | 245 | */ |
bogdanm | 86:04dd9b1680ae | 246 | |
bogdanm | 92:4fc01daae5a5 | 247 | /** @defgroup I2S_Audio_Frequency I2S Audio Frequency |
bogdanm | 86:04dd9b1680ae | 248 | * @{ |
bogdanm | 86:04dd9b1680ae | 249 | */ |
bogdanm | 86:04dd9b1680ae | 250 | #define I2S_AUDIOFREQ_192K ((uint32_t)192000) |
bogdanm | 86:04dd9b1680ae | 251 | #define I2S_AUDIOFREQ_96K ((uint32_t)96000) |
bogdanm | 86:04dd9b1680ae | 252 | #define I2S_AUDIOFREQ_48K ((uint32_t)48000) |
bogdanm | 86:04dd9b1680ae | 253 | #define I2S_AUDIOFREQ_44K ((uint32_t)44100) |
bogdanm | 86:04dd9b1680ae | 254 | #define I2S_AUDIOFREQ_32K ((uint32_t)32000) |
bogdanm | 86:04dd9b1680ae | 255 | #define I2S_AUDIOFREQ_22K ((uint32_t)22050) |
bogdanm | 86:04dd9b1680ae | 256 | #define I2S_AUDIOFREQ_16K ((uint32_t)16000) |
bogdanm | 86:04dd9b1680ae | 257 | #define I2S_AUDIOFREQ_11K ((uint32_t)11025) |
bogdanm | 86:04dd9b1680ae | 258 | #define I2S_AUDIOFREQ_8K ((uint32_t)8000) |
bogdanm | 86:04dd9b1680ae | 259 | #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2) |
bogdanm | 86:04dd9b1680ae | 260 | |
bogdanm | 86:04dd9b1680ae | 261 | #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \ |
bogdanm | 86:04dd9b1680ae | 262 | ((FREQ) <= I2S_AUDIOFREQ_192K)) || \ |
bogdanm | 86:04dd9b1680ae | 263 | ((FREQ) == I2S_AUDIOFREQ_DEFAULT)) |
bogdanm | 86:04dd9b1680ae | 264 | /** |
bogdanm | 86:04dd9b1680ae | 265 | * @} |
bogdanm | 86:04dd9b1680ae | 266 | */ |
bogdanm | 86:04dd9b1680ae | 267 | |
bogdanm | 92:4fc01daae5a5 | 268 | /** @defgroup I2S_FullDuplex_Mode I2S Full Duplex Mode |
bogdanm | 86:04dd9b1680ae | 269 | * @{ |
bogdanm | 86:04dd9b1680ae | 270 | */ |
bogdanm | 86:04dd9b1680ae | 271 | #define I2S_FULLDUPLEXMODE_DISABLE ((uint32_t)0x00000000) |
bogdanm | 86:04dd9b1680ae | 272 | #define I2S_FULLDUPLEXMODE_ENABLE ((uint32_t)0x00000001) |
bogdanm | 86:04dd9b1680ae | 273 | |
bogdanm | 86:04dd9b1680ae | 274 | #define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \ |
bogdanm | 86:04dd9b1680ae | 275 | ((MODE) == I2S_FULLDUPLEXMODE_ENABLE)) |
bogdanm | 86:04dd9b1680ae | 276 | /** |
bogdanm | 86:04dd9b1680ae | 277 | * @} |
bogdanm | 86:04dd9b1680ae | 278 | */ |
bogdanm | 86:04dd9b1680ae | 279 | |
bogdanm | 92:4fc01daae5a5 | 280 | /** @defgroup I2S_Clock_Polarity I2S Clock Polarity |
bogdanm | 86:04dd9b1680ae | 281 | * @{ |
bogdanm | 86:04dd9b1680ae | 282 | */ |
bogdanm | 86:04dd9b1680ae | 283 | #define I2S_CPOL_LOW ((uint32_t)0x00000000) |
bogdanm | 86:04dd9b1680ae | 284 | #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL) |
bogdanm | 86:04dd9b1680ae | 285 | |
bogdanm | 86:04dd9b1680ae | 286 | #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \ |
bogdanm | 86:04dd9b1680ae | 287 | ((CPOL) == I2S_CPOL_HIGH)) |
bogdanm | 86:04dd9b1680ae | 288 | /** |
bogdanm | 86:04dd9b1680ae | 289 | * @} |
bogdanm | 86:04dd9b1680ae | 290 | */ |
bogdanm | 86:04dd9b1680ae | 291 | |
bogdanm | 92:4fc01daae5a5 | 292 | /** @defgroup I2S_Interrupt_configuration_definition I2S Interrupt configuration definition |
bogdanm | 86:04dd9b1680ae | 293 | * @{ |
bogdanm | 86:04dd9b1680ae | 294 | */ |
bogdanm | 86:04dd9b1680ae | 295 | #define I2S_IT_TXE SPI_CR2_TXEIE |
bogdanm | 86:04dd9b1680ae | 296 | #define I2S_IT_RXNE SPI_CR2_RXNEIE |
bogdanm | 86:04dd9b1680ae | 297 | #define I2S_IT_ERR SPI_CR2_ERRIE |
bogdanm | 86:04dd9b1680ae | 298 | /** |
bogdanm | 86:04dd9b1680ae | 299 | * @} |
bogdanm | 86:04dd9b1680ae | 300 | */ |
bogdanm | 86:04dd9b1680ae | 301 | |
bogdanm | 92:4fc01daae5a5 | 302 | /** @defgroup I2S_Flag_definition I2S Flag definition |
bogdanm | 86:04dd9b1680ae | 303 | * @{ |
bogdanm | 86:04dd9b1680ae | 304 | */ |
bogdanm | 86:04dd9b1680ae | 305 | #define I2S_FLAG_TXE SPI_SR_TXE |
bogdanm | 86:04dd9b1680ae | 306 | #define I2S_FLAG_RXNE SPI_SR_RXNE |
bogdanm | 86:04dd9b1680ae | 307 | |
bogdanm | 86:04dd9b1680ae | 308 | #define I2S_FLAG_UDR SPI_SR_UDR |
bogdanm | 86:04dd9b1680ae | 309 | #define I2S_FLAG_OVR SPI_SR_OVR |
bogdanm | 86:04dd9b1680ae | 310 | #define I2S_FLAG_FRE SPI_SR_FRE |
bogdanm | 86:04dd9b1680ae | 311 | |
bogdanm | 86:04dd9b1680ae | 312 | #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE |
bogdanm | 86:04dd9b1680ae | 313 | #define I2S_FLAG_BSY SPI_SR_BSY |
bogdanm | 86:04dd9b1680ae | 314 | /** |
bogdanm | 86:04dd9b1680ae | 315 | * @} |
bogdanm | 86:04dd9b1680ae | 316 | */ |
bogdanm | 86:04dd9b1680ae | 317 | |
bogdanm | 86:04dd9b1680ae | 318 | /** |
bogdanm | 86:04dd9b1680ae | 319 | * @} |
bogdanm | 86:04dd9b1680ae | 320 | */ |
bogdanm | 86:04dd9b1680ae | 321 | |
bogdanm | 86:04dd9b1680ae | 322 | /* Exported macros -----------------------------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 323 | /** @defgroup I2S_Exported_Macros I2S Exported Macros |
bogdanm | 92:4fc01daae5a5 | 324 | * @{ |
bogdanm | 92:4fc01daae5a5 | 325 | */ |
bogdanm | 86:04dd9b1680ae | 326 | |
bogdanm | 86:04dd9b1680ae | 327 | /** @brief Reset I2S handle state |
bogdanm | 86:04dd9b1680ae | 328 | * @param __HANDLE__: I2S handle. |
bogdanm | 86:04dd9b1680ae | 329 | * @retval None |
bogdanm | 86:04dd9b1680ae | 330 | */ |
bogdanm | 86:04dd9b1680ae | 331 | #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) |
bogdanm | 86:04dd9b1680ae | 332 | |
bogdanm | 86:04dd9b1680ae | 333 | /** @brief Enable or disable the specified SPI peripheral (in I2S mode). |
bogdanm | 86:04dd9b1680ae | 334 | * @param __HANDLE__: specifies the I2S Handle. |
bogdanm | 86:04dd9b1680ae | 335 | * @retval None |
bogdanm | 86:04dd9b1680ae | 336 | */ |
bogdanm | 86:04dd9b1680ae | 337 | #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE) |
bogdanm | 86:04dd9b1680ae | 338 | #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= ~SPI_I2SCFGR_I2SE) |
bogdanm | 86:04dd9b1680ae | 339 | |
bogdanm | 86:04dd9b1680ae | 340 | /** @brief Enable or disable the specified I2S interrupts. |
bogdanm | 86:04dd9b1680ae | 341 | * @param __HANDLE__: specifies the I2S Handle. |
bogdanm | 86:04dd9b1680ae | 342 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
bogdanm | 86:04dd9b1680ae | 343 | * This parameter can be one of the following values: |
bogdanm | 86:04dd9b1680ae | 344 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
bogdanm | 86:04dd9b1680ae | 345 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
bogdanm | 86:04dd9b1680ae | 346 | * @arg I2S_IT_ERR: Error interrupt enable |
bogdanm | 86:04dd9b1680ae | 347 | * @retval None |
bogdanm | 86:04dd9b1680ae | 348 | */ |
bogdanm | 86:04dd9b1680ae | 349 | #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) |
bogdanm | 86:04dd9b1680ae | 350 | #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= ~(__INTERRUPT__)) |
bogdanm | 86:04dd9b1680ae | 351 | |
bogdanm | 86:04dd9b1680ae | 352 | /** @brief Checks if the specified I2S interrupt source is enabled or disabled. |
bogdanm | 86:04dd9b1680ae | 353 | * @param __HANDLE__: specifies the I2S Handle. |
bogdanm | 86:04dd9b1680ae | 354 | * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. |
bogdanm | 86:04dd9b1680ae | 355 | * @param __INTERRUPT__: specifies the I2S interrupt source to check. |
bogdanm | 86:04dd9b1680ae | 356 | * This parameter can be one of the following values: |
bogdanm | 86:04dd9b1680ae | 357 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
bogdanm | 86:04dd9b1680ae | 358 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
bogdanm | 86:04dd9b1680ae | 359 | * @arg I2S_IT_ERR: Error interrupt enable |
bogdanm | 86:04dd9b1680ae | 360 | * @retval The new state of __IT__ (TRUE or FALSE). |
bogdanm | 86:04dd9b1680ae | 361 | */ |
bogdanm | 86:04dd9b1680ae | 362 | #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
bogdanm | 86:04dd9b1680ae | 363 | |
bogdanm | 86:04dd9b1680ae | 364 | /** @brief Checks whether the specified I2S flag is set or not. |
bogdanm | 86:04dd9b1680ae | 365 | * @param __HANDLE__: specifies the I2S Handle. |
bogdanm | 86:04dd9b1680ae | 366 | * @param __FLAG__: specifies the flag to check. |
bogdanm | 86:04dd9b1680ae | 367 | * This parameter can be one of the following values: |
bogdanm | 86:04dd9b1680ae | 368 | * @arg I2S_FLAG_RXNE: Receive buffer not empty flag |
bogdanm | 86:04dd9b1680ae | 369 | * @arg I2S_FLAG_TXE: Transmit buffer empty flag |
bogdanm | 86:04dd9b1680ae | 370 | * @arg I2S_FLAG_UDR: Underrun flag |
bogdanm | 86:04dd9b1680ae | 371 | * @arg I2S_FLAG_OVR: Overrun flag |
bogdanm | 86:04dd9b1680ae | 372 | * @arg I2S_FLAG_FRE: Frame error flag |
bogdanm | 86:04dd9b1680ae | 373 | * @arg I2S_FLAG_CHSIDE: Channel Side flag |
bogdanm | 86:04dd9b1680ae | 374 | * @arg I2S_FLAG_BSY: Busy flag |
bogdanm | 86:04dd9b1680ae | 375 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
bogdanm | 86:04dd9b1680ae | 376 | */ |
bogdanm | 86:04dd9b1680ae | 377 | #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
bogdanm | 86:04dd9b1680ae | 378 | |
bogdanm | 86:04dd9b1680ae | 379 | /** @brief Clears the I2S OVR pending flag. |
bogdanm | 86:04dd9b1680ae | 380 | * @param __HANDLE__: specifies the I2S Handle. |
bogdanm | 86:04dd9b1680ae | 381 | * @retval None |
bogdanm | 86:04dd9b1680ae | 382 | */ |
bogdanm | 86:04dd9b1680ae | 383 | #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{(__HANDLE__)->Instance->DR;\ |
bogdanm | 86:04dd9b1680ae | 384 | (__HANDLE__)->Instance->SR;}while(0) |
bogdanm | 86:04dd9b1680ae | 385 | /** @brief Clears the I2S UDR pending flag. |
bogdanm | 86:04dd9b1680ae | 386 | * @param __HANDLE__: specifies the I2S Handle. |
bogdanm | 86:04dd9b1680ae | 387 | * @retval None |
bogdanm | 86:04dd9b1680ae | 388 | */ |
bogdanm | 86:04dd9b1680ae | 389 | #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__)((__HANDLE__)->Instance->SR) |
bogdanm | 92:4fc01daae5a5 | 390 | /** |
bogdanm | 92:4fc01daae5a5 | 391 | * @} |
bogdanm | 92:4fc01daae5a5 | 392 | */ |
bogdanm | 86:04dd9b1680ae | 393 | |
bogdanm | 92:4fc01daae5a5 | 394 | /* Include I2S HAL Extended module */ |
bogdanm | 86:04dd9b1680ae | 395 | #include "stm32f3xx_hal_i2s_ex.h" |
bogdanm | 86:04dd9b1680ae | 396 | |
bogdanm | 86:04dd9b1680ae | 397 | /* Exported functions --------------------------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 398 | /** @addtogroup I2S_Exported_Functions I2S Exported Functions |
bogdanm | 92:4fc01daae5a5 | 399 | * @{ |
bogdanm | 92:4fc01daae5a5 | 400 | */ |
bogdanm | 92:4fc01daae5a5 | 401 | |
bogdanm | 92:4fc01daae5a5 | 402 | /** @addtogroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions |
bogdanm | 92:4fc01daae5a5 | 403 | * @{ |
bogdanm | 92:4fc01daae5a5 | 404 | */ |
bogdanm | 86:04dd9b1680ae | 405 | |
bogdanm | 86:04dd9b1680ae | 406 | /* Initialization and de-initialization functions *****************************/ |
bogdanm | 86:04dd9b1680ae | 407 | HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); |
bogdanm | 86:04dd9b1680ae | 408 | HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s); |
bogdanm | 86:04dd9b1680ae | 409 | void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); |
bogdanm | 86:04dd9b1680ae | 410 | void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); |
bogdanm | 92:4fc01daae5a5 | 411 | /** |
bogdanm | 92:4fc01daae5a5 | 412 | * @} |
bogdanm | 92:4fc01daae5a5 | 413 | */ |
bogdanm | 86:04dd9b1680ae | 414 | |
bogdanm | 92:4fc01daae5a5 | 415 | /** @addtogroup I2S_Exported_Functions_Group2 Input and Output operation functions |
bogdanm | 92:4fc01daae5a5 | 416 | * @{ |
bogdanm | 92:4fc01daae5a5 | 417 | */ |
bogdanm | 86:04dd9b1680ae | 418 | /* I/O operation functions ***************************************************/ |
bogdanm | 86:04dd9b1680ae | 419 | /* Blocking mode: Polling */ |
bogdanm | 86:04dd9b1680ae | 420 | HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
bogdanm | 86:04dd9b1680ae | 421 | HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
bogdanm | 86:04dd9b1680ae | 422 | |
bogdanm | 86:04dd9b1680ae | 423 | /* Non-Blocking mode: Interrupt */ |
bogdanm | 86:04dd9b1680ae | 424 | HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
bogdanm | 86:04dd9b1680ae | 425 | HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
bogdanm | 86:04dd9b1680ae | 426 | void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); |
bogdanm | 86:04dd9b1680ae | 427 | |
bogdanm | 86:04dd9b1680ae | 428 | /* Non-Blocking mode: DMA */ |
bogdanm | 86:04dd9b1680ae | 429 | HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
bogdanm | 86:04dd9b1680ae | 430 | HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
bogdanm | 86:04dd9b1680ae | 431 | |
bogdanm | 86:04dd9b1680ae | 432 | /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ |
bogdanm | 86:04dd9b1680ae | 433 | void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
bogdanm | 86:04dd9b1680ae | 434 | void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); |
bogdanm | 86:04dd9b1680ae | 435 | void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
bogdanm | 86:04dd9b1680ae | 436 | void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); |
bogdanm | 86:04dd9b1680ae | 437 | void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); |
bogdanm | 92:4fc01daae5a5 | 438 | /** |
bogdanm | 92:4fc01daae5a5 | 439 | * @} |
bogdanm | 92:4fc01daae5a5 | 440 | */ |
bogdanm | 92:4fc01daae5a5 | 441 | |
bogdanm | 92:4fc01daae5a5 | 442 | /** @addtogroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions |
bogdanm | 92:4fc01daae5a5 | 443 | * @{ |
bogdanm | 92:4fc01daae5a5 | 444 | */ |
bogdanm | 92:4fc01daae5a5 | 445 | /* Peripheral Control and State functions ************************************/ |
bogdanm | 92:4fc01daae5a5 | 446 | HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); |
bogdanm | 92:4fc01daae5a5 | 447 | HAL_I2S_ErrorTypeDef HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); |
bogdanm | 92:4fc01daae5a5 | 448 | /** |
bogdanm | 92:4fc01daae5a5 | 449 | * @} |
bogdanm | 92:4fc01daae5a5 | 450 | */ |
bogdanm | 92:4fc01daae5a5 | 451 | |
bogdanm | 92:4fc01daae5a5 | 452 | /** |
bogdanm | 92:4fc01daae5a5 | 453 | * @} |
bogdanm | 92:4fc01daae5a5 | 454 | */ |
bogdanm | 92:4fc01daae5a5 | 455 | |
bogdanm | 86:04dd9b1680ae | 456 | |
bogdanm | 86:04dd9b1680ae | 457 | /** |
bogdanm | 86:04dd9b1680ae | 458 | * @} |
bogdanm | 86:04dd9b1680ae | 459 | */ |
bogdanm | 86:04dd9b1680ae | 460 | |
bogdanm | 86:04dd9b1680ae | 461 | /** |
bogdanm | 86:04dd9b1680ae | 462 | * @} |
bogdanm | 86:04dd9b1680ae | 463 | */ |
bogdanm | 86:04dd9b1680ae | 464 | |
bogdanm | 92:4fc01daae5a5 | 465 | #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ |
bogdanm | 92:4fc01daae5a5 | 466 | /* STM32F302xC || STM32F303xC || STM32F358xx || */ |
bogdanm | 92:4fc01daae5a5 | 467 | /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ |
bogdanm | 92:4fc01daae5a5 | 468 | /* STM32F373xC || STM32F378xx */ |
bogdanm | 86:04dd9b1680ae | 469 | |
bogdanm | 86:04dd9b1680ae | 470 | #ifdef __cplusplus |
bogdanm | 86:04dd9b1680ae | 471 | } |
bogdanm | 86:04dd9b1680ae | 472 | #endif |
bogdanm | 86:04dd9b1680ae | 473 | |
bogdanm | 86:04dd9b1680ae | 474 | |
bogdanm | 86:04dd9b1680ae | 475 | #endif /* __STM32F3xx_HAL_I2S_H */ |
bogdanm | 86:04dd9b1680ae | 476 | |
bogdanm | 86:04dd9b1680ae | 477 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |