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TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_sd.h@118:16969dd821af, 2016-04-05 (annotated)

Committer:
ricardobtez
Date:
Tue Apr 05 23:51:21 2016 +0000
Revision:
118:16969dd821af
Parent:
92:4fc01daae5a5
Child:
99:dbbf35b96557
dgdgr

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_sd.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 19-June-2014
bogdanm 92:4fc01daae5a5 7 * @brief Header file of SD HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
bogdanm 92:4fc01daae5a5 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_SD_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_SD_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 47 #include "stm32f4xx_ll_sdmmc.h"
bogdanm 92:4fc01daae5a5 48
bogdanm 92:4fc01daae5a5 49 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 50 * @{
bogdanm 92:4fc01daae5a5 51 */
bogdanm 92:4fc01daae5a5 52
bogdanm 92:4fc01daae5a5 53 /** @addtogroup SD
bogdanm 92:4fc01daae5a5 54 * @{
bogdanm 92:4fc01daae5a5 55 */
bogdanm 92:4fc01daae5a5 56
bogdanm 92:4fc01daae5a5 57 /* Exported types ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 58 /** @defgroup SD_Exported_Types
bogdanm 92:4fc01daae5a5 59 * @{
bogdanm 92:4fc01daae5a5 60 */
bogdanm 92:4fc01daae5a5 61 #define SD_InitTypeDef SDIO_InitTypeDef
bogdanm 92:4fc01daae5a5 62 #define SD_TypeDef SDIO_TypeDef
bogdanm 92:4fc01daae5a5 63
bogdanm 92:4fc01daae5a5 64 /**
bogdanm 92:4fc01daae5a5 65 * @brief SDIO Handle Structure definition
bogdanm 92:4fc01daae5a5 66 */
bogdanm 92:4fc01daae5a5 67 typedef struct
bogdanm 92:4fc01daae5a5 68 {
bogdanm 92:4fc01daae5a5 69 SD_TypeDef *Instance; /*!< SDIO register base address */
bogdanm 92:4fc01daae5a5 70
bogdanm 92:4fc01daae5a5 71 SD_InitTypeDef Init; /*!< SD required parameters */
bogdanm 92:4fc01daae5a5 72
bogdanm 92:4fc01daae5a5 73 HAL_LockTypeDef Lock; /*!< SD locking object */
bogdanm 92:4fc01daae5a5 74
bogdanm 92:4fc01daae5a5 75 uint32_t CardType; /*!< SD card type */
bogdanm 92:4fc01daae5a5 76
bogdanm 92:4fc01daae5a5 77 uint32_t RCA; /*!< SD relative card address */
bogdanm 92:4fc01daae5a5 78
bogdanm 92:4fc01daae5a5 79 uint32_t CSD[4]; /*!< SD card specific data table */
bogdanm 92:4fc01daae5a5 80
bogdanm 92:4fc01daae5a5 81 uint32_t CID[4]; /*!< SD card identification number table */
bogdanm 92:4fc01daae5a5 82
bogdanm 92:4fc01daae5a5 83 __IO uint32_t SdTransferCplt; /*!< SD transfer complete flag in non blocking mode */
bogdanm 92:4fc01daae5a5 84
bogdanm 92:4fc01daae5a5 85 __IO uint32_t SdTransferErr; /*!< SD transfer error flag in non blocking mode */
bogdanm 92:4fc01daae5a5 86
bogdanm 92:4fc01daae5a5 87 __IO uint32_t DmaTransferCplt; /*!< SD DMA transfer complete flag */
bogdanm 92:4fc01daae5a5 88
bogdanm 92:4fc01daae5a5 89 __IO uint32_t SdOperation; /*!< SD transfer operation (read/write) */
bogdanm 92:4fc01daae5a5 90
bogdanm 92:4fc01daae5a5 91 DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */
bogdanm 92:4fc01daae5a5 92
bogdanm 92:4fc01daae5a5 93 DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */
bogdanm 92:4fc01daae5a5 94
bogdanm 92:4fc01daae5a5 95 }SD_HandleTypeDef;
bogdanm 92:4fc01daae5a5 96
bogdanm 92:4fc01daae5a5 97 /**
bogdanm 92:4fc01daae5a5 98 * @brief Card Specific Data: CSD Register
bogdanm 92:4fc01daae5a5 99 */
bogdanm 92:4fc01daae5a5 100 typedef struct
bogdanm 92:4fc01daae5a5 101 {
bogdanm 92:4fc01daae5a5 102 __IO uint8_t CSDStruct; /*!< CSD structure */
bogdanm 92:4fc01daae5a5 103 __IO uint8_t SysSpecVersion; /*!< System specification version */
bogdanm 92:4fc01daae5a5 104 __IO uint8_t Reserved1; /*!< Reserved */
bogdanm 92:4fc01daae5a5 105 __IO uint8_t TAAC; /*!< Data read access time 1 */
bogdanm 92:4fc01daae5a5 106 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
bogdanm 92:4fc01daae5a5 107 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
bogdanm 92:4fc01daae5a5 108 __IO uint16_t CardComdClasses; /*!< Card command classes */
bogdanm 92:4fc01daae5a5 109 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
bogdanm 92:4fc01daae5a5 110 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
bogdanm 92:4fc01daae5a5 111 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
bogdanm 92:4fc01daae5a5 112 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
bogdanm 92:4fc01daae5a5 113 __IO uint8_t DSRImpl; /*!< DSR implemented */
bogdanm 92:4fc01daae5a5 114 __IO uint8_t Reserved2; /*!< Reserved */
bogdanm 92:4fc01daae5a5 115 __IO uint32_t DeviceSize; /*!< Device Size */
bogdanm 92:4fc01daae5a5 116 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
bogdanm 92:4fc01daae5a5 117 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
bogdanm 92:4fc01daae5a5 118 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
bogdanm 92:4fc01daae5a5 119 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
bogdanm 92:4fc01daae5a5 120 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
bogdanm 92:4fc01daae5a5 121 __IO uint8_t EraseGrSize; /*!< Erase group size */
bogdanm 92:4fc01daae5a5 122 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
bogdanm 92:4fc01daae5a5 123 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
bogdanm 92:4fc01daae5a5 124 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
bogdanm 92:4fc01daae5a5 125 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
bogdanm 92:4fc01daae5a5 126 __IO uint8_t WrSpeedFact; /*!< Write speed factor */
bogdanm 92:4fc01daae5a5 127 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
bogdanm 92:4fc01daae5a5 128 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
bogdanm 92:4fc01daae5a5 129 __IO uint8_t Reserved3; /*!< Reserved */
bogdanm 92:4fc01daae5a5 130 __IO uint8_t ContentProtectAppli; /*!< Content protection application */
bogdanm 92:4fc01daae5a5 131 __IO uint8_t FileFormatGrouop; /*!< File format group */
bogdanm 92:4fc01daae5a5 132 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
bogdanm 92:4fc01daae5a5 133 __IO uint8_t PermWrProtect; /*!< Permanent write protection */
bogdanm 92:4fc01daae5a5 134 __IO uint8_t TempWrProtect; /*!< Temporary write protection */
bogdanm 92:4fc01daae5a5 135 __IO uint8_t FileFormat; /*!< File format */
bogdanm 92:4fc01daae5a5 136 __IO uint8_t ECC; /*!< ECC code */
bogdanm 92:4fc01daae5a5 137 __IO uint8_t CSD_CRC; /*!< CSD CRC */
bogdanm 92:4fc01daae5a5 138 __IO uint8_t Reserved4; /*!< Always 1 */
bogdanm 92:4fc01daae5a5 139
bogdanm 92:4fc01daae5a5 140 }HAL_SD_CSDTypedef;
bogdanm 92:4fc01daae5a5 141
bogdanm 92:4fc01daae5a5 142 /**
bogdanm 92:4fc01daae5a5 143 * @brief Card Identification Data: CID Register
bogdanm 92:4fc01daae5a5 144 */
bogdanm 92:4fc01daae5a5 145 typedef struct
bogdanm 92:4fc01daae5a5 146 {
bogdanm 92:4fc01daae5a5 147 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
bogdanm 92:4fc01daae5a5 148 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
bogdanm 92:4fc01daae5a5 149 __IO uint32_t ProdName1; /*!< Product Name part1 */
bogdanm 92:4fc01daae5a5 150 __IO uint8_t ProdName2; /*!< Product Name part2 */
bogdanm 92:4fc01daae5a5 151 __IO uint8_t ProdRev; /*!< Product Revision */
bogdanm 92:4fc01daae5a5 152 __IO uint32_t ProdSN; /*!< Product Serial Number */
bogdanm 92:4fc01daae5a5 153 __IO uint8_t Reserved1; /*!< Reserved1 */
bogdanm 92:4fc01daae5a5 154 __IO uint16_t ManufactDate; /*!< Manufacturing Date */
bogdanm 92:4fc01daae5a5 155 __IO uint8_t CID_CRC; /*!< CID CRC */
bogdanm 92:4fc01daae5a5 156 __IO uint8_t Reserved2; /*!< Always 1 */
bogdanm 92:4fc01daae5a5 157
bogdanm 92:4fc01daae5a5 158 }HAL_SD_CIDTypedef;
bogdanm 92:4fc01daae5a5 159
bogdanm 92:4fc01daae5a5 160 /**
bogdanm 92:4fc01daae5a5 161 * @brief SD Card Status returned by ACMD13
bogdanm 92:4fc01daae5a5 162 */
bogdanm 92:4fc01daae5a5 163 typedef struct
bogdanm 92:4fc01daae5a5 164 {
bogdanm 92:4fc01daae5a5 165 __IO uint8_t DAT_BUS_WIDTH; /*!< Shows the currently defined data bus width */
bogdanm 92:4fc01daae5a5 166 __IO uint8_t SECURED_MODE; /*!< Card is in secured mode of operation */
bogdanm 92:4fc01daae5a5 167 __IO uint16_t SD_CARD_TYPE; /*!< Carries information about card type */
bogdanm 92:4fc01daae5a5 168 __IO uint32_t SIZE_OF_PROTECTED_AREA; /*!< Carries information about the capacity of protected area */
bogdanm 92:4fc01daae5a5 169 __IO uint8_t SPEED_CLASS; /*!< Carries information about the speed class of the card */
bogdanm 92:4fc01daae5a5 170 __IO uint8_t PERFORMANCE_MOVE; /*!< Carries information about the card's performance move */
bogdanm 92:4fc01daae5a5 171 __IO uint8_t AU_SIZE; /*!< Carries information about the card's allocation unit size */
bogdanm 92:4fc01daae5a5 172 __IO uint16_t ERASE_SIZE; /*!< Determines the number of AUs to be erased in one operation */
bogdanm 92:4fc01daae5a5 173 __IO uint8_t ERASE_TIMEOUT; /*!< Determines the timeout for any number of AU erase */
bogdanm 92:4fc01daae5a5 174 __IO uint8_t ERASE_OFFSET; /*!< Carries information about the erase offset */
bogdanm 92:4fc01daae5a5 175
bogdanm 92:4fc01daae5a5 176 }HAL_SD_CardStatusTypedef;
bogdanm 92:4fc01daae5a5 177
bogdanm 92:4fc01daae5a5 178 /**
bogdanm 92:4fc01daae5a5 179 * @brief SD Card information structure
bogdanm 92:4fc01daae5a5 180 */
bogdanm 92:4fc01daae5a5 181 typedef struct
bogdanm 92:4fc01daae5a5 182 {
bogdanm 92:4fc01daae5a5 183 HAL_SD_CSDTypedef SD_csd; /*!< SD card specific data register */
bogdanm 92:4fc01daae5a5 184 HAL_SD_CIDTypedef SD_cid; /*!< SD card identification number register */
bogdanm 92:4fc01daae5a5 185 uint64_t CardCapacity; /*!< Card capacity */
bogdanm 92:4fc01daae5a5 186 uint32_t CardBlockSize; /*!< Card block size */
bogdanm 92:4fc01daae5a5 187 uint16_t RCA; /*!< SD relative card address */
bogdanm 92:4fc01daae5a5 188 uint8_t CardType; /*!< SD card type */
bogdanm 92:4fc01daae5a5 189
bogdanm 92:4fc01daae5a5 190 }HAL_SD_CardInfoTypedef;
bogdanm 92:4fc01daae5a5 191
bogdanm 92:4fc01daae5a5 192 /**
bogdanm 92:4fc01daae5a5 193 * @brief SD Error status enumeration Structure definition
bogdanm 92:4fc01daae5a5 194 */
bogdanm 92:4fc01daae5a5 195 typedef enum
bogdanm 92:4fc01daae5a5 196 {
bogdanm 92:4fc01daae5a5 197 /**
bogdanm 92:4fc01daae5a5 198 * @brief SD specific error defines
bogdanm 92:4fc01daae5a5 199 */
bogdanm 92:4fc01daae5a5 200 SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */
bogdanm 92:4fc01daae5a5 201 SD_DATA_CRC_FAIL = (2), /*!< Data block sent/received (CRC check failed) */
bogdanm 92:4fc01daae5a5 202 SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */
bogdanm 92:4fc01daae5a5 203 SD_DATA_TIMEOUT = (4), /*!< Data timeout */
bogdanm 92:4fc01daae5a5 204 SD_TX_UNDERRUN = (5), /*!< Transmit FIFO underrun */
bogdanm 92:4fc01daae5a5 205 SD_RX_OVERRUN = (6), /*!< Receive FIFO overrun */
bogdanm 92:4fc01daae5a5 206 SD_START_BIT_ERR = (7), /*!< Start bit not detected on all data signals in wide bus mode */
bogdanm 92:4fc01daae5a5 207 SD_CMD_OUT_OF_RANGE = (8), /*!< Command's argument was out of range. */
bogdanm 92:4fc01daae5a5 208 SD_ADDR_MISALIGNED = (9), /*!< Misaligned address */
bogdanm 92:4fc01daae5a5 209 SD_BLOCK_LEN_ERR = (10), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */
bogdanm 92:4fc01daae5a5 210 SD_ERASE_SEQ_ERR = (11), /*!< An error in the sequence of erase command occurs. */
bogdanm 92:4fc01daae5a5 211 SD_BAD_ERASE_PARAM = (12), /*!< An invalid selection for erase groups */
bogdanm 92:4fc01daae5a5 212 SD_WRITE_PROT_VIOLATION = (13), /*!< Attempt to program a write protect block */
bogdanm 92:4fc01daae5a5 213 SD_LOCK_UNLOCK_FAILED = (14), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */
bogdanm 92:4fc01daae5a5 214 SD_COM_CRC_FAILED = (15), /*!< CRC check of the previous command failed */
bogdanm 92:4fc01daae5a5 215 SD_ILLEGAL_CMD = (16), /*!< Command is not legal for the card state */
bogdanm 92:4fc01daae5a5 216 SD_CARD_ECC_FAILED = (17), /*!< Card internal ECC was applied but failed to correct the data */
bogdanm 92:4fc01daae5a5 217 SD_CC_ERROR = (18), /*!< Internal card controller error */
bogdanm 92:4fc01daae5a5 218 SD_GENERAL_UNKNOWN_ERROR = (19), /*!< General or unknown error */
bogdanm 92:4fc01daae5a5 219 SD_STREAM_READ_UNDERRUN = (20), /*!< The card could not sustain data transfer in stream read operation. */
bogdanm 92:4fc01daae5a5 220 SD_STREAM_WRITE_OVERRUN = (21), /*!< The card could not sustain data programming in stream mode */
bogdanm 92:4fc01daae5a5 221 SD_CID_CSD_OVERWRITE = (22), /*!< CID/CSD overwrite error */
bogdanm 92:4fc01daae5a5 222 SD_WP_ERASE_SKIP = (23), /*!< Only partial address space was erased */
bogdanm 92:4fc01daae5a5 223 SD_CARD_ECC_DISABLED = (24), /*!< Command has been executed without using internal ECC */
bogdanm 92:4fc01daae5a5 224 SD_ERASE_RESET = (25), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */
bogdanm 92:4fc01daae5a5 225 SD_AKE_SEQ_ERROR = (26), /*!< Error in sequence of authentication. */
bogdanm 92:4fc01daae5a5 226 SD_INVALID_VOLTRANGE = (27),
bogdanm 92:4fc01daae5a5 227 SD_ADDR_OUT_OF_RANGE = (28),
bogdanm 92:4fc01daae5a5 228 SD_SWITCH_ERROR = (29),
bogdanm 92:4fc01daae5a5 229 SD_SDIO_DISABLED = (30),
bogdanm 92:4fc01daae5a5 230 SD_SDIO_FUNCTION_BUSY = (31),
bogdanm 92:4fc01daae5a5 231 SD_SDIO_FUNCTION_FAILED = (32),
bogdanm 92:4fc01daae5a5 232 SD_SDIO_UNKNOWN_FUNCTION = (33),
bogdanm 92:4fc01daae5a5 233
bogdanm 92:4fc01daae5a5 234 /**
bogdanm 92:4fc01daae5a5 235 * @brief Standard error defines
bogdanm 92:4fc01daae5a5 236 */
bogdanm 92:4fc01daae5a5 237 SD_INTERNAL_ERROR = (34),
bogdanm 92:4fc01daae5a5 238 SD_NOT_CONFIGURED = (35),
bogdanm 92:4fc01daae5a5 239 SD_REQUEST_PENDING = (36),
bogdanm 92:4fc01daae5a5 240 SD_REQUEST_NOT_APPLICABLE = (37),
bogdanm 92:4fc01daae5a5 241 SD_INVALID_PARAMETER = (38),
bogdanm 92:4fc01daae5a5 242 SD_UNSUPPORTED_FEATURE = (39),
bogdanm 92:4fc01daae5a5 243 SD_UNSUPPORTED_HW = (40),
bogdanm 92:4fc01daae5a5 244 SD_ERROR = (41),
bogdanm 92:4fc01daae5a5 245 SD_OK = (0)
bogdanm 92:4fc01daae5a5 246
bogdanm 92:4fc01daae5a5 247 }HAL_SD_ErrorTypedef;
bogdanm 92:4fc01daae5a5 248
bogdanm 92:4fc01daae5a5 249 /**
bogdanm 92:4fc01daae5a5 250 * @brief SD Transfer state enumeration structure
bogdanm 92:4fc01daae5a5 251 */
bogdanm 92:4fc01daae5a5 252 typedef enum
bogdanm 92:4fc01daae5a5 253 {
bogdanm 92:4fc01daae5a5 254 SD_TRANSFER_OK = 0, /*!< Transfer success */
bogdanm 92:4fc01daae5a5 255 SD_TRANSFER_BUSY = 1, /*!< Transfer is occurring */
bogdanm 92:4fc01daae5a5 256 SD_TRANSFER_ERROR = 2 /*!< Transfer failed */
bogdanm 92:4fc01daae5a5 257
bogdanm 92:4fc01daae5a5 258 }HAL_SD_TransferStateTypedef;
bogdanm 92:4fc01daae5a5 259
bogdanm 92:4fc01daae5a5 260 /**
bogdanm 92:4fc01daae5a5 261 * @brief SD Card State enumeration structure
bogdanm 92:4fc01daae5a5 262 */
bogdanm 92:4fc01daae5a5 263 typedef enum
bogdanm 92:4fc01daae5a5 264 {
bogdanm 92:4fc01daae5a5 265 SD_CARD_READY = ((uint32_t)0x00000001), /*!< Card state is ready */
bogdanm 92:4fc01daae5a5 266 SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002), /*!< Card is in identification state */
bogdanm 92:4fc01daae5a5 267 SD_CARD_STANDBY = ((uint32_t)0x00000003), /*!< Card is in standby state */
bogdanm 92:4fc01daae5a5 268 SD_CARD_TRANSFER = ((uint32_t)0x00000004), /*!< Card is in transfer state */
bogdanm 92:4fc01daae5a5 269 SD_CARD_SENDING = ((uint32_t)0x00000005), /*!< Card is sending an operation */
bogdanm 92:4fc01daae5a5 270 SD_CARD_RECEIVING = ((uint32_t)0x00000006), /*!< Card is receiving operation information */
bogdanm 92:4fc01daae5a5 271 SD_CARD_PROGRAMMING = ((uint32_t)0x00000007), /*!< Card is in programming state */
bogdanm 92:4fc01daae5a5 272 SD_CARD_DISCONNECTED = ((uint32_t)0x00000008), /*!< Card is disconnected */
bogdanm 92:4fc01daae5a5 273 SD_CARD_ERROR = ((uint32_t)0x000000FF) /*!< Card is in error state */
bogdanm 92:4fc01daae5a5 274
bogdanm 92:4fc01daae5a5 275 }HAL_SD_CardStateTypedef;
bogdanm 92:4fc01daae5a5 276
bogdanm 92:4fc01daae5a5 277 /**
bogdanm 92:4fc01daae5a5 278 * @brief SD Operation enumeration structure
bogdanm 92:4fc01daae5a5 279 */
bogdanm 92:4fc01daae5a5 280 typedef enum
bogdanm 92:4fc01daae5a5 281 {
bogdanm 92:4fc01daae5a5 282 SD_READ_SINGLE_BLOCK = 0, /*!< Read single block operation */
bogdanm 92:4fc01daae5a5 283 SD_READ_MULTIPLE_BLOCK = 1, /*!< Read multiple blocks operation */
bogdanm 92:4fc01daae5a5 284 SD_WRITE_SINGLE_BLOCK = 2, /*!< Write single block operation */
bogdanm 92:4fc01daae5a5 285 SD_WRITE_MULTIPLE_BLOCK = 3 /*!< Write multiple blocks operation */
bogdanm 92:4fc01daae5a5 286
bogdanm 92:4fc01daae5a5 287 }HAL_SD_OperationTypedef;
bogdanm 92:4fc01daae5a5 288
bogdanm 92:4fc01daae5a5 289
bogdanm 92:4fc01daae5a5 290 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 291 /** @defgroup SD_Exported_Constants
bogdanm 92:4fc01daae5a5 292 * @{
bogdanm 92:4fc01daae5a5 293 */
bogdanm 92:4fc01daae5a5 294
bogdanm 92:4fc01daae5a5 295 /**
bogdanm 92:4fc01daae5a5 296 * @brief SD Commands Index
bogdanm 92:4fc01daae5a5 297 */
bogdanm 92:4fc01daae5a5 298 #define SD_CMD_GO_IDLE_STATE ((uint8_t)0) /*!< Resets the SD memory card. */
bogdanm 92:4fc01daae5a5 299 #define SD_CMD_SEND_OP_COND ((uint8_t)1) /*!< Sends host capacity support information and activates the card's initialization process. */
bogdanm 92:4fc01daae5a5 300 #define SD_CMD_ALL_SEND_CID ((uint8_t)2) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */
bogdanm 92:4fc01daae5a5 301 #define SD_CMD_SET_REL_ADDR ((uint8_t)3) /*!< Asks the card to publish a new relative address (RCA). */
bogdanm 92:4fc01daae5a5 302 #define SD_CMD_SET_DSR ((uint8_t)4) /*!< Programs the DSR of all cards. */
bogdanm 92:4fc01daae5a5 303 #define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its
bogdanm 92:4fc01daae5a5 304 operating condition register (OCR) content in the response on the CMD line. */
bogdanm 92:4fc01daae5a5 305 #define SD_CMD_HS_SWITCH ((uint8_t)6) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */
bogdanm 92:4fc01daae5a5 306 #define SD_CMD_SEL_DESEL_CARD ((uint8_t)7) /*!< Selects the card by its own relative address and gets deselected by any other address */
bogdanm 92:4fc01daae5a5 307 #define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information
bogdanm 92:4fc01daae5a5 308 and asks the card whether card supports voltage. */
bogdanm 92:4fc01daae5a5 309 #define SD_CMD_SEND_CSD ((uint8_t)9) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */
bogdanm 92:4fc01daae5a5 310 #define SD_CMD_SEND_CID ((uint8_t)10) /*!< Addressed card sends its card identification (CID) on the CMD line. */
bogdanm 92:4fc01daae5a5 311 #define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11) /*!< SD card doesn't support it. */
bogdanm 92:4fc01daae5a5 312 #define SD_CMD_STOP_TRANSMISSION ((uint8_t)12) /*!< Forces the card to stop transmission. */
bogdanm 92:4fc01daae5a5 313 #define SD_CMD_SEND_STATUS ((uint8_t)13) /*!< Addressed card sends its status register. */
bogdanm 92:4fc01daae5a5 314 #define SD_CMD_HS_BUSTEST_READ ((uint8_t)14)
bogdanm 92:4fc01daae5a5 315 #define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15) /*!< Sends an addressed card into the inactive state. */
bogdanm 92:4fc01daae5a5 316 #define SD_CMD_SET_BLOCKLEN ((uint8_t)16) /*!< Sets the block length (in bytes for SDSC) for all following block commands
bogdanm 92:4fc01daae5a5 317 (read, write, lock). Default block length is fixed to 512 Bytes. Not effective
bogdanm 92:4fc01daae5a5 318 for SDHS and SDXC. */
bogdanm 92:4fc01daae5a5 319 #define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
bogdanm 92:4fc01daae5a5 320 fixed 512 bytes in case of SDHC and SDXC. */
bogdanm 92:4fc01daae5a5 321 #define SD_CMD_READ_MULT_BLOCK ((uint8_t)18) /*!< Continuously transfers data blocks from card to host until interrupted by
bogdanm 92:4fc01daae5a5 322 STOP_TRANSMISSION command. */
bogdanm 92:4fc01daae5a5 323 #define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */
bogdanm 92:4fc01daae5a5 324 #define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /*!< Speed class control command. */
bogdanm 92:4fc01daae5a5 325 #define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23) /*!< Specify block count for CMD18 and CMD25. */
bogdanm 92:4fc01daae5a5 326 #define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
bogdanm 92:4fc01daae5a5 327 fixed 512 bytes in case of SDHC and SDXC. */
bogdanm 92:4fc01daae5a5 328 #define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */
bogdanm 92:4fc01daae5a5 329 #define SD_CMD_PROG_CID ((uint8_t)26) /*!< Reserved for manufacturers. */
bogdanm 92:4fc01daae5a5 330 #define SD_CMD_PROG_CSD ((uint8_t)27) /*!< Programming of the programmable bits of the CSD. */
bogdanm 92:4fc01daae5a5 331 #define SD_CMD_SET_WRITE_PROT ((uint8_t)28) /*!< Sets the write protection bit of the addressed group. */
bogdanm 92:4fc01daae5a5 332 #define SD_CMD_CLR_WRITE_PROT ((uint8_t)29) /*!< Clears the write protection bit of the addressed group. */
bogdanm 92:4fc01daae5a5 333 #define SD_CMD_SEND_WRITE_PROT ((uint8_t)30) /*!< Asks the card to send the status of the write protection bits. */
bogdanm 92:4fc01daae5a5 334 #define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32) /*!< Sets the address of the first write block to be erased. (For SD card only). */
bogdanm 92:4fc01daae5a5 335 #define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33) /*!< Sets the address of the last write block of the continuous range to be erased. */
bogdanm 92:4fc01daae5a5 336 #define SD_CMD_ERASE_GRP_START ((uint8_t)35) /*!< Sets the address of the first write block to be erased. Reserved for each command
bogdanm 92:4fc01daae5a5 337 system set by switch function command (CMD6). */
bogdanm 92:4fc01daae5a5 338 #define SD_CMD_ERASE_GRP_END ((uint8_t)36) /*!< Sets the address of the last write block of the continuous range to be erased.
bogdanm 92:4fc01daae5a5 339 Reserved for each command system set by switch function command (CMD6). */
bogdanm 92:4fc01daae5a5 340 #define SD_CMD_ERASE ((uint8_t)38) /*!< Reserved for SD security applications. */
bogdanm 92:4fc01daae5a5 341 #define SD_CMD_FAST_IO ((uint8_t)39) /*!< SD card doesn't support it (Reserved). */
bogdanm 92:4fc01daae5a5 342 #define SD_CMD_GO_IRQ_STATE ((uint8_t)40) /*!< SD card doesn't support it (Reserved). */
bogdanm 92:4fc01daae5a5 343 #define SD_CMD_LOCK_UNLOCK ((uint8_t)42) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by
bogdanm 92:4fc01daae5a5 344 the SET_BLOCK_LEN command. */
bogdanm 92:4fc01daae5a5 345 #define SD_CMD_APP_CMD ((uint8_t)55) /*!< Indicates to the card that the next command is an application specific command rather
bogdanm 92:4fc01daae5a5 346 than a standard command. */
bogdanm 92:4fc01daae5a5 347 #define SD_CMD_GEN_CMD ((uint8_t)56) /*!< Used either to transfer a data block to the card or to get a data block from the card
bogdanm 92:4fc01daae5a5 348 for general purpose/application specific commands. */
bogdanm 92:4fc01daae5a5 349 #define SD_CMD_NO_CMD ((uint8_t)64)
bogdanm 92:4fc01daae5a5 350
bogdanm 92:4fc01daae5a5 351 /**
bogdanm 92:4fc01daae5a5 352 * @brief Following commands are SD Card Specific commands.
bogdanm 92:4fc01daae5a5 353 * SDIO_APP_CMD should be sent before sending these commands.
bogdanm 92:4fc01daae5a5 354 */
bogdanm 92:4fc01daae5a5 355 #define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus
bogdanm 92:4fc01daae5a5 356 widths are given in SCR register. */
bogdanm 92:4fc01daae5a5 357 #define SD_CMD_SD_APP_STAUS ((uint8_t)13) /*!< (ACMD13) Sends the SD status. */
bogdanm 92:4fc01daae5a5 358 #define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with
bogdanm 92:4fc01daae5a5 359 32bit+CRC data block. */
bogdanm 92:4fc01daae5a5 360 #define SD_CMD_SD_APP_OP_COND ((uint8_t)41) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to
bogdanm 92:4fc01daae5a5 361 send its operating condition register (OCR) content in the response on the CMD line. */
bogdanm 92:4fc01daae5a5 362 #define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /*!< (ACMD42) Connects/Disconnects the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card. */
bogdanm 92:4fc01daae5a5 363 #define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51) /*!< Reads the SD Configuration Register (SCR). */
bogdanm 92:4fc01daae5a5 364 #define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52) /*!< For SD I/O card only, reserved for security specification. */
bogdanm 92:4fc01daae5a5 365 #define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53) /*!< For SD I/O card only, reserved for security specification. */
bogdanm 92:4fc01daae5a5 366
bogdanm 92:4fc01daae5a5 367 /**
bogdanm 92:4fc01daae5a5 368 * @brief Following commands are SD Card Specific security commands.
bogdanm 92:4fc01daae5a5 369 * SD_CMD_APP_CMD should be sent before sending these commands.
bogdanm 92:4fc01daae5a5 370 */
bogdanm 92:4fc01daae5a5 371 #define SD_CMD_SD_APP_GET_MKB ((uint8_t)43) /*!< For SD card only */
bogdanm 92:4fc01daae5a5 372 #define SD_CMD_SD_APP_GET_MID ((uint8_t)44) /*!< For SD card only */
bogdanm 92:4fc01daae5a5 373 #define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45) /*!< For SD card only */
bogdanm 92:4fc01daae5a5 374 #define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46) /*!< For SD card only */
bogdanm 92:4fc01daae5a5 375 #define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47) /*!< For SD card only */
bogdanm 92:4fc01daae5a5 376 #define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48) /*!< For SD card only */
bogdanm 92:4fc01daae5a5 377 #define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18) /*!< For SD card only */
bogdanm 92:4fc01daae5a5 378 #define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25) /*!< For SD card only */
bogdanm 92:4fc01daae5a5 379 #define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38) /*!< For SD card only */
bogdanm 92:4fc01daae5a5 380 #define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) /*!< For SD card only */
bogdanm 92:4fc01daae5a5 381 #define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) /*!< For SD card only */
bogdanm 92:4fc01daae5a5 382
bogdanm 92:4fc01daae5a5 383 /**
bogdanm 92:4fc01daae5a5 384 * @brief Supported SD Memory Cards
bogdanm 92:4fc01daae5a5 385 */
bogdanm 92:4fc01daae5a5 386 #define STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 387 #define STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001)
bogdanm 92:4fc01daae5a5 388 #define HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002)
bogdanm 92:4fc01daae5a5 389 #define MULTIMEDIA_CARD ((uint32_t)0x00000003)
bogdanm 92:4fc01daae5a5 390 #define SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004)
bogdanm 92:4fc01daae5a5 391 #define HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005)
bogdanm 92:4fc01daae5a5 392 #define SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006)
bogdanm 92:4fc01daae5a5 393 #define HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007)
bogdanm 92:4fc01daae5a5 394 /**
bogdanm 92:4fc01daae5a5 395 * @}
bogdanm 92:4fc01daae5a5 396 */
bogdanm 92:4fc01daae5a5 397
bogdanm 92:4fc01daae5a5 398 /* Exported macro ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 399
bogdanm 92:4fc01daae5a5 400 /** @defgroup SD_Exported_macros
bogdanm 92:4fc01daae5a5 401 * @brief macros to handle interrupts and specific clock configurations
bogdanm 92:4fc01daae5a5 402 * @{
bogdanm 92:4fc01daae5a5 403 */
bogdanm 92:4fc01daae5a5 404
bogdanm 92:4fc01daae5a5 405 /**
bogdanm 92:4fc01daae5a5 406 * @brief Enable the SD device.
bogdanm 92:4fc01daae5a5 407 * @retval None
bogdanm 92:4fc01daae5a5 408 */
bogdanm 92:4fc01daae5a5 409 #define __HAL_SD_SDIO_ENABLE() __SDIO_ENABLE()
bogdanm 92:4fc01daae5a5 410
bogdanm 92:4fc01daae5a5 411 /**
bogdanm 92:4fc01daae5a5 412 * @brief Disable the SD device.
bogdanm 92:4fc01daae5a5 413 * @retval None
bogdanm 92:4fc01daae5a5 414 */
bogdanm 92:4fc01daae5a5 415 #define __HAL_SD_SDIO_DISABLE() __SDIO_DISABLE()
bogdanm 92:4fc01daae5a5 416
bogdanm 92:4fc01daae5a5 417 /**
bogdanm 92:4fc01daae5a5 418 * @brief Enable the SDIO DMA transfer.
bogdanm 92:4fc01daae5a5 419 * @retval None
bogdanm 92:4fc01daae5a5 420 */
bogdanm 92:4fc01daae5a5 421 #define __HAL_SD_SDIO_DMA_ENABLE() __SDIO_DMA_ENABLE()
bogdanm 92:4fc01daae5a5 422
bogdanm 92:4fc01daae5a5 423 /**
bogdanm 92:4fc01daae5a5 424 * @brief Disable the SDIO DMA transfer.
bogdanm 92:4fc01daae5a5 425 * @retval None
bogdanm 92:4fc01daae5a5 426 */
bogdanm 92:4fc01daae5a5 427 #define __HAL_SD_SDIO_DMA_DISABLE() __SDIO_DMA_DISABLE()
bogdanm 92:4fc01daae5a5 428
bogdanm 92:4fc01daae5a5 429 /**
bogdanm 92:4fc01daae5a5 430 * @brief Enable the SD device interrupt.
bogdanm 92:4fc01daae5a5 431 * @param __HANDLE__: SD Handle
bogdanm 92:4fc01daae5a5 432 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be enabled.
bogdanm 92:4fc01daae5a5 433 * This parameter can be one or a combination of the following values:
bogdanm 92:4fc01daae5a5 434 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 92:4fc01daae5a5 435 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 92:4fc01daae5a5 436 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 92:4fc01daae5a5 437 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 92:4fc01daae5a5 438 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 92:4fc01daae5a5 439 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 92:4fc01daae5a5 440 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 92:4fc01daae5a5 441 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 92:4fc01daae5a5 442 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 92:4fc01daae5a5 443 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 92:4fc01daae5a5 444 * bus mode interrupt
bogdanm 92:4fc01daae5a5 445 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 92:4fc01daae5a5 446 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 92:4fc01daae5a5 447 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 92:4fc01daae5a5 448 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 92:4fc01daae5a5 449 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 92:4fc01daae5a5 450 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 92:4fc01daae5a5 451 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 92:4fc01daae5a5 452 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 92:4fc01daae5a5 453 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 92:4fc01daae5a5 454 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 92:4fc01daae5a5 455 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 92:4fc01daae5a5 456 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
bogdanm 92:4fc01daae5a5 457 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 92:4fc01daae5a5 458 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
bogdanm 92:4fc01daae5a5 459 * @retval None
bogdanm 92:4fc01daae5a5 460 */
bogdanm 92:4fc01daae5a5 461 #define __HAL_SD_SDIO_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
bogdanm 92:4fc01daae5a5 462
bogdanm 92:4fc01daae5a5 463 /**
bogdanm 92:4fc01daae5a5 464 * @brief Disable the SD device interrupt.
bogdanm 92:4fc01daae5a5 465 * @param __HANDLE__: SD Handle
bogdanm 92:4fc01daae5a5 466 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be disabled.
bogdanm 92:4fc01daae5a5 467 * This parameter can be one or a combination of the following values:
bogdanm 92:4fc01daae5a5 468 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 92:4fc01daae5a5 469 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 92:4fc01daae5a5 470 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 92:4fc01daae5a5 471 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 92:4fc01daae5a5 472 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 92:4fc01daae5a5 473 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 92:4fc01daae5a5 474 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 92:4fc01daae5a5 475 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 92:4fc01daae5a5 476 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 92:4fc01daae5a5 477 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 92:4fc01daae5a5 478 * bus mode interrupt
bogdanm 92:4fc01daae5a5 479 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 92:4fc01daae5a5 480 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 92:4fc01daae5a5 481 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 92:4fc01daae5a5 482 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 92:4fc01daae5a5 483 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 92:4fc01daae5a5 484 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 92:4fc01daae5a5 485 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 92:4fc01daae5a5 486 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 92:4fc01daae5a5 487 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 92:4fc01daae5a5 488 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 92:4fc01daae5a5 489 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 92:4fc01daae5a5 490 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
bogdanm 92:4fc01daae5a5 491 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 92:4fc01daae5a5 492 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
bogdanm 92:4fc01daae5a5 493 * @retval None
bogdanm 92:4fc01daae5a5 494 */
bogdanm 92:4fc01daae5a5 495 #define __HAL_SD_SDIO_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
bogdanm 92:4fc01daae5a5 496
bogdanm 92:4fc01daae5a5 497 /**
bogdanm 92:4fc01daae5a5 498 * @brief Check whether the specified SD flag is set or not.
bogdanm 92:4fc01daae5a5 499 * @param __HANDLE__: SD Handle
bogdanm 92:4fc01daae5a5 500 * @param __FLAG__: specifies the flag to check.
bogdanm 92:4fc01daae5a5 501 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 502 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
bogdanm 92:4fc01daae5a5 503 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
bogdanm 92:4fc01daae5a5 504 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
bogdanm 92:4fc01daae5a5 505 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
bogdanm 92:4fc01daae5a5 506 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
bogdanm 92:4fc01daae5a5 507 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
bogdanm 92:4fc01daae5a5 508 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
bogdanm 92:4fc01daae5a5 509 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
bogdanm 92:4fc01daae5a5 510 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
bogdanm 92:4fc01daae5a5 511 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode.
bogdanm 92:4fc01daae5a5 512 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
bogdanm 92:4fc01daae5a5 513 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
bogdanm 92:4fc01daae5a5 514 * @arg SDIO_FLAG_TXACT: Data transmit in progress
bogdanm 92:4fc01daae5a5 515 * @arg SDIO_FLAG_RXACT: Data receive in progress
bogdanm 92:4fc01daae5a5 516 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
bogdanm 92:4fc01daae5a5 517 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
bogdanm 92:4fc01daae5a5 518 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
bogdanm 92:4fc01daae5a5 519 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
bogdanm 92:4fc01daae5a5 520 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
bogdanm 92:4fc01daae5a5 521 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
bogdanm 92:4fc01daae5a5 522 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
bogdanm 92:4fc01daae5a5 523 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
bogdanm 92:4fc01daae5a5 524 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
bogdanm 92:4fc01daae5a5 525 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
bogdanm 92:4fc01daae5a5 526 * @retval The new state of SD FLAG (SET or RESET).
bogdanm 92:4fc01daae5a5 527 */
bogdanm 92:4fc01daae5a5 528 #define __HAL_SD_SDIO_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
bogdanm 92:4fc01daae5a5 529
bogdanm 92:4fc01daae5a5 530 /**
bogdanm 92:4fc01daae5a5 531 * @brief Clear the SD's pending flags.
bogdanm 92:4fc01daae5a5 532 * @param __HANDLE__: SD Handle
bogdanm 92:4fc01daae5a5 533 * @param __FLAG__: specifies the flag to clear.
bogdanm 92:4fc01daae5a5 534 * This parameter can be one or a combination of the following values:
bogdanm 92:4fc01daae5a5 535 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
bogdanm 92:4fc01daae5a5 536 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
bogdanm 92:4fc01daae5a5 537 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
bogdanm 92:4fc01daae5a5 538 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
bogdanm 92:4fc01daae5a5 539 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
bogdanm 92:4fc01daae5a5 540 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
bogdanm 92:4fc01daae5a5 541 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
bogdanm 92:4fc01daae5a5 542 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
bogdanm 92:4fc01daae5a5 543 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
bogdanm 92:4fc01daae5a5 544 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode
bogdanm 92:4fc01daae5a5 545 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
bogdanm 92:4fc01daae5a5 546 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
bogdanm 92:4fc01daae5a5 547 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
bogdanm 92:4fc01daae5a5 548 * @retval None
bogdanm 92:4fc01daae5a5 549 */
bogdanm 92:4fc01daae5a5 550 #define __HAL_SD_SDIO_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
bogdanm 92:4fc01daae5a5 551
bogdanm 92:4fc01daae5a5 552 /**
bogdanm 92:4fc01daae5a5 553 * @brief Check whether the specified SD interrupt has occurred or not.
bogdanm 92:4fc01daae5a5 554 * @param __HANDLE__: SD Handle
bogdanm 92:4fc01daae5a5 555 * @param __INTERRUPT__: specifies the SDIO interrupt source to check.
bogdanm 92:4fc01daae5a5 556 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 557 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 92:4fc01daae5a5 558 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 92:4fc01daae5a5 559 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 92:4fc01daae5a5 560 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 92:4fc01daae5a5 561 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 92:4fc01daae5a5 562 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 92:4fc01daae5a5 563 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 92:4fc01daae5a5 564 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 92:4fc01daae5a5 565 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 92:4fc01daae5a5 566 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 92:4fc01daae5a5 567 * bus mode interrupt
bogdanm 92:4fc01daae5a5 568 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 92:4fc01daae5a5 569 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 92:4fc01daae5a5 570 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 92:4fc01daae5a5 571 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 92:4fc01daae5a5 572 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 92:4fc01daae5a5 573 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 92:4fc01daae5a5 574 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 92:4fc01daae5a5 575 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 92:4fc01daae5a5 576 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 92:4fc01daae5a5 577 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 92:4fc01daae5a5 578 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 92:4fc01daae5a5 579 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
bogdanm 92:4fc01daae5a5 580 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 92:4fc01daae5a5 581 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
bogdanm 92:4fc01daae5a5 582 * @retval The new state of SD IT (SET or RESET).
bogdanm 92:4fc01daae5a5 583 */
bogdanm 92:4fc01daae5a5 584 #define __HAL_SD_SDIO_GET_IT (__HANDLE__, __INTERRUPT__) __SDIO_GET_IT ((__HANDLE__)->Instance, __INTERRUPT__)
bogdanm 92:4fc01daae5a5 585
bogdanm 92:4fc01daae5a5 586 /**
bogdanm 92:4fc01daae5a5 587 * @brief Clear the SD's interrupt pending bits.
bogdanm 92:4fc01daae5a5 588 * @param __HANDLE__ : SD Handle
bogdanm 92:4fc01daae5a5 589 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
bogdanm 92:4fc01daae5a5 590 * This parameter can be one or a combination of the following values:
bogdanm 92:4fc01daae5a5 591 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 92:4fc01daae5a5 592 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 92:4fc01daae5a5 593 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 92:4fc01daae5a5 594 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 92:4fc01daae5a5 595 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 92:4fc01daae5a5 596 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 92:4fc01daae5a5 597 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 92:4fc01daae5a5 598 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 92:4fc01daae5a5 599 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt
bogdanm 92:4fc01daae5a5 600 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 92:4fc01daae5a5 601 * bus mode interrupt
bogdanm 92:4fc01daae5a5 602 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 92:4fc01daae5a5 603 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61
bogdanm 92:4fc01daae5a5 604 * @retval None
bogdanm 92:4fc01daae5a5 605 */
bogdanm 92:4fc01daae5a5 606 #define __HAL_SD_SDIO_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
bogdanm 92:4fc01daae5a5 607 /**
bogdanm 92:4fc01daae5a5 608 * @}
bogdanm 92:4fc01daae5a5 609 */
bogdanm 92:4fc01daae5a5 610
bogdanm 92:4fc01daae5a5 611 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 612 /** @addtogroup SD_Exported_Functions
bogdanm 92:4fc01daae5a5 613 * @{
bogdanm 92:4fc01daae5a5 614 */
bogdanm 92:4fc01daae5a5 615
bogdanm 92:4fc01daae5a5 616 /* Initialization/de-initialization functions ********************************/
bogdanm 92:4fc01daae5a5 617 /** @addtogroup SD_Group1
bogdanm 92:4fc01daae5a5 618 * @{
bogdanm 92:4fc01daae5a5 619 */
bogdanm 92:4fc01daae5a5 620 HAL_SD_ErrorTypedef HAL_SD_Init(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *SDCardInfo);
bogdanm 92:4fc01daae5a5 621 HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 622 void HAL_SD_MspInit(SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 623 void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 624 /**
bogdanm 92:4fc01daae5a5 625 * @}
bogdanm 92:4fc01daae5a5 626 */
bogdanm 92:4fc01daae5a5 627
bogdanm 92:4fc01daae5a5 628 /* I/O operation functions ***************************************************/
bogdanm 92:4fc01daae5a5 629 /** @addtogroup SD_Group2
bogdanm 92:4fc01daae5a5 630 * @{
bogdanm 92:4fc01daae5a5 631 */
bogdanm 92:4fc01daae5a5 632 /* Blocking mode: Polling */
bogdanm 92:4fc01daae5a5 633 HAL_SD_ErrorTypedef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
bogdanm 92:4fc01daae5a5 634 HAL_SD_ErrorTypedef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
bogdanm 92:4fc01daae5a5 635 HAL_SD_ErrorTypedef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint64_t startaddr, uint64_t endaddr);
bogdanm 92:4fc01daae5a5 636
bogdanm 92:4fc01daae5a5 637 /* Non-Blocking mode: Interrupt */
bogdanm 92:4fc01daae5a5 638 void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 639
bogdanm 92:4fc01daae5a5 640 /* Callback in non blocking modes (DMA) */
bogdanm 92:4fc01daae5a5 641 void HAL_SD_DMA_RxCpltCallback(DMA_HandleTypeDef *hdma);
bogdanm 92:4fc01daae5a5 642 void HAL_SD_DMA_RxErrorCallback(DMA_HandleTypeDef *hdma);
bogdanm 92:4fc01daae5a5 643 void HAL_SD_DMA_TxCpltCallback(DMA_HandleTypeDef *hdma);
bogdanm 92:4fc01daae5a5 644 void HAL_SD_DMA_TxErrorCallback(DMA_HandleTypeDef *hdma);
bogdanm 92:4fc01daae5a5 645 void HAL_SD_XferCpltCallback(SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 646 void HAL_SD_XferErrorCallback(SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 647
bogdanm 92:4fc01daae5a5 648 /* Non-Blocking mode: DMA */
bogdanm 92:4fc01daae5a5 649 HAL_SD_ErrorTypedef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
bogdanm 92:4fc01daae5a5 650 HAL_SD_ErrorTypedef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
bogdanm 92:4fc01daae5a5 651 HAL_SD_ErrorTypedef HAL_SD_CheckWriteOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 652 HAL_SD_ErrorTypedef HAL_SD_CheckReadOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 653 /**
bogdanm 92:4fc01daae5a5 654 * @}
bogdanm 92:4fc01daae5a5 655 */
bogdanm 92:4fc01daae5a5 656
bogdanm 92:4fc01daae5a5 657 /* Peripheral Control functions **********************************************/
bogdanm 92:4fc01daae5a5 658 /** @addtogroup SD_Group3
bogdanm 92:4fc01daae5a5 659 * @{
bogdanm 92:4fc01daae5a5 660 */
bogdanm 92:4fc01daae5a5 661 HAL_SD_ErrorTypedef HAL_SD_Get_CardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *pCardInfo);
bogdanm 92:4fc01daae5a5 662 HAL_SD_ErrorTypedef HAL_SD_WideBusOperation_Config(SD_HandleTypeDef *hsd, uint32_t WideMode);
bogdanm 92:4fc01daae5a5 663 HAL_SD_ErrorTypedef HAL_SD_StopTransfer(SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 664 HAL_SD_ErrorTypedef HAL_SD_HighSpeed (SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 665 /**
bogdanm 92:4fc01daae5a5 666 * @}
bogdanm 92:4fc01daae5a5 667 */
bogdanm 92:4fc01daae5a5 668
bogdanm 92:4fc01daae5a5 669 /* Peripheral State functions ************************************************/
bogdanm 92:4fc01daae5a5 670 /** @addtogroup SD_Group4
bogdanm 92:4fc01daae5a5 671 * @{
bogdanm 92:4fc01daae5a5 672 */
bogdanm 92:4fc01daae5a5 673 HAL_SD_ErrorTypedef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus);
bogdanm 92:4fc01daae5a5 674 HAL_SD_ErrorTypedef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypedef *pCardStatus);
bogdanm 92:4fc01daae5a5 675 HAL_SD_TransferStateTypedef HAL_SD_GetStatus(SD_HandleTypeDef *hsd);
bogdanm 92:4fc01daae5a5 676 /**
bogdanm 92:4fc01daae5a5 677 * @}
bogdanm 92:4fc01daae5a5 678 */
bogdanm 92:4fc01daae5a5 679
bogdanm 92:4fc01daae5a5 680 /**
bogdanm 92:4fc01daae5a5 681 * @}
bogdanm 92:4fc01daae5a5 682 */
bogdanm 92:4fc01daae5a5 683
bogdanm 92:4fc01daae5a5 684 /**
bogdanm 92:4fc01daae5a5 685 * @}
bogdanm 92:4fc01daae5a5 686 */
bogdanm 92:4fc01daae5a5 687
bogdanm 92:4fc01daae5a5 688 /**
bogdanm 92:4fc01daae5a5 689 * @}
bogdanm 92:4fc01daae5a5 690 */
bogdanm 92:4fc01daae5a5 691
bogdanm 92:4fc01daae5a5 692 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 693 }
bogdanm 92:4fc01daae5a5 694 #endif
bogdanm 92:4fc01daae5a5 695
bogdanm 92:4fc01daae5a5 696
bogdanm 92:4fc01daae5a5 697 #endif /* __STM32F4xx_HAL_SD_H */
bogdanm 92:4fc01daae5a5 698
bogdanm 92:4fc01daae5a5 699 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/