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TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_irda.h@118:16969dd821af, 2016-04-05 (annotated)

Committer:
ricardobtez
Date:
Tue Apr 05 23:51:21 2016 +0000
Revision:
118:16969dd821af
Parent:
92:4fc01daae5a5
Child:
99:dbbf35b96557
dgdgr

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bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_irda.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 19-June-2014
bogdanm 92:4fc01daae5a5 7 * @brief Header file of IRDA HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
bogdanm 92:4fc01daae5a5 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_IRDA_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_IRDA_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 47 #include "stm32f4xx_hal_def.h"
bogdanm 92:4fc01daae5a5 48
bogdanm 92:4fc01daae5a5 49 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 50 * @{
bogdanm 92:4fc01daae5a5 51 */
bogdanm 92:4fc01daae5a5 52
bogdanm 92:4fc01daae5a5 53 /** @addtogroup IRDA
bogdanm 92:4fc01daae5a5 54 * @{
bogdanm 92:4fc01daae5a5 55 */
bogdanm 92:4fc01daae5a5 56
bogdanm 92:4fc01daae5a5 57 /* Exported types ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 58
bogdanm 92:4fc01daae5a5 59 /**
bogdanm 92:4fc01daae5a5 60 * @brief IRDA Init Structure definition
bogdanm 92:4fc01daae5a5 61 */
bogdanm 92:4fc01daae5a5 62 typedef struct
bogdanm 92:4fc01daae5a5 63 {
bogdanm 92:4fc01daae5a5 64 uint32_t BaudRate; /*!< This member configures the IRDA communication baud rate.
bogdanm 92:4fc01daae5a5 65 The baud rate is computed using the following formula:
bogdanm 92:4fc01daae5a5 66 - IntegerDivider = ((PCLKx) / (8 * (hirda->Init.BaudRate)))
bogdanm 92:4fc01daae5a5 67 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8) + 0.5 */
bogdanm 92:4fc01daae5a5 68
bogdanm 92:4fc01daae5a5 69 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
bogdanm 92:4fc01daae5a5 70 This parameter can be a value of @ref IRDA_Word_Length */
bogdanm 92:4fc01daae5a5 71
bogdanm 92:4fc01daae5a5 72
bogdanm 92:4fc01daae5a5 73 uint32_t Parity; /*!< Specifies the parity mode.
bogdanm 92:4fc01daae5a5 74 This parameter can be a value of @ref IRDA_Parity
bogdanm 92:4fc01daae5a5 75 @note When parity is enabled, the computed parity is inserted
bogdanm 92:4fc01daae5a5 76 at the MSB position of the transmitted data (9th bit when
bogdanm 92:4fc01daae5a5 77 the word length is set to 9 data bits; 8th bit when the
bogdanm 92:4fc01daae5a5 78 word length is set to 8 data bits). */
bogdanm 92:4fc01daae5a5 79
bogdanm 92:4fc01daae5a5 80 uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
bogdanm 92:4fc01daae5a5 81 This parameter can be a value of @ref IRDA_Mode */
bogdanm 92:4fc01daae5a5 82
bogdanm 92:4fc01daae5a5 83 uint8_t Prescaler; /*!< Specifies the Prescaler */
bogdanm 92:4fc01daae5a5 84
bogdanm 92:4fc01daae5a5 85 uint32_t IrDAMode; /*!< Specifies the IrDA mode
bogdanm 92:4fc01daae5a5 86 This parameter can be a value of @ref IrDA_Low_Power */
bogdanm 92:4fc01daae5a5 87 }IRDA_InitTypeDef;
bogdanm 92:4fc01daae5a5 88
bogdanm 92:4fc01daae5a5 89 /**
bogdanm 92:4fc01daae5a5 90 * @brief HAL State structures definition
bogdanm 92:4fc01daae5a5 91 */
bogdanm 92:4fc01daae5a5 92 typedef enum
bogdanm 92:4fc01daae5a5 93 {
bogdanm 92:4fc01daae5a5 94 HAL_IRDA_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */
bogdanm 92:4fc01daae5a5 95 HAL_IRDA_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
bogdanm 92:4fc01daae5a5 96 HAL_IRDA_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
bogdanm 92:4fc01daae5a5 97 HAL_IRDA_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
bogdanm 92:4fc01daae5a5 98 HAL_IRDA_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
bogdanm 92:4fc01daae5a5 99 HAL_IRDA_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
bogdanm 92:4fc01daae5a5 100 HAL_IRDA_STATE_TIMEOUT = 0x03, /*!< Timeout state */
bogdanm 92:4fc01daae5a5 101 HAL_IRDA_STATE_ERROR = 0x04 /*!< Error */
bogdanm 92:4fc01daae5a5 102 }HAL_IRDA_StateTypeDef;
bogdanm 92:4fc01daae5a5 103
bogdanm 92:4fc01daae5a5 104 /**
bogdanm 92:4fc01daae5a5 105 * @brief HAL IRDA Error Code structure definition
bogdanm 92:4fc01daae5a5 106 */
bogdanm 92:4fc01daae5a5 107 typedef enum
bogdanm 92:4fc01daae5a5 108 {
bogdanm 92:4fc01daae5a5 109 HAL_IRDA_ERROR_NONE = 0x00, /*!< No error */
bogdanm 92:4fc01daae5a5 110 HAL_IRDA_ERROR_PE = 0x01, /*!< Parity error */
bogdanm 92:4fc01daae5a5 111 HAL_IRDA_ERROR_NE = 0x02, /*!< Noise error */
bogdanm 92:4fc01daae5a5 112 HAL_IRDA_ERROR_FE = 0x04, /*!< frame error */
bogdanm 92:4fc01daae5a5 113 HAL_IRDA_ERROR_ORE = 0x08, /*!< Overrun error */
bogdanm 92:4fc01daae5a5 114 HAL_IRDA_ERROR_DMA = 0x10 /*!< DMA transfer error */
bogdanm 92:4fc01daae5a5 115 }HAL_IRDA_ErrorTypeDef;
bogdanm 92:4fc01daae5a5 116
bogdanm 92:4fc01daae5a5 117 /**
bogdanm 92:4fc01daae5a5 118 * @brief IRDA handle Structure definition
bogdanm 92:4fc01daae5a5 119 */
bogdanm 92:4fc01daae5a5 120 typedef struct
bogdanm 92:4fc01daae5a5 121 {
bogdanm 92:4fc01daae5a5 122 USART_TypeDef *Instance; /* USART registers base address */
bogdanm 92:4fc01daae5a5 123
bogdanm 92:4fc01daae5a5 124 IRDA_InitTypeDef Init; /* IRDA communication parameters */
bogdanm 92:4fc01daae5a5 125
bogdanm 92:4fc01daae5a5 126 uint8_t *pTxBuffPtr; /* Pointer to IRDA Tx transfer Buffer */
bogdanm 92:4fc01daae5a5 127
bogdanm 92:4fc01daae5a5 128 uint16_t TxXferSize; /* IRDA Tx Transfer size */
bogdanm 92:4fc01daae5a5 129
bogdanm 92:4fc01daae5a5 130 uint16_t TxXferCount; /* IRDA Tx Transfer Counter */
bogdanm 92:4fc01daae5a5 131
bogdanm 92:4fc01daae5a5 132 uint8_t *pRxBuffPtr; /* Pointer to IRDA Rx transfer Buffer */
bogdanm 92:4fc01daae5a5 133
bogdanm 92:4fc01daae5a5 134 uint16_t RxXferSize; /* IRDA Rx Transfer size */
bogdanm 92:4fc01daae5a5 135
bogdanm 92:4fc01daae5a5 136 uint16_t RxXferCount; /* IRDA Rx Transfer Counter */
bogdanm 92:4fc01daae5a5 137
bogdanm 92:4fc01daae5a5 138 DMA_HandleTypeDef *hdmatx; /* IRDA Tx DMA Handle parameters */
bogdanm 92:4fc01daae5a5 139
bogdanm 92:4fc01daae5a5 140 DMA_HandleTypeDef *hdmarx; /* IRDA Rx DMA Handle parameters */
bogdanm 92:4fc01daae5a5 141
bogdanm 92:4fc01daae5a5 142 HAL_LockTypeDef Lock; /* Locking object */
bogdanm 92:4fc01daae5a5 143
bogdanm 92:4fc01daae5a5 144 __IO HAL_IRDA_StateTypeDef State; /* IRDA communication state */
bogdanm 92:4fc01daae5a5 145
bogdanm 92:4fc01daae5a5 146 __IO HAL_IRDA_ErrorTypeDef ErrorCode; /* IRDA Error code */
bogdanm 92:4fc01daae5a5 147
bogdanm 92:4fc01daae5a5 148 }IRDA_HandleTypeDef;
bogdanm 92:4fc01daae5a5 149
bogdanm 92:4fc01daae5a5 150 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 151 /** @defgroup IRDA_Exported_Constants
bogdanm 92:4fc01daae5a5 152 * @{
bogdanm 92:4fc01daae5a5 153 */
bogdanm 92:4fc01daae5a5 154
bogdanm 92:4fc01daae5a5 155 /** @defgroup IRDA_Word_Length
bogdanm 92:4fc01daae5a5 156 * @{
bogdanm 92:4fc01daae5a5 157 */
bogdanm 92:4fc01daae5a5 158 #define IRDA_WORDLENGTH_8B ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 159 #define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
bogdanm 92:4fc01daae5a5 160 #define IS_IRDA_WORD_LENGTH(LENGTH) (((LENGTH) == IRDA_WORDLENGTH_8B) || \
bogdanm 92:4fc01daae5a5 161 ((LENGTH) == IRDA_WORDLENGTH_9B))
bogdanm 92:4fc01daae5a5 162 /**
bogdanm 92:4fc01daae5a5 163 * @}
bogdanm 92:4fc01daae5a5 164 */
bogdanm 92:4fc01daae5a5 165
bogdanm 92:4fc01daae5a5 166
bogdanm 92:4fc01daae5a5 167 /** @defgroup IRDA_Parity
bogdanm 92:4fc01daae5a5 168 * @{
bogdanm 92:4fc01daae5a5 169 */
bogdanm 92:4fc01daae5a5 170 #define IRDA_PARITY_NONE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 171 #define IRDA_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
bogdanm 92:4fc01daae5a5 172 #define IRDA_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
bogdanm 92:4fc01daae5a5 173 #define IS_IRDA_PARITY(PARITY) (((PARITY) == IRDA_PARITY_NONE) || \
bogdanm 92:4fc01daae5a5 174 ((PARITY) == IRDA_PARITY_EVEN) || \
bogdanm 92:4fc01daae5a5 175 ((PARITY) == IRDA_PARITY_ODD))
bogdanm 92:4fc01daae5a5 176 /**
bogdanm 92:4fc01daae5a5 177 * @}
bogdanm 92:4fc01daae5a5 178 */
bogdanm 92:4fc01daae5a5 179
bogdanm 92:4fc01daae5a5 180
bogdanm 92:4fc01daae5a5 181 /** @defgroup IRDA_Mode
bogdanm 92:4fc01daae5a5 182 * @{
bogdanm 92:4fc01daae5a5 183 */
bogdanm 92:4fc01daae5a5 184 #define IRDA_MODE_RX ((uint32_t)USART_CR1_RE)
bogdanm 92:4fc01daae5a5 185 #define IRDA_MODE_TX ((uint32_t)USART_CR1_TE)
bogdanm 92:4fc01daae5a5 186 #define IRDA_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
bogdanm 92:4fc01daae5a5 187 #define IS_IRDA_MODE(MODE) ((((MODE) & (uint32_t)0x0000FFF3) == 0x00) && ((MODE) != (uint32_t)0x000000))
bogdanm 92:4fc01daae5a5 188 /**
bogdanm 92:4fc01daae5a5 189 * @}
bogdanm 92:4fc01daae5a5 190 */
bogdanm 92:4fc01daae5a5 191
bogdanm 92:4fc01daae5a5 192 /** @defgroup IrDA_Low_Power
bogdanm 92:4fc01daae5a5 193 * @{
bogdanm 92:4fc01daae5a5 194 */
bogdanm 92:4fc01daae5a5 195 #define IRDA_POWERMODE_LOWPOWER ((uint32_t)USART_CR3_IRLP)
bogdanm 92:4fc01daae5a5 196 #define IRDA_POWERMODE_NORMAL ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 197 #define IS_IRDA_POWERMODE(MODE) (((MODE) == IRDA_POWERMODE_LOWPOWER) || \
bogdanm 92:4fc01daae5a5 198 ((MODE) == IRDA_POWERMODE_NORMAL))
bogdanm 92:4fc01daae5a5 199 /**
bogdanm 92:4fc01daae5a5 200 * @}
bogdanm 92:4fc01daae5a5 201 */
bogdanm 92:4fc01daae5a5 202
bogdanm 92:4fc01daae5a5 203 /** @defgroup IRDA_Flags
bogdanm 92:4fc01daae5a5 204 * Elements values convention: 0xXXXX
bogdanm 92:4fc01daae5a5 205 * - 0xXXXX : Flag mask in the SR register
bogdanm 92:4fc01daae5a5 206 * @{
bogdanm 92:4fc01daae5a5 207 */
bogdanm 92:4fc01daae5a5 208 #define IRDA_FLAG_TXE ((uint32_t)0x00000080)
bogdanm 92:4fc01daae5a5 209 #define IRDA_FLAG_TC ((uint32_t)0x00000040)
bogdanm 92:4fc01daae5a5 210 #define IRDA_FLAG_RXNE ((uint32_t)0x00000020)
bogdanm 92:4fc01daae5a5 211 #define IRDA_FLAG_IDLE ((uint32_t)0x00000010)
bogdanm 92:4fc01daae5a5 212 #define IRDA_FLAG_ORE ((uint32_t)0x00000008)
bogdanm 92:4fc01daae5a5 213 #define IRDA_FLAG_NE ((uint32_t)0x00000004)
bogdanm 92:4fc01daae5a5 214 #define IRDA_FLAG_FE ((uint32_t)0x00000002)
bogdanm 92:4fc01daae5a5 215 #define IRDA_FLAG_PE ((uint32_t)0x00000001)
bogdanm 92:4fc01daae5a5 216 /**
bogdanm 92:4fc01daae5a5 217 * @}
bogdanm 92:4fc01daae5a5 218 */
bogdanm 92:4fc01daae5a5 219
bogdanm 92:4fc01daae5a5 220 /** @defgroup IRDA_Interrupt_definition
bogdanm 92:4fc01daae5a5 221 * Elements values convention: 0xY000XXXX
bogdanm 92:4fc01daae5a5 222 * - XXXX : Interrupt mask in the XX register
bogdanm 92:4fc01daae5a5 223 * - Y : Interrupt source register (2bits)
bogdanm 92:4fc01daae5a5 224 * - 01: CR1 register
bogdanm 92:4fc01daae5a5 225 * - 10: CR2 register
bogdanm 92:4fc01daae5a5 226 * - 11: CR3 register
bogdanm 92:4fc01daae5a5 227 *
bogdanm 92:4fc01daae5a5 228 * @{
bogdanm 92:4fc01daae5a5 229 */
bogdanm 92:4fc01daae5a5 230
bogdanm 92:4fc01daae5a5 231 #define IRDA_IT_PE ((uint32_t)0x10000100)
bogdanm 92:4fc01daae5a5 232 #define IRDA_IT_TXE ((uint32_t)0x10000080)
bogdanm 92:4fc01daae5a5 233 #define IRDA_IT_TC ((uint32_t)0x10000040)
bogdanm 92:4fc01daae5a5 234 #define IRDA_IT_RXNE ((uint32_t)0x10000020)
bogdanm 92:4fc01daae5a5 235 #define IRDA_IT_IDLE ((uint32_t)0x10000010)
bogdanm 92:4fc01daae5a5 236
bogdanm 92:4fc01daae5a5 237 #define IRDA_IT_LBD ((uint32_t)0x20000040)
bogdanm 92:4fc01daae5a5 238
bogdanm 92:4fc01daae5a5 239 #define IRDA_IT_CTS ((uint32_t)0x30000400)
bogdanm 92:4fc01daae5a5 240 #define IRDA_IT_ERR ((uint32_t)0x30000001)
bogdanm 92:4fc01daae5a5 241
bogdanm 92:4fc01daae5a5 242 /**
bogdanm 92:4fc01daae5a5 243 * @}
bogdanm 92:4fc01daae5a5 244 */
bogdanm 92:4fc01daae5a5 245
bogdanm 92:4fc01daae5a5 246 /**
bogdanm 92:4fc01daae5a5 247 * @}
bogdanm 92:4fc01daae5a5 248 */
bogdanm 92:4fc01daae5a5 249
bogdanm 92:4fc01daae5a5 250 /* Exported macro ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 251
bogdanm 92:4fc01daae5a5 252 /** @brief Reset IRDA handle state
bogdanm 92:4fc01daae5a5 253 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 254 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 255 * UART peripheral.
bogdanm 92:4fc01daae5a5 256 * @retval None
bogdanm 92:4fc01daae5a5 257 */
bogdanm 92:4fc01daae5a5 258 #define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IRDA_STATE_RESET)
bogdanm 92:4fc01daae5a5 259
bogdanm 92:4fc01daae5a5 260 /** @brief Flushs the IRDA DR register
bogdanm 92:4fc01daae5a5 261 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 262 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 263 * UART peripheral.
bogdanm 92:4fc01daae5a5 264 */
bogdanm 92:4fc01daae5a5 265 #define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
bogdanm 92:4fc01daae5a5 266
bogdanm 92:4fc01daae5a5 267 /** @brief Checks whether the specified IRDA flag is set or not.
bogdanm 92:4fc01daae5a5 268 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 269 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 270 * UART peripheral.
bogdanm 92:4fc01daae5a5 271 * @param __FLAG__: specifies the flag to check.
bogdanm 92:4fc01daae5a5 272 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 273 * @arg IRDA_FLAG_TXE: Transmit data register empty flag
bogdanm 92:4fc01daae5a5 274 * @arg IRDA_FLAG_TC: Transmission Complete flag
bogdanm 92:4fc01daae5a5 275 * @arg IRDA_FLAG_RXNE: Receive data register not empty flag
bogdanm 92:4fc01daae5a5 276 * @arg IRDA_FLAG_IDLE: Idle Line detection flag
bogdanm 92:4fc01daae5a5 277 * @arg IRDA_FLAG_ORE: OverRun Error flag
bogdanm 92:4fc01daae5a5 278 * @arg IRDA_FLAG_NE: Noise Error flag
bogdanm 92:4fc01daae5a5 279 * @arg IRDA_FLAG_FE: Framing Error flag
bogdanm 92:4fc01daae5a5 280 * @arg IRDA_FLAG_PE: Parity Error flag
bogdanm 92:4fc01daae5a5 281 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 92:4fc01daae5a5 282 */
bogdanm 92:4fc01daae5a5 283 #define __HAL_IRDA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
bogdanm 92:4fc01daae5a5 284
bogdanm 92:4fc01daae5a5 285 /** @brief Clears the specified IRDA pending flag.
bogdanm 92:4fc01daae5a5 286 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 287 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 288 * UART peripheral.
bogdanm 92:4fc01daae5a5 289 * @param __FLAG__: specifies the flag to check.
bogdanm 92:4fc01daae5a5 290 * This parameter can be any combination of the following values:
bogdanm 92:4fc01daae5a5 291 * @arg IRDA_FLAG_TC: Transmission Complete flag.
bogdanm 92:4fc01daae5a5 292 * @arg IRDA_FLAG_RXNE: Receive data register not empty flag.
bogdanm 92:4fc01daae5a5 293 *
bogdanm 92:4fc01daae5a5 294 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
bogdanm 92:4fc01daae5a5 295 * error) and IDLE (Idle line detected) flags are cleared by software
bogdanm 92:4fc01daae5a5 296 * sequence: a read operation to USART_SR register followed by a read
bogdanm 92:4fc01daae5a5 297 * operation to USART_DR register.
bogdanm 92:4fc01daae5a5 298 * @note RXNE flag can be also cleared by a read to the USART_DR register.
bogdanm 92:4fc01daae5a5 299 * @note TC flag can be also cleared by software sequence: a read operation to
bogdanm 92:4fc01daae5a5 300 * USART_SR register followed by a write operation to USART_DR register.
bogdanm 92:4fc01daae5a5 301 * @note TXE flag is cleared only by a write to the USART_DR register.
bogdanm 92:4fc01daae5a5 302 *
bogdanm 92:4fc01daae5a5 303 * @retval None
bogdanm 92:4fc01daae5a5 304 */
bogdanm 92:4fc01daae5a5 305 #define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
bogdanm 92:4fc01daae5a5 306
bogdanm 92:4fc01daae5a5 307 /** @brief Clear the IRDA PE pending flag.
bogdanm 92:4fc01daae5a5 308 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 309 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 310 * UART peripheral.
bogdanm 92:4fc01daae5a5 311 * @retval None
bogdanm 92:4fc01daae5a5 312 */
bogdanm 92:4fc01daae5a5 313 #define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) do{(__HANDLE__)->Instance->SR;\
bogdanm 92:4fc01daae5a5 314 (__HANDLE__)->Instance->DR;}while(0)
bogdanm 92:4fc01daae5a5 315 /** @brief Clear the IRDA FE pending flag.
bogdanm 92:4fc01daae5a5 316 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 317 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 318 * UART peripheral.
bogdanm 92:4fc01daae5a5 319 * @retval None
bogdanm 92:4fc01daae5a5 320 */
bogdanm 92:4fc01daae5a5 321 #define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
bogdanm 92:4fc01daae5a5 322
bogdanm 92:4fc01daae5a5 323 /** @brief Clear the IRDA NE pending flag.
bogdanm 92:4fc01daae5a5 324 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 325 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 326 * UART peripheral.
bogdanm 92:4fc01daae5a5 327 * @retval None
bogdanm 92:4fc01daae5a5 328 */
bogdanm 92:4fc01daae5a5 329 #define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
bogdanm 92:4fc01daae5a5 330
bogdanm 92:4fc01daae5a5 331 /** @brief Clear the IRDA ORE pending flag.
bogdanm 92:4fc01daae5a5 332 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 333 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 334 * UART peripheral.
bogdanm 92:4fc01daae5a5 335 * @retval None
bogdanm 92:4fc01daae5a5 336 */
bogdanm 92:4fc01daae5a5 337 #define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
bogdanm 92:4fc01daae5a5 338
bogdanm 92:4fc01daae5a5 339 /** @brief Clear the IRDA IDLE pending flag.
bogdanm 92:4fc01daae5a5 340 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 341 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 342 * UART peripheral.
bogdanm 92:4fc01daae5a5 343 * @retval None
bogdanm 92:4fc01daae5a5 344 */
bogdanm 92:4fc01daae5a5 345 #define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
bogdanm 92:4fc01daae5a5 346
bogdanm 92:4fc01daae5a5 347 /** @brief Enables or disables the specified IRDA interrupt.
bogdanm 92:4fc01daae5a5 348 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 349 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 350 * UART peripheral.
bogdanm 92:4fc01daae5a5 351 * @param __INTERRUPT__: specifies the IRDA interrupt source to check.
bogdanm 92:4fc01daae5a5 352 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 353 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
bogdanm 92:4fc01daae5a5 354 * @arg IRDA_IT_TC: Transmission complete interrupt
bogdanm 92:4fc01daae5a5 355 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
bogdanm 92:4fc01daae5a5 356 * @arg IRDA_IT_IDLE: Idle line detection interrupt
bogdanm 92:4fc01daae5a5 357 * @arg IRDA_IT_PE: Parity Error interrupt
bogdanm 92:4fc01daae5a5 358 * @arg IRDA_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
bogdanm 92:4fc01daae5a5 359 * @param NewState: new state of the specified IRDA interrupt.
bogdanm 92:4fc01daae5a5 360 * This parameter can be: ENABLE or DISABLE.
bogdanm 92:4fc01daae5a5 361 * @retval None
bogdanm 92:4fc01daae5a5 362 */
bogdanm 92:4fc01daae5a5 363 #define IRDA_IT_MASK ((uint32_t)0x0000FFFF)
bogdanm 92:4fc01daae5a5 364 #define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & IRDA_IT_MASK)): \
bogdanm 92:4fc01daae5a5 365 (((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & IRDA_IT_MASK)): \
bogdanm 92:4fc01daae5a5 366 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & IRDA_IT_MASK)))
bogdanm 92:4fc01daae5a5 367 #define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \
bogdanm 92:4fc01daae5a5 368 (((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \
bogdanm 92:4fc01daae5a5 369 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & IRDA_IT_MASK)))
bogdanm 92:4fc01daae5a5 370
bogdanm 92:4fc01daae5a5 371 /** @brief Checks whether the specified IRDA interrupt has occurred or not.
bogdanm 92:4fc01daae5a5 372 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 373 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 374 * UART peripheral.
bogdanm 92:4fc01daae5a5 375 * @param __IT__: specifies the IRDA interrupt source to check.
bogdanm 92:4fc01daae5a5 376 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 377 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
bogdanm 92:4fc01daae5a5 378 * @arg IRDA_IT_TC: Transmission complete interrupt
bogdanm 92:4fc01daae5a5 379 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
bogdanm 92:4fc01daae5a5 380 * @arg IRDA_IT_IDLE: Idle line detection interrupt
bogdanm 92:4fc01daae5a5 381 * @arg USART_IT_ERR: Error interrupt
bogdanm 92:4fc01daae5a5 382 * @arg IRDA_IT_PE: Parity Error interrupt
bogdanm 92:4fc01daae5a5 383 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 92:4fc01daae5a5 384 */
bogdanm 92:4fc01daae5a5 385 #define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28) == 1)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28) == 2)? \
bogdanm 92:4fc01daae5a5 386 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & IRDA_IT_MASK))
bogdanm 92:4fc01daae5a5 387
bogdanm 92:4fc01daae5a5 388
bogdanm 92:4fc01daae5a5 389
bogdanm 92:4fc01daae5a5 390 #define __IRDA_ENABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
bogdanm 92:4fc01daae5a5 391 #define __IRDA_DISABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
bogdanm 92:4fc01daae5a5 392
bogdanm 92:4fc01daae5a5 393 #define __DIV(_PCLK_, _BAUD_) (((_PCLK_)*25)/(4*(_BAUD_)))
bogdanm 92:4fc01daae5a5 394 #define __DIVMANT(_PCLK_, _BAUD_) (__DIV((_PCLK_), (_BAUD_))/100)
bogdanm 92:4fc01daae5a5 395 #define __DIVFRAQ(_PCLK_, _BAUD_) (((__DIV((_PCLK_), (_BAUD_)) - (__DIVMANT((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100)
bogdanm 92:4fc01daae5a5 396 #define __IRDA_BRR(_PCLK_, _BAUD_) ((__DIVMANT((_PCLK_), (_BAUD_)) << 4)|(__DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0F))
bogdanm 92:4fc01daae5a5 397
bogdanm 92:4fc01daae5a5 398 #define IS_IRDA_BAUDRATE(BAUDRATE) ((BAUDRATE) < 115201)
bogdanm 92:4fc01daae5a5 399
bogdanm 92:4fc01daae5a5 400
bogdanm 92:4fc01daae5a5 401 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 402 /* Initialization/de-initialization functions **********************************/
bogdanm 92:4fc01daae5a5 403 HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 404 HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 405 void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 406 void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 407
bogdanm 92:4fc01daae5a5 408 /* IO operation functions *******************************************************/
bogdanm 92:4fc01daae5a5 409 HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 410 HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 411 HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 412 HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 413 HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 414 HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 415 HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 416 HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 417 HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 418 void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 419 void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 420 void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 421 void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 422 void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 423 void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 424
bogdanm 92:4fc01daae5a5 425 /* Peripheral State functions **************************************************/
bogdanm 92:4fc01daae5a5 426 HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 427 uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 428
bogdanm 92:4fc01daae5a5 429 /**
bogdanm 92:4fc01daae5a5 430 * @}
bogdanm 92:4fc01daae5a5 431 */
bogdanm 92:4fc01daae5a5 432
bogdanm 92:4fc01daae5a5 433 /**
bogdanm 92:4fc01daae5a5 434 * @}
bogdanm 92:4fc01daae5a5 435 */
bogdanm 92:4fc01daae5a5 436
bogdanm 92:4fc01daae5a5 437 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 438 }
bogdanm 92:4fc01daae5a5 439 #endif
bogdanm 92:4fc01daae5a5 440
bogdanm 92:4fc01daae5a5 441 #endif /* __STM32F4xx_HAL_IRDA_H */
bogdanm 92:4fc01daae5a5 442
bogdanm 92:4fc01daae5a5 443 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/