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TARGET_LPC4088/core_cmInstr.h@118:16969dd821af, 2016-04-05 (annotated)

Committer:
ricardobtez
Date:
Tue Apr 05 23:51:21 2016 +0000
Revision:
118:16969dd821af
Parent:
65:5798e58a58b1
Child:
110:165afa46840b
dgdgr

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bogdanm 65:5798e58a58b1 1 /**************************************************************************//**
bogdanm 65:5798e58a58b1 2 * @file core_cmInstr.h
bogdanm 65:5798e58a58b1 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
bogdanm 65:5798e58a58b1 4 * @version V3.20
bogdanm 65:5798e58a58b1 5 * @date 05. March 2013
bogdanm 65:5798e58a58b1 6 *
bogdanm 65:5798e58a58b1 7 * @note
bogdanm 65:5798e58a58b1 8 *
bogdanm 65:5798e58a58b1 9 ******************************************************************************/
bogdanm 65:5798e58a58b1 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 65:5798e58a58b1 11
bogdanm 65:5798e58a58b1 12 All rights reserved.
bogdanm 65:5798e58a58b1 13 Redistribution and use in source and binary forms, with or without
bogdanm 65:5798e58a58b1 14 modification, are permitted provided that the following conditions are met:
bogdanm 65:5798e58a58b1 15 - Redistributions of source code must retain the above copyright
bogdanm 65:5798e58a58b1 16 notice, this list of conditions and the following disclaimer.
bogdanm 65:5798e58a58b1 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 65:5798e58a58b1 18 notice, this list of conditions and the following disclaimer in the
bogdanm 65:5798e58a58b1 19 documentation and/or other materials provided with the distribution.
bogdanm 65:5798e58a58b1 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 65:5798e58a58b1 21 to endorse or promote products derived from this software without
bogdanm 65:5798e58a58b1 22 specific prior written permission.
bogdanm 65:5798e58a58b1 23 *
bogdanm 65:5798e58a58b1 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 65:5798e58a58b1 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 65:5798e58a58b1 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 65:5798e58a58b1 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 65:5798e58a58b1 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 65:5798e58a58b1 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 65:5798e58a58b1 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 65:5798e58a58b1 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 65:5798e58a58b1 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 65:5798e58a58b1 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 65:5798e58a58b1 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 65:5798e58a58b1 35 ---------------------------------------------------------------------------*/
bogdanm 65:5798e58a58b1 36
bogdanm 65:5798e58a58b1 37
bogdanm 65:5798e58a58b1 38 #ifndef __CORE_CMINSTR_H
bogdanm 65:5798e58a58b1 39 #define __CORE_CMINSTR_H
bogdanm 65:5798e58a58b1 40
bogdanm 65:5798e58a58b1 41
bogdanm 65:5798e58a58b1 42 /* ########################## Core Instruction Access ######################### */
bogdanm 65:5798e58a58b1 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
bogdanm 65:5798e58a58b1 44 Access to dedicated instructions
bogdanm 65:5798e58a58b1 45 @{
bogdanm 65:5798e58a58b1 46 */
bogdanm 65:5798e58a58b1 47
bogdanm 65:5798e58a58b1 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 65:5798e58a58b1 49 /* ARM armcc specific functions */
bogdanm 65:5798e58a58b1 50
bogdanm 65:5798e58a58b1 51 #if (__ARMCC_VERSION < 400677)
bogdanm 65:5798e58a58b1 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 65:5798e58a58b1 53 #endif
bogdanm 65:5798e58a58b1 54
bogdanm 65:5798e58a58b1 55
bogdanm 65:5798e58a58b1 56 /** \brief No Operation
bogdanm 65:5798e58a58b1 57
bogdanm 65:5798e58a58b1 58 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 65:5798e58a58b1 59 */
bogdanm 65:5798e58a58b1 60 #define __NOP __nop
bogdanm 65:5798e58a58b1 61
bogdanm 65:5798e58a58b1 62
bogdanm 65:5798e58a58b1 63 /** \brief Wait For Interrupt
bogdanm 65:5798e58a58b1 64
bogdanm 65:5798e58a58b1 65 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 65:5798e58a58b1 66 until one of a number of events occurs.
bogdanm 65:5798e58a58b1 67 */
bogdanm 65:5798e58a58b1 68 #define __WFI __wfi
bogdanm 65:5798e58a58b1 69
bogdanm 65:5798e58a58b1 70
bogdanm 65:5798e58a58b1 71 /** \brief Wait For Event
bogdanm 65:5798e58a58b1 72
bogdanm 65:5798e58a58b1 73 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 65:5798e58a58b1 74 a low-power state until one of a number of events occurs.
bogdanm 65:5798e58a58b1 75 */
bogdanm 65:5798e58a58b1 76 #define __WFE __wfe
bogdanm 65:5798e58a58b1 77
bogdanm 65:5798e58a58b1 78
bogdanm 65:5798e58a58b1 79 /** \brief Send Event
bogdanm 65:5798e58a58b1 80
bogdanm 65:5798e58a58b1 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 65:5798e58a58b1 82 */
bogdanm 65:5798e58a58b1 83 #define __SEV __sev
bogdanm 65:5798e58a58b1 84
bogdanm 65:5798e58a58b1 85
bogdanm 65:5798e58a58b1 86 /** \brief Instruction Synchronization Barrier
bogdanm 65:5798e58a58b1 87
bogdanm 65:5798e58a58b1 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 65:5798e58a58b1 89 so that all instructions following the ISB are fetched from cache or
bogdanm 65:5798e58a58b1 90 memory, after the instruction has been completed.
bogdanm 65:5798e58a58b1 91 */
bogdanm 65:5798e58a58b1 92 #define __ISB() __isb(0xF)
bogdanm 65:5798e58a58b1 93
bogdanm 65:5798e58a58b1 94
bogdanm 65:5798e58a58b1 95 /** \brief Data Synchronization Barrier
bogdanm 65:5798e58a58b1 96
bogdanm 65:5798e58a58b1 97 This function acts as a special kind of Data Memory Barrier.
bogdanm 65:5798e58a58b1 98 It completes when all explicit memory accesses before this instruction complete.
bogdanm 65:5798e58a58b1 99 */
bogdanm 65:5798e58a58b1 100 #define __DSB() __dsb(0xF)
bogdanm 65:5798e58a58b1 101
bogdanm 65:5798e58a58b1 102
bogdanm 65:5798e58a58b1 103 /** \brief Data Memory Barrier
bogdanm 65:5798e58a58b1 104
bogdanm 65:5798e58a58b1 105 This function ensures the apparent order of the explicit memory operations before
bogdanm 65:5798e58a58b1 106 and after the instruction, without ensuring their completion.
bogdanm 65:5798e58a58b1 107 */
bogdanm 65:5798e58a58b1 108 #define __DMB() __dmb(0xF)
bogdanm 65:5798e58a58b1 109
bogdanm 65:5798e58a58b1 110
bogdanm 65:5798e58a58b1 111 /** \brief Reverse byte order (32 bit)
bogdanm 65:5798e58a58b1 112
bogdanm 65:5798e58a58b1 113 This function reverses the byte order in integer value.
bogdanm 65:5798e58a58b1 114
bogdanm 65:5798e58a58b1 115 \param [in] value Value to reverse
bogdanm 65:5798e58a58b1 116 \return Reversed value
bogdanm 65:5798e58a58b1 117 */
bogdanm 65:5798e58a58b1 118 #define __REV __rev
bogdanm 65:5798e58a58b1 119
bogdanm 65:5798e58a58b1 120
bogdanm 65:5798e58a58b1 121 /** \brief Reverse byte order (16 bit)
bogdanm 65:5798e58a58b1 122
bogdanm 65:5798e58a58b1 123 This function reverses the byte order in two unsigned short values.
bogdanm 65:5798e58a58b1 124
bogdanm 65:5798e58a58b1 125 \param [in] value Value to reverse
bogdanm 65:5798e58a58b1 126 \return Reversed value
bogdanm 65:5798e58a58b1 127 */
bogdanm 65:5798e58a58b1 128 #ifndef __NO_EMBEDDED_ASM
bogdanm 65:5798e58a58b1 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
bogdanm 65:5798e58a58b1 130 {
bogdanm 65:5798e58a58b1 131 rev16 r0, r0
bogdanm 65:5798e58a58b1 132 bx lr
bogdanm 65:5798e58a58b1 133 }
bogdanm 65:5798e58a58b1 134 #endif
bogdanm 65:5798e58a58b1 135
bogdanm 65:5798e58a58b1 136 /** \brief Reverse byte order in signed short value
bogdanm 65:5798e58a58b1 137
bogdanm 65:5798e58a58b1 138 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 65:5798e58a58b1 139
bogdanm 65:5798e58a58b1 140 \param [in] value Value to reverse
bogdanm 65:5798e58a58b1 141 \return Reversed value
bogdanm 65:5798e58a58b1 142 */
bogdanm 65:5798e58a58b1 143 #ifndef __NO_EMBEDDED_ASM
bogdanm 65:5798e58a58b1 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
bogdanm 65:5798e58a58b1 145 {
bogdanm 65:5798e58a58b1 146 revsh r0, r0
bogdanm 65:5798e58a58b1 147 bx lr
bogdanm 65:5798e58a58b1 148 }
bogdanm 65:5798e58a58b1 149 #endif
bogdanm 65:5798e58a58b1 150
bogdanm 65:5798e58a58b1 151
bogdanm 65:5798e58a58b1 152 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 65:5798e58a58b1 153
bogdanm 65:5798e58a58b1 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 65:5798e58a58b1 155
bogdanm 65:5798e58a58b1 156 \param [in] value Value to rotate
bogdanm 65:5798e58a58b1 157 \param [in] value Number of Bits to rotate
bogdanm 65:5798e58a58b1 158 \return Rotated value
bogdanm 65:5798e58a58b1 159 */
bogdanm 65:5798e58a58b1 160 #define __ROR __ror
bogdanm 65:5798e58a58b1 161
bogdanm 65:5798e58a58b1 162
bogdanm 65:5798e58a58b1 163 /** \brief Breakpoint
bogdanm 65:5798e58a58b1 164
bogdanm 65:5798e58a58b1 165 This function causes the processor to enter Debug state.
bogdanm 65:5798e58a58b1 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 65:5798e58a58b1 167
bogdanm 65:5798e58a58b1 168 \param [in] value is ignored by the processor.
bogdanm 65:5798e58a58b1 169 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 65:5798e58a58b1 170 */
bogdanm 65:5798e58a58b1 171 #define __BKPT(value) __breakpoint(value)
bogdanm 65:5798e58a58b1 172
bogdanm 65:5798e58a58b1 173
bogdanm 65:5798e58a58b1 174 #if (__CORTEX_M >= 0x03)
bogdanm 65:5798e58a58b1 175
bogdanm 65:5798e58a58b1 176 /** \brief Reverse bit order of value
bogdanm 65:5798e58a58b1 177
bogdanm 65:5798e58a58b1 178 This function reverses the bit order of the given value.
bogdanm 65:5798e58a58b1 179
bogdanm 65:5798e58a58b1 180 \param [in] value Value to reverse
bogdanm 65:5798e58a58b1 181 \return Reversed value
bogdanm 65:5798e58a58b1 182 */
bogdanm 65:5798e58a58b1 183 #define __RBIT __rbit
bogdanm 65:5798e58a58b1 184
bogdanm 65:5798e58a58b1 185
bogdanm 65:5798e58a58b1 186 /** \brief LDR Exclusive (8 bit)
bogdanm 65:5798e58a58b1 187
bogdanm 65:5798e58a58b1 188 This function performs a exclusive LDR command for 8 bit value.
bogdanm 65:5798e58a58b1 189
bogdanm 65:5798e58a58b1 190 \param [in] ptr Pointer to data
bogdanm 65:5798e58a58b1 191 \return value of type uint8_t at (*ptr)
bogdanm 65:5798e58a58b1 192 */
bogdanm 65:5798e58a58b1 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
bogdanm 65:5798e58a58b1 194
bogdanm 65:5798e58a58b1 195
bogdanm 65:5798e58a58b1 196 /** \brief LDR Exclusive (16 bit)
bogdanm 65:5798e58a58b1 197
bogdanm 65:5798e58a58b1 198 This function performs a exclusive LDR command for 16 bit values.
bogdanm 65:5798e58a58b1 199
bogdanm 65:5798e58a58b1 200 \param [in] ptr Pointer to data
bogdanm 65:5798e58a58b1 201 \return value of type uint16_t at (*ptr)
bogdanm 65:5798e58a58b1 202 */
bogdanm 65:5798e58a58b1 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
bogdanm 65:5798e58a58b1 204
bogdanm 65:5798e58a58b1 205
bogdanm 65:5798e58a58b1 206 /** \brief LDR Exclusive (32 bit)
bogdanm 65:5798e58a58b1 207
bogdanm 65:5798e58a58b1 208 This function performs a exclusive LDR command for 32 bit values.
bogdanm 65:5798e58a58b1 209
bogdanm 65:5798e58a58b1 210 \param [in] ptr Pointer to data
bogdanm 65:5798e58a58b1 211 \return value of type uint32_t at (*ptr)
bogdanm 65:5798e58a58b1 212 */
bogdanm 65:5798e58a58b1 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
bogdanm 65:5798e58a58b1 214
bogdanm 65:5798e58a58b1 215
bogdanm 65:5798e58a58b1 216 /** \brief STR Exclusive (8 bit)
bogdanm 65:5798e58a58b1 217
bogdanm 65:5798e58a58b1 218 This function performs a exclusive STR command for 8 bit values.
bogdanm 65:5798e58a58b1 219
bogdanm 65:5798e58a58b1 220 \param [in] value Value to store
bogdanm 65:5798e58a58b1 221 \param [in] ptr Pointer to location
bogdanm 65:5798e58a58b1 222 \return 0 Function succeeded
bogdanm 65:5798e58a58b1 223 \return 1 Function failed
bogdanm 65:5798e58a58b1 224 */
bogdanm 65:5798e58a58b1 225 #define __STREXB(value, ptr) __strex(value, ptr)
bogdanm 65:5798e58a58b1 226
bogdanm 65:5798e58a58b1 227
bogdanm 65:5798e58a58b1 228 /** \brief STR Exclusive (16 bit)
bogdanm 65:5798e58a58b1 229
bogdanm 65:5798e58a58b1 230 This function performs a exclusive STR command for 16 bit values.
bogdanm 65:5798e58a58b1 231
bogdanm 65:5798e58a58b1 232 \param [in] value Value to store
bogdanm 65:5798e58a58b1 233 \param [in] ptr Pointer to location
bogdanm 65:5798e58a58b1 234 \return 0 Function succeeded
bogdanm 65:5798e58a58b1 235 \return 1 Function failed
bogdanm 65:5798e58a58b1 236 */
bogdanm 65:5798e58a58b1 237 #define __STREXH(value, ptr) __strex(value, ptr)
bogdanm 65:5798e58a58b1 238
bogdanm 65:5798e58a58b1 239
bogdanm 65:5798e58a58b1 240 /** \brief STR Exclusive (32 bit)
bogdanm 65:5798e58a58b1 241
bogdanm 65:5798e58a58b1 242 This function performs a exclusive STR command for 32 bit values.
bogdanm 65:5798e58a58b1 243
bogdanm 65:5798e58a58b1 244 \param [in] value Value to store
bogdanm 65:5798e58a58b1 245 \param [in] ptr Pointer to location
bogdanm 65:5798e58a58b1 246 \return 0 Function succeeded
bogdanm 65:5798e58a58b1 247 \return 1 Function failed
bogdanm 65:5798e58a58b1 248 */
bogdanm 65:5798e58a58b1 249 #define __STREXW(value, ptr) __strex(value, ptr)
bogdanm 65:5798e58a58b1 250
bogdanm 65:5798e58a58b1 251
bogdanm 65:5798e58a58b1 252 /** \brief Remove the exclusive lock
bogdanm 65:5798e58a58b1 253
bogdanm 65:5798e58a58b1 254 This function removes the exclusive lock which is created by LDREX.
bogdanm 65:5798e58a58b1 255
bogdanm 65:5798e58a58b1 256 */
bogdanm 65:5798e58a58b1 257 #define __CLREX __clrex
bogdanm 65:5798e58a58b1 258
bogdanm 65:5798e58a58b1 259
bogdanm 65:5798e58a58b1 260 /** \brief Signed Saturate
bogdanm 65:5798e58a58b1 261
bogdanm 65:5798e58a58b1 262 This function saturates a signed value.
bogdanm 65:5798e58a58b1 263
bogdanm 65:5798e58a58b1 264 \param [in] value Value to be saturated
bogdanm 65:5798e58a58b1 265 \param [in] sat Bit position to saturate to (1..32)
bogdanm 65:5798e58a58b1 266 \return Saturated value
bogdanm 65:5798e58a58b1 267 */
bogdanm 65:5798e58a58b1 268 #define __SSAT __ssat
bogdanm 65:5798e58a58b1 269
bogdanm 65:5798e58a58b1 270
bogdanm 65:5798e58a58b1 271 /** \brief Unsigned Saturate
bogdanm 65:5798e58a58b1 272
bogdanm 65:5798e58a58b1 273 This function saturates an unsigned value.
bogdanm 65:5798e58a58b1 274
bogdanm 65:5798e58a58b1 275 \param [in] value Value to be saturated
bogdanm 65:5798e58a58b1 276 \param [in] sat Bit position to saturate to (0..31)
bogdanm 65:5798e58a58b1 277 \return Saturated value
bogdanm 65:5798e58a58b1 278 */
bogdanm 65:5798e58a58b1 279 #define __USAT __usat
bogdanm 65:5798e58a58b1 280
bogdanm 65:5798e58a58b1 281
bogdanm 65:5798e58a58b1 282 /** \brief Count leading zeros
bogdanm 65:5798e58a58b1 283
bogdanm 65:5798e58a58b1 284 This function counts the number of leading zeros of a data value.
bogdanm 65:5798e58a58b1 285
bogdanm 65:5798e58a58b1 286 \param [in] value Value to count the leading zeros
bogdanm 65:5798e58a58b1 287 \return number of leading zeros in value
bogdanm 65:5798e58a58b1 288 */
bogdanm 65:5798e58a58b1 289 #define __CLZ __clz
bogdanm 65:5798e58a58b1 290
bogdanm 65:5798e58a58b1 291 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 65:5798e58a58b1 292
bogdanm 65:5798e58a58b1 293
bogdanm 65:5798e58a58b1 294
bogdanm 65:5798e58a58b1 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 65:5798e58a58b1 296 /* IAR iccarm specific functions */
bogdanm 65:5798e58a58b1 297
bogdanm 65:5798e58a58b1 298 #include <cmsis_iar.h>
bogdanm 65:5798e58a58b1 299
bogdanm 65:5798e58a58b1 300
bogdanm 65:5798e58a58b1 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 65:5798e58a58b1 302 /* TI CCS specific functions */
bogdanm 65:5798e58a58b1 303
bogdanm 65:5798e58a58b1 304 #include <cmsis_ccs.h>
bogdanm 65:5798e58a58b1 305
bogdanm 65:5798e58a58b1 306
bogdanm 65:5798e58a58b1 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 65:5798e58a58b1 308 /* GNU gcc specific functions */
bogdanm 65:5798e58a58b1 309
bogdanm 65:5798e58a58b1 310 /* Define macros for porting to both thumb1 and thumb2.
bogdanm 65:5798e58a58b1 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
bogdanm 65:5798e58a58b1 312 * Otherwise, use general registers, specified by constrant "r" */
bogdanm 65:5798e58a58b1 313 #if defined (__thumb__) && !defined (__thumb2__)
bogdanm 65:5798e58a58b1 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
bogdanm 65:5798e58a58b1 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
bogdanm 65:5798e58a58b1 316 #else
bogdanm 65:5798e58a58b1 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
bogdanm 65:5798e58a58b1 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
bogdanm 65:5798e58a58b1 319 #endif
bogdanm 65:5798e58a58b1 320
bogdanm 65:5798e58a58b1 321 /** \brief No Operation
bogdanm 65:5798e58a58b1 322
bogdanm 65:5798e58a58b1 323 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 65:5798e58a58b1 324 */
bogdanm 65:5798e58a58b1 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
bogdanm 65:5798e58a58b1 326 {
bogdanm 65:5798e58a58b1 327 __ASM volatile ("nop");
bogdanm 65:5798e58a58b1 328 }
bogdanm 65:5798e58a58b1 329
bogdanm 65:5798e58a58b1 330
bogdanm 65:5798e58a58b1 331 /** \brief Wait For Interrupt
bogdanm 65:5798e58a58b1 332
bogdanm 65:5798e58a58b1 333 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 65:5798e58a58b1 334 until one of a number of events occurs.
bogdanm 65:5798e58a58b1 335 */
bogdanm 65:5798e58a58b1 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
bogdanm 65:5798e58a58b1 337 {
bogdanm 65:5798e58a58b1 338 __ASM volatile ("wfi");
bogdanm 65:5798e58a58b1 339 }
bogdanm 65:5798e58a58b1 340
bogdanm 65:5798e58a58b1 341
bogdanm 65:5798e58a58b1 342 /** \brief Wait For Event
bogdanm 65:5798e58a58b1 343
bogdanm 65:5798e58a58b1 344 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 65:5798e58a58b1 345 a low-power state until one of a number of events occurs.
bogdanm 65:5798e58a58b1 346 */
bogdanm 65:5798e58a58b1 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
bogdanm 65:5798e58a58b1 348 {
bogdanm 65:5798e58a58b1 349 __ASM volatile ("wfe");
bogdanm 65:5798e58a58b1 350 }
bogdanm 65:5798e58a58b1 351
bogdanm 65:5798e58a58b1 352
bogdanm 65:5798e58a58b1 353 /** \brief Send Event
bogdanm 65:5798e58a58b1 354
bogdanm 65:5798e58a58b1 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 65:5798e58a58b1 356 */
bogdanm 65:5798e58a58b1 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
bogdanm 65:5798e58a58b1 358 {
bogdanm 65:5798e58a58b1 359 __ASM volatile ("sev");
bogdanm 65:5798e58a58b1 360 }
bogdanm 65:5798e58a58b1 361
bogdanm 65:5798e58a58b1 362
bogdanm 65:5798e58a58b1 363 /** \brief Instruction Synchronization Barrier
bogdanm 65:5798e58a58b1 364
bogdanm 65:5798e58a58b1 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 65:5798e58a58b1 366 so that all instructions following the ISB are fetched from cache or
bogdanm 65:5798e58a58b1 367 memory, after the instruction has been completed.
bogdanm 65:5798e58a58b1 368 */
bogdanm 65:5798e58a58b1 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
bogdanm 65:5798e58a58b1 370 {
bogdanm 65:5798e58a58b1 371 __ASM volatile ("isb");
bogdanm 65:5798e58a58b1 372 }
bogdanm 65:5798e58a58b1 373
bogdanm 65:5798e58a58b1 374
bogdanm 65:5798e58a58b1 375 /** \brief Data Synchronization Barrier
bogdanm 65:5798e58a58b1 376
bogdanm 65:5798e58a58b1 377 This function acts as a special kind of Data Memory Barrier.
bogdanm 65:5798e58a58b1 378 It completes when all explicit memory accesses before this instruction complete.
bogdanm 65:5798e58a58b1 379 */
bogdanm 65:5798e58a58b1 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
bogdanm 65:5798e58a58b1 381 {
bogdanm 65:5798e58a58b1 382 __ASM volatile ("dsb");
bogdanm 65:5798e58a58b1 383 }
bogdanm 65:5798e58a58b1 384
bogdanm 65:5798e58a58b1 385
bogdanm 65:5798e58a58b1 386 /** \brief Data Memory Barrier
bogdanm 65:5798e58a58b1 387
bogdanm 65:5798e58a58b1 388 This function ensures the apparent order of the explicit memory operations before
bogdanm 65:5798e58a58b1 389 and after the instruction, without ensuring their completion.
bogdanm 65:5798e58a58b1 390 */
bogdanm 65:5798e58a58b1 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
bogdanm 65:5798e58a58b1 392 {
bogdanm 65:5798e58a58b1 393 __ASM volatile ("dmb");
bogdanm 65:5798e58a58b1 394 }
bogdanm 65:5798e58a58b1 395
bogdanm 65:5798e58a58b1 396
bogdanm 65:5798e58a58b1 397 /** \brief Reverse byte order (32 bit)
bogdanm 65:5798e58a58b1 398
bogdanm 65:5798e58a58b1 399 This function reverses the byte order in integer value.
bogdanm 65:5798e58a58b1 400
bogdanm 65:5798e58a58b1 401 \param [in] value Value to reverse
bogdanm 65:5798e58a58b1 402 \return Reversed value
bogdanm 65:5798e58a58b1 403 */
bogdanm 65:5798e58a58b1 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
bogdanm 65:5798e58a58b1 405 {
bogdanm 65:5798e58a58b1 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
bogdanm 65:5798e58a58b1 407 return __builtin_bswap32(value);
bogdanm 65:5798e58a58b1 408 #else
bogdanm 65:5798e58a58b1 409 uint32_t result;
bogdanm 65:5798e58a58b1 410
bogdanm 65:5798e58a58b1 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 65:5798e58a58b1 412 return(result);
bogdanm 65:5798e58a58b1 413 #endif
bogdanm 65:5798e58a58b1 414 }
bogdanm 65:5798e58a58b1 415
bogdanm 65:5798e58a58b1 416
bogdanm 65:5798e58a58b1 417 /** \brief Reverse byte order (16 bit)
bogdanm 65:5798e58a58b1 418
bogdanm 65:5798e58a58b1 419 This function reverses the byte order in two unsigned short values.
bogdanm 65:5798e58a58b1 420
bogdanm 65:5798e58a58b1 421 \param [in] value Value to reverse
bogdanm 65:5798e58a58b1 422 \return Reversed value
bogdanm 65:5798e58a58b1 423 */
bogdanm 65:5798e58a58b1 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
bogdanm 65:5798e58a58b1 425 {
bogdanm 65:5798e58a58b1 426 uint32_t result;
bogdanm 65:5798e58a58b1 427
bogdanm 65:5798e58a58b1 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 65:5798e58a58b1 429 return(result);
bogdanm 65:5798e58a58b1 430 }
bogdanm 65:5798e58a58b1 431
bogdanm 65:5798e58a58b1 432
bogdanm 65:5798e58a58b1 433 /** \brief Reverse byte order in signed short value
bogdanm 65:5798e58a58b1 434
bogdanm 65:5798e58a58b1 435 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 65:5798e58a58b1 436
bogdanm 65:5798e58a58b1 437 \param [in] value Value to reverse
bogdanm 65:5798e58a58b1 438 \return Reversed value
bogdanm 65:5798e58a58b1 439 */
bogdanm 65:5798e58a58b1 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
bogdanm 65:5798e58a58b1 441 {
bogdanm 65:5798e58a58b1 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 65:5798e58a58b1 443 return (short)__builtin_bswap16(value);
bogdanm 65:5798e58a58b1 444 #else
bogdanm 65:5798e58a58b1 445 uint32_t result;
bogdanm 65:5798e58a58b1 446
bogdanm 65:5798e58a58b1 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 65:5798e58a58b1 448 return(result);
bogdanm 65:5798e58a58b1 449 #endif
bogdanm 65:5798e58a58b1 450 }
bogdanm 65:5798e58a58b1 451
bogdanm 65:5798e58a58b1 452
bogdanm 65:5798e58a58b1 453 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 65:5798e58a58b1 454
bogdanm 65:5798e58a58b1 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 65:5798e58a58b1 456
bogdanm 65:5798e58a58b1 457 \param [in] value Value to rotate
bogdanm 65:5798e58a58b1 458 \param [in] value Number of Bits to rotate
bogdanm 65:5798e58a58b1 459 \return Rotated value
bogdanm 65:5798e58a58b1 460 */
bogdanm 65:5798e58a58b1 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
bogdanm 65:5798e58a58b1 462 {
bogdanm 65:5798e58a58b1 463 return (op1 >> op2) | (op1 << (32 - op2));
bogdanm 65:5798e58a58b1 464 }
bogdanm 65:5798e58a58b1 465
bogdanm 65:5798e58a58b1 466
bogdanm 65:5798e58a58b1 467 /** \brief Breakpoint
bogdanm 65:5798e58a58b1 468
bogdanm 65:5798e58a58b1 469 This function causes the processor to enter Debug state.
bogdanm 65:5798e58a58b1 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 65:5798e58a58b1 471
bogdanm 65:5798e58a58b1 472 \param [in] value is ignored by the processor.
bogdanm 65:5798e58a58b1 473 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 65:5798e58a58b1 474 */
bogdanm 65:5798e58a58b1 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
bogdanm 65:5798e58a58b1 476
bogdanm 65:5798e58a58b1 477
bogdanm 65:5798e58a58b1 478 #if (__CORTEX_M >= 0x03)
bogdanm 65:5798e58a58b1 479
bogdanm 65:5798e58a58b1 480 /** \brief Reverse bit order of value
bogdanm 65:5798e58a58b1 481
bogdanm 65:5798e58a58b1 482 This function reverses the bit order of the given value.
bogdanm 65:5798e58a58b1 483
bogdanm 65:5798e58a58b1 484 \param [in] value Value to reverse
bogdanm 65:5798e58a58b1 485 \return Reversed value
bogdanm 65:5798e58a58b1 486 */
bogdanm 65:5798e58a58b1 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
bogdanm 65:5798e58a58b1 488 {
bogdanm 65:5798e58a58b1 489 uint32_t result;
bogdanm 65:5798e58a58b1 490
bogdanm 65:5798e58a58b1 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
bogdanm 65:5798e58a58b1 492 return(result);
bogdanm 65:5798e58a58b1 493 }
bogdanm 65:5798e58a58b1 494
bogdanm 65:5798e58a58b1 495
bogdanm 65:5798e58a58b1 496 /** \brief LDR Exclusive (8 bit)
bogdanm 65:5798e58a58b1 497
bogdanm 65:5798e58a58b1 498 This function performs a exclusive LDR command for 8 bit value.
bogdanm 65:5798e58a58b1 499
bogdanm 65:5798e58a58b1 500 \param [in] ptr Pointer to data
bogdanm 65:5798e58a58b1 501 \return value of type uint8_t at (*ptr)
bogdanm 65:5798e58a58b1 502 */
bogdanm 65:5798e58a58b1 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
bogdanm 65:5798e58a58b1 504 {
bogdanm 65:5798e58a58b1 505 uint32_t result;
bogdanm 65:5798e58a58b1 506
bogdanm 65:5798e58a58b1 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 65:5798e58a58b1 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 65:5798e58a58b1 509 #else
bogdanm 65:5798e58a58b1 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 65:5798e58a58b1 511 accepted by assembler. So has to use following less efficient pattern.
bogdanm 65:5798e58a58b1 512 */
bogdanm 65:5798e58a58b1 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 65:5798e58a58b1 514 #endif
bogdanm 65:5798e58a58b1 515 return(result);
bogdanm 65:5798e58a58b1 516 }
bogdanm 65:5798e58a58b1 517
bogdanm 65:5798e58a58b1 518
bogdanm 65:5798e58a58b1 519 /** \brief LDR Exclusive (16 bit)
bogdanm 65:5798e58a58b1 520
bogdanm 65:5798e58a58b1 521 This function performs a exclusive LDR command for 16 bit values.
bogdanm 65:5798e58a58b1 522
bogdanm 65:5798e58a58b1 523 \param [in] ptr Pointer to data
bogdanm 65:5798e58a58b1 524 \return value of type uint16_t at (*ptr)
bogdanm 65:5798e58a58b1 525 */
bogdanm 65:5798e58a58b1 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
bogdanm 65:5798e58a58b1 527 {
bogdanm 65:5798e58a58b1 528 uint32_t result;
bogdanm 65:5798e58a58b1 529
bogdanm 65:5798e58a58b1 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 65:5798e58a58b1 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 65:5798e58a58b1 532 #else
bogdanm 65:5798e58a58b1 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 65:5798e58a58b1 534 accepted by assembler. So has to use following less efficient pattern.
bogdanm 65:5798e58a58b1 535 */
bogdanm 65:5798e58a58b1 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 65:5798e58a58b1 537 #endif
bogdanm 65:5798e58a58b1 538 return(result);
bogdanm 65:5798e58a58b1 539 }
bogdanm 65:5798e58a58b1 540
bogdanm 65:5798e58a58b1 541
bogdanm 65:5798e58a58b1 542 /** \brief LDR Exclusive (32 bit)
bogdanm 65:5798e58a58b1 543
bogdanm 65:5798e58a58b1 544 This function performs a exclusive LDR command for 32 bit values.
bogdanm 65:5798e58a58b1 545
bogdanm 65:5798e58a58b1 546 \param [in] ptr Pointer to data
bogdanm 65:5798e58a58b1 547 \return value of type uint32_t at (*ptr)
bogdanm 65:5798e58a58b1 548 */
bogdanm 65:5798e58a58b1 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
bogdanm 65:5798e58a58b1 550 {
bogdanm 65:5798e58a58b1 551 uint32_t result;
bogdanm 65:5798e58a58b1 552
bogdanm 65:5798e58a58b1 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 65:5798e58a58b1 554 return(result);
bogdanm 65:5798e58a58b1 555 }
bogdanm 65:5798e58a58b1 556
bogdanm 65:5798e58a58b1 557
bogdanm 65:5798e58a58b1 558 /** \brief STR Exclusive (8 bit)
bogdanm 65:5798e58a58b1 559
bogdanm 65:5798e58a58b1 560 This function performs a exclusive STR command for 8 bit values.
bogdanm 65:5798e58a58b1 561
bogdanm 65:5798e58a58b1 562 \param [in] value Value to store
bogdanm 65:5798e58a58b1 563 \param [in] ptr Pointer to location
bogdanm 65:5798e58a58b1 564 \return 0 Function succeeded
bogdanm 65:5798e58a58b1 565 \return 1 Function failed
bogdanm 65:5798e58a58b1 566 */
bogdanm 65:5798e58a58b1 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
bogdanm 65:5798e58a58b1 568 {
bogdanm 65:5798e58a58b1 569 uint32_t result;
bogdanm 65:5798e58a58b1 570
bogdanm 65:5798e58a58b1 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 65:5798e58a58b1 572 return(result);
bogdanm 65:5798e58a58b1 573 }
bogdanm 65:5798e58a58b1 574
bogdanm 65:5798e58a58b1 575
bogdanm 65:5798e58a58b1 576 /** \brief STR Exclusive (16 bit)
bogdanm 65:5798e58a58b1 577
bogdanm 65:5798e58a58b1 578 This function performs a exclusive STR command for 16 bit values.
bogdanm 65:5798e58a58b1 579
bogdanm 65:5798e58a58b1 580 \param [in] value Value to store
bogdanm 65:5798e58a58b1 581 \param [in] ptr Pointer to location
bogdanm 65:5798e58a58b1 582 \return 0 Function succeeded
bogdanm 65:5798e58a58b1 583 \return 1 Function failed
bogdanm 65:5798e58a58b1 584 */
bogdanm 65:5798e58a58b1 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
bogdanm 65:5798e58a58b1 586 {
bogdanm 65:5798e58a58b1 587 uint32_t result;
bogdanm 65:5798e58a58b1 588
bogdanm 65:5798e58a58b1 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 65:5798e58a58b1 590 return(result);
bogdanm 65:5798e58a58b1 591 }
bogdanm 65:5798e58a58b1 592
bogdanm 65:5798e58a58b1 593
bogdanm 65:5798e58a58b1 594 /** \brief STR Exclusive (32 bit)
bogdanm 65:5798e58a58b1 595
bogdanm 65:5798e58a58b1 596 This function performs a exclusive STR command for 32 bit values.
bogdanm 65:5798e58a58b1 597
bogdanm 65:5798e58a58b1 598 \param [in] value Value to store
bogdanm 65:5798e58a58b1 599 \param [in] ptr Pointer to location
bogdanm 65:5798e58a58b1 600 \return 0 Function succeeded
bogdanm 65:5798e58a58b1 601 \return 1 Function failed
bogdanm 65:5798e58a58b1 602 */
bogdanm 65:5798e58a58b1 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
bogdanm 65:5798e58a58b1 604 {
bogdanm 65:5798e58a58b1 605 uint32_t result;
bogdanm 65:5798e58a58b1 606
bogdanm 65:5798e58a58b1 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 65:5798e58a58b1 608 return(result);
bogdanm 65:5798e58a58b1 609 }
bogdanm 65:5798e58a58b1 610
bogdanm 65:5798e58a58b1 611
bogdanm 65:5798e58a58b1 612 /** \brief Remove the exclusive lock
bogdanm 65:5798e58a58b1 613
bogdanm 65:5798e58a58b1 614 This function removes the exclusive lock which is created by LDREX.
bogdanm 65:5798e58a58b1 615
bogdanm 65:5798e58a58b1 616 */
bogdanm 65:5798e58a58b1 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
bogdanm 65:5798e58a58b1 618 {
bogdanm 65:5798e58a58b1 619 __ASM volatile ("clrex" ::: "memory");
bogdanm 65:5798e58a58b1 620 }
bogdanm 65:5798e58a58b1 621
bogdanm 65:5798e58a58b1 622
bogdanm 65:5798e58a58b1 623 /** \brief Signed Saturate
bogdanm 65:5798e58a58b1 624
bogdanm 65:5798e58a58b1 625 This function saturates a signed value.
bogdanm 65:5798e58a58b1 626
bogdanm 65:5798e58a58b1 627 \param [in] value Value to be saturated
bogdanm 65:5798e58a58b1 628 \param [in] sat Bit position to saturate to (1..32)
bogdanm 65:5798e58a58b1 629 \return Saturated value
bogdanm 65:5798e58a58b1 630 */
bogdanm 65:5798e58a58b1 631 #define __SSAT(ARG1,ARG2) \
bogdanm 65:5798e58a58b1 632 ({ \
bogdanm 65:5798e58a58b1 633 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 65:5798e58a58b1 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 65:5798e58a58b1 635 __RES; \
bogdanm 65:5798e58a58b1 636 })
bogdanm 65:5798e58a58b1 637
bogdanm 65:5798e58a58b1 638
bogdanm 65:5798e58a58b1 639 /** \brief Unsigned Saturate
bogdanm 65:5798e58a58b1 640
bogdanm 65:5798e58a58b1 641 This function saturates an unsigned value.
bogdanm 65:5798e58a58b1 642
bogdanm 65:5798e58a58b1 643 \param [in] value Value to be saturated
bogdanm 65:5798e58a58b1 644 \param [in] sat Bit position to saturate to (0..31)
bogdanm 65:5798e58a58b1 645 \return Saturated value
bogdanm 65:5798e58a58b1 646 */
bogdanm 65:5798e58a58b1 647 #define __USAT(ARG1,ARG2) \
bogdanm 65:5798e58a58b1 648 ({ \
bogdanm 65:5798e58a58b1 649 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 65:5798e58a58b1 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 65:5798e58a58b1 651 __RES; \
bogdanm 65:5798e58a58b1 652 })
bogdanm 65:5798e58a58b1 653
bogdanm 65:5798e58a58b1 654
bogdanm 65:5798e58a58b1 655 /** \brief Count leading zeros
bogdanm 65:5798e58a58b1 656
bogdanm 65:5798e58a58b1 657 This function counts the number of leading zeros of a data value.
bogdanm 65:5798e58a58b1 658
bogdanm 65:5798e58a58b1 659 \param [in] value Value to count the leading zeros
bogdanm 65:5798e58a58b1 660 \return number of leading zeros in value
bogdanm 65:5798e58a58b1 661 */
bogdanm 65:5798e58a58b1 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
bogdanm 65:5798e58a58b1 663 {
bogdanm 65:5798e58a58b1 664 uint32_t result;
bogdanm 65:5798e58a58b1 665
bogdanm 65:5798e58a58b1 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
bogdanm 65:5798e58a58b1 667 return(result);
bogdanm 65:5798e58a58b1 668 }
bogdanm 65:5798e58a58b1 669
bogdanm 65:5798e58a58b1 670 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 65:5798e58a58b1 671
bogdanm 65:5798e58a58b1 672
bogdanm 65:5798e58a58b1 673
bogdanm 65:5798e58a58b1 674
bogdanm 65:5798e58a58b1 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 65:5798e58a58b1 676 /* TASKING carm specific functions */
bogdanm 65:5798e58a58b1 677
bogdanm 65:5798e58a58b1 678 /*
bogdanm 65:5798e58a58b1 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
bogdanm 65:5798e58a58b1 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
bogdanm 65:5798e58a58b1 681 * Including the CMSIS ones.
bogdanm 65:5798e58a58b1 682 */
bogdanm 65:5798e58a58b1 683
bogdanm 65:5798e58a58b1 684 #endif
bogdanm 65:5798e58a58b1 685
bogdanm 65:5798e58a58b1 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
bogdanm 65:5798e58a58b1 687
bogdanm 65:5798e58a58b1 688 #endif /* __CORE_CMINSTR_H */