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TARGET_MTS_DRAGONFLY_F411RE/stm32f4xx_hal_sdram.h@110:165afa46840b, 2015-11-25 (annotated)

Committer:
Kojto
Date:
Wed Nov 25 13:21:40 2015 +0000
Revision:
110:165afa46840b
Parent:
106:ba1f97679dad 
Release 110  of the mbed library



Changes:

- new platforms - STM32F410R, DISCO_F429ZI, DISCO_F469NI

- Nucleo L476 - gcc and uvision template

- k22,k64f targets - ADC channels A addition

- EFM32 - bugfixes in sleep, serial and spi

- Delta DFCM NNN40 - pinnames update

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 101:7cff1c4259d7 1 /**
Kojto 101:7cff1c4259d7 2 ******************************************************************************
Kojto 101:7cff1c4259d7 3 * @file stm32f4xx_hal_sdram.h
Kojto 101:7cff1c4259d7 4 * @author MCD Application Team
Kojto 110:165afa46840b 5 * @version V1.4.1
Kojto 110:165afa46840b 6 * @date 09-October-2015
Kojto 101:7cff1c4259d7 7 * @brief Header file of SDRAM HAL module.
Kojto 101:7cff1c4259d7 8 ******************************************************************************
Kojto 101:7cff1c4259d7 9 * @attention
Kojto 101:7cff1c4259d7 10 *
Kojto 101:7cff1c4259d7 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 101:7cff1c4259d7 12 *
Kojto 101:7cff1c4259d7 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 101:7cff1c4259d7 14 * are permitted provided that the following conditions are met:
Kojto 101:7cff1c4259d7 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 101:7cff1c4259d7 16 * this list of conditions and the following disclaimer.
Kojto 101:7cff1c4259d7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 101:7cff1c4259d7 18 * this list of conditions and the following disclaimer in the documentation
Kojto 101:7cff1c4259d7 19 * and/or other materials provided with the distribution.
Kojto 101:7cff1c4259d7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 101:7cff1c4259d7 21 * may be used to endorse or promote products derived from this software
Kojto 101:7cff1c4259d7 22 * without specific prior written permission.
Kojto 101:7cff1c4259d7 23 *
Kojto 101:7cff1c4259d7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 101:7cff1c4259d7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 101:7cff1c4259d7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 101:7cff1c4259d7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 101:7cff1c4259d7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 101:7cff1c4259d7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 101:7cff1c4259d7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 101:7cff1c4259d7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 101:7cff1c4259d7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 101:7cff1c4259d7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 101:7cff1c4259d7 34 *
Kojto 101:7cff1c4259d7 35 ******************************************************************************
Kojto 101:7cff1c4259d7 36 */
Kojto 101:7cff1c4259d7 37
Kojto 101:7cff1c4259d7 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 101:7cff1c4259d7 39 #ifndef __STM32F4xx_HAL_SDRAM_H
Kojto 101:7cff1c4259d7 40 #define __STM32F4xx_HAL_SDRAM_H
Kojto 101:7cff1c4259d7 41
Kojto 101:7cff1c4259d7 42 #ifdef __cplusplus
Kojto 101:7cff1c4259d7 43 extern "C" {
Kojto 101:7cff1c4259d7 44 #endif
Kojto 101:7cff1c4259d7 45
Kojto 110:165afa46840b 46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 110:165afa46840b 47 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
Kojto 101:7cff1c4259d7 48
Kojto 101:7cff1c4259d7 49 /* Includes ------------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 50 #include "stm32f4xx_ll_fmc.h"
Kojto 101:7cff1c4259d7 51
Kojto 101:7cff1c4259d7 52 /** @addtogroup STM32F4xx_HAL_Driver
Kojto 101:7cff1c4259d7 53 * @{
Kojto 101:7cff1c4259d7 54 */
Kojto 101:7cff1c4259d7 55
Kojto 101:7cff1c4259d7 56 /** @addtogroup SDRAM
Kojto 101:7cff1c4259d7 57 * @{
Kojto 101:7cff1c4259d7 58 */
Kojto 101:7cff1c4259d7 59
Kojto 101:7cff1c4259d7 60 /* Exported typedef ----------------------------------------------------------*/
Kojto 101:7cff1c4259d7 61 /** @defgroup SDRAM_Exported_Types SDRAM Exported Types
Kojto 101:7cff1c4259d7 62 * @{
Kojto 101:7cff1c4259d7 63 */
Kojto 101:7cff1c4259d7 64
Kojto 101:7cff1c4259d7 65 /**
Kojto 101:7cff1c4259d7 66 * @brief HAL SDRAM State structure definition
Kojto 101:7cff1c4259d7 67 */
Kojto 101:7cff1c4259d7 68 typedef enum
Kojto 101:7cff1c4259d7 69 {
Kojto 101:7cff1c4259d7 70 HAL_SDRAM_STATE_RESET = 0x00, /*!< SDRAM not yet initialized or disabled */
Kojto 101:7cff1c4259d7 71 HAL_SDRAM_STATE_READY = 0x01, /*!< SDRAM initialized and ready for use */
Kojto 101:7cff1c4259d7 72 HAL_SDRAM_STATE_BUSY = 0x02, /*!< SDRAM internal process is ongoing */
Kojto 101:7cff1c4259d7 73 HAL_SDRAM_STATE_ERROR = 0x03, /*!< SDRAM error state */
Kojto 101:7cff1c4259d7 74 HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04, /*!< SDRAM device write protected */
Kojto 101:7cff1c4259d7 75 HAL_SDRAM_STATE_PRECHARGED = 0x05 /*!< SDRAM device precharged */
Kojto 101:7cff1c4259d7 76
Kojto 101:7cff1c4259d7 77 }HAL_SDRAM_StateTypeDef;
Kojto 101:7cff1c4259d7 78
Kojto 101:7cff1c4259d7 79 /**
Kojto 101:7cff1c4259d7 80 * @brief SDRAM handle Structure definition
Kojto 101:7cff1c4259d7 81 */
Kojto 101:7cff1c4259d7 82 typedef struct
Kojto 101:7cff1c4259d7 83 {
Kojto 101:7cff1c4259d7 84 FMC_SDRAM_TypeDef *Instance; /*!< Register base address */
Kojto 101:7cff1c4259d7 85
Kojto 101:7cff1c4259d7 86 FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */
Kojto 101:7cff1c4259d7 87
Kojto 101:7cff1c4259d7 88 __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */
Kojto 101:7cff1c4259d7 89
Kojto 101:7cff1c4259d7 90 HAL_LockTypeDef Lock; /*!< SDRAM locking object */
Kojto 101:7cff1c4259d7 91
Kojto 101:7cff1c4259d7 92 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
Kojto 101:7cff1c4259d7 93
Kojto 101:7cff1c4259d7 94 }SDRAM_HandleTypeDef;
Kojto 101:7cff1c4259d7 95 /**
Kojto 101:7cff1c4259d7 96 * @}
Kojto 101:7cff1c4259d7 97 */
Kojto 101:7cff1c4259d7 98
Kojto 101:7cff1c4259d7 99 /* Exported constants --------------------------------------------------------*/
Kojto 101:7cff1c4259d7 100 /* Exported macro ------------------------------------------------------------*/
Kojto 101:7cff1c4259d7 101 /** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros
Kojto 101:7cff1c4259d7 102 * @{
Kojto 101:7cff1c4259d7 103 */
Kojto 101:7cff1c4259d7 104
Kojto 101:7cff1c4259d7 105 /** @brief Reset SDRAM handle state
Kojto 101:7cff1c4259d7 106 * @param __HANDLE__: specifies the SDRAM handle.
Kojto 101:7cff1c4259d7 107 * @retval None
Kojto 101:7cff1c4259d7 108 */
Kojto 101:7cff1c4259d7 109 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET)
Kojto 101:7cff1c4259d7 110 /**
Kojto 101:7cff1c4259d7 111 * @}
Kojto 101:7cff1c4259d7 112 */
Kojto 101:7cff1c4259d7 113
Kojto 101:7cff1c4259d7 114 /* Exported functions --------------------------------------------------------*/
Kojto 101:7cff1c4259d7 115 /** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions
Kojto 101:7cff1c4259d7 116 * @{
Kojto 101:7cff1c4259d7 117 */
Kojto 101:7cff1c4259d7 118
Kojto 101:7cff1c4259d7 119 /** @addtogroup SDRAM_Exported_Functions_Group1
Kojto 101:7cff1c4259d7 120 * @{
Kojto 101:7cff1c4259d7 121 */
Kojto 101:7cff1c4259d7 122
Kojto 101:7cff1c4259d7 123 /* Initialization/de-initialization functions *********************************/
Kojto 101:7cff1c4259d7 124 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing);
Kojto 101:7cff1c4259d7 125 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram);
Kojto 101:7cff1c4259d7 126 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram);
Kojto 101:7cff1c4259d7 127 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram);
Kojto 101:7cff1c4259d7 128
Kojto 101:7cff1c4259d7 129 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram);
Kojto 101:7cff1c4259d7 130 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram);
Kojto 101:7cff1c4259d7 131 void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
Kojto 101:7cff1c4259d7 132 void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
Kojto 101:7cff1c4259d7 133 /**
Kojto 101:7cff1c4259d7 134 * @}
Kojto 101:7cff1c4259d7 135 */
Kojto 101:7cff1c4259d7 136
Kojto 101:7cff1c4259d7 137 /** @addtogroup SDRAM_Exported_Functions_Group2
Kojto 101:7cff1c4259d7 138 * @{
Kojto 101:7cff1c4259d7 139 */
Kojto 101:7cff1c4259d7 140 /* I/O operation functions ****************************************************/
Kojto 101:7cff1c4259d7 141 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
Kojto 101:7cff1c4259d7 142 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
Kojto 101:7cff1c4259d7 143 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
Kojto 101:7cff1c4259d7 144 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
Kojto 101:7cff1c4259d7 145 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Kojto 101:7cff1c4259d7 146 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 101:7cff1c4259d7 147
Kojto 101:7cff1c4259d7 148 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Kojto 101:7cff1c4259d7 149 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 101:7cff1c4259d7 150 /**
Kojto 101:7cff1c4259d7 151 * @}
Kojto 101:7cff1c4259d7 152 */
Kojto 101:7cff1c4259d7 153
Kojto 101:7cff1c4259d7 154 /** @addtogroup SDRAM_Exported_Functions_Group3
Kojto 101:7cff1c4259d7 155 * @{
Kojto 101:7cff1c4259d7 156 */
Kojto 101:7cff1c4259d7 157 /* SDRAM Control functions *****************************************************/
Kojto 101:7cff1c4259d7 158 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram);
Kojto 101:7cff1c4259d7 159 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram);
Kojto 101:7cff1c4259d7 160 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout);
Kojto 101:7cff1c4259d7 161 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate);
Kojto 101:7cff1c4259d7 162 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber);
Kojto 101:7cff1c4259d7 163 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram);
Kojto 101:7cff1c4259d7 164 /**
Kojto 101:7cff1c4259d7 165 * @}
Kojto 101:7cff1c4259d7 166 */
Kojto 101:7cff1c4259d7 167
Kojto 101:7cff1c4259d7 168 /** @addtogroup SDRAM_Exported_Functions_Group4
Kojto 101:7cff1c4259d7 169 * @{
Kojto 101:7cff1c4259d7 170 */
Kojto 101:7cff1c4259d7 171 /* SDRAM State functions ********************************************************/
Kojto 101:7cff1c4259d7 172 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram);
Kojto 101:7cff1c4259d7 173 /**
Kojto 101:7cff1c4259d7 174 * @}
Kojto 101:7cff1c4259d7 175 */
Kojto 101:7cff1c4259d7 176
Kojto 101:7cff1c4259d7 177 /**
Kojto 101:7cff1c4259d7 178 * @}
Kojto 101:7cff1c4259d7 179 */
Kojto 101:7cff1c4259d7 180
Kojto 101:7cff1c4259d7 181 /**
Kojto 101:7cff1c4259d7 182 * @}
Kojto 101:7cff1c4259d7 183 */
Kojto 101:7cff1c4259d7 184
Kojto 110:165afa46840b 185 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
Kojto 101:7cff1c4259d7 186
Kojto 101:7cff1c4259d7 187 /**
Kojto 101:7cff1c4259d7 188 * @}
Kojto 101:7cff1c4259d7 189 */
Kojto 101:7cff1c4259d7 190
Kojto 101:7cff1c4259d7 191 #ifdef __cplusplus
Kojto 101:7cff1c4259d7 192 }
Kojto 101:7cff1c4259d7 193 #endif
Kojto 101:7cff1c4259d7 194
Kojto 101:7cff1c4259d7 195 #endif /* __STM32F4xx_HAL_SDRAM_H */
Kojto 101:7cff1c4259d7 196
Kojto 101:7cff1c4259d7 197 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/