Ricardo Benitez / mbed

meh

Fork of mbed by mbed official

TARGET_NUCLEO_L053R8/stm32l0xx_hal_dac.h@84:0b3ab51c8877, 2014-05-19 (annotated)

Committer:
bogdanm
Date:
Mon May 19 18:14:09 2014 +0100
Revision:
84:0b3ab51c8877
Child:
92:4fc01daae5a5
Release 84 of the mbed library



Main changes:



- added LPC11U68 to the official build

- Bug fixes and new features for ST Nucleo boards

- I2C fixes for Freescale targets

- Added nRF51822 exporters

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 84:0b3ab51c8877 1 /**
bogdanm 84:0b3ab51c8877 2 ******************************************************************************
bogdanm 84:0b3ab51c8877 3 * @file stm32l0xx_hal_dac.h
bogdanm 84:0b3ab51c8877 4 * @author MCD Application Team
bogdanm 84:0b3ab51c8877 5 * @version V1.0.0
bogdanm 84:0b3ab51c8877 6 * @date 22-April-2014
bogdanm 84:0b3ab51c8877 7 * @brief Header file of DAC HAL module.
bogdanm 84:0b3ab51c8877 8 ******************************************************************************
bogdanm 84:0b3ab51c8877 9 * @attention
bogdanm 84:0b3ab51c8877 10 *
bogdanm 84:0b3ab51c8877 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 84:0b3ab51c8877 12 *
bogdanm 84:0b3ab51c8877 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 84:0b3ab51c8877 14 * are permitted provided that the following conditions are met:
bogdanm 84:0b3ab51c8877 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 84:0b3ab51c8877 16 * this list of conditions and the following disclaimer.
bogdanm 84:0b3ab51c8877 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 84:0b3ab51c8877 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 84:0b3ab51c8877 19 * and/or other materials provided with the distribution.
bogdanm 84:0b3ab51c8877 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 84:0b3ab51c8877 21 * may be used to endorse or promote products derived from this software
bogdanm 84:0b3ab51c8877 22 * without specific prior written permission.
bogdanm 84:0b3ab51c8877 23 *
bogdanm 84:0b3ab51c8877 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 84:0b3ab51c8877 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 84:0b3ab51c8877 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 84:0b3ab51c8877 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 84:0b3ab51c8877 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 84:0b3ab51c8877 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 84:0b3ab51c8877 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 84:0b3ab51c8877 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 84:0b3ab51c8877 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 84:0b3ab51c8877 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 84:0b3ab51c8877 34 *
bogdanm 84:0b3ab51c8877 35 ******************************************************************************
bogdanm 84:0b3ab51c8877 36 */
bogdanm 84:0b3ab51c8877 37
bogdanm 84:0b3ab51c8877 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 84:0b3ab51c8877 39 #ifndef __STM32L0xx_HAL_DAC_H
bogdanm 84:0b3ab51c8877 40 #define __STM32L0xx_HAL_DAC_H
bogdanm 84:0b3ab51c8877 41
bogdanm 84:0b3ab51c8877 42 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 43 extern "C" {
bogdanm 84:0b3ab51c8877 44 #endif
bogdanm 84:0b3ab51c8877 45
bogdanm 84:0b3ab51c8877 46 #if !defined (STM32L051xx) && !defined (STM32L061xx)
bogdanm 84:0b3ab51c8877 47
bogdanm 84:0b3ab51c8877 48 /* Includes ------------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 49 #include "stm32l0xx_hal_def.h"
bogdanm 84:0b3ab51c8877 50
bogdanm 84:0b3ab51c8877 51 /** @addtogroup STM32L0xx_HAL_Driver
bogdanm 84:0b3ab51c8877 52 * @{
bogdanm 84:0b3ab51c8877 53 */
bogdanm 84:0b3ab51c8877 54
bogdanm 84:0b3ab51c8877 55 /** @addtogroup DAC
bogdanm 84:0b3ab51c8877 56 * @{
bogdanm 84:0b3ab51c8877 57 */
bogdanm 84:0b3ab51c8877 58
bogdanm 84:0b3ab51c8877 59 /* Exported types ------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 60
bogdanm 84:0b3ab51c8877 61 /**
bogdanm 84:0b3ab51c8877 62 * @brief HAL State structures definition
bogdanm 84:0b3ab51c8877 63 */
bogdanm 84:0b3ab51c8877 64 typedef enum
bogdanm 84:0b3ab51c8877 65 {
bogdanm 84:0b3ab51c8877 66 HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */
bogdanm 84:0b3ab51c8877 67 HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */
bogdanm 84:0b3ab51c8877 68 HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */
bogdanm 84:0b3ab51c8877 69 HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */
bogdanm 84:0b3ab51c8877 70 HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */
bogdanm 84:0b3ab51c8877 71
bogdanm 84:0b3ab51c8877 72 }HAL_DAC_StateTypeDef;
bogdanm 84:0b3ab51c8877 73
bogdanm 84:0b3ab51c8877 74 /**
bogdanm 84:0b3ab51c8877 75 * @brief DAC handle Structure definition
bogdanm 84:0b3ab51c8877 76 */
bogdanm 84:0b3ab51c8877 77 typedef struct
bogdanm 84:0b3ab51c8877 78 {
bogdanm 84:0b3ab51c8877 79 DAC_TypeDef *Instance; /*!< Register base address */
bogdanm 84:0b3ab51c8877 80
bogdanm 84:0b3ab51c8877 81 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
bogdanm 84:0b3ab51c8877 82
bogdanm 84:0b3ab51c8877 83 HAL_LockTypeDef Lock; /*!< DAC locking object */
bogdanm 84:0b3ab51c8877 84
bogdanm 84:0b3ab51c8877 85 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
bogdanm 84:0b3ab51c8877 86
bogdanm 84:0b3ab51c8877 87 __IO uint32_t ErrorCode; /*!< DAC Error code */
bogdanm 84:0b3ab51c8877 88
bogdanm 84:0b3ab51c8877 89 }DAC_HandleTypeDef;
bogdanm 84:0b3ab51c8877 90
bogdanm 84:0b3ab51c8877 91 /**
bogdanm 84:0b3ab51c8877 92 * @brief DAC Configuration regular Channel structure definition
bogdanm 84:0b3ab51c8877 93 */
bogdanm 84:0b3ab51c8877 94 typedef struct
bogdanm 84:0b3ab51c8877 95 {
bogdanm 84:0b3ab51c8877 96 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
bogdanm 84:0b3ab51c8877 97 This parameter can be a value of @ref DAC_trigger_selection */
bogdanm 84:0b3ab51c8877 98
bogdanm 84:0b3ab51c8877 99 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
bogdanm 84:0b3ab51c8877 100 This parameter can be a value of @ref DAC_output_buffer */
bogdanm 84:0b3ab51c8877 101
bogdanm 84:0b3ab51c8877 102 }DAC_ChannelConfTypeDef;
bogdanm 84:0b3ab51c8877 103
bogdanm 84:0b3ab51c8877 104 /* Exported constants --------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 105
bogdanm 84:0b3ab51c8877 106 /** @defgroup HAL DAC Error Code
bogdanm 84:0b3ab51c8877 107 * @{
bogdanm 84:0b3ab51c8877 108 */
bogdanm 84:0b3ab51c8877 109 #define HAL_DAC_ERROR_NONE 0x00 /*!< No error */
bogdanm 84:0b3ab51c8877 110 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01 /*!< DAC channel1 DMA underrun error */
bogdanm 84:0b3ab51c8877 111 #define HAL_DAC_ERROR_DMA 0x04 /*!< DMA error */
bogdanm 84:0b3ab51c8877 112 /**
bogdanm 84:0b3ab51c8877 113 * @}
bogdanm 84:0b3ab51c8877 114 */
bogdanm 84:0b3ab51c8877 115
bogdanm 84:0b3ab51c8877 116 /** @defgroup DAC_trigger_selection
bogdanm 84:0b3ab51c8877 117 * @{
bogdanm 84:0b3ab51c8877 118 */
bogdanm 84:0b3ab51c8877 119 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register
bogdanm 84:0b3ab51c8877 120 has been loaded, and not by external trigger */
bogdanm 84:0b3ab51c8877 121 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
bogdanm 84:0b3ab51c8877 122 #define DAC_TRIGGER_T21_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM21 TRGO selected as external conversion trigger for DAC channel */
bogdanm 84:0b3ab51c8877 123 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
bogdanm 84:0b3ab51c8877 124 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
bogdanm 84:0b3ab51c8877 125 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
bogdanm 84:0b3ab51c8877 126
bogdanm 84:0b3ab51c8877 127 #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
bogdanm 84:0b3ab51c8877 128 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
bogdanm 84:0b3ab51c8877 129 ((TRIGGER) == DAC_TRIGGER_T21_TRGO) || \
bogdanm 84:0b3ab51c8877 130 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
bogdanm 84:0b3ab51c8877 131 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
bogdanm 84:0b3ab51c8877 132 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
bogdanm 84:0b3ab51c8877 133 /**
bogdanm 84:0b3ab51c8877 134 * @}
bogdanm 84:0b3ab51c8877 135 */
bogdanm 84:0b3ab51c8877 136
bogdanm 84:0b3ab51c8877 137 /** @defgroup DAC_output_buffer
bogdanm 84:0b3ab51c8877 138 * @{
bogdanm 84:0b3ab51c8877 139 */
bogdanm 84:0b3ab51c8877 140 #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 141 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1)
bogdanm 84:0b3ab51c8877 142
bogdanm 84:0b3ab51c8877 143 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
bogdanm 84:0b3ab51c8877 144 ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
bogdanm 84:0b3ab51c8877 145 /**
bogdanm 84:0b3ab51c8877 146 * @}
bogdanm 84:0b3ab51c8877 147 */
bogdanm 84:0b3ab51c8877 148
bogdanm 84:0b3ab51c8877 149 /** @defgroup DAC_Channel_selection
bogdanm 84:0b3ab51c8877 150 * @{
bogdanm 84:0b3ab51c8877 151 */
bogdanm 84:0b3ab51c8877 152 #define DAC_CHANNEL_1 ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 153
bogdanm 84:0b3ab51c8877 154 #define IS_DAC_CHANNEL(CHANNEL) ((CHANNEL) == DAC_CHANNEL_1)
bogdanm 84:0b3ab51c8877 155 /**
bogdanm 84:0b3ab51c8877 156 * @}
bogdanm 84:0b3ab51c8877 157 */
bogdanm 84:0b3ab51c8877 158
bogdanm 84:0b3ab51c8877 159 /** @defgroup DAC_data_alignement
bogdanm 84:0b3ab51c8877 160 * @{
bogdanm 84:0b3ab51c8877 161 */
bogdanm 84:0b3ab51c8877 162 #define DAC_ALIGN_12B_R ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 163 #define DAC_ALIGN_12B_L ((uint32_t)0x00000004)
bogdanm 84:0b3ab51c8877 164 #define DAC_ALIGN_8B_R ((uint32_t)0x00000008)
bogdanm 84:0b3ab51c8877 165
bogdanm 84:0b3ab51c8877 166 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
bogdanm 84:0b3ab51c8877 167 ((ALIGN) == DAC_ALIGN_12B_L) || \
bogdanm 84:0b3ab51c8877 168 ((ALIGN) == DAC_ALIGN_8B_R))
bogdanm 84:0b3ab51c8877 169 /**
bogdanm 84:0b3ab51c8877 170 * @}
bogdanm 84:0b3ab51c8877 171 */
bogdanm 84:0b3ab51c8877 172
bogdanm 84:0b3ab51c8877 173
bogdanm 84:0b3ab51c8877 174 /** @defgroup DAC_data
bogdanm 84:0b3ab51c8877 175 * @{
bogdanm 84:0b3ab51c8877 176 */
bogdanm 84:0b3ab51c8877 177 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0)
bogdanm 84:0b3ab51c8877 178 /**
bogdanm 84:0b3ab51c8877 179 * @}
bogdanm 84:0b3ab51c8877 180 */
bogdanm 84:0b3ab51c8877 181
bogdanm 84:0b3ab51c8877 182 /** @defgroup DAC_flags_definition
bogdanm 84:0b3ab51c8877 183 * @{
bogdanm 84:0b3ab51c8877 184 */
bogdanm 84:0b3ab51c8877 185 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
bogdanm 84:0b3ab51c8877 186
bogdanm 84:0b3ab51c8877 187 #define IS_DAC_FLAG(FLAG) ((FLAG) == DAC_FLAG_DMAUDR1)
bogdanm 84:0b3ab51c8877 188 /**
bogdanm 84:0b3ab51c8877 189 * @}
bogdanm 84:0b3ab51c8877 190 */
bogdanm 84:0b3ab51c8877 191
bogdanm 84:0b3ab51c8877 192 /** @defgroup DAC_flags_definition
bogdanm 84:0b3ab51c8877 193 * @{
bogdanm 84:0b3ab51c8877 194 */
bogdanm 84:0b3ab51c8877 195 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_CR_DMAUDRIE1)
bogdanm 84:0b3ab51c8877 196
bogdanm 84:0b3ab51c8877 197 #define IS_DAC_IT(IT) ((IT) == DAC_IT_DMAUDR1)
bogdanm 84:0b3ab51c8877 198
bogdanm 84:0b3ab51c8877 199 /**
bogdanm 84:0b3ab51c8877 200 * @}
bogdanm 84:0b3ab51c8877 201 */
bogdanm 84:0b3ab51c8877 202
bogdanm 84:0b3ab51c8877 203 /* Exported macro ------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 204
bogdanm 84:0b3ab51c8877 205 /** @brief Reset DAC handle state
bogdanm 84:0b3ab51c8877 206 * @param __HANDLE__: specifies the DAC Handle.
bogdanm 84:0b3ab51c8877 207 * @retval None
bogdanm 84:0b3ab51c8877 208 */
bogdanm 84:0b3ab51c8877 209 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
bogdanm 84:0b3ab51c8877 210
bogdanm 84:0b3ab51c8877 211 /* Enable the DAC peripheral */
bogdanm 84:0b3ab51c8877 212 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
bogdanm 84:0b3ab51c8877 213 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__)))
bogdanm 84:0b3ab51c8877 214
bogdanm 84:0b3ab51c8877 215 /* Disable the DAC peripheral */
bogdanm 84:0b3ab51c8877 216 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
bogdanm 84:0b3ab51c8877 217 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__)))
bogdanm 84:0b3ab51c8877 218
bogdanm 84:0b3ab51c8877 219
bogdanm 84:0b3ab51c8877 220 /* Set DHR12R1 alignment */
bogdanm 84:0b3ab51c8877 221 #define __HAL_DHR12R1_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000008) + (__ALIGNEMENT__))
bogdanm 84:0b3ab51c8877 222
bogdanm 84:0b3ab51c8877 223 /* Enable the DAC interrupt */
bogdanm 84:0b3ab51c8877 224 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
bogdanm 84:0b3ab51c8877 225
bogdanm 84:0b3ab51c8877 226 /* Disable the DAC interrupt */
bogdanm 84:0b3ab51c8877 227 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
bogdanm 84:0b3ab51c8877 228
bogdanm 84:0b3ab51c8877 229 /* Get the selected DAC's flag status */
bogdanm 84:0b3ab51c8877 230 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
bogdanm 84:0b3ab51c8877 231
bogdanm 84:0b3ab51c8877 232 /* Clear the DAC's flag */
bogdanm 84:0b3ab51c8877 233 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) |= (__FLAG__))
bogdanm 84:0b3ab51c8877 234
bogdanm 84:0b3ab51c8877 235 /* Include DAC HAL Extension module */
bogdanm 84:0b3ab51c8877 236 #include "stm32l0xx_hal_dac_ex.h"
bogdanm 84:0b3ab51c8877 237
bogdanm 84:0b3ab51c8877 238 /* Exported functions --------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 239 /* Initialization and de-initialization functions *****************************/
bogdanm 84:0b3ab51c8877 240 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac);
bogdanm 84:0b3ab51c8877 241 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac);
bogdanm 84:0b3ab51c8877 242 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
bogdanm 84:0b3ab51c8877 243 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
bogdanm 84:0b3ab51c8877 244
bogdanm 84:0b3ab51c8877 245 /* I/O operation functions ******************************************************/
bogdanm 84:0b3ab51c8877 246 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t channel);
bogdanm 84:0b3ab51c8877 247 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t channel);
bogdanm 84:0b3ab51c8877 248 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t channel, uint32_t* pData, uint32_t Length, uint32_t alignment);
bogdanm 84:0b3ab51c8877 249 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t channel);
bogdanm 84:0b3ab51c8877 250 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t channel);
bogdanm 84:0b3ab51c8877 251
bogdanm 84:0b3ab51c8877 252 /* Peripheral Control functions ***********************************************/
bogdanm 84:0b3ab51c8877 253 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t channel);
bogdanm 84:0b3ab51c8877 254 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t channel, uint32_t alignment, uint32_t data);
bogdanm 84:0b3ab51c8877 255
bogdanm 84:0b3ab51c8877 256 /* Peripheral State and Error functions ***************************************/
bogdanm 84:0b3ab51c8877 257 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
bogdanm 84:0b3ab51c8877 258 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac);
bogdanm 84:0b3ab51c8877 259 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
bogdanm 84:0b3ab51c8877 260
bogdanm 84:0b3ab51c8877 261 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
bogdanm 84:0b3ab51c8877 262 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
bogdanm 84:0b3ab51c8877 263 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
bogdanm 84:0b3ab51c8877 264 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
bogdanm 84:0b3ab51c8877 265
bogdanm 84:0b3ab51c8877 266 #endif /* STM32L051xx && STM32L061xx*/
bogdanm 84:0b3ab51c8877 267
bogdanm 84:0b3ab51c8877 268 /**
bogdanm 84:0b3ab51c8877 269 * @}
bogdanm 84:0b3ab51c8877 270 */
bogdanm 84:0b3ab51c8877 271
bogdanm 84:0b3ab51c8877 272 /**
bogdanm 84:0b3ab51c8877 273 * @}
bogdanm 84:0b3ab51c8877 274 */
bogdanm 84:0b3ab51c8877 275
bogdanm 84:0b3ab51c8877 276 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 277 }
bogdanm 84:0b3ab51c8877 278 #endif
bogdanm 84:0b3ab51c8877 279
bogdanm 84:0b3ab51c8877 280
bogdanm 84:0b3ab51c8877 281 #endif /*__STM32L0xx_HAL_DAC_H */
bogdanm 84:0b3ab51c8877 282
bogdanm 84:0b3ab51c8877 283 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/