us915 ch 9 20dbm
Dependents: DISCO-L072CZ-LRWAN1_LoRa_PingPong
Fork of SX1276GenericLib by
sx1276/sx1276-hal.h@31:e50929bd3f32, 2017-05-01 (annotated)
- Committer:
- Helmut Tschemernjak
- Date:
- Mon May 01 11:43:25 2017 +0200
- Revision:
- 31:e50929bd3f32
- Parent:
- 29:a793ce879585
- Child:
- 34:07e89f23c734
Merged from head, Semtech mbed changes of 24.4.17
- Timeouts are now in ms.
- In sync with github lora-net/LoRaMac-Node
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
GregCr | 0:e6ceb13d2d05 | 1 | /* |
GregCr | 0:e6ceb13d2d05 | 2 | / _____) _ | | |
GregCr | 0:e6ceb13d2d05 | 3 | ( (____ _____ ____ _| |_ _____ ____| |__ |
GregCr | 0:e6ceb13d2d05 | 4 | \____ \| ___ | (_ _) ___ |/ ___) _ \ |
GregCr | 0:e6ceb13d2d05 | 5 | _____) ) ____| | | || |_| ____( (___| | | | |
GregCr | 0:e6ceb13d2d05 | 6 | (______/|_____)_|_|_| \__)_____)\____)_| |_| |
mluis | 22:7f3aab69cca9 | 7 | (C) 2014 Semtech |
GregCr | 0:e6ceb13d2d05 | 8 | |
GregCr | 0:e6ceb13d2d05 | 9 | Description: - |
GregCr | 0:e6ceb13d2d05 | 10 | |
GregCr | 0:e6ceb13d2d05 | 11 | License: Revised BSD License, see LICENSE.TXT file include in the project |
GregCr | 0:e6ceb13d2d05 | 12 | |
GregCr | 0:e6ceb13d2d05 | 13 | Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin |
GregCr | 0:e6ceb13d2d05 | 14 | */ |
GregCr | 0:e6ceb13d2d05 | 15 | #ifndef __SX1276_HAL_H__ |
GregCr | 0:e6ceb13d2d05 | 16 | #define __SX1276_HAL_H__ |
GregCr | 0:e6ceb13d2d05 | 17 | #include "sx1276.h" |
GregCr | 0:e6ceb13d2d05 | 18 | |
mluis | 22:7f3aab69cca9 | 19 | /*! |
Helmut Tschemernjak | 31:e50929bd3f32 | 20 | * @brief Radio hardware registers initialization definition |
mluis | 22:7f3aab69cca9 | 21 | * |
Helmut Tschemernjak | 31:e50929bd3f32 | 22 | * @remark Can be automatically generated by the SX1276 GUI (not yet implemented) |
mluis | 22:7f3aab69cca9 | 23 | */ |
mluis | 22:7f3aab69cca9 | 24 | #define RADIO_INIT_REGISTERS_VALUE \ |
mluis | 22:7f3aab69cca9 | 25 | { \ |
mluis | 22:7f3aab69cca9 | 26 | { MODEM_FSK , REG_LNA , 0x23 },\ |
mluis | 22:7f3aab69cca9 | 27 | { MODEM_FSK , REG_RXCONFIG , 0x1E },\ |
mluis | 22:7f3aab69cca9 | 28 | { MODEM_FSK , REG_RSSICONFIG , 0xD2 },\ |
mluis | 25:3778e6204cc1 | 29 | { MODEM_FSK , REG_AFCFEI , 0x01 },\ |
mluis | 22:7f3aab69cca9 | 30 | { MODEM_FSK , REG_PREAMBLEDETECT , 0xAA },\ |
mluis | 22:7f3aab69cca9 | 31 | { MODEM_FSK , REG_OSC , 0x07 },\ |
mluis | 22:7f3aab69cca9 | 32 | { MODEM_FSK , REG_SYNCCONFIG , 0x12 },\ |
mluis | 22:7f3aab69cca9 | 33 | { MODEM_FSK , REG_SYNCVALUE1 , 0xC1 },\ |
mluis | 22:7f3aab69cca9 | 34 | { MODEM_FSK , REG_SYNCVALUE2 , 0x94 },\ |
mluis | 22:7f3aab69cca9 | 35 | { MODEM_FSK , REG_SYNCVALUE3 , 0xC1 },\ |
mluis | 22:7f3aab69cca9 | 36 | { MODEM_FSK , REG_PACKETCONFIG1 , 0xD8 },\ |
mluis | 22:7f3aab69cca9 | 37 | { MODEM_FSK , REG_FIFOTHRESH , 0x8F },\ |
mluis | 22:7f3aab69cca9 | 38 | { MODEM_FSK , REG_IMAGECAL , 0x02 },\ |
mluis | 22:7f3aab69cca9 | 39 | { MODEM_FSK , REG_DIOMAPPING1 , 0x00 },\ |
mluis | 22:7f3aab69cca9 | 40 | { MODEM_FSK , REG_DIOMAPPING2 , 0x30 },\ |
mluis | 22:7f3aab69cca9 | 41 | { MODEM_LORA, REG_LR_PAYLOADMAXLENGTH, 0x40 },\ |
mluis | 22:7f3aab69cca9 | 42 | } \ |
mluis | 22:7f3aab69cca9 | 43 | |
GregCr | 0:e6ceb13d2d05 | 44 | /*! |
GregCr | 0:e6ceb13d2d05 | 45 | * Actual implementation of a SX1276 radio, includes some modifications to make it compatible with the MB1 LAS board |
GregCr | 0:e6ceb13d2d05 | 46 | */ |
GregCr | 0:e6ceb13d2d05 | 47 | class SX1276MB1xAS : public SX1276 |
GregCr | 0:e6ceb13d2d05 | 48 | { |
GregCr | 0:e6ceb13d2d05 | 49 | protected: |
GregCr | 0:e6ceb13d2d05 | 50 | /*! |
GregCr | 0:e6ceb13d2d05 | 51 | * Antenna switch GPIO pins objects |
GregCr | 0:e6ceb13d2d05 | 52 | */ |
Helmut Tschemernjak | 31:e50929bd3f32 | 53 | DigitalInOut AntSwitch; |
Helmut Tschemernjak | 29:a793ce879585 | 54 | #ifdef MURATA_ANT_SWITCH |
Helmut Tschemernjak | 31:e50929bd3f32 | 55 | DigitalInOut AntSwitchTX; |
Helmut Tschemernjak | 31:e50929bd3f32 | 56 | DigitalInOut AntSwitchTXBoost; |
Helmut64 | 26:87796ee62589 | 57 | #endif |
mluis | 25:3778e6204cc1 | 58 | |
Helmut Tschemernjak | 31:e50929bd3f32 | 59 | DigitalIn Fake; |
mluis | 25:3778e6204cc1 | 60 | |
GregCr | 0:e6ceb13d2d05 | 61 | private: |
GregCr | 0:e6ceb13d2d05 | 62 | static const RadioRegisters_t RadioRegsInit[]; |
mluis | 25:3778e6204cc1 | 63 | |
GregCr | 0:e6ceb13d2d05 | 64 | public: |
mluis | 21:2e496deb7858 | 65 | SX1276MB1xAS( RadioEvents_t *events, |
GregCr | 0:e6ceb13d2d05 | 66 | PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset, |
GregCr | 0:e6ceb13d2d05 | 67 | PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5, |
Helmut Tschemernjak | 29:a793ce879585 | 68 | #ifdef MURATA_ANT_SWITCH |
Helmut64 | 26:87796ee62589 | 69 | PinName antSwitch, PinName antSwitchTX, PinName antSwitchTXBoost); |
Helmut64 | 26:87796ee62589 | 70 | #else |
Helmut64 | 26:87796ee62589 | 71 | PinName antSwitch ); |
Helmut64 | 26:87796ee62589 | 72 | #endif |
mluis | 25:3778e6204cc1 | 73 | |
mluis | 22:7f3aab69cca9 | 74 | SX1276MB1xAS( RadioEvents_t *events ); |
mluis | 25:3778e6204cc1 | 75 | |
GregCr | 0:e6ceb13d2d05 | 76 | virtual ~SX1276MB1xAS( ) { }; |
mluis | 25:3778e6204cc1 | 77 | |
mluis | 25:3778e6204cc1 | 78 | protected: |
GregCr | 0:e6ceb13d2d05 | 79 | /*! |
GregCr | 0:e6ceb13d2d05 | 80 | * @brief Initializes the radio I/Os pins interface |
GregCr | 0:e6ceb13d2d05 | 81 | */ |
GregCr | 0:e6ceb13d2d05 | 82 | virtual void IoInit( void ); |
mluis | 25:3778e6204cc1 | 83 | |
GregCr | 0:e6ceb13d2d05 | 84 | /*! |
GregCr | 0:e6ceb13d2d05 | 85 | * @brief Initializes the radio registers |
GregCr | 0:e6ceb13d2d05 | 86 | */ |
GregCr | 0:e6ceb13d2d05 | 87 | virtual void RadioRegistersInit( ); |
GregCr | 0:e6ceb13d2d05 | 88 | |
GregCr | 0:e6ceb13d2d05 | 89 | /*! |
GregCr | 0:e6ceb13d2d05 | 90 | * @brief Initializes the radio SPI |
GregCr | 0:e6ceb13d2d05 | 91 | */ |
GregCr | 0:e6ceb13d2d05 | 92 | virtual void SpiInit( void ); |
mluis | 25:3778e6204cc1 | 93 | |
GregCr | 0:e6ceb13d2d05 | 94 | /*! |
GregCr | 0:e6ceb13d2d05 | 95 | * @brief Initializes DIO IRQ handlers |
GregCr | 0:e6ceb13d2d05 | 96 | * |
GregCr | 0:e6ceb13d2d05 | 97 | * @param [IN] irqHandlers Array containing the IRQ callback functions |
GregCr | 0:e6ceb13d2d05 | 98 | */ |
GregCr | 0:e6ceb13d2d05 | 99 | virtual void IoIrqInit( DioIrqHandler *irqHandlers ); |
GregCr | 0:e6ceb13d2d05 | 100 | |
GregCr | 0:e6ceb13d2d05 | 101 | /*! |
GregCr | 0:e6ceb13d2d05 | 102 | * @brief De-initializes the radio I/Os pins interface. |
GregCr | 0:e6ceb13d2d05 | 103 | * |
GregCr | 0:e6ceb13d2d05 | 104 | * \remark Useful when going in MCU lowpower modes |
GregCr | 0:e6ceb13d2d05 | 105 | */ |
GregCr | 0:e6ceb13d2d05 | 106 | virtual void IoDeInit( void ); |
GregCr | 0:e6ceb13d2d05 | 107 | |
GregCr | 0:e6ceb13d2d05 | 108 | /*! |
Helmut Tschemernjak | 31:e50929bd3f32 | 109 | * \brief Sets the radio output power. |
Helmut Tschemernjak | 31:e50929bd3f32 | 110 | * |
Helmut Tschemernjak | 31:e50929bd3f32 | 111 | * @param [IN] power Sets the RF output power |
Helmut Tschemernjak | 31:e50929bd3f32 | 112 | */ |
Helmut Tschemernjak | 31:e50929bd3f32 | 113 | virtual void SetRfTxPower( int8_t power ); |
Helmut Tschemernjak | 31:e50929bd3f32 | 114 | |
Helmut Tschemernjak | 31:e50929bd3f32 | 115 | /*! |
GregCr | 0:e6ceb13d2d05 | 116 | * @brief Gets the board PA selection configuration |
GregCr | 0:e6ceb13d2d05 | 117 | * |
GregCr | 0:e6ceb13d2d05 | 118 | * @param [IN] channel Channel frequency in Hz |
GregCr | 0:e6ceb13d2d05 | 119 | * @retval PaSelect RegPaConfig PaSelect value |
GregCr | 0:e6ceb13d2d05 | 120 | */ |
GregCr | 0:e6ceb13d2d05 | 121 | virtual uint8_t GetPaSelect( uint32_t channel ); |
GregCr | 0:e6ceb13d2d05 | 122 | |
GregCr | 0:e6ceb13d2d05 | 123 | /*! |
GregCr | 0:e6ceb13d2d05 | 124 | * @brief Set the RF Switch I/Os pins in Low Power mode |
GregCr | 0:e6ceb13d2d05 | 125 | * |
GregCr | 0:e6ceb13d2d05 | 126 | * @param [IN] status enable or disable |
GregCr | 0:e6ceb13d2d05 | 127 | */ |
GregCr | 0:e6ceb13d2d05 | 128 | virtual void SetAntSwLowPower( bool status ); |
GregCr | 0:e6ceb13d2d05 | 129 | |
GregCr | 0:e6ceb13d2d05 | 130 | /*! |
GregCr | 0:e6ceb13d2d05 | 131 | * @brief Initializes the RF Switch I/Os pins interface |
GregCr | 0:e6ceb13d2d05 | 132 | */ |
GregCr | 0:e6ceb13d2d05 | 133 | virtual void AntSwInit( void ); |
GregCr | 0:e6ceb13d2d05 | 134 | |
GregCr | 0:e6ceb13d2d05 | 135 | /*! |
GregCr | 0:e6ceb13d2d05 | 136 | * @brief De-initializes the RF Switch I/Os pins interface |
GregCr | 0:e6ceb13d2d05 | 137 | * |
Helmut Tschemernjak | 31:e50929bd3f32 | 138 | * @remark Needed to decrease the power consumption in MCU lowpower modes |
GregCr | 0:e6ceb13d2d05 | 139 | */ |
GregCr | 0:e6ceb13d2d05 | 140 | virtual void AntSwDeInit( void ); |
GregCr | 0:e6ceb13d2d05 | 141 | |
GregCr | 0:e6ceb13d2d05 | 142 | /*! |
GregCr | 0:e6ceb13d2d05 | 143 | * @brief Controls the antena switch if necessary. |
GregCr | 0:e6ceb13d2d05 | 144 | * |
Helmut Tschemernjak | 31:e50929bd3f32 | 145 | * @remark see errata note |
GregCr | 0:e6ceb13d2d05 | 146 | * |
Helmut Tschemernjak | 31:e50929bd3f32 | 147 | * @param [IN] opMode Current radio operating mode |
GregCr | 0:e6ceb13d2d05 | 148 | */ |
Helmut Tschemernjak | 31:e50929bd3f32 | 149 | virtual void SetAntSw( uint8_t opMode ); |
mluis | 25:3778e6204cc1 | 150 | |
mluis | 25:3778e6204cc1 | 151 | public: |
GregCr | 0:e6ceb13d2d05 | 152 | /*! |
GregCr | 2:5eb3066446dd | 153 | * @brief Detect the board connected by reading the value of the antenna switch pin |
GregCr | 2:5eb3066446dd | 154 | */ |
Helmut Tschemernjak | 31:e50929bd3f32 | 155 | virtual uint8_t DetectBoardType( void ); |
mluis | 25:3778e6204cc1 | 156 | |
GregCr | 2:5eb3066446dd | 157 | /*! |
GregCr | 0:e6ceb13d2d05 | 158 | * @brief Checks if the given RF frequency is supported by the hardware |
GregCr | 0:e6ceb13d2d05 | 159 | * |
GregCr | 0:e6ceb13d2d05 | 160 | * @param [IN] frequency RF frequency to be checked |
GregCr | 0:e6ceb13d2d05 | 161 | * @retval isSupported [true: supported, false: unsupported] |
GregCr | 0:e6ceb13d2d05 | 162 | */ |
GregCr | 0:e6ceb13d2d05 | 163 | virtual bool CheckRfFrequency( uint32_t frequency ); |
mluis | 25:3778e6204cc1 | 164 | |
mluis | 25:3778e6204cc1 | 165 | /*! |
GregCr | 0:e6ceb13d2d05 | 166 | * @brief Writes the radio register at the specified address |
GregCr | 0:e6ceb13d2d05 | 167 | * |
GregCr | 0:e6ceb13d2d05 | 168 | * @param [IN]: addr Register address |
GregCr | 0:e6ceb13d2d05 | 169 | * @param [IN]: data New register value |
GregCr | 0:e6ceb13d2d05 | 170 | */ |
GregCr | 0:e6ceb13d2d05 | 171 | virtual void Write ( uint8_t addr, uint8_t data ) ; |
mluis | 25:3778e6204cc1 | 172 | |
GregCr | 0:e6ceb13d2d05 | 173 | /*! |
GregCr | 0:e6ceb13d2d05 | 174 | * @brief Reads the radio register at the specified address |
GregCr | 0:e6ceb13d2d05 | 175 | * |
GregCr | 0:e6ceb13d2d05 | 176 | * @param [IN]: addr Register address |
GregCr | 0:e6ceb13d2d05 | 177 | * @retval data Register value |
GregCr | 0:e6ceb13d2d05 | 178 | */ |
GregCr | 0:e6ceb13d2d05 | 179 | virtual uint8_t Read ( uint8_t addr ) ; |
mluis | 25:3778e6204cc1 | 180 | |
GregCr | 0:e6ceb13d2d05 | 181 | /*! |
GregCr | 0:e6ceb13d2d05 | 182 | * @brief Writes multiple radio registers starting at address |
GregCr | 0:e6ceb13d2d05 | 183 | * |
GregCr | 0:e6ceb13d2d05 | 184 | * @param [IN] addr First Radio register address |
GregCr | 0:e6ceb13d2d05 | 185 | * @param [IN] buffer Buffer containing the new register's values |
GregCr | 0:e6ceb13d2d05 | 186 | * @param [IN] size Number of registers to be written |
GregCr | 0:e6ceb13d2d05 | 187 | */ |
GregCr | 0:e6ceb13d2d05 | 188 | virtual void Write( uint8_t addr, uint8_t *buffer, uint8_t size ) ; |
mluis | 25:3778e6204cc1 | 189 | |
GregCr | 0:e6ceb13d2d05 | 190 | /*! |
GregCr | 0:e6ceb13d2d05 | 191 | * @brief Reads multiple radio registers starting at address |
GregCr | 0:e6ceb13d2d05 | 192 | * |
GregCr | 0:e6ceb13d2d05 | 193 | * @param [IN] addr First Radio register address |
GregCr | 0:e6ceb13d2d05 | 194 | * @param [OUT] buffer Buffer where to copy the registers data |
GregCr | 0:e6ceb13d2d05 | 195 | * @param [IN] size Number of registers to be read |
GregCr | 0:e6ceb13d2d05 | 196 | */ |
GregCr | 0:e6ceb13d2d05 | 197 | virtual void Read ( uint8_t addr, uint8_t *buffer, uint8_t size ) ; |
mluis | 25:3778e6204cc1 | 198 | |
GregCr | 0:e6ceb13d2d05 | 199 | /*! |
GregCr | 0:e6ceb13d2d05 | 200 | * @brief Writes the buffer contents to the SX1276 FIFO |
GregCr | 0:e6ceb13d2d05 | 201 | * |
GregCr | 0:e6ceb13d2d05 | 202 | * @param [IN] buffer Buffer containing data to be put on the FIFO. |
GregCr | 0:e6ceb13d2d05 | 203 | * @param [IN] size Number of bytes to be written to the FIFO |
GregCr | 0:e6ceb13d2d05 | 204 | */ |
GregCr | 0:e6ceb13d2d05 | 205 | virtual void WriteFifo( uint8_t *buffer, uint8_t size ) ; |
GregCr | 0:e6ceb13d2d05 | 206 | |
GregCr | 0:e6ceb13d2d05 | 207 | /*! |
GregCr | 0:e6ceb13d2d05 | 208 | * @brief Reads the contents of the SX1276 FIFO |
GregCr | 0:e6ceb13d2d05 | 209 | * |
GregCr | 0:e6ceb13d2d05 | 210 | * @param [OUT] buffer Buffer where to copy the FIFO read data. |
GregCr | 0:e6ceb13d2d05 | 211 | * @param [IN] size Number of bytes to be read from the FIFO |
GregCr | 0:e6ceb13d2d05 | 212 | */ |
GregCr | 0:e6ceb13d2d05 | 213 | virtual void ReadFifo( uint8_t *buffer, uint8_t size ) ; |
mluis | 25:3778e6204cc1 | 214 | |
GregCr | 0:e6ceb13d2d05 | 215 | /*! |
GregCr | 0:e6ceb13d2d05 | 216 | * @brief Reset the SX1276 |
GregCr | 0:e6ceb13d2d05 | 217 | */ |
GregCr | 0:e6ceb13d2d05 | 218 | virtual void Reset( void ); |
GregCr | 0:e6ceb13d2d05 | 219 | }; |
GregCr | 0:e6ceb13d2d05 | 220 | |
GregCr | 0:e6ceb13d2d05 | 221 | #endif // __SX1276_HAL_H__ |