Revision 4:759de09ebb25, committed 2020-02-24

Comitter:

renemagrit

Date:

Mon Feb 24 13:18:29 2020 +0000

Parent:

1:fbc5f1a06efd

Commit message:

First work version of BMS HV.

Changed in this revision

--- a/main.cpp	Sun Nov 10 21:10:37 2019 +0000
+++ b/main.cpp	Mon Feb 24 13:18:29 2020 +0000
@@ -52,26 +52,29 @@
 
 /* K O N F I G U R I S I    P I N O V E*/
  
-DigitalIn bmsFault(PC_8);
-DigitalOut bmsWakeUp(PC_9);
+DigitalIn bmsFault(PA_4);//PC_8);
+DigitalOut bmsWakeUp(PB_0);//PC_9);
 
 // - - - UART CONFIGURATION - - - 
 
-Serial pc(PA_9, PA_10,250000);
-Serial pc1(PC_10, PC_11,9600);
+Serial pc(PA_0, PA_1, 250000);//PA_9, PA_10,250000);
+Serial pc1(USBTX, USBRX, 9600);//PC_10, PC_11,9600);
 
 
 void posaljiUARTu(int length, uint8_t * data){
     
     for(int i=0;i<length;i++)
-      pc.printf("%d",data[i]);
+      pc.putc(data[i]);
     
+    //if(length > 10){
+   //  sscanf(pBuf,"+IPD,%d,%d:%s", &linkID, &ipdLen, type); 
+    //}
       wait_ms(1);
 }
 
 void WakePL455(){
     bmsWakeUp = 1;
-    wait_us(10);
+    wait_ms(10);
     bmsWakeUp = 0;
 }
 uint16_t CRC16(BYTE *pBuf, int nLen)
@@ -250,11 +253,46 @@
     }
     return bRes;
 }
+BYTE recBuff[1024];
+int recLen=0;
+int expected=0;
+volatile bool full = false;
+int rdLen=0;
 
 void callback() {
     // Note: you need to actually read from the serial to clear the RX interrupt
-    pc1.printf("* * *    Uspesan PRIJEM!     * * *\n");
-    pc1.printf("%c\n", pc.getc());
+    //pc1.printf("* * *    Uspesan PRIJEM!     * * *\n");
+    while(pc.readable()){
+        //pc1.printf("jepse");
+        //pc1.printf("%d\n", pc.getc());
+        recBuff[recLen++]=pc.getc();
+        if(expected==0) expected = recBuff[0]+4;
+        if(expected==recLen){
+            full=true;
+            rdLen=expected;
+            expected=0;
+            recLen=0;
+        }
+    }
+}
+
+void waitFrame(){
+    while(!full);
+    full=false;
+    for(int i = 0;i<rdLen;i++){
+        pc1.printf("%X ",recBuff[i]);
+    }
+    
+    pc1.printf("\n\n- - - VOLTAGE - - -\n");
+    for(int i = 1; i < recBuff[0] - 1; i += 2){
+               
+        int voltage = recBuff[i+1];
+        voltage |= (recBuff[i]) << 8;
+        double vol = ((double)voltage)/65536.0 * 5.0;
+        pc1.printf("CELL[%d] = %.6f V\n",(recBuff[0] - 1)/2 -(i-1)/2,vol);
+    }
+      
+    pc1.printf("\n");
 }
  
 int main() {
@@ -266,7 +304,6 @@
     pc.printf("Done \n");
     */
     pc1.printf("INICIJALIZACIJA START \n");
-    int nSent = 0;
     
     WakePL455();
     
@@ -275,48 +312,125 @@
     // that is already awake. The least number of times to sequence wake and pwrdown will be half the number of
     // boards to cover the worst case combination of boards already awake or shutdown.
     for(int nDev_ID = 0; nDev_ID < TOTALBOARDS>>1; nDev_ID++) {
-        nSent = WriteReg(nDev_ID, 12, 0x40, 1, FRMWRT_ALL_NR);  // send out broadcast pwrdown command
+        WriteReg(nDev_ID, 0x12, 0x40, 1, FRMWRT_ALL_NR);  // send out broadcast pwrdown command
         wait_ms(5); //~5ms
         WakePL455();
         wait_ms(5); //~5ms
     }
     // Mask Customer Checksum Fault bit
-    nSent = WriteReg(0, 107, 0x8000, 2, FRMWRT_ALL_NR); // clear all fault summary flags
+    WriteReg(0, 107, 0x8000, 2, FRMWRT_ALL_NR); // clear all fault summary flags
 
     // Clear all faults
-    nSent = WriteReg(0, 82, 0xFFC0, 2, FRMWRT_ALL_NR);      // clear all fault summary flags
-    nSent = WriteReg(0, 81, 0x38, 1, FRMWRT_ALL_NR); // clear fault flags in the system status register
+    WriteReg(0, 82, 0xFFC0, 2, FRMWRT_ALL_NR);      // clear all fault summary flags
+    WriteReg(0, 81, 0x38, 1, FRMWRT_ALL_NR); // clear fault flags in the system status register
 
     // Auto-address all boards (section 1.2.2)
-    nSent = WriteReg(0, 14, 0x19, 1, FRMWRT_ALL_NR); // set auto-address mode on all boards
-    nSent = WriteReg(0, 12, 0x08, 1, FRMWRT_ALL_NR); // enter auto address mode on all boards, the next write to this ID will be its address
+    WriteReg(0, 14, 0x19, 1, FRMWRT_ALL_NR); // set auto-address mode on all boards
+    WriteReg(0, 12, 0x08, 1, FRMWRT_ALL_NR); // enter auto address mode on all boards, the next write to this ID will be its address
 
     // Set addresses for all boards in daisy-chain (section 1.2.3)
     for (int nDev_ID = 0; nDev_ID < TOTALBOARDS; nDev_ID++)
     {
-        nSent = WriteReg(nDev_ID, 10, nDev_ID, 1, FRMWRT_ALL_NR); // send address to each board
+        WriteReg(nDev_ID, 10, nDev_ID, 1, FRMWRT_ALL_NR); // send address to each board
     }
 
     // Enable all communication interfaces on all boards in the stack (section 1.2.1)
-    nSent = WriteReg(0, 16, 0x10F8, 2, FRMWRT_ALL_NR);  // set communications baud rate and enable all interfaces on all boards in stack
+    //default 250k bound
+    WriteReg(0, 16, 0x10F8, 2, FRMWRT_ALL_NR);  // set communications baud rate and enable all interfaces on all boards in stack
 
     pc1.printf("INICIJALIZACIJA END \n");
     
     pc1.printf("Response? \n");
-
-    /*for (int nDev_ID = TOTALBOARDS - 1; nDev_ID >= 0; --nDev_ID)
+    for (int nDev_ID = TOTALBOARDS - 1; nDev_ID >= 0; --nDev_ID)
     {
         // read device ID to see if there is a response
         ReadReg(nDev_ID, 10, &wTemp, 1, 0); // 0ms timeout
-        wait_ms(1);
-    }*/
+        wait_ms(10);
+    }
     wait(1);
+        
+    // Clear all faults (section 1.2.7)
+    WriteReg(0, 82, 0xFFC0, 2, FRMWRT_ALL_NR); // clear all fault summary flags
+    WriteReg(0, 81, 0x38, 1, FRMWRT_ALL_NR); // clear fault flags in the system status register
+
+    wait_ms(10);
+
+    // Configure AFE (section 2.2.1)
+
+    int nDev_ID = 0;
+    WriteReg(nDev_ID, 60, 0x00, 1, FRMWRT_SGL_NR); // set 0 mux delay
+    WriteReg(nDev_ID, 61, 0x00, 1, FRMWRT_SGL_NR); // set 0 initial delay
+
+    // Configure voltage and internal sample period (section 2.2.2)
+    nDev_ID = 0;
+    WriteReg(nDev_ID, 62, 0xCC, 1, FRMWRT_SGL_NR); // set 99.92us ADC sampling period
+
+    // Configure the oversampling rate (section 2.2.3)
+    nDev_ID = 0;
+    WriteReg(nDev_ID, 7, 0x00, 1, FRMWRT_SGL_NR); // set no oversampling period
+    
+        // Select number of cells and channels to sample (section 2.2.5.1)
+    nDev_ID = 0;
+    //(nDev_ID, 13, 0x10, 1, FRMWRT_SGL_NR); // set number of cells to 16
+    //WriteReg(nDev_ID, 3, 0xFFFF03C0, 4, FRMWRT_SGL_NR); // select all cell, AUX channels 0 and 1, and internal digital die and internal analog die temperatures
+
+    // Select identical number of cells and channels on all modules simultaneously (section 2.2.5.2)
+    //WriteReg(0, 13, 0x10, 1, FRMWRT_ALL_NR); // set number of cells to 16
+    //WriteReg(0, 3, 0xFFFF03C0, 4, FRMWRT_ALL_NR); // select all cell, AUX channels 0 and 1, and internal digital die and internal analog die temperatures
+    
+   // WriteReg(0, 13, 0x07, 1, FRMWRT_ALL_NR); // set number of cells to 8
+    //moze bey ove gornje fje koja nema nikakav efekat
+    WriteReg(0, 3, 0xFFFF00C0, 4, FRMWRT_ALL_NR); // select all cell channels 1-8, AUX channels 0 and 1, and internal digital die and internal analog die temperatures
+
+    // Set cell over-voltage and cell under-voltage thresholds on a single board (section 2.2.6.1)
+    nDev_ID = 0;
+    WriteReg(nDev_ID, 144, 0xD1EC, 2, FRMWRT_SGL_NR); // set OV threshold = 4.1000V
+    WriteReg(nDev_ID, 142, 0x6148, 2, FRMWRT_SGL_NR); // set UV threshold = 1.9000V
+
+    // Set cell over-voltage and cell under-voltage thresholds on all boards simultaneously (section 2.2.6.2)
+    WriteReg(0, 144, 0xD1EC, 2, FRMWRT_ALL_NR); // set OV threshold = 4.1000V
+    WriteReg(0, 142, 0x6148, 2, FRMWRT_ALL_NR); // set UV threshold = 1.9000V
+    
+    //-------------22.2.2020.   waitFrame();
+    
+    //***************************************************************************************************************************
+    // Send broadcast request to all boards to sample and send results (section 3.2)
+    //WriteReg(0, 2, 0x02, 1, FRMWRT_ALL_NR); // send sync sample command
+    //nSent = WaitRespFrame(bFrame, 81, 0); // 24 bytes data (x3) + packet header (x3) + CRC (x3), 0ms timeout
+ 
+    // Send broadcast request to all boards to sample and store results (section 3.3.1)
+    //WriteReg(0, 2, 0x00, 1, FRMWRT_ALL_NR); // send sync sample command
+
+    // Read sampled data from boards (section 3.3.2)
+    // 24 bytes - still configured for 8 AFE channels plus 2 AUX channels plus internal digital and analog die
+    // temperatures (see code for section 2.2.5.2)
+    
+    nDev_ID = 0;
+    
+    //waitFrame();
+    
+    WriteReg(nDev_ID, 2, 0x20, 1, FRMWRT_SGL_R); // send read sampled values command
+    //nSent = WaitRespFrame(bFrame, 27, 0); // 24 bytes data + packet header + CRC, 0ms timeout
+    
+    waitFrame();
+     // Send sample request to single board to sample and send results (section 4.2)
+
+    nDev_ID = 0;
+    //WriteReg(nDev_ID, 2, 0x01, 1, FRMWRT_SGL_R); // send sync sample command
+    //nSent = WaitRespFrame(bFrame, 27, 0); // 24 bytes data + packet header + CRC, 0ms timeout
+    //waitFrame();
     
     while (1) {
         pc1.printf("Main Code \n");
         wait(2);
-        
+        nDev_ID = 0;
+        WriteReg(nDev_ID, 2, 0x20, 1, FRMWRT_SGL_R); // send read sampled values command
+        waitFrame();
         if(bmsFault)
             pc1.printf("- - - GRESKA FAULT! - - -\n");
+    
+
     }
+    
+    
 }
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