Diff: targets/hal/TARGET_Freescale/TARGET_K20XX/sleep.c

Revision:

489:119543c9f674

Parent:

445:3312ed629f01

Child:

499:d0e9408fd176

diff -r e8797c084377 -r 119543c9f674 targets/hal/TARGET_Freescale/TARGET_K20XX/sleep.c
--- a/targets/hal/TARGET_Freescale/TARGET_K20XX/sleep.c	Thu Mar 05 13:15:07 2015 +0000
+++ b/targets/hal/TARGET_Freescale/TARGET_K20XX/sleep.c	Thu Mar 12 14:30:49 2015 +0000
@@ -39,13 +39,32 @@
     SCB->SCR = 1<<SCB_SCR_SLEEPDEEP_Pos;
 
     __WFI();
-
     //Switch back to PLL as clock source if needed
     //The interrupt that woke up the device will run at reduced speed
     if (PLL_FLL_en) {
+        
+#if defined (TARGET_K20D50M)    
         if (MCG->C6 & (1<<MCG_C6_PLLS_SHIFT) != 0) /* If PLL */
             while((MCG->S & MCG_S_LOCK0_MASK) == 0x00U); /* Wait until locked */
         MCG->C1 &= ~MCG_C1_CLKS_MASK;
+#else    
+        // MCG->C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 
+        MCG->C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3) | MCG_C1_IRCLKEN_MASK;
+        // MCG->C6: LOLIE=0,PLLS=0,CME=0,VDIV0=0   
+        MCG->C6 = MCG_C6_VDIV0(0);
+        while((MCG->S & MCG_S_OSCINIT0_MASK) == 0u) { } // Check that the oscillator is running 
+        while((MCG->S & 0x0Cu) != 0x08u) { }            // Wait until external reference clock is selected as MCG output 
+        // MCG->C5: PLLCLKEN=0,PLLSTEN=0,PRDIV0=3
+        MCG->C5 = MCG_C5_PRDIV0(5);
+        // MCG->C6: LOLIE=0,PLLS=1,CME=0,VDIV0=3
+        MCG->C6 = MCG_C6_PLLS_MASK | MCG_C6_VDIV0(3);
+        while((MCG->S & 0x0Cu) != 0x08u) { }            // Wait until external reference clock is selected as MCG output         
+        while((MCG->S & MCG_S_PLLST_MASK) == 0u) { }    // Wait until the source of the PLLS clock has switched to the PLL 
+        while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { }    // Wait until locked
+        // MCG->C1: CLKS=0,FRDIV=2,IREFS=0,IRCLKEN=1,IREFSTEN=0
+        MCG->C1 = MCG_C1_FRDIV(2) | MCG_C1_IRCLKEN_MASK;;
+        while((MCG->S & 0x0Cu) != 0x0Cu) { }            // Wait until output of the PLL is selected
+        while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { }    // Wait until locked             
+#endif
     }
-
 }