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easy-connect/atmel-rf-driver/source/at24mac.cpp@0:a49e37a83a7a, 2019-04-15 (annotated)
- Committer:
- DuaaAbusharkh
- Date:
- Mon Apr 15 08:30:22 2019 +0000
- Revision:
- 0:a49e37a83a7a
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Who changed what in which revision?
User | Revision | Line number | New contents of line |
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DuaaAbusharkh | 0:a49e37a83a7a | 1 | /* |
DuaaAbusharkh | 0:a49e37a83a7a | 2 | * Copyright (c) 2016-2016 ARM Limited. All rights reserved. |
DuaaAbusharkh | 0:a49e37a83a7a | 3 | * SPDX-License-Identifier: Apache-2.0 |
DuaaAbusharkh | 0:a49e37a83a7a | 4 | * Licensed under the Apache License, Version 2.0 (the License); you may |
DuaaAbusharkh | 0:a49e37a83a7a | 5 | * not use this file except in compliance with the License. |
DuaaAbusharkh | 0:a49e37a83a7a | 6 | * You may obtain a copy of the License at |
DuaaAbusharkh | 0:a49e37a83a7a | 7 | * |
DuaaAbusharkh | 0:a49e37a83a7a | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
DuaaAbusharkh | 0:a49e37a83a7a | 9 | * |
DuaaAbusharkh | 0:a49e37a83a7a | 10 | * Unless required by applicable law or agreed to in writing, software |
DuaaAbusharkh | 0:a49e37a83a7a | 11 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT |
DuaaAbusharkh | 0:a49e37a83a7a | 12 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
DuaaAbusharkh | 0:a49e37a83a7a | 13 | * See the License for the specific language governing permissions and |
DuaaAbusharkh | 0:a49e37a83a7a | 14 | * limitations under the License. |
DuaaAbusharkh | 0:a49e37a83a7a | 15 | */ |
DuaaAbusharkh | 0:a49e37a83a7a | 16 | #include "at24mac.h" |
DuaaAbusharkh | 0:a49e37a83a7a | 17 | |
DuaaAbusharkh | 0:a49e37a83a7a | 18 | /* Device addressing */ |
DuaaAbusharkh | 0:a49e37a83a7a | 19 | #define AT24MAC_EEPROM_ADDRESS (0x0A<<4) |
DuaaAbusharkh | 0:a49e37a83a7a | 20 | #define AT24MAC_RW_PROTECT_ADDRESS (0x06<<4) |
DuaaAbusharkh | 0:a49e37a83a7a | 21 | #define AT24MAC_SERIAL_ADDRESS (0x0B<<4) |
DuaaAbusharkh | 0:a49e37a83a7a | 22 | |
DuaaAbusharkh | 0:a49e37a83a7a | 23 | /* Known memory blocks */ |
DuaaAbusharkh | 0:a49e37a83a7a | 24 | #define AT24MAC_SERIAL_OFFSET (0x80) |
DuaaAbusharkh | 0:a49e37a83a7a | 25 | #define AT24MAC_EUI64_OFFSET (0x98) |
DuaaAbusharkh | 0:a49e37a83a7a | 26 | #define AT24MAC_EUI48_OFFSET (0x9A) |
DuaaAbusharkh | 0:a49e37a83a7a | 27 | |
DuaaAbusharkh | 0:a49e37a83a7a | 28 | #define SERIAL_LEN 16 |
DuaaAbusharkh | 0:a49e37a83a7a | 29 | #define EUI64_LEN 8 |
DuaaAbusharkh | 0:a49e37a83a7a | 30 | #define EUI48_LEN 6 |
DuaaAbusharkh | 0:a49e37a83a7a | 31 | |
DuaaAbusharkh | 0:a49e37a83a7a | 32 | AT24Mac::I2CReset::I2CReset(PinName sda, PinName scl) |
DuaaAbusharkh | 0:a49e37a83a7a | 33 | { |
DuaaAbusharkh | 0:a49e37a83a7a | 34 | mbed::DigitalInOut SDA(sda, PIN_OUTPUT, PullUp, 1); |
DuaaAbusharkh | 0:a49e37a83a7a | 35 | mbed::DigitalInOut SCL(scl, PIN_OUTPUT, PullUp, 0); |
DuaaAbusharkh | 0:a49e37a83a7a | 36 | //generate 9 clocks for worst-case scenario |
DuaaAbusharkh | 0:a49e37a83a7a | 37 | for (int i = 0; i < 10; ++i) { |
DuaaAbusharkh | 0:a49e37a83a7a | 38 | SCL = 1; |
DuaaAbusharkh | 0:a49e37a83a7a | 39 | wait_us(5); |
DuaaAbusharkh | 0:a49e37a83a7a | 40 | SCL = 0; |
DuaaAbusharkh | 0:a49e37a83a7a | 41 | wait_us(5); |
DuaaAbusharkh | 0:a49e37a83a7a | 42 | } |
DuaaAbusharkh | 0:a49e37a83a7a | 43 | //generate a STOP condition |
DuaaAbusharkh | 0:a49e37a83a7a | 44 | SDA = 0; |
DuaaAbusharkh | 0:a49e37a83a7a | 45 | wait_us(5); |
DuaaAbusharkh | 0:a49e37a83a7a | 46 | SCL = 1; |
DuaaAbusharkh | 0:a49e37a83a7a | 47 | wait_us(5); |
DuaaAbusharkh | 0:a49e37a83a7a | 48 | SDA = 1; |
DuaaAbusharkh | 0:a49e37a83a7a | 49 | wait_us(5); |
DuaaAbusharkh | 0:a49e37a83a7a | 50 | } |
DuaaAbusharkh | 0:a49e37a83a7a | 51 | |
DuaaAbusharkh | 0:a49e37a83a7a | 52 | /*I2C needs to be reset before constructing the I2C object (in case I2C is stuck) |
DuaaAbusharkh | 0:a49e37a83a7a | 53 | because they use the same pins, therefore i2c_reset has to be before _i2c |
DuaaAbusharkh | 0:a49e37a83a7a | 54 | in the initializer list*/ |
DuaaAbusharkh | 0:a49e37a83a7a | 55 | AT24Mac::AT24Mac(PinName sda, PinName scl) : i2c_reset(sda, scl), _i2c(sda, scl) |
DuaaAbusharkh | 0:a49e37a83a7a | 56 | { |
DuaaAbusharkh | 0:a49e37a83a7a | 57 | // Do nothing |
DuaaAbusharkh | 0:a49e37a83a7a | 58 | } |
DuaaAbusharkh | 0:a49e37a83a7a | 59 | |
DuaaAbusharkh | 0:a49e37a83a7a | 60 | int AT24Mac::read_serial(void *buf) |
DuaaAbusharkh | 0:a49e37a83a7a | 61 | { |
DuaaAbusharkh | 0:a49e37a83a7a | 62 | char offset = AT24MAC_SERIAL_OFFSET; |
DuaaAbusharkh | 0:a49e37a83a7a | 63 | if (_i2c.write(AT24MAC_SERIAL_ADDRESS, &offset, 1, true)) |
DuaaAbusharkh | 0:a49e37a83a7a | 64 | return -1; //No ACK |
DuaaAbusharkh | 0:a49e37a83a7a | 65 | return _i2c.read(AT24MAC_SERIAL_ADDRESS, (char*)buf, SERIAL_LEN); |
DuaaAbusharkh | 0:a49e37a83a7a | 66 | } |
DuaaAbusharkh | 0:a49e37a83a7a | 67 | |
DuaaAbusharkh | 0:a49e37a83a7a | 68 | int AT24Mac::read_eui64(void *buf) |
DuaaAbusharkh | 0:a49e37a83a7a | 69 | { |
DuaaAbusharkh | 0:a49e37a83a7a | 70 | char offset = AT24MAC_EUI64_OFFSET; |
DuaaAbusharkh | 0:a49e37a83a7a | 71 | if (_i2c.write(AT24MAC_SERIAL_ADDRESS, &offset, 1, true)) |
DuaaAbusharkh | 0:a49e37a83a7a | 72 | return -1; //No ACK |
DuaaAbusharkh | 0:a49e37a83a7a | 73 | return _i2c.read(AT24MAC_SERIAL_ADDRESS, (char*)buf, EUI64_LEN); |
DuaaAbusharkh | 0:a49e37a83a7a | 74 | } |
DuaaAbusharkh | 0:a49e37a83a7a | 75 | |
DuaaAbusharkh | 0:a49e37a83a7a | 76 | int AT24Mac::read_eui48(void *buf) |
DuaaAbusharkh | 0:a49e37a83a7a | 77 | { |
DuaaAbusharkh | 0:a49e37a83a7a | 78 | char offset = AT24MAC_EUI48_OFFSET; |
DuaaAbusharkh | 0:a49e37a83a7a | 79 | if (_i2c.write(AT24MAC_SERIAL_ADDRESS, &offset, 1, true)) |
DuaaAbusharkh | 0:a49e37a83a7a | 80 | return -1; //No ACK |
DuaaAbusharkh | 0:a49e37a83a7a | 81 | return _i2c.read(AT24MAC_SERIAL_ADDRESS, (char*)buf, EUI48_LEN); |
DuaaAbusharkh | 0:a49e37a83a7a | 82 | } |