City1082TextLCD - 16*2Lcd Display

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16*2Lcd Display

TextLCD.cpp@42:1962dc501f94, 2020-01-14 (annotated)

Committer:: reedas
Date:: Tue Jan 14 11:27:31 2020 +0000
Revision:: 42:1962dc501f94
Parent:: 41:111ca62e8a59

Initial Commit;

Who changed what in which revision?

User	Revision	Line number	New contents of line
wim	37:ce348c002929	1	/* mbed TextLCD Library, for LCDs based on HD44780 controllers
simon	6:e4cb7ddee0d3	2	* Copyright (c) 2007-2010, sford, http://mbed.org
wim	14:0c32b66b14b8	3	* 2013, v01: WH, Added LCD types, fixed LCD address issues, added Cursor and UDCs
wim	14:0c32b66b14b8	4	* 2013, v02: WH, Added I2C and SPI bus interfaces
wim	15:b70ebfffb258	5	* 2013, v03: WH, Added support for LCD40x4 which uses 2 controllers
wim	18:bd65dc10f27f	6	* 2013, v04: WH, Added support for Display On/Off, improved 4bit bootprocess
wim	18:bd65dc10f27f	7	* 2013, v05: WH, Added support for 8x2B, added some UDCs
wim	19:c747b9e2e7b8	8	* 2013, v06: WH, Added support for devices that use internal DC/DC converters
wim	20:e0da005a777f	9	* 2013, v07: WH, Added support for backlight and include portdefinitions for LCD2004 Module from DFROBOT
wim	22:35742ec80c24	10	* 2014, v08: WH, Refactored in Base and Derived Classes to deal with mbed lib change regarding 'NC' defined pins
wim	25:6162b31128c9	11	* 2014, v09: WH/EO, Added Class for Native SPI controllers such as ST7032
wim	26:bd897a001012	12	* 2014, v10: WH, Added Class for Native I2C controllers such as ST7032i, Added support for MCP23008 I2C portexpander, Added support for Adafruit module
wim	30:033048611c01	13	* 2014, v11: WH, Added support for native I2C controllers such as PCF21XX, Improved the _initCtrl() method to deal with differences between all supported controllers
wim	32:59c4b8f648d4	14	* 2014, v12: WH, Added support for native I2C controller PCF2119 and native I2C/SPI controllers SSD1803, ST7036, added setContrast method (by JH1PJL) for supported devices (eg ST7032i)
wim	34:e5a0dcb43ecc	15	* 2014, v13: WH, Added support for controllers US2066/SSD1311 (OLED), added setUDCBlink() method for supported devices (eg SSD1803), fixed issue in setPower()
wim	34:e5a0dcb43ecc	16	* 2014, v14: WH, Added support for PT6314 (VFD), added setOrient() method for supported devices (eg SSD1803, US2066), added Double Height lines for supported devices,
wim	34:e5a0dcb43ecc	17	* added 16 UDCs for supported devices (eg PCF2103), moved UDC defines to TextLCD_UDC file, added TextLCD_Config.h for feature and footprint settings.
wim	35:311be6444a39	18	* 2014, v15: WH, Added AC780 support, added I2C expander modules, fixed setBacklight() for inverted logic modules. Fixed bug in LCD_SPI_N define
wim	36:9f5f86dfd44a	19	* 2014, v16: WH, Added ST7070 and KS0073 support, added setIcon(), clrIcon() and setInvert() method for supported devices
wim	37:ce348c002929	20	* 2015, v17: WH, Clean up low-level _writeCommand() and _writeData(), Added support for alternative fonttables (eg PCF21XX), Added ST7066_ACM controller for ACM1602 module
wim	38:cbe275b0b647	21	* 2015, v18: WH, Performance improvement I2C portexpander
wim	38:cbe275b0b647	22	* 2015, v19: WH, Fixed Adafruit I2C/SPI portexpander pinmappings, fixed SYDZ Backlight
wim	39:e9c2319de9c5	23	* 2015, v20: WH, Fixed occasional Init fail caused by insufficient wait time after ReturnHome command (0x02), Added defines to reduce memory footprint (eg LCD_ICON),
wim	40:d3496c3ea301	24	* Fixed and Added more fonttable support for PCF2119R_3V3, Added HD66712 controller.
wim	41:111ca62e8a59	25	* 2015, v21: WH, Added LCD32x2 defines and code, Fixed KS0073 DL=1 init for SPI, Added defines to reduce memory footprint (LCD_TWO_CTRL, LCD_CONTRAST, LCD_UTF8_FONT)
wim	41:111ca62e8a59	26	* Added SPLC792A controller, Added UTF8_2_LCD decode for Cyrilic font (By Andriy Ribalko). Added setFont()
reedas	42:1962dc501f94	27	* 2019, v22?: AR Changed wait_ms to ThisThread::sleep_for and added (char) casts for int conversion on parameters passed to a couple of function definitions. MBED 5.xx
simon	1:ac48b187213c	28	*
simon	1:ac48b187213c	29	* Permission is hereby granted, free of charge, to any person obtaining a copy
simon	1:ac48b187213c	30	* of this software and associated documentation files (the "Software"), to deal
simon	1:ac48b187213c	31	* in the Software without restriction, including without limitation the rights
simon	1:ac48b187213c	32	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
simon	1:ac48b187213c	33	* copies of the Software, and to permit persons to whom the Software is
simon	1:ac48b187213c	34	* furnished to do so, subject to the following conditions:
simon	1:ac48b187213c	35	*
simon	1:ac48b187213c	36	* The above copyright notice and this permission notice shall be included in
simon	1:ac48b187213c	37	* all copies or substantial portions of the Software.
simon	1:ac48b187213c	38	*
simon	1:ac48b187213c	39	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
simon	1:ac48b187213c	40	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
simon	1:ac48b187213c	41	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
simon	1:ac48b187213c	42	* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
simon	1:ac48b187213c	43	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
simon	1:ac48b187213c	44	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
simon	1:ac48b187213c	45	* THE SOFTWARE.
simon	1:ac48b187213c	46	*/
wim	34:e5a0dcb43ecc	47	#include "mbed.h"
simon	1:ac48b187213c	48	#include "TextLCD.h"
wim	34:e5a0dcb43ecc	49	#include "TextLCD_UDC.inc"
wim	41:111ca62e8a59	50	#include "TextLCD_UTF8.inc"
reedas	42:1962dc501f94	51
wim	21:9eb628d9e164	52	/** Create a TextLCD_Base interface
wim	15:b70ebfffb258	53	*
wim	21:9eb628d9e164	54	* @param type Sets the panel size/addressing mode (default = LCD16x2)
wim	21:9eb628d9e164	55	* @param ctrl LCD controller (default = HD44780)
wim	15:b70ebfffb258	56	*/
wim	21:9eb628d9e164	57	TextLCD_Base::TextLCD_Base(LCDType type, LCDCtrl ctrl) : _type(type), _ctrl(ctrl) {
wim	30:033048611c01	58
wim	30:033048611c01	59	// Extract LCDType data
wim	30:033048611c01	60
wim	41:111ca62e8a59	61	// Columns encoded in b15..b8
wim	41:111ca62e8a59	62	_nr_cols = (_type & LCD_T_COL_MSK) >> LCD_T_COL_SHFT;
wim	41:111ca62e8a59	63
wim	41:111ca62e8a59	64	// Rows encoded in b23..b16
wim	41:111ca62e8a59	65	_nr_rows = (_type & LCD_T_ROW_MSK) >> LCD_T_ROW_SHFT;
wim	41:111ca62e8a59	66
wim	41:111ca62e8a59	67	// Addressing mode encoded in b27..b24
wim	30:033048611c01	68	_addr_mode = _type & LCD_T_ADR_MSK;
wim	37:ce348c002929	69
wim	37:ce348c002929	70	// Font table, encoded in LCDCtrl
wim	39:e9c2319de9c5	71	_font = _ctrl & LCD_C_FNT_MSK;
wim	14:0c32b66b14b8	72	}
wim	14:0c32b66b14b8	73
wim	21:9eb628d9e164	74	/** Init the LCD Controller(s)
wim	21:9eb628d9e164	75	* Clear display
wim	36:9f5f86dfd44a	76	* @param _LCDDatalength dl sets the datalength of data/commands
wim	36:9f5f86dfd44a	77	* @return none
wim	21:9eb628d9e164	78	*/
wim	36:9f5f86dfd44a	79	void TextLCD_Base::_init(_LCDDatalength dl) {
wim	38:cbe275b0b647	80
reedas	42:1962dc501f94	81	ThisThread::sleep_for(100); // Wait 100ms to ensure powered up
wim	15:b70ebfffb258	82
wim	41:111ca62e8a59	83	#if (LCD_TWO_CTRL == 1)
wim	15:b70ebfffb258	84	// Select and configure second LCD controller when needed
wim	15:b70ebfffb258	85	if(_type==LCD40x4) {
wim	30:033048611c01	86	_ctrl_idx=_LCDCtrl_1; // Select 2nd controller
wim	36:9f5f86dfd44a	87	_initCtrl(dl); // Init 2nd controller
wim	15:b70ebfffb258	88	}
wim	41:111ca62e8a59	89	#endif
wim	15:b70ebfffb258	90
wim	15:b70ebfffb258	91	// Select and configure primary LCD controller
wim	27:22d5086f6ba6	92	_ctrl_idx=_LCDCtrl_0; // Select primary controller
wim	36:9f5f86dfd44a	93	_initCtrl(dl); // Init primary controller
wim	28:30fa94f7341c	94
wim	32:59c4b8f648d4	95	// Clear whole display and Reset Cursor location
wim	32:59c4b8f648d4	96	// Note: This will make sure that some 3-line displays that skip topline of a 4-line configuration
wim	32:59c4b8f648d4	97	// are cleared and init cursor correctly.
wim	32:59c4b8f648d4	98	cls();
wim	15:b70ebfffb258	99	}
wim	15:b70ebfffb258	100
wim	21:9eb628d9e164	101	/** Init the LCD controller
wim	36:9f5f86dfd44a	102	* Set number of lines, fonttype, no cursor etc
wim	36:9f5f86dfd44a	103	* The controller is accessed in 4-bit parallel mode either directly via mbed pins or through I2C or SPI expander.
wim	36:9f5f86dfd44a	104	* Some controllers also support native I2C or SPI interfaces.
wim	36:9f5f86dfd44a	105	*
wim	41:111ca62e8a59	106	* @param _LCDDatalength dl sets the 4 or 8 bit datalength of data/commands. Required for some native serial modes that dont work when DL=0.
wim	36:9f5f86dfd44a	107	* @return none
wim	30:033048611c01	108	*
wim	30:033048611c01	109	* Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim	21:9eb628d9e164	110	*/
wim	36:9f5f86dfd44a	111	void TextLCD_Base::_initCtrl(_LCDDatalength dl) {
wim	32:59c4b8f648d4	112	int _bias_lines=0; // Set Bias and lines (Instr Set 1), temporary variable.
wim	32:59c4b8f648d4	113	int _lines=0; // Set lines (Ext Instr Set), temporary variable.
wim	36:9f5f86dfd44a	114
wim	26:bd897a001012	115	this->_setRS(false); // command mode
simon	1:ac48b187213c	116
wim	37:ce348c002929	117	if (dl == _LCD_DL_4) {
wim	37:ce348c002929	118	// The Controller could be in 8 bit mode (power-on reset) or in 4 bit mode (warm reboot) at this point.
wim	37:ce348c002929	119	// Follow this procedure to make sure the Controller enters the correct state. The hardware interface
wim	37:ce348c002929	120	// between the uP and the LCD can only write the 4 most significant bits (Most Significant Nibble, MSN).
wim	37:ce348c002929	121	// In 4 bit mode the LCD expects the MSN first, followed by the LSN.
wim	37:ce348c002929	122	//
wim	38:cbe275b0b647	123	// Current state: 8 bit mode \| 4 bit mode, MSN is next \| 4 bit mode, LSN is next
wim	37:ce348c002929	124	//-------------------------------------------------------------------------------------------------
wim	38:cbe275b0b647	125	_writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, \| set 8 bit mode (MSN), \| set dummy LSN,
wim	38:cbe275b0b647	126	// remains in 8 bit mode \| remains in 4 bit mode \| remains in 4 bit mode
reedas	42:1962dc501f94	127	ThisThread::sleep_for(15); //
wim	37:ce348c002929	128
wim	38:cbe275b0b647	129	_writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, \| set dummy LSN, \| set 8bit mode (MSN),
wim	38:cbe275b0b647	130	// remains in 8 bit mode \| change to 8 bit mode \| remains in 4 bit mode
reedas	42:1962dc501f94	131	ThisThread::sleep_for(15); //
wim	33:900a94bc7585	132
wim	38:cbe275b0b647	133	_writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, \| set 8 bit mode (MSN) and dummy LSN, \| set dummy LSN,
wim	38:cbe275b0b647	134	// remains in 8 bit mode \| remains in 8 bit mode \| change to 8 bit mode
reedas	42:1962dc501f94	135	ThisThread::sleep_for(15); //
wim	37:ce348c002929	136
wim	37:ce348c002929	137	// Controller is now in 8 bit mode
wim	37:ce348c002929	138
wim	37:ce348c002929	139	_writeNibble(0x2); // Change to 4-bit mode (MSN), the LSN is undefined dummy
wim	37:ce348c002929	140	wait_us(40); // most instructions take 40us
wim	37:ce348c002929	141
wim	37:ce348c002929	142	// Controller is now in 4-bit mode
wim	37:ce348c002929	143	// Note: 4/8 bit mode is ignored for most native SPI and I2C devices. They dont use the parallel bus.
wim	37:ce348c002929	144	// However, _writeNibble() method is void anyway for native SPI and I2C devices.
wim	38:cbe275b0b647	145	}
wim	38:cbe275b0b647	146	else {
wim	38:cbe275b0b647	147	// Reset in 8 bit mode, final Function set will follow
wim	38:cbe275b0b647	148	_writeCommand(0x30); // Function set 0 0 1 DL=1 N F x x
reedas	42:1962dc501f94	149	ThisThread::sleep_for(1); // most instructions take 40us
wim	37:ce348c002929	150	}
wim	25:6162b31128c9	151
wim	29:a3663151aa65	152	// Device specific initialisations: DC/DC converter to generate VLCD or VLED, number of lines etc
wim	19:c747b9e2e7b8	153	switch (_ctrl) {
wim	32:59c4b8f648d4	154
wim	36:9f5f86dfd44a	155	case KS0073:
wim	36:9f5f86dfd44a	156	// Initialise Display configuration
wim	36:9f5f86dfd44a	157	switch (_type) {
wim	41:111ca62e8a59	158	// case LCD6x1:
wim	36:9f5f86dfd44a	159	case LCD8x1: //8x1 is a regular 1 line display
wim	41:111ca62e8a59	160	// case LCD8x2B: //8x1 is a 16x1 line display
wim	36:9f5f86dfd44a	161	case LCD12x1:
wim	36:9f5f86dfd44a	162	case LCD16x1:
wim	36:9f5f86dfd44a	163	case LCD20x1:
wim	36:9f5f86dfd44a	164	case LCD24x1:
wim	36:9f5f86dfd44a	165	// case LCD32x1: // EXT pin is High, extension driver needed
wim	41:111ca62e8a59	166	// case LCD40x1: // EXT pin is High, extension driver needed
wim	41:111ca62e8a59	167	// case LCD52x1: // EXT pin is High, extension driver needed
wim	41:111ca62e8a59	168	_function = dl \| 0x02; // Set function, 0 0 1 DL, N, RE(0), DH, REV
wim	41:111ca62e8a59	169	// Note: 4 bit mode is NOT ignored for native SPI !
wim	41:111ca62e8a59	170	// DL=1 (8 bits bus), DL=0 (4 bits bus)
wim	41:111ca62e8a59	171	// N=0 (1-line mode), N=1 (2-line mode), dont care for 4 line mode
wim	41:111ca62e8a59	172	// RE=0 (Dis. Extended Regs, special mode for KS0073)
wim	41:111ca62e8a59	173	// DH=1 (Disp shift enable, special mode for KS0073)
wim	41:111ca62e8a59	174	// REV=0 (Reverse normal, special mode for KS0073)
wim	41:111ca62e8a59	175
wim	41:111ca62e8a59	176	_function_1 = dl \| 0x04; // Set function, 0 0 1 DL, N, RE(1), BE, LP (Ext Regs)
wim	41:111ca62e8a59	177	// Note: 4 bit mode is NOT ignored for native SPI !
wim	41:111ca62e8a59	178	// DL=1 (8 bits bus), DL=0 (4 bits bus)
wim	41:111ca62e8a59	179	// N=0 (1-line mode), N=1 (2-line mode), dont care for 4 line mode
wim	41:111ca62e8a59	180	// RE=1 (Ena Extended Regs, special mode for KS0073)
wim	41:111ca62e8a59	181	// BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim	41:111ca62e8a59	182	// LP=0 (LP=1 Low power mode, LP=0 Normal)
wim	36:9f5f86dfd44a	183
wim	36:9f5f86dfd44a	184	_function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim	41:111ca62e8a59	185	// NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim	36:9f5f86dfd44a	186	break;
wim	36:9f5f86dfd44a	187
wim	36:9f5f86dfd44a	188	// case LCD12x3D: // Special mode for KS0073, KS0078 and PCF21XX
wim	36:9f5f86dfd44a	189	// case LCD12x3D1: // Special mode for KS0073, KS0078 and PCF21XX
wim	36:9f5f86dfd44a	190	case LCD12x4D: // Special mode for KS0073, KS0078 and PCF21XX
wim	36:9f5f86dfd44a	191	// case LCD16x3D: // Special mode for KS0073, KS0078
wim	41:111ca62e8a59	192	// case LCD16x3D1: // Special mode for KS0073, KS0078
wim	36:9f5f86dfd44a	193	// case LCD16x4D: // Special mode for KS0073, KS0078
wim	36:9f5f86dfd44a	194	case LCD20x4D: // Special mode for KS0073, KS0078
wim	41:111ca62e8a59	195	_function = dl \| 0x02; // Set function, 0 0 1 DL, N, RE(0), DH, REV
wim	41:111ca62e8a59	196	// Note: 4 bit mode is NOT ignored for native SPI !
wim	41:111ca62e8a59	197	// DL=1 (8 bits bus), DL=0 (4 bits bus)
wim	41:111ca62e8a59	198	// N=0 (1-line mode), N=1 (2-line mode), dont care for 4 line mode
wim	41:111ca62e8a59	199	// RE=0 (Dis. Extended Regs, special mode for KS0073)
wim	41:111ca62e8a59	200	// DH=1 (Disp shift enable, special mode for KS0073)
wim	41:111ca62e8a59	201	// REV=0 (Reverse normal, special mode for KS0073)
wim	36:9f5f86dfd44a	202
wim	41:111ca62e8a59	203	_function_1 = dl \| 0x04; // Set function, 0 0 1 DL, N, RE(1), BE, LP (Ext Regs)
wim	41:111ca62e8a59	204	// Note: 4 bit mode is NOT ignored for native SPI !
wim	41:111ca62e8a59	205	// DL=1 (8 bits bus), DL=0 (4 bits bus)
wim	41:111ca62e8a59	206	// N=0 (1-line mode), N=1 (2-line mode), dont care for 4 line mode
wim	41:111ca62e8a59	207	// RE=1 (Ena Extended Regs, special mode for KS0073)
wim	41:111ca62e8a59	208	// BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim	41:111ca62e8a59	209	// LP=0 (LP=1 Low power mode, LP=0 Normal)
wim	36:9f5f86dfd44a	210
wim	36:9f5f86dfd44a	211	_function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim	41:111ca62e8a59	212	// NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim	36:9f5f86dfd44a	213	break;
wim	36:9f5f86dfd44a	214
wim	41:111ca62e8a59	215	// case LCD6x2:
wim	41:111ca62e8a59	216	case LCD8x2:
wim	41:111ca62e8a59	217	case LCD16x2:
wim	41:111ca62e8a59	218	// case LCD16x1C:
wim	41:111ca62e8a59	219	case LCD20x2:
wim	41:111ca62e8a59	220	case LCD24x2:
wim	41:111ca62e8a59	221	case LCD32x2:
wim	41:111ca62e8a59	222	// All other LCD types are initialised as 2 Line displays
wim	41:111ca62e8a59	223	_function = dl \| 0x0A; // Set function, 0 0 1 DL, N, RE(0), DH, REV
wim	41:111ca62e8a59	224	// Note: 4 bit mode is NOT ignored for native SPI !
wim	41:111ca62e8a59	225	// DL=1 (8 bits bus), DL=0 (4 bits bus)
wim	41:111ca62e8a59	226	// N=1 (2-line mode), N=0 (1-line mode)
wim	41:111ca62e8a59	227	// RE=0 (Dis. Extended Regs, special mode for KS0073)
wim	41:111ca62e8a59	228	// DH=1 (Disp shift enable, special mode for KS0073)
wim	41:111ca62e8a59	229	// REV=0 (Reverse normal, special mode for KS0073)
wim	36:9f5f86dfd44a	230
wim	41:111ca62e8a59	231	_function_1 = dl \| 0x0C; // Set function, 0 0 1 DL, N, RE(1), BE, LP (Ext Regs)
wim	41:111ca62e8a59	232	// Note: 4 bit mode is NOT ignored for native SPI !
wim	41:111ca62e8a59	233	// DL=1 (8 bits bus), DL=0 (4 bits bus)
wim	41:111ca62e8a59	234	// N=1 (2 line mode), N=0 (1-line mode)
wim	41:111ca62e8a59	235	// RE=1 (Ena Extended Regs, special mode for KS0073)
wim	41:111ca62e8a59	236	// BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim	41:111ca62e8a59	237	// LP=0 (LP=1 Low power mode, LP=0 Normal)
wim	36:9f5f86dfd44a	238
wim	36:9f5f86dfd44a	239	_function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim	36:9f5f86dfd44a	240	// NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim	36:9f5f86dfd44a	241	break;
wim	41:111ca62e8a59	242
wim	41:111ca62e8a59	243	default:
wim	41:111ca62e8a59	244	error("Error: LCD Controller type does not support this Display type\n\r");
wim	41:111ca62e8a59	245	break;
wim	36:9f5f86dfd44a	246	} // switch type
wim	36:9f5f86dfd44a	247
wim	36:9f5f86dfd44a	248	// init special features
wim	36:9f5f86dfd44a	249	_writeCommand(0x20 \| _function_1);// Function set 001 DL N RE(1) BE LP (Ext Regs)
wim	36:9f5f86dfd44a	250	// DL=0 (4 bits bus), DL=1 (8 bits mode)
wim	36:9f5f86dfd44a	251	// N=0 (1 line mode), N=1 (2 line mode)
wim	36:9f5f86dfd44a	252	// RE=1 (Ena Extended Regs, special mode for KS0073)
wim	36:9f5f86dfd44a	253	// BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for KS0073)
wim	36:9f5f86dfd44a	254	// LP=0 (LP=1 Low power mode, LP=0 Normal)
wim	36:9f5f86dfd44a	255
wim	36:9f5f86dfd44a	256	_writeCommand(0x08 \| _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim	36:9f5f86dfd44a	257	// FW=0 (5-dot font, special mode for KS0073)
wim	36:9f5f86dfd44a	258	// BW=0 (Cur BW invert disable, special mode for KS0073)
wim	36:9f5f86dfd44a	259	// NW=0 (1,2 Line), NW=1 (4 line, special mode for KS0073)
wim	36:9f5f86dfd44a	260
wim	36:9f5f86dfd44a	261	_writeCommand(0x10); // Scroll/Shift set 0001 DS/HS4 DS/HS3 DS/HS2 DS/HS1 (Ext Regs)
wim	36:9f5f86dfd44a	262	// Dotscroll/Display shift enable (Special mode for KS0073)
wim	36:9f5f86dfd44a	263
wim	36:9f5f86dfd44a	264	_writeCommand(0x80); // Scroll Quantity set 1 0 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 (Ext Regs)
wim	36:9f5f86dfd44a	265	// Scroll quantity (Special mode for KS0073)
wim	36:9f5f86dfd44a	266
wim	36:9f5f86dfd44a	267	_writeCommand(0x20 \| _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim	36:9f5f86dfd44a	268	// DL=0 (4 bits bus), DL=1 (8 bits mode)
wim	36:9f5f86dfd44a	269	// N=0 (1 line mode), N=1 (2 line mode)
wim	36:9f5f86dfd44a	270	// RE=0 (Dis. Extended Regs, special mode for KS0073)
wim	36:9f5f86dfd44a	271	// DH=1 (Disp shift enable/disable, special mode for KS0073)
wim	36:9f5f86dfd44a	272	// REV=0 (Reverse/Normal, special mode for KS0073)
wim	36:9f5f86dfd44a	273	break; // case KS0073 Controller
wim	36:9f5f86dfd44a	274
wim	36:9f5f86dfd44a	275
wim	29:a3663151aa65	276	case KS0078:
wim	29:a3663151aa65	277	// Initialise Display configuration
wim	29:a3663151aa65	278	switch (_type) {
wim	29:a3663151aa65	279	case LCD8x1: //8x1 is a regular 1 line display
wim	29:a3663151aa65	280	case LCD8x2B: //8x2B is a special case of 16x1
wim	29:a3663151aa65	281	// case LCD12x1:
wim	29:a3663151aa65	282	case LCD16x1:
wim	30:033048611c01	283	// case LCD20x1:
wim	29:a3663151aa65	284	case LCD24x1:
wim	41:111ca62e8a59	285	_function = dl \| 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim	32:59c4b8f648d4	286	// DL=0 (4 bits bus)
wim	32:59c4b8f648d4	287	// N=0 (1 line mode), N=1 (2 line mode)
wim	32:59c4b8f648d4	288	// RE=0 (Dis. Extended Regs, special mode for KS0078)
wim	32:59c4b8f648d4	289	// DH=1 (Disp shift enable, special mode for KS0078)
wim	32:59c4b8f648d4	290	// REV=0 (Reverse normal, special mode for KS0078)
wim	32:59c4b8f648d4	291
wim	41:111ca62e8a59	292	_function_1 = dl \| 0x04; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim	32:59c4b8f648d4	293	// DL=0 (4 bits bus)
wim	32:59c4b8f648d4	294	// N=0 (1 line mode), N=1 (2 line mode)
wim	32:59c4b8f648d4	295	// RE=1 (Ena Extended Regs, special mode for KS0078)
wim	32:59c4b8f648d4	296	// BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim	32:59c4b8f648d4	297	// 0
wim	30:033048611c01	298
wim	32:59c4b8f648d4	299	_function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim	32:59c4b8f648d4	300	// NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim	29:a3663151aa65	301	break;
wim	29:a3663151aa65	302
wim	36:9f5f86dfd44a	303	// case LCD12x3D: // Special mode for KS0073, KS0078 and PCF21XX
wim	36:9f5f86dfd44a	304	// case LCD12x3D1: // Special mode for KS0073, KS0078 and PCF21XX
wim	36:9f5f86dfd44a	305	// case LCD12x4D: // Special mode for KS0073, KS0078 and PCF21XX
wim	36:9f5f86dfd44a	306	// case LCD16x3D: // Special mode for KS0073, KS0078
wim	36:9f5f86dfd44a	307	// case LCD16x4D: // Special mode for KS0073, KS0078
wim	36:9f5f86dfd44a	308	// case LCD20x4D: // Special mode for KS0073, KS0078
wim	30:033048611c01	309	// case LCD24x3D: // Special mode for KS0078
wim	30:033048611c01	310	// case LCD24x3D1: // Special mode for KS0078
wim	30:033048611c01	311	case LCD24x4D: // Special mode for KS0078
wim	41:111ca62e8a59	312	_function = dl \| 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim	32:59c4b8f648d4	313	// DL=0 (4 bits bus)
wim	32:59c4b8f648d4	314	// N=0 (dont care for 4 line mode)
wim	32:59c4b8f648d4	315	// RE=0 (Dis. Extended Regs, special mode for KS0078)
wim	32:59c4b8f648d4	316	// DH=1 (Disp shift enable, special mode for KS0078)
wim	32:59c4b8f648d4	317	// REV=0 (Reverse normal, special mode for KS0078)
wim	32:59c4b8f648d4	318
wim	41:111ca62e8a59	319	_function_1 = dl \| 0x04; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim	32:59c4b8f648d4	320	// DL=0 (4 bits bus)
wim	32:59c4b8f648d4	321	// N=0 (1 line mode), N=1 (2 line mode)
wim	32:59c4b8f648d4	322	// RE=1 (Ena Extended Regs, special mode for KS0078)
wim	32:59c4b8f648d4	323	// BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim	32:59c4b8f648d4	324	// 0
wim	29:a3663151aa65	325
wim	32:59c4b8f648d4	326	_function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim	32:59c4b8f648d4	327	// NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim	30:033048611c01	328	break;
wim	33:900a94bc7585	329
wim	41:111ca62e8a59	330	// case LCD6x2:
wim	41:111ca62e8a59	331	case LCD8x2:
wim	41:111ca62e8a59	332	case LCD16x2:
wim	41:111ca62e8a59	333	// case LCD16x1C:
wim	41:111ca62e8a59	334	case LCD20x2:
wim	41:111ca62e8a59	335	case LCD24x2:
wim	41:111ca62e8a59	336	case LCD32x2:
wim	41:111ca62e8a59	337	case LCD40x2:
wim	30:033048611c01	338	// All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim	41:111ca62e8a59	339	_function = dl \| 0x0A; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim	32:59c4b8f648d4	340	// DL=0 (4 bits bus)
wim	32:59c4b8f648d4	341	// N=1 (1 line mode), N=1 (2 line mode)
wim	32:59c4b8f648d4	342	// RE=0 (Dis. Extended Regs, special mode for KS0078)
wim	32:59c4b8f648d4	343	// DH=1 (Disp shift enable, special mode for KS0078)
wim	32:59c4b8f648d4	344	// REV=0 (Reverse normal, special mode for KS0078)
wim	32:59c4b8f648d4	345
wim	41:111ca62e8a59	346	_function_1 = dl \| 0x0C; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim	32:59c4b8f648d4	347	// DL=0 (4 bits bus)
wim	32:59c4b8f648d4	348	// N=1 (1 line mode), N=1 (2 line mode)
wim	32:59c4b8f648d4	349	// RE=1 (Ena Extended Regs, special mode for KS0078)
wim	32:59c4b8f648d4	350	// BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim	32:59c4b8f648d4	351	// 0
wim	30:033048611c01	352
wim	32:59c4b8f648d4	353	_function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim	32:59c4b8f648d4	354	// NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim	29:a3663151aa65	355	break;
wim	41:111ca62e8a59	356
wim	41:111ca62e8a59	357	default:
wim	41:111ca62e8a59	358	error("Error: LCD Controller type does not support this Display type\n\r");
wim	41:111ca62e8a59	359	break;
wim	29:a3663151aa65	360	} // switch type
wim	29:a3663151aa65	361
wim	32:59c4b8f648d4	362	// init special features
wim	32:59c4b8f648d4	363	_writeCommand(0x20 \| _function_1);// Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim	32:59c4b8f648d4	364	// DL=0 (4 bits bus), DL=1 (8 bits mode)
wim	32:59c4b8f648d4	365	// N=0 (1 line mode), N=1 (2 line mode)
wim	32:59c4b8f648d4	366	// RE=1 (Ena Extended Regs, special mode for KS0078)
wim	32:59c4b8f648d4	367	// BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for KS0078)
wim	32:59c4b8f648d4	368	// 0
wim	32:59c4b8f648d4	369
wim	32:59c4b8f648d4	370	_writeCommand(0x08 \| _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim	32:59c4b8f648d4	371	// FW=0 (5-dot font, special mode for KS0078)
wim	32:59c4b8f648d4	372	// BW=0 (Cur BW invert disable, special mode for KS0078)
wim	32:59c4b8f648d4	373	// NW=0 (1,2 Line), NW=1 (4 line, special mode for KS0078)
wim	32:59c4b8f648d4	374
wim	32:59c4b8f648d4	375	_writeCommand(0x10); // Scroll/Shift set 0001 DS/HS4 DS/HS3 DS/HS2 DS/HS1 (Ext Regs)
wim	32:59c4b8f648d4	376	// Dotscroll/Display shift enable (Special mode for KS0078)
wim	32:59c4b8f648d4	377
wim	32:59c4b8f648d4	378	_writeCommand(0x80); // Scroll Quantity set 1 0 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 (Ext Regs)
wim	32:59c4b8f648d4	379	// Scroll quantity (Special mode for KS0078)
wim	32:59c4b8f648d4	380
wim	32:59c4b8f648d4	381	_writeCommand(0x20 \| _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim	32:59c4b8f648d4	382	// DL=0 (4 bits bus), DL=1 (8 bits mode)
wim	32:59c4b8f648d4	383	// N=0 (1 line mode), N=1 (2 line mode)
wim	32:59c4b8f648d4	384	// RE=0 (Dis. Extended Regs, special mode for KS0078)
wim	32:59c4b8f648d4	385	// DH=1 (Disp shift enable/disable, special mode for KS0078)
wim	32:59c4b8f648d4	386	// REV=0 (Reverse/Normal, special mode for KS0078)
wim	29:a3663151aa65	387	break; // case KS0078 Controller
wim	29:a3663151aa65	388
wim	26:bd897a001012	389	case ST7032_3V3:
wim	26:bd897a001012	390	// ST7032 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim	41:111ca62e8a59	391	// Note: very similar to SPLC792A
wim	26:bd897a001012	392	case ST7032_5V:
wim	32:59c4b8f648d4	393	// ST7032 controller: Disable Voltage booster for VLCD. VDD=5V
wim	41:111ca62e8a59	394
wim	29:a3663151aa65	395	// Initialise Display configuration
wim	29:a3663151aa65	396	switch (_type) {
wim	29:a3663151aa65	397	case LCD8x1: //8x1 is a regular 1 line display
wim	29:a3663151aa65	398	case LCD8x2B: //8x2B is a special case of 16x1
wim	29:a3663151aa65	399	// case LCD12x1:
wim	29:a3663151aa65	400	case LCD16x1:
wim	30:033048611c01	401	// case LCD20x1:
wim	32:59c4b8f648d4	402	case LCD24x1:
wim	32:59c4b8f648d4	403	_function = 0x00; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=0 (1-line display mode), F=0 (5*7dot), 0, IS
wim	32:59c4b8f648d4	404	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	32:59c4b8f648d4	405	// Saved to allow switch between Instruction sets at later time
wim	32:59c4b8f648d4	406	break;
wim	28:30fa94f7341c	407
wim	32:59c4b8f648d4	408	case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim	32:59c4b8f648d4	409	case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim	32:59c4b8f648d4	410	case LCD12x4D: // Special mode for KS0078 and PCF21XX
wim	33:900a94bc7585	411	case LCD16x3G: // Special mode for ST7036
wim	32:59c4b8f648d4	412	case LCD24x4D: // Special mode for KS0078
wim	32:59c4b8f648d4	413	error("Error: LCD Controller type does not support this Display type\n\r");
wim	30:033048611c01	414	break;
wim	29:a3663151aa65	415
wim	32:59c4b8f648d4	416	default:
wim	32:59c4b8f648d4	417	// All other LCD types are initialised as 2 Line displays
wim	32:59c4b8f648d4	418	_function = 0x08; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=1 (2-line display mode), F=0 (5*7dot), 0, IS
wim	32:59c4b8f648d4	419	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	32:59c4b8f648d4	420	// Saved to allow switch between Instruction sets at later time
wim	32:59c4b8f648d4	421	break;
wim	32:59c4b8f648d4	422	} // switch type
wim	32:59c4b8f648d4	423
wim	32:59c4b8f648d4	424	// init special features
wim	33:900a94bc7585	425	_writeCommand(0x20 \| _function \| 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim	33:900a94bc7585	426
wim	33:900a94bc7585	427	_writeCommand(0x1C); // Internal OSC frequency adjustment Framefreq=183HZ, Bias will be 1/4 (Instr Set=1)
wim	41:111ca62e8a59	428	// Note: Bias and Osc register not available on SPLC792A
wim	32:59c4b8f648d4	429
wim	32:59c4b8f648d4	430	_contrast = LCD_ST7032_CONTRAST;
wim	32:59c4b8f648d4	431	_writeCommand(0x70 \| (_contrast & 0x0F)); // Set Contrast Low bits, 0 1 1 1 C3 C2 C1 C0 (IS=1)
wim	32:59c4b8f648d4	432
wim	32:59c4b8f648d4	433
wim	32:59c4b8f648d4	434	if (_ctrl == ST7032_3V3) {
wim	41:111ca62e8a59	435	// _icon_power = 0x04; // Icon display off (Bit3=0), Booster circuit is turned on (Bit2=1) (IS=1)
wim	41:111ca62e8a59	436	_icon_power = 0x0C; // Icon display on (Bit3=1), Booster circuit is turned on (Bit2=1) (IS=1)
wim	41:111ca62e8a59	437	// Note: Booster circuit always on for SPLC792A, Bit2 is dont care
wim	32:59c4b8f648d4	438	// Saved to allow contrast change at later time
wim	32:59c4b8f648d4	439	}
wim	32:59c4b8f648d4	440	else {
wim	36:9f5f86dfd44a	441	// _icon_power = 0x00; // Icon display off, Booster circuit is turned off (IS=1)
wim	36:9f5f86dfd44a	442	_icon_power = 0x08; // Icon display on, Booster circuit is turned off (IS=1)
wim	32:59c4b8f648d4	443	// Saved to allow contrast change at later time
wim	32:59c4b8f648d4	444	}
wim	32:59c4b8f648d4	445	_writeCommand(0x50 \| _icon_power \| ((_contrast >> 4) & 0x03)); // Set Icon, Booster and Contrast High bits, 0 1 0 1 Ion Bon C5 C4 (IS=1)
reedas	42:1962dc501f94	446	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	32:59c4b8f648d4	447
wim	32:59c4b8f648d4	448	_writeCommand(0x68 \| (LCD_ST7032_RAB & 0x07)); // Voltage follower, 0 1 1 0 FOn=1, Ampl ratio Rab2=1, Rab1=0, Rab0=0 (IS=1)
reedas	42:1962dc501f94	449	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	32:59c4b8f648d4	450
wim	32:59c4b8f648d4	451	_writeCommand(0x20 \| _function); // Select Instruction Set = 0
wim	32:59c4b8f648d4	452
wim	32:59c4b8f648d4	453	break; // case ST7032_3V3 Controller
wim	32:59c4b8f648d4	454	// case ST7032_5V Controller
wim	32:59c4b8f648d4	455
wim	32:59c4b8f648d4	456	case ST7036_3V3:
wim	32:59c4b8f648d4	457	// ST7036 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim	32:59c4b8f648d4	458	// Note: supports 1,2 (LCD_T_A) or 3 lines (LCD_T_G)
wim	32:59c4b8f648d4	459	case ST7036_5V:
wim	32:59c4b8f648d4	460	// ST7036 controller: Disable Voltage booster for VLCD. VDD=5V
wim	32:59c4b8f648d4	461	// Note: supports 1,2 (LCD_T_A) or 3 lines (LCD_T_G)
wim	32:59c4b8f648d4	462
wim	32:59c4b8f648d4	463	// Initialise Display configuration
wim	32:59c4b8f648d4	464	switch (_type) {
wim	32:59c4b8f648d4	465	case LCD8x1: //8x1 is a regular 1 line display
wim	32:59c4b8f648d4	466	case LCD8x2B: //8x2D is a special case of 16x1
wim	32:59c4b8f648d4	467	// case LCD12x1:
wim	32:59c4b8f648d4	468	case LCD16x1:
wim	32:59c4b8f648d4	469	case LCD24x1:
wim	32:59c4b8f648d4	470	_function = 0x00; // Set function, 0 0 1 DL=0 (4-bit Databus), N=0 (1 Line), DH=0 (5x7font), IS2, IS1 (Select Instruction Set)
wim	32:59c4b8f648d4	471	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	32:59c4b8f648d4	472	// Saved to allow switch between Instruction sets at later time
wim	32:59c4b8f648d4	473
wim	32:59c4b8f648d4	474	_bias_lines = 0x04; // Bias: 1/5, 1 or 2-Lines LCD
wim	32:59c4b8f648d4	475	break;
wim	32:59c4b8f648d4	476
wim	32:59c4b8f648d4	477	// case LCD12x3G: // Special mode for ST7036
wim	32:59c4b8f648d4	478	case LCD16x3G: // Special mode for ST7036
wim	32:59c4b8f648d4	479	_function = 0x08; // Set function, 0 0 1 DL=0 (4-bit Databus), N=1 (2 Line), DH=0 (5x7font), IS2,IS1 (Select Instruction Set)
wim	32:59c4b8f648d4	480	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	32:59c4b8f648d4	481	// Saved to allow switch between Instruction sets at later time
wim	32:59c4b8f648d4	482
wim	32:59c4b8f648d4	483	_bias_lines = 0x05; // Bias: 1/5, 3-Lines LCD
wim	32:59c4b8f648d4	484	break;
wim	32:59c4b8f648d4	485
wim	32:59c4b8f648d4	486	// case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim	32:59c4b8f648d4	487	// case LCD16x3D1: // Special mode for SSD1803
wim	30:033048611c01	488	case LCD12x4D: // Special mode for PCF2116
wim	30:033048611c01	489	case LCD24x4D: // Special mode for KS0078
wim	30:033048611c01	490	error("Error: LCD Controller type does not support this Display type\n\r");
wim	29:a3663151aa65	491	break;
wim	28:30fa94f7341c	492
wim	29:a3663151aa65	493	default:
wim	32:59c4b8f648d4	494	// All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim	32:59c4b8f648d4	495	_function = 0x08; // Set function, 0 0 1 DL=0 (4-bit Databus), N=1 (2 Line), DH=0 (5x7font), IS2,IS1 (Select Instruction Set)
wim	32:59c4b8f648d4	496	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	32:59c4b8f648d4	497	// Saved to allow switch between Instruction sets at later time
wim	32:59c4b8f648d4	498
wim	32:59c4b8f648d4	499	_bias_lines = 0x04; // Bias: 1/5, 1 or 2-Lines LCD
wim	32:59c4b8f648d4	500	break;
wim	32:59c4b8f648d4	501	} // switch type
wim	32:59c4b8f648d4	502
wim	29:a3663151aa65	503
wim	32:59c4b8f648d4	504	// init special features
wim	33:900a94bc7585	505	_writeCommand(0x20 \| _function \| 0x01); // Set function, IS2,IS1 = 01 (Select Instr Set = 1)
wim	32:59c4b8f648d4	506	_writeCommand(0x10 \| _bias_lines); // Set Bias and 1,2 or 3 lines (Instr Set 1)
wim	29:a3663151aa65	507
wim	32:59c4b8f648d4	508	_contrast = LCD_ST7036_CONTRAST;
wim	32:59c4b8f648d4	509	_writeCommand(0x70 \| (_contrast & 0x0F)); // Set Contrast, 0 1 1 1 C3 C2 C1 C0 (Instr Set 1)
wim	32:59c4b8f648d4	510
wim	32:59c4b8f648d4	511	if (_ctrl == ST7036_3V3) {
wim	36:9f5f86dfd44a	512	_icon_power = 0x0C; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=1 Bon=1 C5 C4 (Instr Set 1)
wim	36:9f5f86dfd44a	513	// _icon_power = 0x04; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=0 Bon=1 C5 C4 (Instr Set 1)
wim	32:59c4b8f648d4	514	// Saved to allow contrast change at later time
wim	32:59c4b8f648d4	515	}
wim	32:59c4b8f648d4	516	else {
wim	36:9f5f86dfd44a	517	_icon_power = 0x08; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=1 Bon=0 C5 C4 (Instr Set 1)
wim	36:9f5f86dfd44a	518	// _icon_power = 0x00; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=0 Bon=0 C5 C4 (Instr Set 1)
wim	32:59c4b8f648d4	519	}
wim	29:a3663151aa65	520
wim	32:59c4b8f648d4	521	_writeCommand(0x50 \| _icon_power \| ((_contrast >> 4) & 0x03)); // Set Contrast C5, C4 (Instr Set 1)
reedas	42:1962dc501f94	522	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	32:59c4b8f648d4	523
wim	32:59c4b8f648d4	524	_writeCommand(0x68 \| (LCD_ST7036_RAB & 0x07)); // Voltagefollower On = 1, Ampl ratio Rab2, Rab1, Rab0 = 1 0 1 (Instr Set 1)
reedas	42:1962dc501f94	525	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	28:30fa94f7341c	526
wim	32:59c4b8f648d4	527	_writeCommand(0x20 \| _function); // Set function, IS2,IS1 = 00 (Select Instruction Set = 0)
wim	32:59c4b8f648d4	528
wim	32:59c4b8f648d4	529	break; // case ST7036_3V3 Controller
wim	32:59c4b8f648d4	530	// case ST7036_5V Controller
wim	36:9f5f86dfd44a	531
wim	36:9f5f86dfd44a	532	case ST7070:
wim	36:9f5f86dfd44a	533	// Initialise Display configuration
wim	36:9f5f86dfd44a	534	switch (_type) {
wim	36:9f5f86dfd44a	535	case LCD8x1: //8x1 is a regular 1 line display
wim	36:9f5f86dfd44a	536	case LCD8x2B: //8x2D is a special case of 16x1
wim	36:9f5f86dfd44a	537	// case LCD12x1:
wim	36:9f5f86dfd44a	538	case LCD16x1:
wim	36:9f5f86dfd44a	539	case LCD24x1:
wim	36:9f5f86dfd44a	540	_function = dl \| 0x00; // Set function, 0 0 1 DL=0 (4-bit Databus), N=0 (1 Line), EXT=0, x, x
wim	36:9f5f86dfd44a	541	// Note: 4 bit mode is NOT ignored for native SPI !
wim	36:9f5f86dfd44a	542	// Saved to allow switch between Instruction sets at later time
wim	36:9f5f86dfd44a	543	break;
wim	36:9f5f86dfd44a	544
wim	36:9f5f86dfd44a	545	// case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim	36:9f5f86dfd44a	546	// case LCD16x3D1: // Special mode for SSD1803
wim	36:9f5f86dfd44a	547	case LCD12x4D: // Special mode for PCF2116
wim	36:9f5f86dfd44a	548	case LCD24x4D: // Special mode for KS0078
wim	36:9f5f86dfd44a	549	// case LCD12x3G: // Special mode for ST7036
wim	36:9f5f86dfd44a	550	case LCD16x3G: // Special mode for ST7036
wim	36:9f5f86dfd44a	551	error("Error: LCD Controller type does not support this Display type\n\r");
wim	36:9f5f86dfd44a	552	break;
wim	36:9f5f86dfd44a	553
wim	36:9f5f86dfd44a	554	default:
wim	36:9f5f86dfd44a	555	// All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim	36:9f5f86dfd44a	556	_function = dl \| 0x08; // Set function, 0 0 1 DL, N=1 (2 Line), EXT=0, x, x
wim	36:9f5f86dfd44a	557	// Note: 4 bit mode is NOT ignored for native SPI !
wim	36:9f5f86dfd44a	558	// Saved to allow switch between Instruction sets at later time
wim	36:9f5f86dfd44a	559	break;
wim	36:9f5f86dfd44a	560	} // switch type
wim	36:9f5f86dfd44a	561
wim	36:9f5f86dfd44a	562	// _writeCommand(0x00); // NOP, make sure to sync SPI
wim	36:9f5f86dfd44a	563
wim	36:9f5f86dfd44a	564	// init special features
wim	36:9f5f86dfd44a	565	_writeCommand(0x20 \| _function \| 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1)
wim	36:9f5f86dfd44a	566
wim	36:9f5f86dfd44a	567	_writeCommand(0x04 \| 0x00); // Set Bias resistors 0 0 0 0 0 1 Rb1,Rb0= 0 0 (Extern Res) (Instr Set 1)
wim	36:9f5f86dfd44a	568
wim	36:9f5f86dfd44a	569	_writeCommand(0x40 \| 0x00); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim	36:9f5f86dfd44a	570	// C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim	36:9f5f86dfd44a	571	// S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim	36:9f5f86dfd44a	572
wim	36:9f5f86dfd44a	573	_writeCommand(0x20 \| _function); // Set function, EXT=0 (Select Instr Set = 0)
wim	36:9f5f86dfd44a	574
wim	36:9f5f86dfd44a	575	break; // case ST7070 Controller
wim	36:9f5f86dfd44a	576
wim	32:59c4b8f648d4	577	case SSD1803_3V3:
wim	32:59c4b8f648d4	578	// SSD1803 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim	32:59c4b8f648d4	579	// Note: supports 1,2, 3 or 4 lines
wim	32:59c4b8f648d4	580	// case SSD1803_5V:
wim	32:59c4b8f648d4	581	// SSD1803 controller: No Voltage booster for VLCD. VDD=5V
wim	32:59c4b8f648d4	582
wim	29:a3663151aa65	583	// Initialise Display configuration
wim	29:a3663151aa65	584	switch (_type) {
wim	29:a3663151aa65	585	case LCD8x1: //8x1 is a regular 1 line display
wim	30:033048611c01	586	case LCD8x2B: //8x2D is a special case of 16x1
wim	29:a3663151aa65	587	// case LCD12x1:
wim	29:a3663151aa65	588	case LCD16x1:
wim	29:a3663151aa65	589	case LCD24x1:
wim	32:59c4b8f648d4	590	_function = 0x00; // Set function 0 0 1 DL N DH RE(0) IS
wim	32:59c4b8f648d4	591	// Saved to allow switch between Instruction sets at later time
wim	32:59c4b8f648d4	592	// DL=0 4-bit Databus,
wim	32:59c4b8f648d4	593	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	32:59c4b8f648d4	594	// N=0 1 Line / 3 Line
wim	32:59c4b8f648d4	595	// DH=0 Double Height disable
wim	32:59c4b8f648d4	596	// IS=0
wim	32:59c4b8f648d4	597
wim	33:900a94bc7585	598	_function_1 = 0x02; // Set function, 0 0 1 DL N BE RE(1) REV
wim	32:59c4b8f648d4	599	// Saved to allow switch between Instruction sets at later time
wim	32:59c4b8f648d4	600	// DL=0 4-bit Databus,
wim	32:59c4b8f648d4	601	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	32:59c4b8f648d4	602	// N=0 1 Line / 3 Line
wim	32:59c4b8f648d4	603	// BE=0 Blink Enable off, special feature of SSD1803
wim	32:59c4b8f648d4	604	// REV=0 Reverse off, special feature of SSD1803
wim	32:59c4b8f648d4	605
wim	32:59c4b8f648d4	606	_lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim	32:59c4b8f648d4	607	// NW=0 1-Line LCD (N=0)
wim	29:a3663151aa65	608	break;
wim	32:59c4b8f648d4	609
wim	33:900a94bc7585	610	case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim	32:59c4b8f648d4	611	// case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim	33:900a94bc7585	612	case LCD16x3D: // Special mode for KS0078
wim	32:59c4b8f648d4	613	// case LCD16x3D1: // Special mode for SSD1803
wim	32:59c4b8f648d4	614	// case LCD20x3D: // Special mode for SSD1803
wim	32:59c4b8f648d4	615	_function = 0x00; // Set function 0 0 1 DL N DH RE(0) IS
wim	32:59c4b8f648d4	616	// Saved to allow switch between Instruction sets at later time
wim	32:59c4b8f648d4	617	// DL=0 4-bit Databus,
wim	32:59c4b8f648d4	618	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	32:59c4b8f648d4	619	// N=0 1 Line / 3 Line
wim	32:59c4b8f648d4	620	// DH=0 Double Height disable
wim	32:59c4b8f648d4	621	// IS=0
wim	32:59c4b8f648d4	622
wim	33:900a94bc7585	623	_function_1 = 0x02; // Set function, 0 0 1 DL N BE RE(1) REV
wim	32:59c4b8f648d4	624	// Saved to allow switch between Instruction sets at later time
wim	32:59c4b8f648d4	625	// DL=0 4-bit Databus,
wim	32:59c4b8f648d4	626	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	32:59c4b8f648d4	627	// N=0 1 Line / 3 Line
wim	32:59c4b8f648d4	628	// BE=0 Blink Enable off, special feature of SSD1803
wim	32:59c4b8f648d4	629	// REV=0 Reverse off, special feature of SSD1803
wim	32:59c4b8f648d4	630
wim	32:59c4b8f648d4	631	_lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim	32:59c4b8f648d4	632	// NW=1 3-Line LCD (N=0)
wim	29:a3663151aa65	633	break;
wim	30:033048611c01	634
wim	39:e9c2319de9c5	635	// case LCD10x2D: // Special mode for SSD1803, 4-line mode but switch to double height font
wim	39:e9c2319de9c5	636	case LCD10x4D: // Special mode for SSD1803
wim	32:59c4b8f648d4	637	case LCD20x4D: // Special mode for SSD1803
wim	32:59c4b8f648d4	638	_function = 0x08; // Set function 0 0 1 DL N DH RE(0) IS
wim	32:59c4b8f648d4	639	// Saved to allow switch between Instruction sets at later time
wim	32:59c4b8f648d4	640	// DL=0 4-bit Databus,
wim	32:59c4b8f648d4	641	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	32:59c4b8f648d4	642	// N=1 4 Line
wim	32:59c4b8f648d4	643	// DH=0 Double Height disable
wim	32:59c4b8f648d4	644	// IS=0
wim	32:59c4b8f648d4	645
wim	33:900a94bc7585	646	_function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim	32:59c4b8f648d4	647	// Saved to allow switch between Instruction sets at later time
wim	32:59c4b8f648d4	648	// DL=0 4-bit Databus,
wim	32:59c4b8f648d4	649	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	32:59c4b8f648d4	650	// N=1 4 Line
wim	32:59c4b8f648d4	651	// BE=0 Blink Enable off, special feature of SSD1803
wim	32:59c4b8f648d4	652	// REV=0 Reverse off, special feature of SSD1803
wim	32:59c4b8f648d4	653
wim	32:59c4b8f648d4	654	_lines = 0x01; // Ext function set 0 0 0 0 1 FW BW NW
wim	32:59c4b8f648d4	655	// NW=1 4-Line LCD (N=1)
wim	32:59c4b8f648d4	656	break;
wim	32:59c4b8f648d4	657
wim	33:900a94bc7585	658	case LCD16x3G: // Special mode for ST7036
wim	32:59c4b8f648d4	659	case LCD24x4D: // Special mode for KS0078
wim	30:033048611c01	660	error("Error: LCD Controller type does not support this Display type\n\r");
wim	30:033048611c01	661	break;
wim	30:033048611c01	662
wim	29:a3663151aa65	663	default:
wim	30:033048611c01	664	// All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim	32:59c4b8f648d4	665	_function = 0x08; // Set function 0 0 1 DL N DH RE(0) IS
wim	32:59c4b8f648d4	666	// Saved to allow switch between Instruction sets at later time
wim	32:59c4b8f648d4	667	// DL=0 4-bit Databus,
wim	32:59c4b8f648d4	668	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	32:59c4b8f648d4	669	// N=1 2 line / 4 Line
wim	32:59c4b8f648d4	670	// DH=0 Double Height disable
wim	36:9f5f86dfd44a	671	// RE=0
wim	32:59c4b8f648d4	672	// IS=0
wim	29:a3663151aa65	673
wim	33:900a94bc7585	674	_function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim	32:59c4b8f648d4	675	// Saved to allow switch between Instruction sets at later time
wim	32:59c4b8f648d4	676	// DL=0 4-bit Databus,
wim	32:59c4b8f648d4	677	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	32:59c4b8f648d4	678	// N=1 2 line / 4 Line
wim	32:59c4b8f648d4	679	// BE=0 Blink Enable off, special feature of SSD1803
wim	36:9f5f86dfd44a	680	// RE=1
wim	32:59c4b8f648d4	681	// REV=0 Reverse off, special feature of SSD1803
wim	32:59c4b8f648d4	682
wim	32:59c4b8f648d4	683	_lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim	32:59c4b8f648d4	684	// NW=0 2-Line LCD (N=1)
wim	32:59c4b8f648d4	685	break;
wim	32:59c4b8f648d4	686	} // switch type
wim	32:59c4b8f648d4	687
wim	32:59c4b8f648d4	688
wim	32:59c4b8f648d4	689	// init special features
wim	33:900a94bc7585	690	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim	32:59c4b8f648d4	691	// Select Extended Instruction Set
wim	33:900a94bc7585	692
wim	33:900a94bc7585	693	_writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim	33:900a94bc7585	694	// _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
reedas	42:1962dc501f94	695	ThisThread::sleep_for(5); // Wait to ensure completion or SSD1803 fails to set Top/Bottom after reset..
wim	33:900a94bc7585	696
wim	33:900a94bc7585	697	_writeCommand(0x08 \| _lines); // Set ext function 0 0 0 0 1 FW BW NW 1,2,3 or 4 lines (Ext Instr Set)
wim	32:59c4b8f648d4	698
wim	32:59c4b8f648d4	699	_writeCommand(0x10); // Double Height and Bias, 0 0 0 1 UD2=0, UD1=0, BS1=0 Bias 1/5, DH=0 (Ext Instr Set)
wim	32:59c4b8f648d4	700
wim	32:59c4b8f648d4	701	// _writeCommand(0x76); // Set TC Control, 0 1 1 1 0 1 1 0 (Ext Instr Set)
wim	32:59c4b8f648d4	702	// _writeData(0x02); // Set TC data, 0 0 0 0 0 TC2,TC1,TC0 = 0 1 0 (Ext Instr Set)
wim	32:59c4b8f648d4	703
wim	32:59c4b8f648d4	704	_writeCommand(0x20 \| _function \| 0x01); // Set function, 0 0 1 DL N DH RE(0) IS=1 Select Instruction Set 1
wim	32:59c4b8f648d4	705	// Select Std Instr set, Select IS=1
wim	32:59c4b8f648d4	706
wim	32:59c4b8f648d4	707	_contrast = LCD_SSD1_CONTRAST;
wim	32:59c4b8f648d4	708	_writeCommand(0x70 \| (_contrast & 0x0F)); // Set Contrast 0 1 1 1 C3, C2, C1, C0 (Instr Set 1)
wim	32:59c4b8f648d4	709
wim	36:9f5f86dfd44a	710	// _icon_power = 0x04; // Icon off, Booster on (Instr Set 1)
wim	36:9f5f86dfd44a	711	_icon_power = 0x0C; // Icon on, Booster on (Instr Set 1)
wim	32:59c4b8f648d4	712	// Saved to allow contrast change at later time
wim	32:59c4b8f648d4	713	_writeCommand(0x50 \| _icon_power \| ((_contrast >> 4) & 0x03)); // Set Power, Icon and Contrast, 0 1 0 1 Ion Bon C5 C4 (Instr Set 1)
reedas	42:1962dc501f94	714	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	32:59c4b8f648d4	715
wim	32:59c4b8f648d4	716	_writeCommand(0x68 \| (LCD_SSD1_RAB & 0x07)); // Set Voltagefollower 0 1 1 0 Don = 1, Ampl ratio Rab2, Rab1, Rab0 = 1 1 0 (Instr Set 1)
reedas	42:1962dc501f94	717	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	32:59c4b8f648d4	718
wim	33:900a94bc7585	719	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim	32:59c4b8f648d4	720	// Select Extended Instruction Set 1
wim	32:59c4b8f648d4	721	_writeCommand(0x10); // Shift/Scroll enable, 0 0 0 1 DS4/HS4 DS3/HS3 DS2/HS2 DS1/HS1 (Ext Instr Set 1)
wim	32:59c4b8f648d4	722
wim	32:59c4b8f648d4	723
wim	32:59c4b8f648d4	724	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim	32:59c4b8f648d4	725	// Select Std Instr set, Select IS=0
wim	32:59c4b8f648d4	726
wim	32:59c4b8f648d4	727	break; // case SSD1803 Controller
wim	32:59c4b8f648d4	728
wim	29:a3663151aa65	729
wim	32:59c4b8f648d4	730	// Note1: The PCF21XX family of controllers has several types that dont have an onboard voltage generator for V-LCD.
wim	32:59c4b8f648d4	731	// You must supply this LCD voltage externally and not try to enable VGen.
wim	32:59c4b8f648d4	732	// Note2: The early versions of PCF2116 controllers (eg PCF2116C) can not generate sufficiently negative voltage for the LCD at a VDD of 3V3.
wim	32:59c4b8f648d4	733	// You must supply this voltage externally and not enable VGen or you must use a higher VDD (e.g. 5V) and enable VGen.
wim	32:59c4b8f648d4	734	// More recent versions of the controller (eg PCF2116K) have an improved VGen that will work with 3V3.
wim	32:59c4b8f648d4	735	// Note3: See datasheet, PCF2116 and other types provide a V0 pin to control the LCD contrast voltage that is provided by VGen. This pins allows
wim	32:59c4b8f648d4	736	// contrast control similar to that of pin 3 on the standard 14pin LCD module connector.
wim	32:59c4b8f648d4	737	// You can disable VGen by connecting Vo to VDD. VLCD will then be used directly as LCD voltage.
wim	32:59c4b8f648d4	738	// Note4: PCF2113 and PCF2119 are different wrt to VLCD generator! There is no V0 pin. The contrast voltage is software controlled by setting the VA and VB registers.
wim	32:59c4b8f648d4	739	// Vgen is automatically switched off when the contrast voltage VA or VB is set to 0x00. Note that certain limits apply to allowed values for VA and VB.
wim	32:59c4b8f648d4	740	// Note5: See datasheet, members of the PCF21XX family support different numbers of rows/columns. Not all can support 3 or 4 rows.
wim	32:59c4b8f648d4	741	// Note6: See datasheet, the PCF21XX-C and PCF21XX-K use a non-standard character set. This may result is strange looking text when not corrected..
wim	32:59c4b8f648d4	742
wim	34:e5a0dcb43ecc	743	case PCF2103_3V3:
wim	34:e5a0dcb43ecc	744	// PCF2103 controller: No Voltage generator for VLCD, VDD=3V3..5V, VLCD input controls contrast voltage.
wim	34:e5a0dcb43ecc	745	// Initialise Display configuration
wim	34:e5a0dcb43ecc	746	switch (_type) {
wim	34:e5a0dcb43ecc	747	case LCD24x1:
wim	34:e5a0dcb43ecc	748	_function = 0x00; //FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=0 1-line/24 chars display mode, 0, H=0
wim	34:e5a0dcb43ecc	749	//Note: 4 bit mode is ignored for I2C mode
wim	34:e5a0dcb43ecc	750	break;
wim	34:e5a0dcb43ecc	751
wim	34:e5a0dcb43ecc	752	// case LCD12x1D: //Special mode for PCF21XX, Only top line used
wim	34:e5a0dcb43ecc	753	case LCD12x2:
wim	34:e5a0dcb43ecc	754	_function = 0x04; //FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=1 2-line/12 chars display mode, 0, H=0
wim	34:e5a0dcb43ecc	755	//Note: 4 bit mode is ignored for I2C mode
wim	34:e5a0dcb43ecc	756	break;
wim	34:e5a0dcb43ecc	757
wim	34:e5a0dcb43ecc	758	default:
wim	34:e5a0dcb43ecc	759	error("Error: LCD Controller type does not support this Display type\n\r");
wim	34:e5a0dcb43ecc	760	break;
wim	34:e5a0dcb43ecc	761
wim	34:e5a0dcb43ecc	762	} // switch type
wim	34:e5a0dcb43ecc	763
wim	34:e5a0dcb43ecc	764	_writeCommand(0x20 \| _function \| 0x01); // Set function, Select Instr Set = 1
reedas	42:1962dc501f94	765	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	34:e5a0dcb43ecc	766
wim	34:e5a0dcb43ecc	767	// Note: Display from GA628 shows 12 chars. This is actually the right half of a 24x1 display. The commons have been connected in reverse order.
wim	34:e5a0dcb43ecc	768	_writeCommand(0x05); // Display Conf Set 0000 0, 1, P=0, Q=1 (Instr. Set 1)
wim	34:e5a0dcb43ecc	769
wim	34:e5a0dcb43ecc	770	_writeCommand(0x02); // Screen Config 0000 001, L=0 (Instr. Set 1)
wim	34:e5a0dcb43ecc	771	_writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=0 (no Icon blink), 0 (Instr. Set 1)
wim	34:e5a0dcb43ecc	772
wim	34:e5a0dcb43ecc	773	_writeCommand(0x20 \| _function); // Set function, Select Instr Set = 0
wim	34:e5a0dcb43ecc	774
wim	36:9f5f86dfd44a	775	#if(0)
wim	34:e5a0dcb43ecc	776	// Select CG RAM
wim	34:e5a0dcb43ecc	777	_writeCommand(0x40); //Set CG-RAM address, 8 sequential locations needed per UDC
wim	34:e5a0dcb43ecc	778	// Store UDC/Icon pattern:
wim	34:e5a0dcb43ecc	779	// 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim	34:e5a0dcb43ecc	780	// 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim	34:e5a0dcb43ecc	781	for (int i=0; i<(8 * 8); i++) {
wim	34:e5a0dcb43ecc	782	// _writeData(0x1F); // All On
wim	34:e5a0dcb43ecc	783	_writeData(0x00); // All Off
wim	34:e5a0dcb43ecc	784	}
wim	36:9f5f86dfd44a	785	#endif
wim	34:e5a0dcb43ecc	786	break; // case PCF2103_3V3 Controller
wim	34:e5a0dcb43ecc	787
wim	30:033048611c01	788	case PCF2113_3V3:
wim	32:59c4b8f648d4	789	// PCF2113 controller: Initialise Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim	29:a3663151aa65	790	// Initialise Display configuration
wim	29:a3663151aa65	791	switch (_type) {
wim	29:a3663151aa65	792	// case LCD12x1:
wim	33:900a94bc7585	793	// _function = 0x02; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=0 1-line/12 chars display mode, SL=1, IS=0
wim	32:59c4b8f648d4	794	// Note: 4 bit mode is ignored for I2C mode
wim	29:a3663151aa65	795	case LCD24x1:
wim	33:900a94bc7585	796	_function = 0x00; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=0 1-line/24 chars display mode, SL=0, IS=0
wim	32:59c4b8f648d4	797	// Note: 4 bit mode is ignored for I2C mode
wim	30:033048611c01	798	break;
wim	30:033048611c01	799
wim	30:033048611c01	800	case LCD12x2:
wim	33:900a94bc7585	801	_function = 0x04; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=1 2-line/12 chars display mode, SL=0, IS=0
wim	30:033048611c01	802	break;
wim	30:033048611c01	803
wim	30:033048611c01	804	default:
wim	30:033048611c01	805	error("Error: LCD Controller type does not support this Display type\n\r");
wim	30:033048611c01	806	break;
wim	30:033048611c01	807
wim	30:033048611c01	808	} // switch type
wim	30:033048611c01	809
wim	32:59c4b8f648d4	810	// Init special features
wim	33:900a94bc7585	811	_writeCommand(0x20 \| _function \| 0x01); // Set function, Select Instr Set = 1
wim	33:900a94bc7585	812
wim	33:900a94bc7585	813	_writeCommand(0x04); // Display Conf Set 0000 0, 1, P=0, Q=0 (Instr. Set 1)
wim	33:900a94bc7585	814	_writeCommand(0x10); // Temp Compensation Set 0001 0, 0, TC1=0, TC2=0 (Instr. Set 1)
wim	33:900a94bc7585	815	// _writeCommand(0x42); // HV GEN 0100 S1=1, S2=0 (2x multiplier) (Instr. Set 1)
wim	33:900a94bc7585	816	_writeCommand(0x40 \| (LCD_PCF2_S12 & 0x03)); // HV Gen 0100 S1=1, S2=0 (2x multiplier) (Instr. Set 1)
wim	32:59c4b8f648d4	817
wim	32:59c4b8f648d4	818	_contrast = LCD_PCF2_CONTRAST;
wim	33:900a94bc7585	819	_writeCommand(0x80 \| 0x00 \| (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) 1, V=0, VA=contrast
wim	33:900a94bc7585	820	_writeCommand(0x80 \| 0x40 \| (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) 1, V=1, VB=contrast
reedas	42:1962dc501f94	821	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	32:59c4b8f648d4	822
wim	33:900a94bc7585	823	_writeCommand(0x02); // Screen Config 0000 001, L=0 (Instr. Set 1)
wim	33:900a94bc7585	824	_writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=0 (no icon blink) DM=0 (no direct mode) (Instr. Set 1)
wim	33:900a94bc7585	825
wim	33:900a94bc7585	826	_writeCommand(0x20 \| _function); // Set function, Select Instr Set = 0
wim	32:59c4b8f648d4	827
wim	30:033048611c01	828	break; // case PCF2113_3V3 Controller
wim	30:033048611c01	829
wim	30:033048611c01	830
wim	32:59c4b8f648d4	831	// case PCF2113_5V:
wim	32:59c4b8f648d4	832	// PCF2113 controller: No Voltage generator for VLCD. VDD=5V. Contrast voltage controlled by VA or VB.
wim	32:59c4b8f648d4	833	//@TODO
wim	32:59c4b8f648d4	834
wim	30:033048611c01	835
wim	30:033048611c01	836	case PCF2116_3V3:
wim	32:59c4b8f648d4	837	// PCF2116 controller: Voltage generator for VLCD. VDD=5V. V0 controls contrast voltage.
wim	30:033048611c01	838	// Initialise Display configuration
wim	30:033048611c01	839	switch (_type) {
wim	30:033048611c01	840	// case LCD12x1:
wim	30:033048611c01	841	// case LCD12x2:
wim	30:033048611c01	842	case LCD24x1:
wim	34:e5a0dcb43ecc	843	_writeCommand(0x22); //FUNCTION SET 0 0 1 DL=0 4-bit, N=0/M=0 1-line/24 chars display mode, G=1 Vgen on, 0
wim	29:a3663151aa65	844	//Note: 4 bit mode is ignored for I2C mode
reedas	42:1962dc501f94	845	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	29:a3663151aa65	846	break;
wim	29:a3663151aa65	847
wim	32:59c4b8f648d4	848	case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim	32:59c4b8f648d4	849	case LCD12x3D1: // Special mode for PCF21XX
wim	32:59c4b8f648d4	850	case LCD12x4D: // Special mode for PCF21XX:
wim	34:e5a0dcb43ecc	851	_writeCommand(0x2E); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=1 4-line/12 chars display mode, G=1 VGen on, 0
wim	29:a3663151aa65	852	//Note: 4 bit mode is ignored for I2C mode
reedas	42:1962dc501f94	853	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	29:a3663151aa65	854	break;
wim	30:033048611c01	855
wim	30:033048611c01	856	case LCD24x2:
wim	34:e5a0dcb43ecc	857	_writeCommand(0x2A); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=0 2-line/24 chars display mode, G=1 VGen on, 0
wim	29:a3663151aa65	858	//Note: 4 bit mode is ignored for I2C mode
reedas	42:1962dc501f94	859	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	32:59c4b8f648d4	860	break;
wim	32:59c4b8f648d4	861
wim	30:033048611c01	862	default:
wim	30:033048611c01	863	error("Error: LCD Controller type does not support this Display type\n\r");
wim	30:033048611c01	864	break;
wim	30:033048611c01	865
wim	29:a3663151aa65	866	} // switch type
wim	29:a3663151aa65	867
wim	30:033048611c01	868	break; // case PCF2116_3V3 Controller
wim	29:a3663151aa65	869
wim	32:59c4b8f648d4	870
wim	32:59c4b8f648d4	871	//Experimental for cellphone 3-line display, SA=0x74, No Ack supported, Character set C or K, DL = 8 bit, N=0,M=1 (reserved mode !!), external VLCD -2V5
wim	32:59c4b8f648d4	872	//@TODO
wim	32:59c4b8f648d4	873	case PCF2116_5V:
wim	32:59c4b8f648d4	874	// PCF2116 controller: No Voltage generator for VLCD. VDD=5V. V0 controls contrast voltage.
wim	32:59c4b8f648d4	875	// Initialise Display configuration
wim	32:59c4b8f648d4	876	switch (_type) {
wim	32:59c4b8f648d4	877	// case LCD12x1:
wim	32:59c4b8f648d4	878	// case LCD12x2:
wim	32:59c4b8f648d4	879	// case LCD24x1:
wim	34:e5a0dcb43ecc	880	// _writeCommand(0x20); //FUNCTION SET 0 0 1 DL=0 4-bit, N=0/M=0 1-line/24 chars display mode, G=0 no Vgen, 0
wim	32:59c4b8f648d4	881	//Note: 4 bit mode is ignored for I2C mode
reedas	42:1962dc501f94	882	// ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	32:59c4b8f648d4	883	// break;
wim	32:59c4b8f648d4	884
wim	32:59c4b8f648d4	885	case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim	32:59c4b8f648d4	886	case LCD12x3D1: // Special mode for PCF21XX
wim	32:59c4b8f648d4	887	case LCD12x4D: // Special mode for PCF21XX:
wim	32:59c4b8f648d4	888	// _writeCommand(0x34); //FUNCTION SET 8 bit, N=0/M=1 4-line/12 chars display mode OK
wim	32:59c4b8f648d4	889	// _writeCommand(0x24); //FUNCTION SET 4 bit, N=0/M=1 4-line/12 chars display mode OK
wim	34:e5a0dcb43ecc	890	_writeCommand(0x2C); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=1 4-line/12 chars display mode, G=0 no Vgen, 0 OK
wim	32:59c4b8f648d4	891	//Note: 4 bit mode is ignored for I2C mode
reedas	42:1962dc501f94	892	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	32:59c4b8f648d4	893	break;
wim	32:59c4b8f648d4	894
wim	32:59c4b8f648d4	895	// case LCD24x2:
wim	32:59c4b8f648d4	896	// _writeCommand(0x28); //FUNCTION SET 4 bit, N=1/M=0 2-line/24 chars display mode
wim	32:59c4b8f648d4	897	//Note: 4 bit mode is ignored for I2C mode
reedas	42:1962dc501f94	898	// ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	32:59c4b8f648d4	899	// break;
wim	32:59c4b8f648d4	900
wim	32:59c4b8f648d4	901	default:
wim	32:59c4b8f648d4	902	error("Error: LCD Controller type does not support this Display type\n\r");
wim	32:59c4b8f648d4	903	break;
wim	32:59c4b8f648d4	904
wim	32:59c4b8f648d4	905	} // switch type
wim	32:59c4b8f648d4	906
wim	32:59c4b8f648d4	907	break; // case PCF2116_5V Controller
wim	32:59c4b8f648d4	908
wim	32:59c4b8f648d4	909	case PCF2119_3V3:
wim	39:e9c2319de9c5	910	case PCF2119R_3V3:
wim	32:59c4b8f648d4	911	// PCF2119 controller: Initialise Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim	32:59c4b8f648d4	912	// Note1: See datasheet, the PCF2119 supports icons and provides separate constrast control for Icons and characters.
wim	32:59c4b8f648d4	913	// Note2: Vgen is switched off when the contrast voltage VA or VB is set to 0x00.
wim	32:59c4b8f648d4	914
wim	32:59c4b8f648d4	915	//POR or Hardware Reset should be applied
reedas	42:1962dc501f94	916	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	32:59c4b8f648d4	917
wim	32:59c4b8f648d4	918	// Initialise Display configuration
wim	32:59c4b8f648d4	919	switch (_type) {
wim	32:59c4b8f648d4	920	case LCD8x1:
wim	32:59c4b8f648d4	921	// case LCD12x1:
wim	32:59c4b8f648d4	922	case LCD16x1:
wim	34:e5a0dcb43ecc	923	_function = 0x02; // FUNCTION SET 0 0 1 DL=0 4-bit, 0 , M=0 1-line/16 chars display mode, SL=1
wim	32:59c4b8f648d4	924	// Note: 4 bit mode is ignored for I2C mode
wim	32:59c4b8f648d4	925	break;
wim	32:59c4b8f648d4	926
wim	32:59c4b8f648d4	927	case LCD24x1:
wim	32:59c4b8f648d4	928	// case LCD32x1:
wim	34:e5a0dcb43ecc	929	_function = 0x00; // FUNCTION SET 0 0 1 DL=0 4-bit, 0 , M=0 1-line/32 chars display mode, SL=0
wim	32:59c4b8f648d4	930	// Note: 4 bit mode is ignored for I2C mode
wim	32:59c4b8f648d4	931	break;
wim	32:59c4b8f648d4	932
wim	32:59c4b8f648d4	933	case LCD8x2:
wim	32:59c4b8f648d4	934	// case LCD12x2:
wim	32:59c4b8f648d4	935	case LCD16x2:
wim	34:e5a0dcb43ecc	936	_function = 0x04; // FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=1 2-line/16 chars display mode, SL=0
wim	32:59c4b8f648d4	937	// Note: 4 bit mode is ignored for I2C mode
wim	32:59c4b8f648d4	938	break;
wim	32:59c4b8f648d4	939
wim	32:59c4b8f648d4	940	default:
wim	32:59c4b8f648d4	941	error("Error: LCD Controller type does not support this Display type\n\r");
wim	32:59c4b8f648d4	942	break;
wim	32:59c4b8f648d4	943
wim	32:59c4b8f648d4	944	} // switch type
wim	32:59c4b8f648d4	945
wim	32:59c4b8f648d4	946	// Init special features
wim	32:59c4b8f648d4	947	_writeCommand(0x20 \| _function \| 0x01); // Set function, Select Instruction Set = 1
wim	32:59c4b8f648d4	948
wim	39:e9c2319de9c5	949	// _writeCommand(0x04); // DISP CONF SET (Instr. Set 1) 0000, 0, 1, P=0, Q=0 (IC at Bottom)
wim	39:e9c2319de9c5	950	// _writeCommand(0x05); // Display Conf Set 0000, 0, 1, P=0, Q=1
wim	39:e9c2319de9c5	951	// _writeCommand(0x06); // Display Conf Set 0000, 0, 1, P=1, Q=0
wim	39:e9c2319de9c5	952	_writeCommand(0x07); // Display Conf Set 0000, 0, 1, P=1, Q=1 (IC at Top)
wim	39:e9c2319de9c5	953
wim	32:59c4b8f648d4	954	_writeCommand(0x10); // TEMP CTRL SET (Instr. Set 1) 0001, 0, 0, TC1=0, TC2=0
wim	32:59c4b8f648d4	955	// _writeCommand(0x42); // HV GEN (Instr. Set 1) 0100, 0, 0, S1=1, S2=0 (2x multiplier)
wim	32:59c4b8f648d4	956	_writeCommand(0x40 \| (LCD_PCF2_S12 & 0x03)); // HV GEN (Instr. Set 1) 0100, 0, 0, S1=1, S2=0 (2x multiplier)
wim	32:59c4b8f648d4	957
wim	32:59c4b8f648d4	958	_contrast = LCD_PCF2_CONTRAST;
wim	32:59c4b8f648d4	959	_writeCommand(0x80 \| 0x00 \| (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=0, VA=contrast
wim	32:59c4b8f648d4	960	_writeCommand(0x80 \| 0x40 \| (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=1, VB=contrast
reedas	42:1962dc501f94	961	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	32:59c4b8f648d4	962
wim	32:59c4b8f648d4	963	_writeCommand(0x02); // SCRN CONF (Instr. Set 1) L=0
wim	32:59c4b8f648d4	964	_writeCommand(0x08); // ICON CONF (Instr. Set 1) IM=0 (Char mode) IB=0 (no icon blink) DM=0 (no direct mode)
wim	32:59c4b8f648d4	965
wim	32:59c4b8f648d4	966	_writeCommand(0x20 \| _function); // Select Instruction Set = 0
wim	32:59c4b8f648d4	967
wim	32:59c4b8f648d4	968	break; // case PCF2119_3V3 Controller
wim	32:59c4b8f648d4	969
wim	32:59c4b8f648d4	970	// case PCF2119_5V:
wim	32:59c4b8f648d4	971	// PCF2119 controller: No Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim	32:59c4b8f648d4	972	// Note1: See datasheet, the PCF2119 supports icons and provides separate constrast control for Icons and characters.
wim	32:59c4b8f648d4	973	// Note2: Vgen is switched off when the contrast voltage VA or VB is set to 0x00.
wim	30:033048611c01	974	//@TODO
wim	29:a3663151aa65	975
wim	19:c747b9e2e7b8	976	case WS0010:
wim	19:c747b9e2e7b8	977	// WS0010 OLED controller: Initialise DC/DC Voltage converter for LEDs
wim	30:033048611c01	978	// Note1: Identical to RS0010
wim	30:033048611c01	979	// Note2: supports 1 or 2 lines (and 16x100 graphics)
wim	30:033048611c01	980	// supports 4 fonts (English/Japanese (default), Western European-I, English/Russian, Western European-II)
wim	19:c747b9e2e7b8	981	// Cursor/Disp shift set 0001 SC RL 0 0
wim	19:c747b9e2e7b8	982	//
wim	30:033048611c01	983	// Mode and Power set 0001 GC PWR 1 1
wim	19:c747b9e2e7b8	984	// GC = 0 (Graph Mode=1, Char Mode=0)
wim	30:033048611c01	985	// PWR = 1 (DC/DC On/Off)
wim	30:033048611c01	986
wim	30:033048611c01	987	//@Todo: This may be needed to enable a warm reboot
wim	32:59c4b8f648d4	988	//_writeCommand(0x13); // Char mode, DC/DC off
reedas	42:1962dc501f94	989	//ThisThread::sleep_for(10); // Wait 10ms to ensure powered down
wim	32:59c4b8f648d4	990	_writeCommand(0x17); // Char mode, DC/DC on
reedas	42:1962dc501f94	991	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	29:a3663151aa65	992
wim	29:a3663151aa65	993	// Initialise Display configuration
wim	29:a3663151aa65	994	switch (_type) {
wim	29:a3663151aa65	995	case LCD8x1: //8x1 is a regular 1 line display
wim	29:a3663151aa65	996	case LCD8x2B: //8x2B is a special case of 16x1
wim	29:a3663151aa65	997	// case LCD12x1:
wim	29:a3663151aa65	998	case LCD16x1:
wim	30:033048611c01	999	case LCD24x1:
wim	30:033048611c01	1000	_writeCommand(0x20); // Function set 001 DL N F FT1 FT0
wim	30:033048611c01	1001	// DL=0 (4 bits bus)
wim	30:033048611c01	1002	// N=0 (1 line)
wim	30:033048611c01	1003	// F=0 (5x7 dots font)
wim	30:033048611c01	1004	// FT=00 (00 = Engl/Jap, 01 = WestEur1, 10 = Engl/Russian, 11 = WestEur2
wim	30:033048611c01	1005	break;
wim	30:033048611c01	1006
wim	32:59c4b8f648d4	1007	case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim	32:59c4b8f648d4	1008	case LCD12x3D1: // Special mode for PCF21XX
wim	32:59c4b8f648d4	1009	case LCD12x4D: // Special mode for PCF21XX:
wim	33:900a94bc7585	1010	case LCD16x3G: // Special mode for ST7036
wim	30:033048611c01	1011	case LCD24x4D: // Special mode for KS0078
wim	30:033048611c01	1012	error("Error: LCD Controller type does not support this Display type\n\r");
wim	29:a3663151aa65	1013	break;
wim	29:a3663151aa65	1014
wim	29:a3663151aa65	1015	default:
wim	30:033048611c01	1016	// All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim	30:033048611c01	1017	_writeCommand(0x28); // Function set 001 DL N F FT1 FT0
wim	30:033048611c01	1018	// DL=0 (4 bits bus)
wim	30:033048611c01	1019	// N=1 (2 lines)
wim	30:033048611c01	1020	// F=0 (5x7 dots font)
wim	30:033048611c01	1021	// FT=00 (00 = Engl/Jap, 01 = WestEur1, 10 = Engl/Russian, 11 = WestEur2
wim	30:033048611c01	1022
wim	29:a3663151aa65	1023	break;
wim	29:a3663151aa65	1024	} // switch type
wim	29:a3663151aa65	1025
wim	32:59c4b8f648d4	1026	break; // case WS0010 Controller
wim	33:900a94bc7585	1027
wim	33:900a94bc7585	1028
wim	33:900a94bc7585	1029	case US2066_3V3:
wim	33:900a94bc7585	1030	// US2066/SSD1311 OLED controller, Initialise for VDD=3V3
wim	33:900a94bc7585	1031	// Note: supports 1,2, 3 or 4 lines
wim	33:900a94bc7585	1032	// case USS2066_5V:
wim	33:900a94bc7585	1033	// US2066 controller, VDD=5V
wim	33:900a94bc7585	1034
wim	33:900a94bc7585	1035	// Initialise Display configuration
wim	33:900a94bc7585	1036	switch (_type) {
wim	33:900a94bc7585	1037	case LCD8x1: //8x1 is a regular 1 line display
wim	33:900a94bc7585	1038	case LCD8x2B: //8x2D is a special case of 16x1
wim	33:900a94bc7585	1039	// case LCD12x1:
wim	33:900a94bc7585	1040	case LCD16x1:
wim	33:900a94bc7585	1041	// case LCD20x1:
wim	33:900a94bc7585	1042	_function = 0x00; // Set function 0 0 1 X N DH RE(0) IS
wim	33:900a94bc7585	1043	// Saved to allow switch between Instruction sets at later time
wim	33:900a94bc7585	1044	// DL=X bit is ignored for US2066. Uses hardwired pins instead
wim	33:900a94bc7585	1045	// N=0 1 Line / 3 Line
wim	33:900a94bc7585	1046	// DH=0 Double Height disable
wim	33:900a94bc7585	1047	// IS=0
wim	33:900a94bc7585	1048
wim	33:900a94bc7585	1049	_function_1 = 0x02; // Set function, 0 0 1 X N BE RE(1) REV
wim	33:900a94bc7585	1050	// Saved to allow switch between Instruction sets at later time
wim	33:900a94bc7585	1051	// DL=X bit is ignored for US2066. Uses hardwired pins instead
wim	33:900a94bc7585	1052	// N=0 1 Line / 3 Line
wim	33:900a94bc7585	1053	// BE=0 Blink Enable off, special feature of SSD1803, US2066
wim	33:900a94bc7585	1054	// REV=0 Reverse off, special feature of SSD1803, US2066
wim	33:900a94bc7585	1055
wim	33:900a94bc7585	1056	_lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim	33:900a94bc7585	1057	// NW=0 1-Line LCD (N=0)
wim	33:900a94bc7585	1058	break;
wim	33:900a94bc7585	1059
wim	33:900a94bc7585	1060	case LCD16x1C:
wim	33:900a94bc7585	1061	case LCD8x2:
wim	33:900a94bc7585	1062	case LCD16x2:
wim	33:900a94bc7585	1063	case LCD20x2:
wim	33:900a94bc7585	1064	_function = 0x08; // Set function 0 0 1 X N DH RE(0) IS
wim	33:900a94bc7585	1065	// Saved to allow switch between Instruction sets at later time
wim	33:900a94bc7585	1066	// DL=X bit is ignored for US2066. Uses hardwired pins instead
wim	33:900a94bc7585	1067	// N=1 2 line / 4 Line
wim	33:900a94bc7585	1068	// DH=0 Double Height disable
wim	33:900a94bc7585	1069	// IS=0
wim	33:900a94bc7585	1070
wim	33:900a94bc7585	1071	_function_1 = 0x0A; // Set function, 0 0 1 X N BE RE(1) REV
wim	33:900a94bc7585	1072	// Saved to allow switch between Instruction sets at later time
wim	33:900a94bc7585	1073	// DL=X bit is ignored for US2066. Uses hardwired pins instead
wim	33:900a94bc7585	1074	// N=1 2 line / 4 Line
wim	33:900a94bc7585	1075	// BE=0 Blink Enable off, special feature of SSD1803, US2066
wim	33:900a94bc7585	1076	// REV=0 Reverse off, special feature of SSD1803, US2066
wim	33:900a94bc7585	1077
wim	33:900a94bc7585	1078	_lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim	33:900a94bc7585	1079	// NW=0 2-Line LCD (N=1)
wim	33:900a94bc7585	1080	break;
wim	33:900a94bc7585	1081
wim	33:900a94bc7585	1082	case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim	33:900a94bc7585	1083	// case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim	33:900a94bc7585	1084	case LCD16x3D: // Special mode for KS0078, SSD1803 and US2066
wim	33:900a94bc7585	1085	// case LCD16x3D1: // Special mode for SSD1803, US2066
wim	33:900a94bc7585	1086	// case LCD20x3D: // Special mode for SSD1803, US2066
wim	33:900a94bc7585	1087	_function = 0x00; // Set function 0 0 1 X N DH RE(0) IS
wim	33:900a94bc7585	1088	// Saved to allow switch between Instruction sets at later time
wim	33:900a94bc7585	1089	// DL=X bit is ignored for US2066. Uses hardwired pins instead
wim	33:900a94bc7585	1090	// N=0 1 Line / 3 Line
wim	33:900a94bc7585	1091	// DH=0 Double Height disable
wim	33:900a94bc7585	1092	// IS=0
wim	33:900a94bc7585	1093
wim	33:900a94bc7585	1094	_function_1 = 0x02; // Set function, 0 0 1 X N BE RE(1) REV
wim	33:900a94bc7585	1095	// Saved to allow switch between Instruction sets at later time
wim	33:900a94bc7585	1096	// DL=X bit is ignored for US2066. Uses hardwired pins instead
wim	33:900a94bc7585	1097	// N=0 1 Line / 3 Line
wim	33:900a94bc7585	1098	// BE=0 Blink Enable off, special feature of SSD1803, US2066
wim	33:900a94bc7585	1099	// REV=0 Reverse off, special feature of SSD1803, US2066
wim	33:900a94bc7585	1100
wim	33:900a94bc7585	1101	_lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim	33:900a94bc7585	1102	// NW=1 3-Line LCD (N=0)
wim	33:900a94bc7585	1103	break;
wim	33:900a94bc7585	1104
wim	33:900a94bc7585	1105	case LCD20x4D: // Special mode for SSD1803, US2066
wim	33:900a94bc7585	1106	_function = 0x08; // Set function 0 0 1 X N DH RE(0) IS
wim	33:900a94bc7585	1107	// Saved to allow switch between Instruction sets at later time
wim	33:900a94bc7585	1108	// DL=X bit is ignored for US2066. Uses hardwired pins instead
wim	33:900a94bc7585	1109	// N=1 2 line / 4 Line
wim	33:900a94bc7585	1110	// DH=0 Double Height disable
wim	33:900a94bc7585	1111	// IS=0
wim	33:900a94bc7585	1112
wim	33:900a94bc7585	1113	_function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim	33:900a94bc7585	1114	// Saved to allow switch between Instruction sets at later time
wim	33:900a94bc7585	1115	// DL=0 bit is ignored for US2066. Uses hardwired pins instead
wim	33:900a94bc7585	1116	// N=1 2 line / 4 Line
wim	33:900a94bc7585	1117	// BE=0 Blink Enable off, special feature of SSD1803, US2066
wim	33:900a94bc7585	1118	// REV=0 Reverse off, special feature of SSD1803, US2066
wim	33:900a94bc7585	1119
wim	33:900a94bc7585	1120	_lines = 0x01; // Ext function set 0 0 0 0 1 FW BW NW
wim	33:900a94bc7585	1121	// NW=1 4-Line LCD (N=1)
wim	33:900a94bc7585	1122	break;
wim	33:900a94bc7585	1123
wim	33:900a94bc7585	1124	// case LCD24x1:
wim	33:900a94bc7585	1125	// case LCD16x3G: // Special mode for ST7036
wim	33:900a94bc7585	1126	// case LCD24x4D: // Special mode for KS0078
wim	33:900a94bc7585	1127	default:
wim	33:900a94bc7585	1128	error("Error: LCD Controller type does not support this Display type\n\r");
wim	33:900a94bc7585	1129	break;
wim	33:900a94bc7585	1130
wim	33:900a94bc7585	1131	} // switch type
wim	33:900a94bc7585	1132
wim	34:e5a0dcb43ecc	1133	_writeCommand(0x00); // NOP, make sure to sync SPI
wim	33:900a94bc7585	1134
wim	33:900a94bc7585	1135	// init special features
wim	33:900a94bc7585	1136	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim	33:900a94bc7585	1137	// Select Extended Instruction Set
wim	33:900a94bc7585	1138
wim	33:900a94bc7585	1139	_writeCommand(0x71); // Function Select A: 0 1 1 1 0 0 0 1 (Ext Instr Set)
wim	33:900a94bc7585	1140	_writeData(0x00); // Disable Internal VDD
wim	33:900a94bc7585	1141
wim	33:900a94bc7585	1142	_writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim	33:900a94bc7585	1143
wim	33:900a94bc7585	1144	_writeCommand(0xD5); // Display Clock Divide Ratio: 1 1 0 1 0 1 0 1 (Ext Instr Set, OLED Instr Set)
wim	33:900a94bc7585	1145	_writeCommand(0x70); // Display Clock Divide Ratio value: 0 1 1 1 0 0 0 0 (Ext Instr Set, OLED Instr Set)
wim	33:900a94bc7585	1146
wim	33:900a94bc7585	1147	_writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim	33:900a94bc7585	1148
wim	33:900a94bc7585	1149	// _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim	33:900a94bc7585	1150	_writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim	33:900a94bc7585	1151
wim	33:900a94bc7585	1152	_writeCommand(0x08 \| _lines); // Set ext function 0 0 0 0 1 FW BW NW 1,2,3 or 4 lines (Ext Instr Set)
wim	33:900a94bc7585	1153
wim	34:e5a0dcb43ecc	1154	// _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim	33:900a94bc7585	1155	// // Default
wim	33:900a94bc7585	1156
wim	33:900a94bc7585	1157	_writeCommand(0x72); // Function Select B: 0 1 1 1 0 0 1 0 (Ext Instr Set)
wim	33:900a94bc7585	1158	_writeData(0x01); // Select ROM A (CGRAM 8, CGROM 248)
wim	33:900a94bc7585	1159
wim	33:900a94bc7585	1160	_writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim	33:900a94bc7585	1161
wim	33:900a94bc7585	1162	_writeCommand(0xDA); // Set Segm Pins Config: 1 1 0 1 1 0 1 0 (Ext Instr Set, OLED)
wim	33:900a94bc7585	1163	_writeCommand(0x10); // Set Segm Pins Config value: Altern Odd/Even, Disable Remap (Ext Instr Set, OLED)
wim	33:900a94bc7585	1164
wim	33:900a94bc7585	1165	_writeCommand(0xDC); // Function Select C: 1 1 0 1 1 1 0 0 (Ext Instr Set, OLED)
wim	33:900a94bc7585	1166	// _writeCommand(0x00); // Set internal VSL, GPIO pin HiZ (always read low)
wim	33:900a94bc7585	1167	_writeCommand(0x80); // Set external VSL, GPIO pin HiZ (always read low)
wim	33:900a94bc7585	1168
wim	33:900a94bc7585	1169	_contrast = LCD_US20_CONTRAST;
wim	33:900a94bc7585	1170	_writeCommand(0x81); // Set Contrast Control: 1 0 0 0 0 0 0 1 (Ext Instr Set, OLED)
wim	33:900a94bc7585	1171	_writeCommand((_contrast << 2) \| 0x03); // Set Contrast Value: 8 bits, use 6 bits for compatibility
wim	33:900a94bc7585	1172
wim	33:900a94bc7585	1173	_writeCommand(0xD9); // Set Phase Length: 1 1 0 1 1 0 0 1 (Ext Instr Set, OLED)
wim	33:900a94bc7585	1174	_writeCommand(0xF1); // Set Phase Length Value:
wim	33:900a94bc7585	1175
wim	33:900a94bc7585	1176	_writeCommand(0xDB); // Set VCOMH Deselect Lvl: 1 1 0 1 1 0 1 1 (Ext Instr Set, OLED)
wim	33:900a94bc7585	1177	_writeCommand(0x30); // Set VCOMH Deselect Value: 0.83 x VCC
wim	33:900a94bc7585	1178
reedas	42:1962dc501f94	1179	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	33:900a94bc7585	1180
wim	33:900a94bc7585	1181	//Test Fade/Blinking. Hard Blink on/off, No fade in/out ??
wim	33:900a94bc7585	1182	// _writeCommand(0x23); // Set (Ext Instr Set, OLED)
wim	33:900a94bc7585	1183	// _writeCommand(0x3F); // Set interval 128 frames
wim	33:900a94bc7585	1184	//End Test Blinking
wim	33:900a94bc7585	1185
wim	33:900a94bc7585	1186	_writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim	33:900a94bc7585	1187
wim	33:900a94bc7585	1188	_writeCommand(0x20 \| _function \| 0x01); // Set function, 0 0 1 X N DH RE(0) IS=1 Select Instruction Set 1
wim	33:900a94bc7585	1189	// Select Std Instr set, Select IS=1
wim	33:900a94bc7585	1190
wim	33:900a94bc7585	1191	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim	33:900a94bc7585	1192	// Select Ext Instr Set, IS=1
wim	33:900a94bc7585	1193	_writeCommand(0x10); // Shift/Scroll enable, 0 0 0 1 DS4/HS4 DS3/HS3 DS2/HS2 DS1/HS1 (Ext Instr Set, IS=1)
wim	33:900a94bc7585	1194
wim	33:900a94bc7585	1195	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim	34:e5a0dcb43ecc	1196	// Select Std Instr set, Select IS=0
wim	33:900a94bc7585	1197	break; // case US2066/SSD1311 Controller
wim	33:900a94bc7585	1198
wim	34:e5a0dcb43ecc	1199	//not yet tested on hardware
wim	34:e5a0dcb43ecc	1200	case PT6314 :
wim	34:e5a0dcb43ecc	1201	// Initialise Display configuration
wim	34:e5a0dcb43ecc	1202	switch (_type) {
wim	34:e5a0dcb43ecc	1203	case LCD8x1: //8x1 is a regular 1 line display
wim	34:e5a0dcb43ecc	1204	case LCD8x2B: //8x2B is a special case of 16x1
wim	34:e5a0dcb43ecc	1205	// case LCD12x1:
wim	34:e5a0dcb43ecc	1206	case LCD16x1:
wim	34:e5a0dcb43ecc	1207	case LCD20x1:
wim	34:e5a0dcb43ecc	1208	case LCD24x1:
wim	34:e5a0dcb43ecc	1209	_function = 0x00; // Function set 001 DL N X BR1 BR0
wim	34:e5a0dcb43ecc	1210	// DL=0 (4 bits bus)
wim	34:e5a0dcb43ecc	1211	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	34:e5a0dcb43ecc	1212	// N=0 (1 line)
wim	34:e5a0dcb43ecc	1213	// X
wim	34:e5a0dcb43ecc	1214	// BR1=0 (2 significant bits for brightness
wim	34:e5a0dcb43ecc	1215	// BR0=0
wim	34:e5a0dcb43ecc	1216	// 0x0 = 100%
wim	34:e5a0dcb43ecc	1217	// 0x1 = 75%
wim	34:e5a0dcb43ecc	1218	// 0x2 = 50%
wim	34:e5a0dcb43ecc	1219	// 0x3 = 25%
wim	34:e5a0dcb43ecc	1220
wim	34:e5a0dcb43ecc	1221	break;
wim	34:e5a0dcb43ecc	1222
wim	34:e5a0dcb43ecc	1223	// All other valid LCD types are initialised as 2 Line displays
wim	34:e5a0dcb43ecc	1224	case LCD8x2:
wim	34:e5a0dcb43ecc	1225	case LCD16x2:
wim	34:e5a0dcb43ecc	1226	case LCD20x2:
wim	34:e5a0dcb43ecc	1227	case LCD24x2:
wim	34:e5a0dcb43ecc	1228	_function = 0x08; // Function set 001 DL N X BR1 BR2
wim	34:e5a0dcb43ecc	1229	// DL=0 (4 bits bus)
wim	34:e5a0dcb43ecc	1230	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	34:e5a0dcb43ecc	1231	// N=1 (2 lines)
wim	34:e5a0dcb43ecc	1232	// X
wim	34:e5a0dcb43ecc	1233	// BR1=0 (2 significant bits for brightness
wim	34:e5a0dcb43ecc	1234	// BR0=0
wim	34:e5a0dcb43ecc	1235	break;
wim	34:e5a0dcb43ecc	1236
wim	34:e5a0dcb43ecc	1237	default:
wim	34:e5a0dcb43ecc	1238	error("Error: LCD Controller type does not support this Display type\n\r");
wim	34:e5a0dcb43ecc	1239	break;
wim	34:e5a0dcb43ecc	1240	} // switch type
wim	34:e5a0dcb43ecc	1241
wim	34:e5a0dcb43ecc	1242	_contrast = LCD_PT63_CONTRAST;
wim	34:e5a0dcb43ecc	1243	_writeCommand(0x20 \| _function \| ((~_contrast) >> 4)); // Invert and shift to use 2 MSBs
wim	34:e5a0dcb43ecc	1244	break; // case PT6314 Controller (VFD)
wim	39:e9c2319de9c5	1245
wim	39:e9c2319de9c5	1246
wim	39:e9c2319de9c5	1247	case HD66712:
wim	39:e9c2319de9c5	1248	// Initialise Display configuration
wim	39:e9c2319de9c5	1249	switch (_type) {
wim	39:e9c2319de9c5	1250	case LCD8x1: //8x1 is a regular 1 line display
wim	39:e9c2319de9c5	1251	case LCD12x1:
wim	39:e9c2319de9c5	1252	case LCD16x1:
wim	39:e9c2319de9c5	1253	case LCD20x1:
wim	39:e9c2319de9c5	1254	case LCD24x1:
wim	39:e9c2319de9c5	1255	// case LCD32x1: // EXT pin is High, extension driver needed
wim	40:d3496c3ea301	1256	_function = 0x02; // Function set 001 DL N RE(0) - - (Std Regs)
wim	39:e9c2319de9c5	1257	// DL=0 (4 bits bus)
wim	39:e9c2319de9c5	1258	// N=0 (1-line mode, N=1 2-line mode)
wim	40:d3496c3ea301	1259	// RE=0 (Dis. Extended Regs, special mode for HD66712)
wim	40:d3496c3ea301	1260	//
wim	39:e9c2319de9c5	1261
wim	39:e9c2319de9c5	1262	_function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim	39:e9c2319de9c5	1263	// DL=0 (4 bits bus)
wim	39:e9c2319de9c5	1264	// N=0 (1-line mode, N=1 2-line mode)
wim	40:d3496c3ea301	1265	// RE=1 (Ena Extended Regs; special mode for HD66712)
wim	40:d3496c3ea301	1266	// BE=0 (Blink Enable, CG/SEG RAM; special mode for HD66712)
wim	40:d3496c3ea301	1267	// LP=0 (LP=1 Low power mode, LP=0 Normal; special mode for HD66712)
wim	39:e9c2319de9c5	1268
wim	39:e9c2319de9c5	1269	_function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim	40:d3496c3ea301	1270	// NW=0 (1,2 line), NW=1 (4 Line, special mode for HD66712)
wim	39:e9c2319de9c5	1271	break;
wim	39:e9c2319de9c5	1272
wim	40:d3496c3ea301	1273	// case LCD12x3D: // Special mode for KS0073, KS0078, PCF21XX and HD66712
wim	40:d3496c3ea301	1274	// case LCD12x3D1: // Special mode for KS0073, KS0078, PCF21XX and HD66712
wim	39:e9c2319de9c5	1275	case LCD12x4D: // Special mode for KS0073, KS0078, PCF21XX and HD66712
wim	40:d3496c3ea301	1276	// case LCD16x3D: // Special mode for KS0073, KS0078 and HD66712
wim	40:d3496c3ea301	1277	// case LCD16x4D: // Special mode for KS0073, KS0078 and HD66712
wim	39:e9c2319de9c5	1278	case LCD20x4D: // Special mode for KS0073, KS0078 and HD66712
wim	40:d3496c3ea301	1279	_function = 0x02; // Function set 001 DL N RE(0) - - (Std Regs)
wim	39:e9c2319de9c5	1280	// DL=0 (4 bits bus)
wim	40:d3496c3ea301	1281	// N=0 (1-line mode, N=1 2-line mode)
wim	40:d3496c3ea301	1282	// RE=0 (Dis. Extended Regs, special mode for HD66712)
wim	40:d3496c3ea301	1283	//
wim	39:e9c2319de9c5	1284
wim	39:e9c2319de9c5	1285	_function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim	39:e9c2319de9c5	1286	// DL=0 (4 bits bus)
wim	40:d3496c3ea301	1287	// N=0 (1-line mode, N=1 2-line mode)
wim	40:d3496c3ea301	1288	// RE=1 (Ena Extended Regs; special mode for HD66712)
wim	40:d3496c3ea301	1289	// BE=0 (Blink Enable, CG/SEG RAM; special mode for HD66712)
wim	40:d3496c3ea301	1290	// LP=0 (LP=1 Low power mode, LP=0 Normal; special mode for HD66712)
wim	39:e9c2319de9c5	1291
wim	39:e9c2319de9c5	1292	_function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim	40:d3496c3ea301	1293	// NW=0 (1,2 line), NW=1 (4 Line, special mode for HD66712)
wim	39:e9c2319de9c5	1294	break;
wim	39:e9c2319de9c5	1295
wim	39:e9c2319de9c5	1296	case LCD16x3G: // Special mode for ST7036
wim	39:e9c2319de9c5	1297	// case LCD24x3D: // Special mode for KS0078
wim	39:e9c2319de9c5	1298	// case LCD24x3D1: // Special mode for KS0078
wim	39:e9c2319de9c5	1299	case LCD24x4D: // Special mode for KS0078
wim	39:e9c2319de9c5	1300	error("Error: LCD Controller type does not support this Display type\n\r");
wim	39:e9c2319de9c5	1301	break;
wim	39:e9c2319de9c5	1302
wim	39:e9c2319de9c5	1303	default:
wim	39:e9c2319de9c5	1304	// All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim	40:d3496c3ea301	1305	_function = 0x0A; // Function set 001 DL N RE(0) - - (Std Regs)
wim	39:e9c2319de9c5	1306	// DL=0 (4 bits bus)
wim	39:e9c2319de9c5	1307	// N=1 (2-line mode), N=0 (1-line mode)
wim	40:d3496c3ea301	1308	// RE=0 (Dis. Extended Regs, special mode for HD66712)
wim	39:e9c2319de9c5	1309
wim	39:e9c2319de9c5	1310	_function_1 = 0x0C; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim	39:e9c2319de9c5	1311	// DL=0 (4 bits bus)
wim	39:e9c2319de9c5	1312	// N=1 (2 line mode), N=0 (1-line mode)
wim	40:d3496c3ea301	1313	// RE=1 (Ena Extended Regs, special mode for HD66712)
wim	40:d3496c3ea301	1314	// BE=0 (Blink Enable, CG/SEG RAM, special mode for HD66712)
wim	40:d3496c3ea301	1315	// LP=0 (LP=1 Low power mode, LP=0 Normal)
wim	39:e9c2319de9c5	1316
wim	39:e9c2319de9c5	1317	_function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim	40:d3496c3ea301	1318	// NW=0 (1,2 line), NW=1 (4 Line, special mode for HD66712)
wim	39:e9c2319de9c5	1319	break;
wim	39:e9c2319de9c5	1320	} // switch type
wim	39:e9c2319de9c5	1321
wim	39:e9c2319de9c5	1322	// init special features
wim	39:e9c2319de9c5	1323	_writeCommand(0x20 \| _function_1);// Function set 001 DL N RE(1) BE LP (Ext Regs)
wim	39:e9c2319de9c5	1324	// DL=0 (4 bits bus), DL=1 (8 bits mode)
wim	39:e9c2319de9c5	1325	// N=0 (1 line mode), N=1 (2 line mode)
wim	40:d3496c3ea301	1326	// RE=1 (Ena Extended Regs, special mode for HD66712)
wim	40:d3496c3ea301	1327	// BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for HD66712)
wim	39:e9c2319de9c5	1328	// LP=0 (LP=1 Low power mode, LP=0 Normal)
wim	39:e9c2319de9c5	1329
wim	39:e9c2319de9c5	1330	_writeCommand(0x08 \| _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim	40:d3496c3ea301	1331	// FW=0 (5-dot font, special mode for HD66712)
wim	40:d3496c3ea301	1332	// BW=0 (Cur BW invert disable, special mode for HD66712)
wim	40:d3496c3ea301	1333	// NW=0 (1,2 Line), NW=1 (4 line, special mode for HD66712)
wim	40:d3496c3ea301	1334
wim	40:d3496c3ea301	1335	_writeCommand(0x10); // Scroll/Shift set 0001 HS4 HS3 HS2 HS1 (Ext Regs)
wim	40:d3496c3ea301	1336	// Dotscroll/Display shift enable (Special mode for HD66712)
wim	40:d3496c3ea301	1337
wim	40:d3496c3ea301	1338	_writeCommand(0x80); // Scroll Quantity set 1 0 HDS5 HDS4 HDS3 HDS2 HDS1 HDS0 (Ext Regs)
wim	40:d3496c3ea301	1339	// Scroll quantity (Special mode for HD66712)
wim	39:e9c2319de9c5	1340
wim	39:e9c2319de9c5	1341	_writeCommand(0x20 \| _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim	39:e9c2319de9c5	1342	// DL=0 (4 bits bus), DL=1 (8 bits mode)
wim	39:e9c2319de9c5	1343	// N=0 (1 line mode), N=1 (2 line mode)
wim	40:d3496c3ea301	1344	// RE=0 (Dis. Extended Regs, special mode for HD66712)
wim	40:d3496c3ea301	1345	// DH=1 (Disp shift enable/disable, special mode for HD66712)
wim	40:d3496c3ea301	1346	// REV=0 (Reverse/Normal, special mode for HD66712)
wim	39:e9c2319de9c5	1347	break; // case HD66712 Controller
wim	39:e9c2319de9c5	1348
wim	41:111ca62e8a59	1349	case SPLC792A_3V3:
wim	41:111ca62e8a59	1350	// SPLC792A controller: Initialise Voltage booster for VLCD. VDD=3V3
wim	41:111ca62e8a59	1351	// Note very similar to ST7032
wim	41:111ca62e8a59	1352
wim	41:111ca62e8a59	1353	// Initialise Display configuration
wim	41:111ca62e8a59	1354	switch (_type) {
wim	41:111ca62e8a59	1355	case LCD8x1: //8x1 is a regular 1 line display
wim	41:111ca62e8a59	1356	case LCD8x2B: //8x2B is a special case of 16x1
wim	41:111ca62e8a59	1357	// case LCD12x1:
wim	41:111ca62e8a59	1358	case LCD16x1:
wim	41:111ca62e8a59	1359	// case LCD20x1:
wim	41:111ca62e8a59	1360	case LCD24x1:
wim	41:111ca62e8a59	1361	_function = 0x00; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=0 (1-line display mode), F=0 (5*7dot), 0, IS
wim	41:111ca62e8a59	1362	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	41:111ca62e8a59	1363	// Saved to allow switch between Instruction sets at later time
wim	41:111ca62e8a59	1364	break;
wim	41:111ca62e8a59	1365
wim	41:111ca62e8a59	1366	case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim	41:111ca62e8a59	1367	case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim	41:111ca62e8a59	1368	case LCD12x4D: // Special mode for KS0078 and PCF21XX
wim	41:111ca62e8a59	1369	case LCD16x3G: // Special mode for ST7036
wim	41:111ca62e8a59	1370	case LCD24x4D: // Special mode for KS0078
wim	41:111ca62e8a59	1371	error("Error: LCD Controller type does not support this Display type\n\r");
wim	41:111ca62e8a59	1372	break;
wim	41:111ca62e8a59	1373
wim	41:111ca62e8a59	1374	default:
wim	41:111ca62e8a59	1375	// All other LCD types are initialised as 2 Line displays
wim	41:111ca62e8a59	1376	_function = 0x08; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=1 (2-line display mode), F=0 (5*7dot), 0, IS
wim	41:111ca62e8a59	1377	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	41:111ca62e8a59	1378	// Saved to allow switch between Instruction sets at later time
wim	41:111ca62e8a59	1379	break;
wim	41:111ca62e8a59	1380	} // switch type
wim	41:111ca62e8a59	1381
wim	41:111ca62e8a59	1382	// init special features
wim	41:111ca62e8a59	1383	_writeCommand(0x20 \| _function \| 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim	41:111ca62e8a59	1384
wim	41:111ca62e8a59	1385	//SPLC792A Does not support Bias and Internal Osc register
wim	41:111ca62e8a59	1386	// _writeCommand(0x1C); // Internal OSC frequency adjustment Framefreq=183HZ, Bias will be 1/4 (Instr Set=1)
wim	41:111ca62e8a59	1387
wim	41:111ca62e8a59	1388	_contrast = LCD_SPLC792A_CONTRAST;
wim	41:111ca62e8a59	1389	_writeCommand(0x70 \| (_contrast & 0x0F)); // Set Contrast Low bits, 0 1 1 1 C3 C2 C1 C0 (IS=1)
wim	41:111ca62e8a59	1390
wim	41:111ca62e8a59	1391
wim	41:111ca62e8a59	1392	// _icon_power = 0x04; // Icon display off (Bit3=0), Booster circuit is turned on (Bit2=1) (IS=1)
wim	41:111ca62e8a59	1393	_icon_power = 0x0C; // Icon display on (Bit3=1), Booster circuit is turned on (Bit2=1) (IS=1)
wim	41:111ca62e8a59	1394	// Note: Booster circuit always on for SPLC792A, Bit2 is dont care
wim	41:111ca62e8a59	1395	// Saved to allow contrast change at later time
wim	41:111ca62e8a59	1396
wim	41:111ca62e8a59	1397	_writeCommand(0x50 \| _icon_power \| ((_contrast >> 4) & 0x03)); // Set Icon, Booster and Contrast High bits, 0 1 0 1 Ion Bon C5 C4 (IS=1)
reedas	42:1962dc501f94	1398	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	41:111ca62e8a59	1399
wim	41:111ca62e8a59	1400	_writeCommand(0x68 \| (LCD_SPLC792A_RAB & 0x07)); // Voltage follower, 0 1 1 0 FOn=1, Ampl ratio Rab2=1, Rab1=0, Rab0=0 (IS=1)
wim	41:111ca62e8a59	1401	// Note: Follower circuit always on for SPLC792A, Bit3 is dont care
reedas	42:1962dc501f94	1402	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	41:111ca62e8a59	1403
wim	41:111ca62e8a59	1404	_writeCommand(0x20 \| _function); // Select Instruction Set = 0
wim	41:111ca62e8a59	1405
wim	41:111ca62e8a59	1406	break; // case SPLC792A_3V3 Controller
wim	41:111ca62e8a59	1407
wim	37:ce348c002929	1408	case ST7066_ACM: // ST7066 4/8 bit, I2C on ACM1602 using a PIC
wim	19:c747b9e2e7b8	1409	default:
wim	32:59c4b8f648d4	1410	// Devices fully compatible to HD44780 that do not use any DC/DC Voltage converters but external VLCD, no icons etc
wim	10:dd9b3a696acd	1411
wim	29:a3663151aa65	1412	// Initialise Display configuration
wim	29:a3663151aa65	1413	switch (_type) {
wim	29:a3663151aa65	1414	case LCD8x1: //8x1 is a regular 1 line display
wim	29:a3663151aa65	1415	case LCD8x2B: //8x2B is a special case of 16x1
wim	29:a3663151aa65	1416	// case LCD12x1:
wim	29:a3663151aa65	1417	case LCD16x1:
wim	30:033048611c01	1418	// case LCD20x1:
wim	29:a3663151aa65	1419	case LCD24x1:
wim	30:033048611c01	1420	// case LCD40x1:
wim	32:59c4b8f648d4	1421	_function = 0x00; // Function set 001 DL N F - -
wim	29:a3663151aa65	1422	// DL=0 (4 bits bus)
wim	29:a3663151aa65	1423	// N=0 (1 line)
wim	29:a3663151aa65	1424	// F=0 (5x7 dots font)
wim	29:a3663151aa65	1425	break;
wim	29:a3663151aa65	1426
wim	32:59c4b8f648d4	1427	case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim	32:59c4b8f648d4	1428	case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim	32:59c4b8f648d4	1429	case LCD12x4D: // Special mode for KS0078 and PCF21XX:
wim	33:900a94bc7585	1430	case LCD16x3D: // Special mode for KS0078
wim	32:59c4b8f648d4	1431	// case LCD16x3D1: // Special mode for KS0078
wim	30:033048611c01	1432	// case LCD24x3D: // Special mode for KS0078
wim	32:59c4b8f648d4	1433	// case LCD24x3D1: // Special mode for KS0078
wim	30:033048611c01	1434	case LCD24x4D: // Special mode for KS0078
wim	30:033048611c01	1435	error("Error: LCD Controller type does not support this Display type\n\r");
wim	30:033048611c01	1436	break;
wim	30:033048611c01	1437
wim	30:033048611c01	1438	// All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim	29:a3663151aa65	1439	default:
wim	32:59c4b8f648d4	1440	_function = 0x08; // Function set 001 DL N F - -
wim	29:a3663151aa65	1441	// DL=0 (4 bits bus)
wim	29:a3663151aa65	1442	// Note: 4 bit mode is ignored for native SPI and I2C devices
wim	29:a3663151aa65	1443	// N=1 (2 lines)
wim	29:a3663151aa65	1444	// F=0 (5x7 dots font, only option for 2 line display)
wim	32:59c4b8f648d4	1445	// - (Don't care)
wim	29:a3663151aa65	1446	break;
wim	29:a3663151aa65	1447	} // switch type
wim	10:dd9b3a696acd	1448
wim	34:e5a0dcb43ecc	1449	_writeCommand(0x20 \| _function);
wim	29:a3663151aa65	1450	break; // case default Controller
wim	29:a3663151aa65	1451
wim	34:e5a0dcb43ecc	1452	} // switch Controller specific initialisations
wim	10:dd9b3a696acd	1453
wim	30:033048611c01	1454	// Controller general initialisations
wim	39:e9c2319de9c5	1455	// _writeCommand(0x01); // Clear Display and set cursor to 0
reedas	42:1962dc501f94	1456	// ThisThread::sleep_for(10); // The CLS command takes 1.64 ms.
wim	32:59c4b8f648d4	1457	// // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim	28:30fa94f7341c	1458
wim	39:e9c2319de9c5	1459	_writeCommand(0x02); // Cursor Home, DDRAM Address to Origin
reedas	42:1962dc501f94	1460	ThisThread::sleep_for(10); // The Return Home command takes 1.64 ms.
wim	39:e9c2319de9c5	1461	// Since we are not using the Busy flag, Lets be safe and take 10 ms
wim	28:30fa94f7341c	1462
wim	28:30fa94f7341c	1463	_writeCommand(0x06); // Entry Mode 0000 0 1 I/D S
wim	13:24506ba22480	1464	// Cursor Direction and Display Shift
wim	28:30fa94f7341c	1465	// I/D=1 (Cur incr)
wim	28:30fa94f7341c	1466	// S=0 (No display shift)
wim	10:dd9b3a696acd	1467
wim	29:a3663151aa65	1468	_writeCommand(0x14); // Cursor or Display shift 0001 S/C R/L x x
wim	29:a3663151aa65	1469	// S/C=0 Cursor moves
wim	29:a3663151aa65	1470	// R/L=1 Right
wim	29:a3663151aa65	1471	//
wim	29:a3663151aa65	1472
wim	13:24506ba22480	1473	// _writeCommand(0x0C); // Display Ctrl 0000 1 D C B
wim	17:652ab113bc2e	1474	// // Display On, Cursor Off, Blink Off
wim	36:9f5f86dfd44a	1475
wim	39:e9c2319de9c5	1476	// setCursor(CurOff_BlkOff);
wim	39:e9c2319de9c5	1477	setCursor(CurOn_BlkOff);
wim	21:9eb628d9e164	1478	setMode(DispOn);
simon	1:ac48b187213c	1479	}
simon	1:ac48b187213c	1480
wim	8:03116f75b66e	1481
wim	21:9eb628d9e164	1482	/** Clear the screen, Cursor home.
wim	39:e9c2319de9c5	1483	* Note: The whole display is initialised to charcode 0x20, which may not be a 'space' on some controllers with a
wim	39:e9c2319de9c5	1484	* different fontset such as the PCF2116C or PCF2119R. In this case you should fill the display with 'spaces'.
wim	21:9eb628d9e164	1485	*/
wim	21:9eb628d9e164	1486	void TextLCD_Base::cls() {
wim	15:b70ebfffb258	1487
wim	41:111ca62e8a59	1488	#if (LCD_TWO_CTRL == 1)
wim	15:b70ebfffb258	1489	// Select and configure second LCD controller when needed
wim	15:b70ebfffb258	1490	if(_type==LCD40x4) {
wim	21:9eb628d9e164	1491	_ctrl_idx=_LCDCtrl_1; // Select 2nd controller
wim	15:b70ebfffb258	1492
wim	15:b70ebfffb258	1493	// Second LCD controller Cursor always Off
wim	21:9eb628d9e164	1494	_setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim	15:b70ebfffb258	1495
wim	15:b70ebfffb258	1496	// Second LCD controller Clearscreen
wim	27:22d5086f6ba6	1497	_writeCommand(0x01); // cls, and set cursor to 0
reedas	42:1962dc501f94	1498	ThisThread::sleep_for(20); // The CLS command takes 1.64 ms.
wim	29:a3663151aa65	1499	// Since we are not using the Busy flag, Lets be safe and take 10 ms
wim	15:b70ebfffb258	1500
wim	21:9eb628d9e164	1501	_ctrl_idx=_LCDCtrl_0; // Select primary controller
wim	15:b70ebfffb258	1502	}
wim	41:111ca62e8a59	1503
wim	15:b70ebfffb258	1504
wim	15:b70ebfffb258	1505	// Primary LCD controller Clearscreen
wim	27:22d5086f6ba6	1506	_writeCommand(0x01); // cls, and set cursor to 0
reedas	42:1962dc501f94	1507	ThisThread::sleep_for(20); // The CLS command takes 1.64 ms.
wim	29:a3663151aa65	1508	// Since we are not using the Busy flag, Lets be safe and take 10 ms
wim	15:b70ebfffb258	1509
wim	15:b70ebfffb258	1510	// Restore cursormode on primary LCD controller when needed
wim	15:b70ebfffb258	1511	if(_type==LCD40x4) {
wim	17:652ab113bc2e	1512	_setCursorAndDisplayMode(_currentMode,_currentCursor);
wim	15:b70ebfffb258	1513	}
wim	41:111ca62e8a59	1514
wim	41:111ca62e8a59	1515	#else
wim	41:111ca62e8a59	1516	// Support only one LCD controller
wim	41:111ca62e8a59	1517	_writeCommand(0x01); // cls, and set cursor to 0
reedas	42:1962dc501f94	1518	ThisThread::sleep_for(20); // The CLS command takes 1.64 ms.
wim	41:111ca62e8a59	1519	// Since we are not using the Busy flag, Lets be safe and take 10 ms
wim	41:111ca62e8a59	1520	#endif
wim	15:b70ebfffb258	1521
wim	29:a3663151aa65	1522	setAddress(0, 0); // Reset Cursor location
wim	32:59c4b8f648d4	1523	// Note: This is needed because some displays (eg PCF21XX) don't use line 0 in the '3 Line' mode.
simon	1:ac48b187213c	1524	}
simon	1:ac48b187213c	1525
wim	29:a3663151aa65	1526	/** Locate cursor to a screen column and row
wim	29:a3663151aa65	1527	*
wim	29:a3663151aa65	1528	* @param column The horizontal position from the left, indexed from 0
wim	29:a3663151aa65	1529	* @param row The vertical position from the top, indexed from 0
wim	29:a3663151aa65	1530	*/
wim	21:9eb628d9e164	1531	void TextLCD_Base::locate(int column, int row) {
wim	15:b70ebfffb258	1532
wim	15:b70ebfffb258	1533	// setAddress() does all the heavy lifting:
wim	15:b70ebfffb258	1534	// check column and row sanity,
wim	15:b70ebfffb258	1535	// switch controllers for LCD40x4 if needed
wim	15:b70ebfffb258	1536	// switch cursor for LCD40x4 if needed
wim	15:b70ebfffb258	1537	// set the new memory address to show cursor at correct location
wim	32:59c4b8f648d4	1538	setAddress(column, row);
wim	15:b70ebfffb258	1539	}
wim	30:033048611c01	1540
wim	15:b70ebfffb258	1541
wim	21:9eb628d9e164	1542	/** Write a single character (Stream implementation)
wim	21:9eb628d9e164	1543	*/
wim	21:9eb628d9e164	1544	int TextLCD_Base::_putc(int value) {
wim	15:b70ebfffb258	1545	int addr;
wim	15:b70ebfffb258	1546
wim	15:b70ebfffb258	1547	if (value == '\n') {
wim	15:b70ebfffb258	1548	//No character to write
wim	15:b70ebfffb258	1549
wim	15:b70ebfffb258	1550	//Update Cursor
wim	15:b70ebfffb258	1551	_column = 0;
wim	15:b70ebfffb258	1552	_row++;
wim	15:b70ebfffb258	1553	if (_row >= rows()) {
wim	15:b70ebfffb258	1554	_row = 0;
wim	15:b70ebfffb258	1555	}
wim	15:b70ebfffb258	1556	}
wim	15:b70ebfffb258	1557	else {
wim	37:ce348c002929	1558	//Character to write
wim	41:111ca62e8a59	1559
wim	41:111ca62e8a59	1560	#if (LCD_DEF_FONT == 1) //Default HD44780 font
wim	37:ce348c002929	1561	_writeData(value);
wim	41:111ca62e8a59	1562	#elif (LCD_C_FONT == 1) \|\| (LCD_R_FONT == 1) //PCF21xxC or PCF21xxR font
wim	41:111ca62e8a59	1563	_writeData(ASCII_2_LCD(value));
wim	41:111ca62e8a59	1564	#elif (LCD_UTF8_FONT == 1) // UTF8 2 byte font (eg Cyrillic)
wim	41:111ca62e8a59	1565	// value = UTF_2_LCD(value, utf_seq_rec_first_cyr, utf_seq_recode_cyr, &utf_rnd_recode_cyr[0][0]);
wim	41:111ca62e8a59	1566	value = UTF_2_LCD(value);
wim	41:111ca62e8a59	1567	if (value >= 0) {
wim	41:111ca62e8a59	1568	_writeData(value);
wim	41:111ca62e8a59	1569
wim	41:111ca62e8a59	1570	// Only increment cursor when there is something to write
wim	41:111ca62e8a59	1571	// Continue below to closing bracket...
wim	37:ce348c002929	1572	#else
wim	41:111ca62e8a59	1573	_writeData('?'); //Oops, no font defined
wim	41:111ca62e8a59	1574	#endif
wim	41:111ca62e8a59	1575
wim	15:b70ebfffb258	1576	//Update Cursor
wim	15:b70ebfffb258	1577	_column++;
wim	15:b70ebfffb258	1578	if (_column >= columns()) {
wim	15:b70ebfffb258	1579	_column = 0;
wim	15:b70ebfffb258	1580	_row++;
wim	15:b70ebfffb258	1581	if (_row >= rows()) {
wim	15:b70ebfffb258	1582	_row = 0;
wim	15:b70ebfffb258	1583	}
wim	41:111ca62e8a59	1584	}
wim	41:111ca62e8a59	1585
wim	41:111ca62e8a59	1586	#if (LCD_DEF_FONT == 1) //Default HD44780 font
wim	41:111ca62e8a59	1587
wim	41:111ca62e8a59	1588	#elif (LCD_C_FONT == 1) \|\| (LCD_R_FONT == 1) //PCF21xxC or PCF21xxR font
wim	41:111ca62e8a59	1589
wim	41:111ca62e8a59	1590	#elif (LCD_UTF8_FONT == 1) //UTF8 2 byte font (eg Cyrillic)
wim	41:111ca62e8a59	1591	// Continue code above to close bracket...
wim	41:111ca62e8a59	1592	} // if (value >= 0) {..
wim	41:111ca62e8a59	1593	#else
wim	41:111ca62e8a59	1594
wim	41:111ca62e8a59	1595	#endif
wim	41:111ca62e8a59	1596
wim	15:b70ebfffb258	1597	} //else
wim	15:b70ebfffb258	1598
wim	15:b70ebfffb258	1599	//Set next memoryaddress, make sure cursor blinks at next location
wim	15:b70ebfffb258	1600	addr = getAddress(_column, _row);
wim	15:b70ebfffb258	1601	_writeCommand(0x80 \| addr);
wim	15:b70ebfffb258	1602
wim	15:b70ebfffb258	1603	return value;
wim	15:b70ebfffb258	1604	}
wim	15:b70ebfffb258	1605
wim	15:b70ebfffb258	1606
wim	16:c276b75e6585	1607	// get a single character (Stream implementation)
wim	21:9eb628d9e164	1608	int TextLCD_Base::_getc() {
simon	1:ac48b187213c	1609	return -1;
simon	1:ac48b187213c	1610	}
simon	1:ac48b187213c	1611
wim	41:111ca62e8a59	1612
wim	41:111ca62e8a59	1613	#if ((LCD_C_FONT == 1) \|\| (LCD_R_FONT == 1)) //PCF21xxC or PCF21xxR font
wim	37:ce348c002929	1614	/** Convert ASCII character code to the LCD fonttable code
wim	37:ce348c002929	1615	*
wim	37:ce348c002929	1616	* @param c The character to write to the display
wim	37:ce348c002929	1617	* @return The character code for the specific fonttable of the controller
wim	37:ce348c002929	1618	*/
wim	37:ce348c002929	1619	int TextLCD_Base::ASCII_2_LCD (int c) {
wim	37:ce348c002929	1620
wim	41:111ca62e8a59	1621	//LCD_C_F0 is default for HD44780 and compatible series
wim	41:111ca62e8a59	1622	// if (_font == LCD_C_F0) return c;
wim	41:111ca62e8a59	1623
wim	41:111ca62e8a59	1624	//LCD_C_FC for PCF21XXC series
wim	41:111ca62e8a59	1625	//LCD_C_FR for PCF21XXR series
wim	39:e9c2319de9c5	1626	//Used code from Suga koubou library for PCF2119K and PCF2119R
wim	37:ce348c002929	1627	if (((c >= ' ') && (c <= '?')) \|\| ((c >= 'A') && (c <= 'Z')) \|\| ((c >= 'a') && (c <= 'z'))) {
wim	37:ce348c002929	1628	c \|= 0x80;
wim	39:e9c2319de9c5	1629	} else if (c >= 0xF0 && c <= 0xFF) {
wim	41:111ca62e8a59	1630	c &= 0x0F;
wim	37:ce348c002929	1631	}
wim	37:ce348c002929	1632	return c;
wim	37:ce348c002929	1633	}
wim	41:111ca62e8a59	1634	#endif
wim	41:111ca62e8a59	1635
wim	41:111ca62e8a59	1636	#if(LCD_UTF8_FONT == 1)
wim	41:111ca62e8a59	1637
wim	41:111ca62e8a59	1638	/** Convert UTF8 2-byte character code to the LCD fonttable code
wim	41:111ca62e8a59	1639	* @param c The character to write to the display
wim	41:111ca62e8a59	1640	* @return character code for the specific fonttable of the controller or -1 if UTF8 code is not yet complete or incorrect
wim	41:111ca62e8a59	1641	*
wim	41:111ca62e8a59	1642	* Orig by Andriy, Modified by WH
wim	41:111ca62e8a59	1643	*
wim	41:111ca62e8a59	1644	* Note: The UTF8 decoding table for a specific controller is defined and selected in file TextLCD_UTF8.inc
wim	41:111ca62e8a59	1645	* The table is accessed in this UTF_2_LCD() method through
wim	41:111ca62e8a59	1646	* #define UTF_FIRST, UTF_LAST, UTF_SEQ_REC_FIRST, UTF_SEQ_REC_LAST and
wim	41:111ca62e8a59	1647	* #define UTF_SEQ_RECODE and UTF_RND_RECODE
wim	41:111ca62e8a59	1648	*/
wim	41:111ca62e8a59	1649	int TextLCD_Base::UTF_2_LCD (int c) {
wim	41:111ca62e8a59	1650	int utf_code;
wim	41:111ca62e8a59	1651	int utf_low_byte; // Low byte UTF8
wim	41:111ca62e8a59	1652	static int utf_hi_byte = 0; // High byte UTF8
wim	41:111ca62e8a59	1653
wim	41:111ca62e8a59	1654	if (c < 0x80) { // Regular ASCII code, no need to convert
wim	41:111ca62e8a59	1655	return c;
wim	41:111ca62e8a59	1656	}
wim	41:111ca62e8a59	1657	else { // UTF8 handling, See wikipedia.org/wiki/UTF-8 and www.utf8-chartable.de
wim	41:111ca62e8a59	1658	// printf("0x%X ", c);
wim	41:111ca62e8a59	1659
wim	41:111ca62e8a59	1660	if (c >= 0xC0) { // First UTF8 byte should be formatted as 110b bbaa, Do sanity check
wim	41:111ca62e8a59	1661	utf_hi_byte = c & 0x1F; // Mask out significant bits (0x1F) and save high byte
wim	41:111ca62e8a59	1662	return -1; // Nothing to display as yet, wait for second UTF8 byte
wim	41:111ca62e8a59	1663	}
wim	41:111ca62e8a59	1664
wim	41:111ca62e8a59	1665	if (c <= 0xBF) { // Second UTF8 byte should be formatted as 10aa aaaa, Do sanity check
wim	41:111ca62e8a59	1666	utf_low_byte = c & 0x3F; // Mask out significant bits (0x3F)
wim	41:111ca62e8a59	1667
wim	41:111ca62e8a59	1668	// Compose UTF character code from UTF8 bytes. The UTF codes will be between U+0080 and U+07FF
wim	41:111ca62e8a59	1669	utf_code = (utf_hi_byte << 6) \| utf_low_byte; // 00000bbb aaaaaaaa
wim	41:111ca62e8a59	1670	// printf("0x%4X ", utf_code);
wim	41:111ca62e8a59	1671
wim	41:111ca62e8a59	1672	// Sanity check on UTF codes
wim	41:111ca62e8a59	1673	// For example Cyrillic characters are UTF encoded between 0x0400 and 0x04FF
wim	41:111ca62e8a59	1674	if ((utf_code < UTF_FIRST) \|\| (utf_code > UTF_LAST)) {
wim	41:111ca62e8a59	1675	return -1; // Invalid UTF8 code
wim	41:111ca62e8a59	1676	};
wim	41:111ca62e8a59	1677
wim	41:111ca62e8a59	1678	//Map some specific UTF codes on a character in LCD fonttable using a special correcting lookup table
wim	41:111ca62e8a59	1679	for (char i=0; UTF_RND_RECODE[i][0]; i++) { // Step through table until endvalue 0 is found or until a match is found
wim	41:111ca62e8a59	1680	if (utf_code == UTF_RND_RECODE[i][0]) { // UTF8 code match is found
wim	41:111ca62e8a59	1681	c = UTF_RND_RECODE[1][1];
wim	41:111ca62e8a59	1682	return c; // found match in correcting random table
wim	41:111ca62e8a59	1683	}
wim	41:111ca62e8a59	1684	}
wim	41:111ca62e8a59	1685
wim	41:111ca62e8a59	1686	//Sanity check on table idx range
wim	41:111ca62e8a59	1687	if ((utf_code < UTF_SEQ_REC_FIRST) \|\| (utf_code > UTF_SEQ_REC_LAST)) {
wim	41:111ca62e8a59	1688	return -1; // Invalid UTF8 code
wim	41:111ca62e8a59	1689	};
wim	41:111ca62e8a59	1690
wim	41:111ca62e8a59	1691	//Map all other UTF codes on a character in LCD fonttable using a sequential lookup table
wim	41:111ca62e8a59	1692	c = UTF_SEQ_RECODE[utf_code - UTF_SEQ_REC_FIRST];
wim	41:111ca62e8a59	1693	return c; // entry in sequential table
wim	41:111ca62e8a59	1694	}
wim	41:111ca62e8a59	1695	else {
wim	41:111ca62e8a59	1696	return -1; // Invalid UTF8 code for second byte
wim	41:111ca62e8a59	1697	}
wim	41:111ca62e8a59	1698	} // End UTF8 handling
wim	41:111ca62e8a59	1699	}
wim	41:111ca62e8a59	1700
wim	41:111ca62e8a59	1701	#endif
wim	41:111ca62e8a59	1702
wim	14:0c32b66b14b8	1703
wim	34:e5a0dcb43ecc	1704	#if(LCD_PRINTF != 1)
wim	34:e5a0dcb43ecc	1705	/** Write a character to the LCD
wim	34:e5a0dcb43ecc	1706	*
wim	34:e5a0dcb43ecc	1707	* @param c The character to write to the display
wim	34:e5a0dcb43ecc	1708	*/
wim	34:e5a0dcb43ecc	1709	int TextLCD_Base::putc(int c){
wim	34:e5a0dcb43ecc	1710	return _putc(c);
wim	34:e5a0dcb43ecc	1711	}
wim	34:e5a0dcb43ecc	1712
wim	34:e5a0dcb43ecc	1713
wim	34:e5a0dcb43ecc	1714	/** Write a raw string to the LCD
wim	34:e5a0dcb43ecc	1715	*
wim	34:e5a0dcb43ecc	1716	* @param string text, may be followed by variables to emulate formatting the string.
wim	34:e5a0dcb43ecc	1717	* However, printf formatting is NOT supported and variables will be ignored!
wim	34:e5a0dcb43ecc	1718	*/
wim	34:e5a0dcb43ecc	1719	int TextLCD_Base::printf(const char* text, ...) {
wim	34:e5a0dcb43ecc	1720
wim	34:e5a0dcb43ecc	1721	while (*text !=0) {
wim	34:e5a0dcb43ecc	1722	_putc(*text);
wim	34:e5a0dcb43ecc	1723	text++;
wim	34:e5a0dcb43ecc	1724	}
wim	34:e5a0dcb43ecc	1725	return 0;
wim	34:e5a0dcb43ecc	1726	}
wim	34:e5a0dcb43ecc	1727	#endif
wim	34:e5a0dcb43ecc	1728
wim	34:e5a0dcb43ecc	1729
wim	17:652ab113bc2e	1730	// Write a nibble using the 4-bit interface
wim	21:9eb628d9e164	1731	void TextLCD_Base::_writeNibble(int value) {
wim	17:652ab113bc2e	1732
wim	17:652ab113bc2e	1733	// Enable is Low
wim	21:9eb628d9e164	1734	this->_setEnable(true);
wim	38:cbe275b0b647	1735	this->_setData(value); // Low nibble of value on D4..D7
wim	17:652ab113bc2e	1736	wait_us(1); // Data setup time
wim	21:9eb628d9e164	1737	this->_setEnable(false);
wim	17:652ab113bc2e	1738	wait_us(1); // Datahold time
wim	17:652ab113bc2e	1739	// Enable is Low
wim	17:652ab113bc2e	1740	}
wim	17:652ab113bc2e	1741
wim	16:c276b75e6585	1742	// Write a byte using the 4-bit interface
wim	21:9eb628d9e164	1743	void TextLCD_Base::_writeByte(int value) {
wim	15:b70ebfffb258	1744
wim	15:b70ebfffb258	1745	// Enable is Low
wim	21:9eb628d9e164	1746	this->_setEnable(true);
wim	21:9eb628d9e164	1747	this->_setData(value >> 4); // High nibble
wim	15:b70ebfffb258	1748	wait_us(1); // Data setup time
wim	21:9eb628d9e164	1749	this->_setEnable(false);
wim	15:b70ebfffb258	1750	wait_us(1); // Data hold time
wim	15:b70ebfffb258	1751
wim	21:9eb628d9e164	1752	this->_setEnable(true);
wim	37:ce348c002929	1753	this->_setData(value); // Low nibble
wim	15:b70ebfffb258	1754	wait_us(1); // Data setup time
wim	21:9eb628d9e164	1755	this->_setEnable(false);
wim	15:b70ebfffb258	1756	wait_us(1); // Datahold time
wim	15:b70ebfffb258	1757
wim	15:b70ebfffb258	1758	// Enable is Low
simon	1:ac48b187213c	1759	}
simon	1:ac48b187213c	1760
wim	21:9eb628d9e164	1761	// Write a command byte to the LCD controller
wim	21:9eb628d9e164	1762	void TextLCD_Base::_writeCommand(int command) {
wim	15:b70ebfffb258	1763
wim	21:9eb628d9e164	1764	this->_setRS(false);
wim	16:c276b75e6585	1765	wait_us(1); // Data setup time for RS
wim	15:b70ebfffb258	1766
wim	21:9eb628d9e164	1767	this->_writeByte(command);
wim	15:b70ebfffb258	1768	wait_us(40); // most instructions take 40us
simon	1:ac48b187213c	1769	}
simon	1:ac48b187213c	1770
wim	21:9eb628d9e164	1771	// Write a data byte to the LCD controller
wim	21:9eb628d9e164	1772	void TextLCD_Base::_writeData(int data) {
wim	15:b70ebfffb258	1773
wim	21:9eb628d9e164	1774	this->_setRS(true);
wim	16:c276b75e6585	1775	wait_us(1); // Data setup time for RS
wim	15:b70ebfffb258	1776
wim	21:9eb628d9e164	1777	this->_writeByte(data);
wim	15:b70ebfffb258	1778	wait_us(40); // data writes take 40us
simon	1:ac48b187213c	1779	}
simon	1:ac48b187213c	1780
wim	8:03116f75b66e	1781
wim	32:59c4b8f648d4	1782	// This replaces the original _address() method.
wim	8:03116f75b66e	1783	// It is confusing since it returns the memoryaddress or-ed with the set memorycommand 0x80.
wim	8:03116f75b66e	1784	// Left it in here for compatibility with older code. New applications should use getAddress() instead.
wim	21:9eb628d9e164	1785	int TextLCD_Base::_address(int column, int row) {
wim	8:03116f75b66e	1786	return 0x80 \| getAddress(column, row);
wim	8:03116f75b66e	1787	}
wim	8:03116f75b66e	1788
wim	30:033048611c01	1789
wim	30:033048611c01	1790	// This is new method to return the memory address based on row, column and displaytype.
wim	30:033048611c01	1791	//
wim	30:033048611c01	1792	/** Return the memoryaddress of screen column and row location
wim	30:033048611c01	1793	*
wim	30:033048611c01	1794	* @param column The horizontal position from the left, indexed from 0
wim	30:033048611c01	1795	* @param row The vertical position from the top, indexed from 0
wim	36:9f5f86dfd44a	1796	* @return The memoryaddress of screen column and row location
wim	30:033048611c01	1797	*
wim	30:033048611c01	1798	*/
wim	30:033048611c01	1799	int TextLCD_Base::getAddress(int column, int row) {
wim	30:033048611c01	1800
wim	30:033048611c01	1801	switch (_addr_mode) {
wim	30:033048611c01	1802
wim	30:033048611c01	1803	case LCD_T_A:
wim	30:033048611c01	1804	//Default addressing mode for 1, 2 and 4 rows (except 40x4)
wim	30:033048611c01	1805	//The two available rows are split and stacked on top of eachother. Addressing for 3rd and 4th line continues where lines 1 and 2 were split.
wim	30:033048611c01	1806	//Displays top rows when less than four are used.
wim	30:033048611c01	1807	switch (row) {
wim	30:033048611c01	1808	case 0:
wim	30:033048611c01	1809	return 0x00 + column;
wim	30:033048611c01	1810	case 1:
wim	30:033048611c01	1811	return 0x40 + column;
wim	30:033048611c01	1812	case 2:
wim	30:033048611c01	1813	return 0x00 + _nr_cols + column;
wim	30:033048611c01	1814	case 3:
wim	30:033048611c01	1815	return 0x40 + _nr_cols + column;
wim	30:033048611c01	1816	// Should never get here.
wim	39:e9c2319de9c5	1817	// default:
wim	39:e9c2319de9c5	1818	// return 0x00;
wim	30:033048611c01	1819	}
wim	30:033048611c01	1820
wim	30:033048611c01	1821	case LCD_T_B:
wim	30:033048611c01	1822	// LCD8x2B is a special layout of LCD16x1
wim	30:033048611c01	1823	if (row==0)
wim	30:033048611c01	1824	return 0x00 + column;
wim	30:033048611c01	1825	else
wim	30:033048611c01	1826	// return _nr_cols + column;
wim	30:033048611c01	1827	return 0x08 + column;
wim	30:033048611c01	1828
wim	30:033048611c01	1829	case LCD_T_C:
wim	30:033048611c01	1830	// LCD16x1C is a special layout of LCD8x2
wim	33:900a94bc7585	1831	// LCD32x1C is a special layout of LCD16x2
wim	33:900a94bc7585	1832	// LCD40x1C is a special layout of LCD20x2
wim	33:900a94bc7585	1833	#if(0)
wim	32:59c4b8f648d4	1834	if (column < 8)
wim	30:033048611c01	1835	return 0x00 + column;
wim	30:033048611c01	1836	else
wim	30:033048611c01	1837	return 0x40 + (column - 8);
wim	32:59c4b8f648d4	1838	#else
wim	32:59c4b8f648d4	1839	if (column < (_nr_cols >> 1))
wim	32:59c4b8f648d4	1840	return 0x00 + column;
wim	32:59c4b8f648d4	1841	else
wim	32:59c4b8f648d4	1842	return 0x40 + (column - (_nr_cols >> 1));
wim	32:59c4b8f648d4	1843	#endif
wim	30:033048611c01	1844
wim	30:033048611c01	1845	case LCD_T_D:
wim	36:9f5f86dfd44a	1846	//Alternate addressing mode for 3 and 4 row displays (except 40x4). Used by PCF21XX, KS0073, KS0078, SSD1803
wim	30:033048611c01	1847	//The 4 available rows start at a hardcoded address.
wim	30:033048611c01	1848	//Displays top rows when less than four are used.
wim	30:033048611c01	1849	switch (row) {
wim	30:033048611c01	1850	case 0:
wim	30:033048611c01	1851	return 0x00 + column;
wim	30:033048611c01	1852	case 1:
wim	30:033048611c01	1853	return 0x20 + column;
wim	30:033048611c01	1854	case 2:
wim	30:033048611c01	1855	return 0x40 + column;
wim	30:033048611c01	1856	case 3:
wim	30:033048611c01	1857	return 0x60 + column;
wim	30:033048611c01	1858	// Should never get here.
wim	39:e9c2319de9c5	1859	// default:
wim	39:e9c2319de9c5	1860	// return 0x00;
wim	30:033048611c01	1861	}
wim	30:033048611c01	1862
wim	30:033048611c01	1863	case LCD_T_D1:
wim	36:9f5f86dfd44a	1864	//Alternate addressing mode for 3 row displays. Used by PCF21XX, KS0073, KS0078, SSD1803
wim	30:033048611c01	1865	//The 4 available rows start at a hardcoded address.
wim	30:033048611c01	1866	//Skips top row of 4 row display and starts display at row 1
wim	30:033048611c01	1867	switch (row) {
wim	30:033048611c01	1868	case 0:
wim	30:033048611c01	1869	return 0x20 + column;
wim	30:033048611c01	1870	case 1:
wim	30:033048611c01	1871	return 0x40 + column;
wim	30:033048611c01	1872	case 2:
wim	30:033048611c01	1873	return 0x60 + column;
wim	30:033048611c01	1874	// Should never get here.
wim	39:e9c2319de9c5	1875	// default:
wim	39:e9c2319de9c5	1876	// return 0x00;
wim	30:033048611c01	1877	}
wim	30:033048611c01	1878
wim	30:033048611c01	1879	case LCD_T_E:
wim	30:033048611c01	1880	// LCD40x4 is a special case since it has 2 controllers.
wim	30:033048611c01	1881	// Each controller is configured as 40x2 (Type A)
wim	30:033048611c01	1882	if (row<2) {
wim	30:033048611c01	1883	// Test to see if we need to switch between controllers
wim	30:033048611c01	1884	if (_ctrl_idx != _LCDCtrl_0) {
wim	30:033048611c01	1885
wim	30:033048611c01	1886	// Second LCD controller Cursor Off
wim	30:033048611c01	1887	_setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim	30:033048611c01	1888
wim	30:033048611c01	1889	// Select primary controller
wim	30:033048611c01	1890	_ctrl_idx = _LCDCtrl_0;
wim	30:033048611c01	1891
wim	30:033048611c01	1892	// Restore cursormode on primary LCD controller
wim	30:033048611c01	1893	_setCursorAndDisplayMode(_currentMode, _currentCursor);
wim	30:033048611c01	1894	}
wim	30:033048611c01	1895
wim	30:033048611c01	1896	return 0x00 + (row * 0x40) + column;
wim	30:033048611c01	1897	}
wim	30:033048611c01	1898	else {
wim	30:033048611c01	1899
wim	30:033048611c01	1900	// Test to see if we need to switch between controllers
wim	30:033048611c01	1901	if (_ctrl_idx != _LCDCtrl_1) {
wim	30:033048611c01	1902	// Primary LCD controller Cursor Off
wim	30:033048611c01	1903	_setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim	30:033048611c01	1904
wim	30:033048611c01	1905	// Select secondary controller
wim	30:033048611c01	1906	_ctrl_idx = _LCDCtrl_1;
wim	30:033048611c01	1907
wim	30:033048611c01	1908	// Restore cursormode on secondary LCD controller
wim	30:033048611c01	1909	_setCursorAndDisplayMode(_currentMode, _currentCursor);
wim	30:033048611c01	1910	}
wim	30:033048611c01	1911
wim	30:033048611c01	1912	return 0x00 + ((row-2) * 0x40) + column;
wim	30:033048611c01	1913	}
wim	30:033048611c01	1914
wim	32:59c4b8f648d4	1915	case LCD_T_F:
wim	32:59c4b8f648d4	1916	//Alternate addressing mode for 3 row displays.
wim	32:59c4b8f648d4	1917	//The first half of 3rd row continues from 1st row, the second half continues from 2nd row.
wim	32:59c4b8f648d4	1918	switch (row) {
wim	32:59c4b8f648d4	1919	case 0:
wim	32:59c4b8f648d4	1920	return 0x00 + column;
wim	32:59c4b8f648d4	1921	case 1:
wim	32:59c4b8f648d4	1922	return 0x40 + column;
wim	32:59c4b8f648d4	1923	case 2:
wim	32:59c4b8f648d4	1924	if (column < (_nr_cols >> 1)) // check first or second half of line
wim	32:59c4b8f648d4	1925	return (0x00 + _nr_cols + column);
wim	32:59c4b8f648d4	1926	else
wim	32:59c4b8f648d4	1927	return (0x40 + _nr_cols + (column - (_nr_cols >> 1)));
wim	32:59c4b8f648d4	1928	// Should never get here.
wim	39:e9c2319de9c5	1929	// default:
wim	39:e9c2319de9c5	1930	// return 0x00;
wim	32:59c4b8f648d4	1931	}
wim	32:59c4b8f648d4	1932
wim	32:59c4b8f648d4	1933	case LCD_T_G:
wim	32:59c4b8f648d4	1934	//Alternate addressing mode for 3 row displays. Used by ST7036
wim	32:59c4b8f648d4	1935	switch (row) {
wim	32:59c4b8f648d4	1936	case 0:
wim	32:59c4b8f648d4	1937	return 0x00 + column;
wim	32:59c4b8f648d4	1938	case 1:
wim	32:59c4b8f648d4	1939	return 0x10 + column;
wim	32:59c4b8f648d4	1940	case 2:
wim	32:59c4b8f648d4	1941	return 0x20 + column;
wim	32:59c4b8f648d4	1942	// Should never get here.
wim	39:e9c2319de9c5	1943	// default:
wim	39:e9c2319de9c5	1944	// return 0x00;
wim	32:59c4b8f648d4	1945	}
wim	32:59c4b8f648d4	1946
wim	30:033048611c01	1947	// Should never get here.
wim	30:033048611c01	1948	default:
wim	30:033048611c01	1949	return 0x00;
wim	32:59c4b8f648d4	1950
wim	32:59c4b8f648d4	1951	} // switch _addr_mode
wim	30:033048611c01	1952	}
wim	30:033048611c01	1953
wim	30:033048611c01	1954
wim	29:a3663151aa65	1955	/** Set the memoryaddress of screen column and row location
wim	29:a3663151aa65	1956	*
wim	29:a3663151aa65	1957	* @param column The horizontal position from the left, indexed from 0
wim	29:a3663151aa65	1958	* @param row The vertical position from the top, indexed from 0
wim	29:a3663151aa65	1959	*/
wim	21:9eb628d9e164	1960	void TextLCD_Base::setAddress(int column, int row) {
wim	15:b70ebfffb258	1961
wim	15:b70ebfffb258	1962	// Sanity Check column
wim	15:b70ebfffb258	1963	if (column < 0) {
wim	15:b70ebfffb258	1964	_column = 0;
wim	15:b70ebfffb258	1965	}
wim	36:9f5f86dfd44a	1966	else if (column >= _nr_cols) {
wim	36:9f5f86dfd44a	1967	_column = _nr_cols - 1;
wim	15:b70ebfffb258	1968	} else _column = column;
wim	8:03116f75b66e	1969
wim	15:b70ebfffb258	1970	// Sanity Check row
wim	15:b70ebfffb258	1971	if (row < 0) {
wim	15:b70ebfffb258	1972	_row = 0;
wim	15:b70ebfffb258	1973	}
wim	36:9f5f86dfd44a	1974	else if (row >= _nr_rows) {
wim	36:9f5f86dfd44a	1975	_row = _nr_rows - 1;
wim	15:b70ebfffb258	1976	} else _row = row;
wim	15:b70ebfffb258	1977
wim	15:b70ebfffb258	1978
wim	15:b70ebfffb258	1979	// Compute the memory address
wim	15:b70ebfffb258	1980	// For LCD40x4: switch controllers if needed
wim	15:b70ebfffb258	1981	// switch cursor if needed
wim	15:b70ebfffb258	1982	int addr = getAddress(_column, _row);
wim	8:03116f75b66e	1983
wim	13:24506ba22480	1984	_writeCommand(0x80 \| addr);
wim	8:03116f75b66e	1985	}
simon	1:ac48b187213c	1986
wim	29:a3663151aa65	1987
wim	29:a3663151aa65	1988	/** Return the number of columns
wim	29:a3663151aa65	1989	*
wim	36:9f5f86dfd44a	1990	* @return The number of columns
wim	30:033048611c01	1991	*
wim	30:033048611c01	1992	* Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim	29:a3663151aa65	1993	*/
wim	21:9eb628d9e164	1994	int TextLCD_Base::columns() {
wim	30:033048611c01	1995
wim	30:033048611c01	1996	// Columns encoded in b7..b0
wim	30:033048611c01	1997	//return (_type & 0xFF);
wim	31:ef31cd8a00d1	1998	return _nr_cols;
simon	1:ac48b187213c	1999	}
simon	1:ac48b187213c	2000
wim	29:a3663151aa65	2001	/** Return the number of rows
wim	29:a3663151aa65	2002	*
wim	36:9f5f86dfd44a	2003	* @return The number of rows
wim	30:033048611c01	2004	*
wim	30:033048611c01	2005	* Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim	29:a3663151aa65	2006	*/
wim	21:9eb628d9e164	2007	int TextLCD_Base::rows() {
wim	30:033048611c01	2008
wim	30:033048611c01	2009	// Rows encoded in b15..b8
wim	30:033048611c01	2010	//return ((_type >> 8) & 0xFF);
wim	30:033048611c01	2011	return _nr_rows;
simon	1:ac48b187213c	2012	}
wim	10:dd9b3a696acd	2013
wim	29:a3663151aa65	2014	/** Set the Cursormode
wim	29:a3663151aa65	2015	*
wim	29:a3663151aa65	2016	* @param cursorMode The Cursor mode (CurOff_BlkOff, CurOn_BlkOff, CurOff_BlkOn, CurOn_BlkOn)
wim	29:a3663151aa65	2017	*/
wim	21:9eb628d9e164	2018	void TextLCD_Base::setCursor(LCDCursor cursorMode) {
wim	15:b70ebfffb258	2019
wim	17:652ab113bc2e	2020	// Save new cursor mode, needed when 2 controllers are in use or when display is switched off/on
wim	17:652ab113bc2e	2021	_currentCursor = cursorMode;
wim	10:dd9b3a696acd	2022
wim	17:652ab113bc2e	2023	// Configure only current LCD controller
wim	31:ef31cd8a00d1	2024	_setCursorAndDisplayMode(_currentMode, _currentCursor);
wim	15:b70ebfffb258	2025	}
wim	15:b70ebfffb258	2026
wim	29:a3663151aa65	2027	/** Set the Displaymode
wim	29:a3663151aa65	2028	*
wim	29:a3663151aa65	2029	* @param displayMode The Display mode (DispOff, DispOn)
wim	29:a3663151aa65	2030	*/
wim	21:9eb628d9e164	2031	void TextLCD_Base::setMode(LCDMode displayMode) {
wim	17:652ab113bc2e	2032
wim	17:652ab113bc2e	2033	// Save new displayMode, needed when 2 controllers are in use or when cursor is changed
wim	17:652ab113bc2e	2034	_currentMode = displayMode;
wim	41:111ca62e8a59	2035
wim	41:111ca62e8a59	2036	#if (LCD_TWO_CTRL == 1)
wim	17:652ab113bc2e	2037	// Select and configure second LCD controller when needed
wim	17:652ab113bc2e	2038	if(_type==LCD40x4) {
wim	21:9eb628d9e164	2039	if (_ctrl_idx==_LCDCtrl_0) {
wim	17:652ab113bc2e	2040	// Configure primary LCD controller
wim	17:652ab113bc2e	2041	_setCursorAndDisplayMode(_currentMode, _currentCursor);
wim	11:9ec02df863a1	2042
wim	17:652ab113bc2e	2043	// Select 2nd controller
wim	21:9eb628d9e164	2044	_ctrl_idx=_LCDCtrl_1;
wim	17:652ab113bc2e	2045
wim	17:652ab113bc2e	2046	// Configure secondary LCD controller
wim	21:9eb628d9e164	2047	_setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim	11:9ec02df863a1	2048
wim	17:652ab113bc2e	2049	// Restore current controller
wim	21:9eb628d9e164	2050	_ctrl_idx=_LCDCtrl_0;
wim	17:652ab113bc2e	2051	}
wim	17:652ab113bc2e	2052	else {
wim	17:652ab113bc2e	2053	// Select primary controller
wim	21:9eb628d9e164	2054	_ctrl_idx=_LCDCtrl_0;
wim	17:652ab113bc2e	2055
wim	17:652ab113bc2e	2056	// Configure primary LCD controller
wim	21:9eb628d9e164	2057	_setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim	17:652ab113bc2e	2058
wim	17:652ab113bc2e	2059	// Restore current controller
wim	21:9eb628d9e164	2060	_ctrl_idx=_LCDCtrl_1;
wim	11:9ec02df863a1	2061
wim	17:652ab113bc2e	2062	// Configure secondary LCD controller
wim	17:652ab113bc2e	2063	_setCursorAndDisplayMode(_currentMode, _currentCursor);
wim	10:dd9b3a696acd	2064	}
wim	17:652ab113bc2e	2065	}
wim	17:652ab113bc2e	2066	else {
wim	17:652ab113bc2e	2067	// Configure primary LCD controller
wim	17:652ab113bc2e	2068	_setCursorAndDisplayMode(_currentMode, _currentCursor);
wim	30:033048611c01	2069	}
wim	41:111ca62e8a59	2070	#else
wim	41:111ca62e8a59	2071	// Support only one LCD controller
wim	41:111ca62e8a59	2072	_setCursorAndDisplayMode(_currentMode, _currentCursor);
wim	41:111ca62e8a59	2073
wim	41:111ca62e8a59	2074	#endif
wim	17:652ab113bc2e	2075	}
wim	17:652ab113bc2e	2076
wim	29:a3663151aa65	2077	/** Low level method to restore the cursortype and display mode for current controller
wim	29:a3663151aa65	2078	*/
wim	36:9f5f86dfd44a	2079	void TextLCD_Base::_setCursorAndDisplayMode(LCDMode displayMode, LCDCursor cursorType) {
wim	36:9f5f86dfd44a	2080
wim	36:9f5f86dfd44a	2081	// Configure current LCD controller
wim	36:9f5f86dfd44a	2082	switch (_ctrl) {
wim	36:9f5f86dfd44a	2083	case ST7070:
wim	36:9f5f86dfd44a	2084	//ST7070 does not support Cursorblink. The P bit selects the font instead !
wim	36:9f5f86dfd44a	2085	_writeCommand(0x08 \| displayMode \| (cursorType & 0x02));
wim	36:9f5f86dfd44a	2086	break;
wim	36:9f5f86dfd44a	2087	default:
wim	36:9f5f86dfd44a	2088	_writeCommand(0x08 \| displayMode \| cursorType);
wim	36:9f5f86dfd44a	2089	break;
wim	36:9f5f86dfd44a	2090	} //switch
wim	10:dd9b3a696acd	2091	}
wim	10:dd9b3a696acd	2092
wim	29:a3663151aa65	2093	/** Set the Backlight mode
wim	29:a3663151aa65	2094	*
wim	29:a3663151aa65	2095	* @param backlightMode The Backlight mode (LightOff, LightOn)
wim	29:a3663151aa65	2096	*/
wim	21:9eb628d9e164	2097	void TextLCD_Base::setBacklight(LCDBacklight backlightMode) {
wim	20:e0da005a777f	2098
wim	35:311be6444a39	2099	#if (BACKLIGHT_INV==0)
wim	35:311be6444a39	2100	// Positive Backlight control pin logic
wim	20:e0da005a777f	2101	if (backlightMode == LightOn) {
wim	35:311be6444a39	2102	this->_setBL(true);
wim	20:e0da005a777f	2103	}
wim	20:e0da005a777f	2104	else {
wim	21:9eb628d9e164	2105	this->_setBL(false);
wim	20:e0da005a777f	2106	}
wim	35:311be6444a39	2107	#else
wim	35:311be6444a39	2108	// Inverted Backlight control pin logic
wim	35:311be6444a39	2109	if (backlightMode == LightOn) {
wim	35:311be6444a39	2110	this->_setBL(false);
wim	35:311be6444a39	2111	}
wim	35:311be6444a39	2112	else {
wim	35:311be6444a39	2113	this->_setBL(true);
wim	35:311be6444a39	2114	}
wim	35:311be6444a39	2115	#endif
wim	20:e0da005a777f	2116	}
wim	20:e0da005a777f	2117
wim	29:a3663151aa65	2118	/** Set User Defined Characters
wim	29:a3663151aa65	2119	*
wim	34:e5a0dcb43ecc	2120	* @param unsigned char c The Index of the UDC (0..7) for HD44780 or clones and (0..15) for some more advanced controllers
wim	34:e5a0dcb43ecc	2121	* @param char *udc_data The bitpatterns for the UDC (8 bytes of 5 significant bits for bitpattern and 3 bits for blinkmode (advanced types))
wim	29:a3663151aa65	2122	*/
wim	21:9eb628d9e164	2123	void TextLCD_Base::setUDC(unsigned char c, char *udc_data) {
wim	41:111ca62e8a59	2124
wim	41:111ca62e8a59	2125	#if (LCD_TWO_CTRL == 1)
wim	15:b70ebfffb258	2126	// Select and configure second LCD controller when needed
wim	15:b70ebfffb258	2127	if(_type==LCD40x4) {
wim	19:c747b9e2e7b8	2128	_LCDCtrl_Idx current_ctrl_idx = _ctrl_idx; // Temp save current controller
wim	15:b70ebfffb258	2129
wim	15:b70ebfffb258	2130	// Select primary controller
wim	21:9eb628d9e164	2131	_ctrl_idx=_LCDCtrl_0;
wim	15:b70ebfffb258	2132
wim	15:b70ebfffb258	2133	// Configure primary LCD controller
wim	15:b70ebfffb258	2134	_setUDC(c, udc_data);
wim	15:b70ebfffb258	2135
wim	15:b70ebfffb258	2136	// Select 2nd controller
wim	21:9eb628d9e164	2137	_ctrl_idx=_LCDCtrl_1;
wim	15:b70ebfffb258	2138
wim	15:b70ebfffb258	2139	// Configure secondary LCD controller
wim	15:b70ebfffb258	2140	_setUDC(c, udc_data);
wim	11:9ec02df863a1	2141
wim	15:b70ebfffb258	2142	// Restore current controller
wim	19:c747b9e2e7b8	2143	_ctrl_idx=current_ctrl_idx;
wim	15:b70ebfffb258	2144	}
wim	15:b70ebfffb258	2145	else {
wim	15:b70ebfffb258	2146	// Configure primary LCD controller
wim	15:b70ebfffb258	2147	_setUDC(c, udc_data);
wim	34:e5a0dcb43ecc	2148	}
wim	41:111ca62e8a59	2149	#else
wim	41:111ca62e8a59	2150	// Support only one LCD controller
wim	41:111ca62e8a59	2151	_setUDC(c, udc_data);
wim	41:111ca62e8a59	2152	#endif
wim	15:b70ebfffb258	2153	}
wim	15:b70ebfffb258	2154
wim	34:e5a0dcb43ecc	2155	/** Low level method to store user defined characters for current controller
wim	34:e5a0dcb43ecc	2156	*
wim	34:e5a0dcb43ecc	2157	* @param unsigned char c The Index of the UDC (0..7) for HD44780 clones and (0..15) for some more advanced controllers
wim	34:e5a0dcb43ecc	2158	* @param char *udc_data The bitpatterns for the UDC (8 bytes of 5 significant bits for bitpattern and 3 bits for blinkmode (advanced types))
wim	34:e5a0dcb43ecc	2159	*/
wim	34:e5a0dcb43ecc	2160	void TextLCD_Base::_setUDC(unsigned char c, char *udc_data) {
wim	34:e5a0dcb43ecc	2161
wim	34:e5a0dcb43ecc	2162	switch (_ctrl) {
wim	34:e5a0dcb43ecc	2163	case PCF2103_3V3 : // Some UDCs may be used for Icons
wim	34:e5a0dcb43ecc	2164	case PCF2113_3V3 : // Some UDCs may be used for Icons
wim	34:e5a0dcb43ecc	2165	case PCF2116_3V3 :
wim	34:e5a0dcb43ecc	2166	case PCF2116_5V :
wim	40:d3496c3ea301	2167	case PCF2119_3V3 : // Some UDCs may be used for Icons
wim	40:d3496c3ea301	2168	case PCF2119R_3V3: // Some UDCs may be used for Icons
wim	34:e5a0dcb43ecc	2169	c = c & 0x0F; // mask down to valid range
wim	34:e5a0dcb43ecc	2170	break;
wim	34:e5a0dcb43ecc	2171
wim	34:e5a0dcb43ecc	2172	default:
wim	34:e5a0dcb43ecc	2173	c = c & 0x07; // mask down to valid range
wim	34:e5a0dcb43ecc	2174	break;
wim	34:e5a0dcb43ecc	2175	} //switch _ctrl
wim	34:e5a0dcb43ecc	2176
wim	34:e5a0dcb43ecc	2177	// Select DD RAM for current LCD controller
wim	34:e5a0dcb43ecc	2178	// This is needed to correctly set Bit 6 of the addresspointer for controllers that support 16 UDCs
wim	34:e5a0dcb43ecc	2179	_writeCommand(0x80 \| ((c << 3) & 0x40)) ;
wim	34:e5a0dcb43ecc	2180
wim	34:e5a0dcb43ecc	2181	// Select CG RAM for current LCD controller
wim	34:e5a0dcb43ecc	2182	_writeCommand(0x40 \| ((c << 3) & 0x3F)); //Set CG-RAM address, (note that Bit 6 is retained and can not be set by this command !)
wim	34:e5a0dcb43ecc	2183	//8 sequential locations needed per UDC
wim	34:e5a0dcb43ecc	2184	// Store UDC pattern
wim	34:e5a0dcb43ecc	2185	for (int i=0; i<8; i++) {
wim	34:e5a0dcb43ecc	2186	_writeData(*udc_data++);
wim	34:e5a0dcb43ecc	2187	}
wim	34:e5a0dcb43ecc	2188
wim	34:e5a0dcb43ecc	2189	//Select DD RAM again for current LCD controller and restore the addresspointer
wim	34:e5a0dcb43ecc	2190	int addr = getAddress(_column, _row);
wim	34:e5a0dcb43ecc	2191	_writeCommand(0x80 \| addr);
wim	34:e5a0dcb43ecc	2192	}
wim	32:59c4b8f648d4	2193
wim	39:e9c2319de9c5	2194	#if(LCD_BLINK == 1)
wim	36:9f5f86dfd44a	2195	/** Set UDC Blink and Icon blink
wim	33:900a94bc7585	2196	* setUDCBlink method is supported by some compatible devices (eg SSD1803)
wim	33:900a94bc7585	2197	*
wim	33:900a94bc7585	2198	* @param blinkMode The Blink mode (BlinkOff, BlinkOn)
wim	33:900a94bc7585	2199	*/
wim	33:900a94bc7585	2200	void TextLCD_Base::setUDCBlink(LCDBlink blinkMode){
wim	36:9f5f86dfd44a	2201	// Blinking UDCs (and icons) are enabled when a specific controlbit (BE) is set.
wim	36:9f5f86dfd44a	2202	// The blinking pixels in the UDC and icons can be controlled by setting additional bits in the UDC or icon bitpattern.
wim	36:9f5f86dfd44a	2203	// UDCs are defined by an 8 byte bitpattern. The P0..P4 form the character pattern.
wim	33:900a94bc7585	2204	// P7 P6 P5 P4 P3 P2 P1 P0
wim	33:900a94bc7585	2205	// 0 B1 B0 x 0 1 1 1 0
wim	33:900a94bc7585	2206	// 1 B1 B0 x 1 0 0 0 1
wim	33:900a94bc7585	2207	// .............
wim	33:900a94bc7585	2208	// 7 B1 B0 x 1 0 0 0 1
wim	33:900a94bc7585	2209	//
wim	33:900a94bc7585	2210	// Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim	33:900a94bc7585	2211	// B1 B0 Mode
wim	33:900a94bc7585	2212	// 0 0 No Blinking in this row of the UDC
wim	33:900a94bc7585	2213	// 0 1 Enabled pixels in P4 will blink
wim	33:900a94bc7585	2214	// 1 x Enabled pixels in P0..P4 will blink
wim	36:9f5f86dfd44a	2215	//
wim	36:9f5f86dfd44a	2216	// Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim	36:9f5f86dfd44a	2217	// 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim	36:9f5f86dfd44a	2218	// 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim	36:9f5f86dfd44a	2219	// Note: the PCF2119 uses UDCs to set Icons
wim	36:9f5f86dfd44a	2220	// 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim	36:9f5f86dfd44a	2221	// 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim	33:900a94bc7585	2222	switch (blinkMode) {
wim	33:900a94bc7585	2223	case BlinkOn:
wim	36:9f5f86dfd44a	2224	// Controllers that support UDC/Icon Blink
wim	33:900a94bc7585	2225	switch (_ctrl) {
wim	40:d3496c3ea301	2226	case KS0073 :
wim	40:d3496c3ea301	2227	case KS0078 :
wim	40:d3496c3ea301	2228	case HD66712 :
wim	36:9f5f86dfd44a	2229	_function_1 \|= 0x02; // Enable UDC/Icon Blink
wim	36:9f5f86dfd44a	2230	_writeCommand(0x20 \| _function_1); // Function set 0 0 1 DL N RE(1) BE 0/LP (Ext Regs)
wim	33:900a94bc7585	2231
wim	33:900a94bc7585	2232	_writeCommand(0x20 \| _function); // Function set 0 0 1 DL N RE(0) DH REV (Std Regs)
wim	40:d3496c3ea301	2233	break; // case KS0073, KS0078, HD66712 Controller
wim	33:900a94bc7585	2234
wim	33:900a94bc7585	2235	case US2066_3V3 :
wim	33:900a94bc7585	2236	case SSD1803_3V3 :
wim	36:9f5f86dfd44a	2237	_function_1 \|= 0x04; // Enable UDC/Icon Blink
wim	33:900a94bc7585	2238	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim	33:900a94bc7585	2239	// Select Ext Instr Set
wim	33:900a94bc7585	2240
wim	33:900a94bc7585	2241	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim	33:900a94bc7585	2242	// Select Std Instr set, Select IS=0
wim	33:900a94bc7585	2243	break; // case SSD1803, US2066
wim	36:9f5f86dfd44a	2244
wim	36:9f5f86dfd44a	2245	case PCF2103_3V3 :
wim	36:9f5f86dfd44a	2246	case PCF2113_3V3 :
wim	36:9f5f86dfd44a	2247	case PCF2119_3V3 :
wim	39:e9c2319de9c5	2248	case PCF2119R_3V3 :
wim	36:9f5f86dfd44a	2249	// Enable Icon Blink
wim	36:9f5f86dfd44a	2250	_writeCommand(0x20 \| _function \| 0x01); // Set function, Select Instr Set = 1
wim	36:9f5f86dfd44a	2251	_writeCommand(0x08 \| 0x02); // ICON Conf 0000 1, IM=0 (Char mode), IB=1 (Icon blink), 0 (Instr. Set 1)
wim	36:9f5f86dfd44a	2252	_writeCommand(0x20 \| _function); // Set function, Select Instr Set = 0
wim	36:9f5f86dfd44a	2253
wim	36:9f5f86dfd44a	2254	break;
wim	33:900a94bc7585	2255
wim	33:900a94bc7585	2256	default:
wim	33:900a94bc7585	2257	//Unsupported feature for other controllers
wim	33:900a94bc7585	2258	break;
wim	33:900a94bc7585	2259	} //switch _ctrl
wim	33:900a94bc7585	2260
wim	36:9f5f86dfd44a	2261	break; // BlinkOn
wim	33:900a94bc7585	2262
wim	33:900a94bc7585	2263	case BlinkOff:
wim	33:900a94bc7585	2264	// Controllers that support UDC Blink
wim	33:900a94bc7585	2265	switch (_ctrl) {
wim	40:d3496c3ea301	2266	case KS0073 :
wim	40:d3496c3ea301	2267	case KS0078 :
wim	40:d3496c3ea301	2268	case HD66712:
wim	36:9f5f86dfd44a	2269	_function_1 &= ~0x02; // Disable UDC/Icon Blink
wim	36:9f5f86dfd44a	2270	_writeCommand(0x20 \| _function_1); // Function set 0 0 1 DL N RE(1) BE 0/LP (Ext Regs)
wim	33:900a94bc7585	2271
wim	33:900a94bc7585	2272	_writeCommand(0x20 \| _function); // Function set 0 0 1 DL N RE(0) DH REV (Std Regs)
wim	40:d3496c3ea301	2273	break; // case KS0073, KS0078, HD66712 Controller
wim	33:900a94bc7585	2274
wim	33:900a94bc7585	2275	case US2066_3V3 :
wim	33:900a94bc7585	2276	case SSD1803_3V3 :
wim	36:9f5f86dfd44a	2277	_function_1 &= ~0x04; // Disable UDC/Icon Blink
wim	33:900a94bc7585	2278	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim	33:900a94bc7585	2279	// Select Ext Instr Set
wim	33:900a94bc7585	2280
wim	33:900a94bc7585	2281	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim	33:900a94bc7585	2282	// Select Std Instr set, Select IS=0
wim	33:900a94bc7585	2283	break; // case SSD1803, US2066
wim	36:9f5f86dfd44a	2284
wim	36:9f5f86dfd44a	2285	case PCF2103_3V3 :
wim	39:e9c2319de9c5	2286	case PCF2113_3V3 :
wim	39:e9c2319de9c5	2287	case PCF2119_3V3 :
wim	39:e9c2319de9c5	2288	case PCF2119R_3V3 :
wim	36:9f5f86dfd44a	2289	// Disable Icon Blink
wim	36:9f5f86dfd44a	2290	_writeCommand(0x20 \| _function \| 0x01); // Set function, Select Instr Set = 1
wim	36:9f5f86dfd44a	2291	_writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=1 (Icon blink), 0 (Instr. Set 1)
wim	36:9f5f86dfd44a	2292	_writeCommand(0x20 \| _function); // Set function, Select Instr Set = 0
wim	36:9f5f86dfd44a	2293
wim	36:9f5f86dfd44a	2294	break;
wim	33:900a94bc7585	2295
wim	33:900a94bc7585	2296	default:
wim	33:900a94bc7585	2297	//Unsupported feature for other controllers
wim	33:900a94bc7585	2298	break;
wim	33:900a94bc7585	2299	} //switch _ctrl
wim	33:900a94bc7585	2300
wim	36:9f5f86dfd44a	2301	break; //BlinkOff
wim	33:900a94bc7585	2302
wim	33:900a94bc7585	2303	default:
wim	33:900a94bc7585	2304	break;
wim	33:900a94bc7585	2305	} // blinkMode
wim	33:900a94bc7585	2306
wim	33:900a94bc7585	2307	} // setUDCBlink()
wim	39:e9c2319de9c5	2308	#endif
wim	33:900a94bc7585	2309
wim	41:111ca62e8a59	2310	#if(LCD_CONTRAST == 1)
wim	32:59c4b8f648d4	2311	/** Set Contrast
wim	32:59c4b8f648d4	2312	* setContrast method is supported by some compatible devices (eg ST7032i) that have onboard LCD voltage generation
wim	32:59c4b8f648d4	2313	* Initial code for ST70XX imported from fork by JH1PJL
wim	32:59c4b8f648d4	2314	*
wim	32:59c4b8f648d4	2315	* @param unsigned char c contrast data (6 significant bits, valid range 0..63, Value 0 will disable the Vgen)
wim	32:59c4b8f648d4	2316	* @return none
wim	32:59c4b8f648d4	2317	*/
wim	32:59c4b8f648d4	2318	//@TODO Add support for 40x4 dual controller
wim	32:59c4b8f648d4	2319	void TextLCD_Base::setContrast(unsigned char c) {
wim	32:59c4b8f648d4	2320
wim	32:59c4b8f648d4	2321	// Function set mode stored during Init. Make sure we dont accidentally switch between 1-line and 2-line mode!
wim	32:59c4b8f648d4	2322	// Icon/Booster mode stored during Init. Make sure we dont accidentally change this!
wim	32:59c4b8f648d4	2323
wim	32:59c4b8f648d4	2324	_contrast = c & 0x3F; // Sanity check
wim	32:59c4b8f648d4	2325
wim	33:900a94bc7585	2326	switch (_ctrl) {
wim	32:59c4b8f648d4	2327	case PCF2113_3V3 :
wim	39:e9c2319de9c5	2328	case PCF2119_3V3 :
wim	39:e9c2319de9c5	2329	case PCF2119R_3V3 :
wim	32:59c4b8f648d4	2330	if (_contrast < 5) _contrast = 0; // See datasheet. Sanity check for PCF2113/PCF2119
wim	32:59c4b8f648d4	2331	if (_contrast > 55) _contrast = 55;
wim	32:59c4b8f648d4	2332
wim	32:59c4b8f648d4	2333	_writeCommand(0x20 \| _function \| 0x01); // Set function, Select Instruction Set = 1
wim	32:59c4b8f648d4	2334	_writeCommand(0x80 \| 0x00 \| (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=0, VA=contrast
wim	32:59c4b8f648d4	2335	_writeCommand(0x80 \| 0x40 \| (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=1, VB=contrast
wim	32:59c4b8f648d4	2336	_writeCommand(0x20 \| _function); // Select Instruction Set = 0
wim	32:59c4b8f648d4	2337	break;
wim	32:59c4b8f648d4	2338
wim	32:59c4b8f648d4	2339	case ST7032_3V3 :
wim	32:59c4b8f648d4	2340	case ST7032_5V :
wim	32:59c4b8f648d4	2341	case ST7036_3V3 :
wim	32:59c4b8f648d4	2342	// case ST7036_5V :
wim	41:111ca62e8a59	2343	case SSD1803_3V3 :
wim	41:111ca62e8a59	2344	case SPLC792A_3V3 :
wim	32:59c4b8f648d4	2345	_writeCommand(0x20 \| _function \| 0x01); // Select Instruction Set = 1
wim	32:59c4b8f648d4	2346	_writeCommand(0x70 \| (_contrast & 0x0F)); // Contrast Low bits
wim	32:59c4b8f648d4	2347	_writeCommand(0x50 \| _icon_power \| ((_contrast >> 4) & 0x03)); // Contrast High bits
wim	32:59c4b8f648d4	2348	_writeCommand(0x20 \| _function); // Select Instruction Set = 0
wim	32:59c4b8f648d4	2349	break;
wim	32:59c4b8f648d4	2350
wim	33:900a94bc7585	2351	case US2066_3V3 :
wim	33:900a94bc7585	2352	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim	33:900a94bc7585	2353	// Select Extended Instruction Set
wim	33:900a94bc7585	2354
wim	33:900a94bc7585	2355	_writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim	33:900a94bc7585	2356
wim	33:900a94bc7585	2357	_writeCommand(0x81); // Set Contrast Control: 1 0 0 0 0 0 0 1 (Ext Instr Set, OLED)
wim	33:900a94bc7585	2358	_writeCommand((_contrast << 2) \| 0x03); // Set Contrast Value: 8 bits. Use 6 bits for compatibility
wim	33:900a94bc7585	2359
wim	33:900a94bc7585	2360	_writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim	33:900a94bc7585	2361
wim	33:900a94bc7585	2362	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim	33:900a94bc7585	2363	// Select Std Instr set, Select IS=0
wim	33:900a94bc7585	2364	break;
wim	33:900a94bc7585	2365
wim	34:e5a0dcb43ecc	2366	//not yet tested on hardware
wim	32:59c4b8f648d4	2367	case PT6314 :
wim	32:59c4b8f648d4	2368	// Only 2 significant bits
wim	32:59c4b8f648d4	2369	// 0x00 = 100%
wim	32:59c4b8f648d4	2370	// 0x01 = 75%
wim	32:59c4b8f648d4	2371	// 0x02 = 50%
wim	32:59c4b8f648d4	2372	// 0x03 = 25%
wim	32:59c4b8f648d4	2373	_writeCommand(0x20 \| _function \| ((~_contrast) >> 4)); // Invert and shift to use 2 MSBs
wim	32:59c4b8f648d4	2374	break;
wim	32:59c4b8f648d4	2375
wim	32:59c4b8f648d4	2376	default:
wim	32:59c4b8f648d4	2377	//Unsupported feature for other controllers
wim	33:900a94bc7585	2378	break;
wim	33:900a94bc7585	2379	} // end switch
wim	33:900a94bc7585	2380	} // end setContrast()
wim	41:111ca62e8a59	2381	#endif
wim	32:59c4b8f648d4	2382
wim	39:e9c2319de9c5	2383	#if(LCD_POWER == 1)
wim	32:59c4b8f648d4	2384	/** Set Power
wim	32:59c4b8f648d4	2385	* setPower method is supported by some compatible devices (eg SSD1803) that have power down modes
wim	32:59c4b8f648d4	2386	*
wim	32:59c4b8f648d4	2387	* @param bool powerOn Power on/off
wim	32:59c4b8f648d4	2388	* @return none
wim	32:59c4b8f648d4	2389	*/
wim	32:59c4b8f648d4	2390	//@TODO Add support for 40x4 dual controller
wim	32:59c4b8f648d4	2391	void TextLCD_Base::setPower(bool powerOn) {
wim	32:59c4b8f648d4	2392
wim	32:59c4b8f648d4	2393	if (powerOn) {
wim	32:59c4b8f648d4	2394	// Switch on
wim	32:59c4b8f648d4	2395	setMode(DispOn);
wim	32:59c4b8f648d4	2396
wim	32:59c4b8f648d4	2397	// Controllers that supports specific Power Down mode
wim	32:59c4b8f648d4	2398	switch (_ctrl) {
wim	32:59c4b8f648d4	2399
wim	32:59c4b8f648d4	2400	// case PCF2113_3V3 :
wim	39:e9c2319de9c5	2401	// case PCF2119_3V3 :
wim	39:e9c2319de9c5	2402	// case PCF2119R_3V3 :
wim	32:59c4b8f648d4	2403	// case ST7032_3V3 :
wim	32:59c4b8f648d4	2404	//@todo
wim	33:900a94bc7585	2405	// enable Booster Bon
wim	33:900a94bc7585	2406
wim	33:900a94bc7585	2407	case WS0010:
wim	33:900a94bc7585	2408	_writeCommand(0x17); // Char mode, DC/DC on
reedas	42:1962dc501f94	2409	ThisThread::sleep_for(10); // Wait 10ms to ensure powered up
wim	33:900a94bc7585	2410	break;
wim	33:900a94bc7585	2411
wim	36:9f5f86dfd44a	2412	case KS0073:
wim	33:900a94bc7585	2413	case KS0078:
wim	32:59c4b8f648d4	2414	case SSD1803_3V3 :
wim	32:59c4b8f648d4	2415	// case SSD1803_5V :
wim	33:900a94bc7585	2416	_writeCommand(0x20 \| _function_1); // Select Ext Instr Set
wim	33:900a94bc7585	2417	_writeCommand(0x02); // Power On
wim	32:59c4b8f648d4	2418	_writeCommand(0x20 \| _function); // Select Std Instr Set
wim	32:59c4b8f648d4	2419	break;
wim	32:59c4b8f648d4	2420
wim	32:59c4b8f648d4	2421	default:
wim	32:59c4b8f648d4	2422	//Unsupported feature for other controllers
wim	32:59c4b8f648d4	2423	break;
wim	32:59c4b8f648d4	2424	} // end switch
wim	32:59c4b8f648d4	2425	}
wim	32:59c4b8f648d4	2426	else {
wim	32:59c4b8f648d4	2427	// Switch off
wim	32:59c4b8f648d4	2428	setMode(DispOff);
wim	32:59c4b8f648d4	2429
wim	32:59c4b8f648d4	2430	// Controllers that support specific Power Down mode
wim	32:59c4b8f648d4	2431	switch (_ctrl) {
wim	32:59c4b8f648d4	2432
wim	32:59c4b8f648d4	2433	// case PCF2113_3V3 :
wim	39:e9c2319de9c5	2434	// case PCF2119_3V3 :
wim	39:e9c2319de9c5	2435	// case PCF2119R_3V3 :
wim	32:59c4b8f648d4	2436	// case ST7032_3V3 :
wim	32:59c4b8f648d4	2437	//@todo
wim	33:900a94bc7585	2438	// disable Booster Bon
wim	33:900a94bc7585	2439
wim	33:900a94bc7585	2440	case WS0010:
wim	33:900a94bc7585	2441	_writeCommand(0x13); // Char mode, DC/DC off
wim	33:900a94bc7585	2442	break;
wim	33:900a94bc7585	2443
wim	36:9f5f86dfd44a	2444	case KS0073:
wim	33:900a94bc7585	2445	case KS0078:
wim	32:59c4b8f648d4	2446	case SSD1803_3V3 :
wim	32:59c4b8f648d4	2447	// case SSD1803_5V :
wim	33:900a94bc7585	2448	_writeCommand(0x20 \| _function_1); // Select Ext Instr Set
wim	33:900a94bc7585	2449	_writeCommand(0x03); // Power Down
wim	32:59c4b8f648d4	2450	_writeCommand(0x20 \| _function); // Select Std Instr Set
wim	32:59c4b8f648d4	2451	break;
wim	32:59c4b8f648d4	2452
wim	32:59c4b8f648d4	2453	default:
wim	32:59c4b8f648d4	2454	//Unsupported feature for other controllers
wim	32:59c4b8f648d4	2455	break;
wim	32:59c4b8f648d4	2456	} // end switch
wim	32:59c4b8f648d4	2457	}
wim	33:900a94bc7585	2458	} // end setPower()
wim	39:e9c2319de9c5	2459	#endif
wim	39:e9c2319de9c5	2460
wim	39:e9c2319de9c5	2461	#if(LCD_ORIENT == 1)
wim	33:900a94bc7585	2462	/** Set Orient
wim	33:900a94bc7585	2463	* setOrient method is supported by some compatible devices (eg SSD1803, US2066) that have top/bottom view modes
wim	33:900a94bc7585	2464	*
wim	33:900a94bc7585	2465	* @param LCDOrient orient Orientation
wim	33:900a94bc7585	2466	* @return none
wim	33:900a94bc7585	2467	*/
wim	33:900a94bc7585	2468	void TextLCD_Base::setOrient(LCDOrient orient){
wim	33:900a94bc7585	2469
wim	33:900a94bc7585	2470	switch (orient) {
wim	33:900a94bc7585	2471
wim	33:900a94bc7585	2472	case Top:
wim	33:900a94bc7585	2473	switch (_ctrl) {
wim	34:e5a0dcb43ecc	2474	case PCF2103_3V3:
wim	34:e5a0dcb43ecc	2475	case PCF2116_3V3:
wim	34:e5a0dcb43ecc	2476	case PCF2116_5V:
wim	34:e5a0dcb43ecc	2477	_writeCommand(0x20 \| _function \| 0x01); // Set function, Select Instr Set = 1
wim	34:e5a0dcb43ecc	2478	_writeCommand(0x05); // Display Conf Set 0000 0, 1, P=0, Q=1 (Instr. Set 1)
wim	34:e5a0dcb43ecc	2479	_writeCommand(0x20 \| _function); // Set function, Select Instr Set = 0
wim	34:e5a0dcb43ecc	2480	break;
wim	39:e9c2319de9c5	2481
wim	39:e9c2319de9c5	2482	case PCF2119_3V3:
wim	39:e9c2319de9c5	2483	case PCF2119R_3V3:
wim	39:e9c2319de9c5	2484	_writeCommand(0x20 \| _function \| 0x01); // Set function, Select Instr Set = 1
wim	39:e9c2319de9c5	2485	_writeCommand(0x07); // Display Conf Set 0000 0, 1, P=1, Q=1 (Instr. Set 1)
wim	39:e9c2319de9c5	2486	_writeCommand(0x20 \| _function); // Set function, Select Instr Set = 0
wim	39:e9c2319de9c5	2487	break;
wim	34:e5a0dcb43ecc	2488
wim	33:900a94bc7585	2489	case SSD1803_3V3 :
wim	33:900a94bc7585	2490	// case SSD1803_5V :
wim	33:900a94bc7585	2491	case US2066_3V3 :
wim	33:900a94bc7585	2492	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim	33:900a94bc7585	2493	// Select Extended Instruction Set
wim	33:900a94bc7585	2494	// _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim	33:900a94bc7585	2495	_writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim	33:900a94bc7585	2496
wim	33:900a94bc7585	2497	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim	33:900a94bc7585	2498	// Select Std Instr set, Select IS=0
wim	33:900a94bc7585	2499	break;
wim	36:9f5f86dfd44a	2500
wim	36:9f5f86dfd44a	2501	case ST7070:
wim	36:9f5f86dfd44a	2502	_writeCommand(0x20 \| _function \| 0x04); // Set function, 0 0 1 DL, N, EXT=1, x, x (Select Instr Set = 1)
wim	36:9f5f86dfd44a	2503
wim	36:9f5f86dfd44a	2504	_writeCommand(0x40 \| 0x00); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim	36:9f5f86dfd44a	2505	// C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim	36:9f5f86dfd44a	2506	// S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
reedas	42:1962dc501f94	2507	ThisThread::sleep_for(5); // Wait to ensure completion or ST7070 fails to set Top/Bottom after reset..
wim	36:9f5f86dfd44a	2508
wim	36:9f5f86dfd44a	2509	_writeCommand(0x20 \| _function); // Set function, EXT=0 (Select Instr Set = 0)
wim	36:9f5f86dfd44a	2510
wim	36:9f5f86dfd44a	2511	break; // case ST7070 Controller
wim	33:900a94bc7585	2512
wim	33:900a94bc7585	2513	default:
wim	33:900a94bc7585	2514	//Unsupported feature for other controllers
wim	33:900a94bc7585	2515	break;
wim	33:900a94bc7585	2516
wim	33:900a94bc7585	2517	} // end switch _ctrl
wim	33:900a94bc7585	2518	break; // end Top
wim	33:900a94bc7585	2519
wim	33:900a94bc7585	2520	case Bottom:
wim	33:900a94bc7585	2521	switch (_ctrl) {
wim	34:e5a0dcb43ecc	2522	case PCF2103_3V3:
wim	34:e5a0dcb43ecc	2523	case PCF2116_3V3:
wim	34:e5a0dcb43ecc	2524	case PCF2116_5V:
wim	34:e5a0dcb43ecc	2525	_writeCommand(0x20 \| _function \| 0x01); // Set function, Select Instr Set = 1
wim	34:e5a0dcb43ecc	2526	_writeCommand(0x06); // Display Conf Set 0000 0, 1, P=1, Q=0 (Instr. Set 1)
wim	34:e5a0dcb43ecc	2527	_writeCommand(0x20 \| _function); // Set function, Select Instr Set = 0
wim	34:e5a0dcb43ecc	2528	break;
wim	39:e9c2319de9c5	2529
wim	39:e9c2319de9c5	2530	case PCF2119_3V3:
wim	39:e9c2319de9c5	2531	case PCF2119R_3V3 :
wim	39:e9c2319de9c5	2532	_writeCommand(0x20 \| _function \| 0x01); // Set function, Select Instr Set = 1
wim	39:e9c2319de9c5	2533	_writeCommand(0x04); // Display Conf Set 0000 0, 1, P=0, Q=0 (Instr. Set 1)
wim	39:e9c2319de9c5	2534	_writeCommand(0x20 \| _function); // Set function, Select Instr Set = 0
wim	39:e9c2319de9c5	2535	break;
wim	34:e5a0dcb43ecc	2536
wim	33:900a94bc7585	2537	case SSD1803_3V3 :
wim	33:900a94bc7585	2538	// case SSD1803_5V :
wim	33:900a94bc7585	2539	case US2066_3V3 :
wim	33:900a94bc7585	2540	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim	33:900a94bc7585	2541	// Select Extended Instruction Set
wim	33:900a94bc7585	2542	_writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim	33:900a94bc7585	2543	// _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim	33:900a94bc7585	2544
wim	33:900a94bc7585	2545	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim	33:900a94bc7585	2546	// Select Std Instr set, Select IS=0
wim	33:900a94bc7585	2547	break;
wim	36:9f5f86dfd44a	2548
wim	36:9f5f86dfd44a	2549	case ST7070:
wim	36:9f5f86dfd44a	2550	//Note: this does not result in correct top/bottom view.
wim	36:9f5f86dfd44a	2551	//The left and right half of each row are reversed and the addressing of both rows is also incorrect:
wim	36:9f5f86dfd44a	2552	//Top/bottomline when orientation is flipped:
wim	36:9f5f86dfd44a	2553	// 0x48...0x4F 0x40...0x47
wim	36:9f5f86dfd44a	2554	// 0x08...0x0F 0x00...0x07
wim	36:9f5f86dfd44a	2555	_writeCommand(0x20 \| _function \| 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1)
wim	36:9f5f86dfd44a	2556
wim	36:9f5f86dfd44a	2557	_writeCommand(0x40 \| 0x0F); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim	36:9f5f86dfd44a	2558	// C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim	36:9f5f86dfd44a	2559	// S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
reedas	42:1962dc501f94	2560	ThisThread::sleep_for(5); // Wait to ensure completion or ST7070 fails to set Top/Bottom after reset..
wim	36:9f5f86dfd44a	2561
wim	36:9f5f86dfd44a	2562	_writeCommand(0x20 \| _function); // Set function, EXT=0 (Select Instr Set = 0)
wim	36:9f5f86dfd44a	2563
wim	36:9f5f86dfd44a	2564	break; // case ST7070 Controller
wim	33:900a94bc7585	2565
wim	33:900a94bc7585	2566	default:
wim	33:900a94bc7585	2567	//Unsupported feature for other controllers
wim	33:900a94bc7585	2568	break;
wim	33:900a94bc7585	2569
wim	33:900a94bc7585	2570	} // end switch _ctrl
wim	33:900a94bc7585	2571
wim	33:900a94bc7585	2572	break; // end Bottom
wim	33:900a94bc7585	2573	} // end switch orient
wim	33:900a94bc7585	2574	} // end setOrient()
wim	39:e9c2319de9c5	2575	#endif
wim	39:e9c2319de9c5	2576
wim	39:e9c2319de9c5	2577	#if(LCD_BIGFONT == 1)
wim	34:e5a0dcb43ecc	2578	/** Set Big Font
wim	34:e5a0dcb43ecc	2579	* setBigFont method is supported by some compatible devices (eg SSD1803, US2066)
wim	34:e5a0dcb43ecc	2580	*
wim	34:e5a0dcb43ecc	2581	* @param lines The selected Big Font lines (None, TopLine, CenterLine, BottomLine, TopBottomLine)
wim	34:e5a0dcb43ecc	2582	* Double height characters can be shown on lines 1+2, 2+3, 3+4 or 1+2 and 3+4
wim	34:e5a0dcb43ecc	2583	* Valid double height lines depend on the LCDs number of rows.
wim	34:e5a0dcb43ecc	2584	*/
wim	34:e5a0dcb43ecc	2585	void TextLCD_Base::setBigFont(LCDBigFont lines) {
wim	34:e5a0dcb43ecc	2586
wim	34:e5a0dcb43ecc	2587	switch (lines) {
wim	34:e5a0dcb43ecc	2588	case None:
wim	34:e5a0dcb43ecc	2589	switch (_ctrl) {
wim	34:e5a0dcb43ecc	2590	case SSD1803_3V3 :
wim	34:e5a0dcb43ecc	2591	case US2066_3V3 :
wim	34:e5a0dcb43ecc	2592	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim	34:e5a0dcb43ecc	2593	// Select Extended Instruction Set
wim	34:e5a0dcb43ecc	2594	_writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim	34:e5a0dcb43ecc	2595	// Default
wim	34:e5a0dcb43ecc	2596	_function = _function & ~0x04; // Set function, 0 0 1 DL N DH=0 RE(0) IS=0 Select Instruction Set 0
wim	34:e5a0dcb43ecc	2597	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim	34:e5a0dcb43ecc	2598	// Select Std Instr set, Select IS=0
wim	34:e5a0dcb43ecc	2599	break; // end US2066
wim	34:e5a0dcb43ecc	2600
wim	34:e5a0dcb43ecc	2601	default:
wim	34:e5a0dcb43ecc	2602	break; // end default
wim	34:e5a0dcb43ecc	2603	} // end switch _ctrl
wim	34:e5a0dcb43ecc	2604	break; // end None
wim	34:e5a0dcb43ecc	2605
wim	34:e5a0dcb43ecc	2606	case TopLine:
wim	34:e5a0dcb43ecc	2607	if (_nr_rows < 2) return; //Sanity check
wim	34:e5a0dcb43ecc	2608
wim	34:e5a0dcb43ecc	2609	switch (_ctrl) {
wim	34:e5a0dcb43ecc	2610	case SSD1803_3V3 :
wim	34:e5a0dcb43ecc	2611	case US2066_3V3 :
wim	34:e5a0dcb43ecc	2612	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim	34:e5a0dcb43ecc	2613	// Select Extended Instruction Set
wim	34:e5a0dcb43ecc	2614	_writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim	34:e5a0dcb43ecc	2615	// Default
wim	34:e5a0dcb43ecc	2616	_function = _function \| 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim	34:e5a0dcb43ecc	2617	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim	34:e5a0dcb43ecc	2618	// Select Std Instr set, Select IS=0
wim	34:e5a0dcb43ecc	2619	break; // end US2066, SSD1803
wim	34:e5a0dcb43ecc	2620
wim	34:e5a0dcb43ecc	2621	default:
wim	34:e5a0dcb43ecc	2622	break; // end default
wim	34:e5a0dcb43ecc	2623	} // end switch _ctrl
wim	34:e5a0dcb43ecc	2624	break; // end TopLine
wim	34:e5a0dcb43ecc	2625
wim	34:e5a0dcb43ecc	2626	case CenterLine:
wim	34:e5a0dcb43ecc	2627	if (_nr_rows != 4) return; //Sanity check
wim	34:e5a0dcb43ecc	2628
wim	34:e5a0dcb43ecc	2629	switch (_ctrl) {
wim	34:e5a0dcb43ecc	2630	case SSD1803_3V3 :
wim	34:e5a0dcb43ecc	2631	case US2066_3V3 :
wim	34:e5a0dcb43ecc	2632	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim	34:e5a0dcb43ecc	2633	// Select Extended Instruction Set
wim	34:e5a0dcb43ecc	2634	_writeCommand(0x14); // Double Height, 0 0 0 1 UD2=0, UD1=1, X, DH'=0 (Ext Instr Set)
wim	34:e5a0dcb43ecc	2635	// Default
wim	34:e5a0dcb43ecc	2636	_function = _function \| 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim	34:e5a0dcb43ecc	2637	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim	34:e5a0dcb43ecc	2638	// Select Std Instr set, Select IS=0
wim	34:e5a0dcb43ecc	2639	break; // end US2066, SSD1803
wim	34:e5a0dcb43ecc	2640
wim	34:e5a0dcb43ecc	2641	default:
wim	34:e5a0dcb43ecc	2642	break; // end default
wim	34:e5a0dcb43ecc	2643	} // end switch _ctrl
wim	34:e5a0dcb43ecc	2644	break; // end CenterLine
wim	34:e5a0dcb43ecc	2645
wim	34:e5a0dcb43ecc	2646	case BottomLine:
wim	34:e5a0dcb43ecc	2647	if (_nr_rows < 3) return; //Sanity check
wim	34:e5a0dcb43ecc	2648
wim	34:e5a0dcb43ecc	2649	switch (_ctrl) {
wim	34:e5a0dcb43ecc	2650	case SSD1803_3V3 :
wim	34:e5a0dcb43ecc	2651	case US2066_3V3 :
wim	34:e5a0dcb43ecc	2652	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim	34:e5a0dcb43ecc	2653	// Select Extended Instruction Set
wim	34:e5a0dcb43ecc	2654	if (_nr_rows == 3) {
wim	34:e5a0dcb43ecc	2655	_writeCommand(0x14); // Double Height, 0 0 0 1 UD2=0, UD1=1, X, DH'=0 (Ext Instr Set)
wim	34:e5a0dcb43ecc	2656	}
wim	34:e5a0dcb43ecc	2657	else {
wim	34:e5a0dcb43ecc	2658	_writeCommand(0x10); // Double Height, 0 0 0 1 UD2=0, UD1=0, X, DH'=0 (Ext Instr Set)
wim	34:e5a0dcb43ecc	2659	}
wim	34:e5a0dcb43ecc	2660	_function = _function \| 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim	34:e5a0dcb43ecc	2661	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim	34:e5a0dcb43ecc	2662	// Select Std Instr set, Select IS=0
wim	34:e5a0dcb43ecc	2663	break; // end US2066, SSD1803
wim	34:e5a0dcb43ecc	2664
wim	34:e5a0dcb43ecc	2665	default:
wim	34:e5a0dcb43ecc	2666	break; // end default
wim	34:e5a0dcb43ecc	2667	} // end switch _ctrl
wim	34:e5a0dcb43ecc	2668	break; // end BottomLine
wim	34:e5a0dcb43ecc	2669
wim	34:e5a0dcb43ecc	2670	case TopBottomLine:
wim	34:e5a0dcb43ecc	2671	if (_nr_rows != 4) return; //Sanity check
wim	34:e5a0dcb43ecc	2672
wim	34:e5a0dcb43ecc	2673	switch (_ctrl) {
wim	34:e5a0dcb43ecc	2674	case SSD1803_3V3 :
wim	34:e5a0dcb43ecc	2675	case US2066_3V3 :
wim	34:e5a0dcb43ecc	2676	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim	34:e5a0dcb43ecc	2677	// Select Extended Instruction Set
wim	34:e5a0dcb43ecc	2678	_writeCommand(0x18); // Double Height, 0 0 0 1 UD2=1, UD1=0, X, DH'=0 (Ext Instr Set)
wim	34:e5a0dcb43ecc	2679	// Default
wim	34:e5a0dcb43ecc	2680	_function = _function \| 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim	34:e5a0dcb43ecc	2681	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim	34:e5a0dcb43ecc	2682	// Select Std Instr set, Select IS=0
wim	34:e5a0dcb43ecc	2683	break; // end US2066, SSD1803
wim	34:e5a0dcb43ecc	2684
wim	34:e5a0dcb43ecc	2685	default:
wim	34:e5a0dcb43ecc	2686	break; // end default
wim	34:e5a0dcb43ecc	2687	} // end switch _ctrl
wim	34:e5a0dcb43ecc	2688	break; // end TopBottomLine
wim	34:e5a0dcb43ecc	2689
wim	34:e5a0dcb43ecc	2690	} // end switch lines
wim	34:e5a0dcb43ecc	2691
wim	34:e5a0dcb43ecc	2692	} // end setBigFont()
wim	39:e9c2319de9c5	2693	#endif
wim	39:e9c2319de9c5	2694
wim	41:111ca62e8a59	2695
wim	41:111ca62e8a59	2696	#if (LCD_FONTSEL == 1)
wim	41:111ca62e8a59	2697	/** Set Font
wim	41:111ca62e8a59	2698	* setFont method is supported by some compatible devices (eg SSD1803, US2066, ST7070)
wim	41:111ca62e8a59	2699	*
wim	41:111ca62e8a59	2700	* @param LCDFont font The selected Font
wim	41:111ca62e8a59	2701	* @return none
wim	41:111ca62e8a59	2702	*
wim	41:111ca62e8a59	2703	* Note: most controllers support only one font and the hardware specific
wim	41:111ca62e8a59	2704	* fonttable is encoded as part of the controller type number (eg PCF21XXC or PCF21XXR).
wim	41:111ca62e8a59	2705	* Some controllers support multiple tables that can only be selected by logic levels on a few pins.
wim	41:111ca62e8a59	2706	* Some controllers also support runtime fontable switching through a specific instruction
wim	41:111ca62e8a59	2707	*/
wim	41:111ca62e8a59	2708	void TextLCD_Base::setFont(LCDFont font) {
wim	41:111ca62e8a59	2709
wim	41:111ca62e8a59	2710	switch (font) {
wim	41:111ca62e8a59	2711	case Font_RA: // UK/EU
wim	41:111ca62e8a59	2712	switch (_ctrl) {
wim	41:111ca62e8a59	2713	case SSD1803_3V3 :
wim	41:111ca62e8a59	2714	case US2066_3V3 :
wim	41:111ca62e8a59	2715	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim	41:111ca62e8a59	2716	// Select Extended Instruction Set
wim	41:111ca62e8a59	2717	_writeCommand(0x72); // ROM Select command, 0 1 1 1 0 0 1 0 (Ext Instr Set)
wim	41:111ca62e8a59	2718	_writeData(0x00); // ROM_0 Select data, 0 0 0 0 ROM2 ROM1 0 0 (Ext Instr Set)
wim	41:111ca62e8a59	2719
wim	41:111ca62e8a59	2720	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N DH RE(0) IS (Std Instr Set)
wim	41:111ca62e8a59	2721
wim	41:111ca62e8a59	2722	_font = font; // Save active font
wim	41:111ca62e8a59	2723	break; // end SSD1803, US2066
wim	41:111ca62e8a59	2724
wim	41:111ca62e8a59	2725	case ST7070:
wim	41:111ca62e8a59	2726	//ST7070 does not support Cursorblink. The P bit selects the font instead !
wim	41:111ca62e8a59	2727	_writeCommand(0x08 \| _currentMode \| (_currentCursor & 0x02));
wim	41:111ca62e8a59	2728
wim	41:111ca62e8a59	2729	_font = font; // Save active font
wim	41:111ca62e8a59	2730	break; // end ST7070
wim	41:111ca62e8a59	2731
wim	41:111ca62e8a59	2732	default:
wim	41:111ca62e8a59	2733	break; // end default
wim	41:111ca62e8a59	2734	} // end switch _ctrl
wim	41:111ca62e8a59	2735	break; // end Font_RA
wim	41:111ca62e8a59	2736
wim	41:111ca62e8a59	2737	case Font_RB: // UK/CYR
wim	41:111ca62e8a59	2738	switch (_ctrl) {
wim	41:111ca62e8a59	2739	case SSD1803_3V3 :
wim	41:111ca62e8a59	2740	case US2066_3V3 :
wim	41:111ca62e8a59	2741	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim	41:111ca62e8a59	2742	// Select Extended Instruction Set
wim	41:111ca62e8a59	2743	_writeCommand(0x72); // ROM Select command, 0 1 1 1 0 0 1 0 (Ext Instr Set)
wim	41:111ca62e8a59	2744	_writeData(0x04); // ROM_0 Select data, 0 0 0 0 ROM2 ROM1 0 0 (Ext Instr Set)
wim	41:111ca62e8a59	2745
wim	41:111ca62e8a59	2746	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N DH RE(0) IS (Std Instr Set)
wim	41:111ca62e8a59	2747
wim	41:111ca62e8a59	2748	_font = font; // Save active font
wim	41:111ca62e8a59	2749	break; // end SSD1803, US2066
wim	41:111ca62e8a59	2750
wim	41:111ca62e8a59	2751	case ST7070:
wim	41:111ca62e8a59	2752	//ST7070 does not support Cursorblink. The P bit selects the font instead !
wim	41:111ca62e8a59	2753	_writeCommand(0x08 \| _currentMode \| (_currentCursor & 0x02) \| 0x01);
wim	41:111ca62e8a59	2754
wim	41:111ca62e8a59	2755	_font = font; // Save active font
wim	41:111ca62e8a59	2756	break; // end ST7070
wim	41:111ca62e8a59	2757
wim	41:111ca62e8a59	2758	default:
wim	41:111ca62e8a59	2759	break; // end default
wim	41:111ca62e8a59	2760	} // end switch _ctrl
wim	41:111ca62e8a59	2761	break; // end Font_RB
wim	41:111ca62e8a59	2762
wim	41:111ca62e8a59	2763	case Font_0: //Font_O is pretty similar to ROM_C
wim	41:111ca62e8a59	2764	case Font_RC: // UK/JAP
wim	41:111ca62e8a59	2765	switch (_ctrl) {
wim	41:111ca62e8a59	2766	case SSD1803_3V3 :
wim	41:111ca62e8a59	2767	case US2066_3V3 :
wim	41:111ca62e8a59	2768	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim	41:111ca62e8a59	2769	// Select Extended Instruction Set
wim	41:111ca62e8a59	2770	_writeCommand(0x72); // ROM Select command, 0 1 1 1 0 0 1 0 (Ext Instr Set)
wim	41:111ca62e8a59	2771	_writeData(0x08); // ROM_0 Select data, 0 0 0 0 ROM2 ROM1 0 0 (Ext Instr Set)
wim	41:111ca62e8a59	2772
wim	41:111ca62e8a59	2773	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N DH RE(0) IS (Std Instr Set)
wim	41:111ca62e8a59	2774
wim	41:111ca62e8a59	2775	_font = font; // Save active font
wim	41:111ca62e8a59	2776	break; // end SSD1803, US2066
wim	41:111ca62e8a59	2777
wim	41:111ca62e8a59	2778	default:
wim	41:111ca62e8a59	2779	break; // end default
wim	41:111ca62e8a59	2780	} // end switch _ctrl
wim	41:111ca62e8a59	2781	break; // end Font_RC
wim	41:111ca62e8a59	2782	} // end switch font
wim	41:111ca62e8a59	2783
wim	41:111ca62e8a59	2784	//SSD1803 seems to screw up cursor position after selecting new font. Restore to make sure...
wim	41:111ca62e8a59	2785	//Set next memoryaddress, make sure cursor blinks at next location
wim	41:111ca62e8a59	2786	int addr = getAddress(_column, _row);
wim	41:111ca62e8a59	2787	_writeCommand(0x80 \| addr);
wim	41:111ca62e8a59	2788
wim	41:111ca62e8a59	2789	}
wim	41:111ca62e8a59	2790	#endif
wim	41:111ca62e8a59	2791
wim	41:111ca62e8a59	2792
wim	39:e9c2319de9c5	2793	#if(LCD_ICON==1)
wim	36:9f5f86dfd44a	2794	/** Set Icons
wim	36:9f5f86dfd44a	2795	*
wim	36:9f5f86dfd44a	2796	* @param unsigned char idx The Index of the icon pattern (0..15) for KS0073 and similar controllers
wim	36:9f5f86dfd44a	2797	* and Index (0..31) for PCF2103 and similar controllers
wim	36:9f5f86dfd44a	2798	* @param unsigned char data The bitpattern for the icons (6 lsb for KS0073 bitpattern (5 lsb for KS0078) and 2 msb for blinkmode)
wim	36:9f5f86dfd44a	2799	* The bitpattern for the PCF2103 icons is 5 lsb (UDC 0..2) and 5 lsb for blinkmode (UDC 4..6)
wim	36:9f5f86dfd44a	2800	*/
wim	36:9f5f86dfd44a	2801	void TextLCD_Base::setIcon(unsigned char idx, unsigned char data) {
wim	36:9f5f86dfd44a	2802	// Blinking icons are enabled when a specific controlbit (BE) is set.
wim	36:9f5f86dfd44a	2803	// The blinking pixels in the icons can be controlled by setting additional bits in the icon bitpattern.
wim	36:9f5f86dfd44a	2804	// Icons are defined by a byte bitpattern. The P0..P5 form the Icon pattern for KS0073, and P0..P4 for KS0078
wim	36:9f5f86dfd44a	2805	// P7 P6 P5 P4 P3 P2 P1 P0
wim	36:9f5f86dfd44a	2806	// 0 B1 B0 0 0 1 1 1 0
wim	36:9f5f86dfd44a	2807	// 1 B1 B0 1 1 0 0 0 1
wim	36:9f5f86dfd44a	2808	// .............
wim	36:9f5f86dfd44a	2809	// 15 B1 B0 1 1 0 0 0 1
wim	36:9f5f86dfd44a	2810	//
wim	36:9f5f86dfd44a	2811	// Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim	36:9f5f86dfd44a	2812	// B1 B0 Mode
wim	36:9f5f86dfd44a	2813	// 0 0 No Blinking for this icon row
wim	36:9f5f86dfd44a	2814	// 0 1 Enabled pixels in P5 will blink
wim	36:9f5f86dfd44a	2815	// 1 x Enabled pixels in P0..P5 will blink
wim	36:9f5f86dfd44a	2816	//
wim	36:9f5f86dfd44a	2817	// Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim	36:9f5f86dfd44a	2818	// 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim	36:9f5f86dfd44a	2819	// 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim	36:9f5f86dfd44a	2820	// Note: the PCF2119 uses UDCs to set Icons
wim	36:9f5f86dfd44a	2821	// 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim	36:9f5f86dfd44a	2822	// 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim	36:9f5f86dfd44a	2823
wim	36:9f5f86dfd44a	2824	switch (_ctrl) {
wim	36:9f5f86dfd44a	2825	case KS0073:
wim	36:9f5f86dfd44a	2826	case KS0078:
wim	36:9f5f86dfd44a	2827	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 DL N RE(1) BE LP
wim	36:9f5f86dfd44a	2828	// Select Extended Instruction Set
wim	36:9f5f86dfd44a	2829	_writeCommand(0x40 \| (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim	36:9f5f86dfd44a	2830
wim	36:9f5f86dfd44a	2831	_writeData(data); // Set Icon pattern (Ext Instr Set)
wim	36:9f5f86dfd44a	2832
wim	36:9f5f86dfd44a	2833	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim	36:9f5f86dfd44a	2834	// Select Std Instr set, Select IS=0
wim	36:9f5f86dfd44a	2835	break; // end KS0073, KS0078
wim	36:9f5f86dfd44a	2836
wim	36:9f5f86dfd44a	2837	case ST7032_3V3:
wim	36:9f5f86dfd44a	2838	case ST7032_5V:
wim	41:111ca62e8a59	2839	case SPLC792A_3V3:
wim	36:9f5f86dfd44a	2840	_writeCommand(0x20 \| _function \| 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim	36:9f5f86dfd44a	2841	_writeCommand(0x40 \| (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim	36:9f5f86dfd44a	2842
wim	36:9f5f86dfd44a	2843	_writeData(data & 0x1F); // Set Icon pattern, no blink support (Instr Set 1)
wim	36:9f5f86dfd44a	2844
wim	36:9f5f86dfd44a	2845	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim	36:9f5f86dfd44a	2846	// Select Std Instr set, Select IS=0
wim	36:9f5f86dfd44a	2847	break; // end ST7032
wim	36:9f5f86dfd44a	2848
wim	36:9f5f86dfd44a	2849	case ST7036_3V3:
wim	36:9f5f86dfd44a	2850	case ST7036_5V:
wim	36:9f5f86dfd44a	2851	_writeCommand(0x20 \| _function \| 0x01); // Set function, 0 0 1 DL N DH IS2,IS1 = 01 (Select Instr Set = 1)
wim	36:9f5f86dfd44a	2852	_writeCommand(0x40 \| (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim	36:9f5f86dfd44a	2853
wim	36:9f5f86dfd44a	2854	_writeData(data & 0x1F); // Set Icon pattern, no blink support (Instr Set 1)
wim	36:9f5f86dfd44a	2855
wim	36:9f5f86dfd44a	2856	_writeCommand(0x20 \| _function); // Set function, IS2,IS1 = 00 (Select Instr Set = 0)
wim	36:9f5f86dfd44a	2857	// Select Std Instr set, Select IS=0
wim	36:9f5f86dfd44a	2858	break; // end ST7036
wim	36:9f5f86dfd44a	2859
wim	36:9f5f86dfd44a	2860	case SSD1803_3V3:
wim	36:9f5f86dfd44a	2861	// case SSD1803_5V:
wim	36:9f5f86dfd44a	2862	_writeCommand(0x20 \| _function \| 0x01); // Set function, 0 0 1 DL N DH RE(0) IS
wim	36:9f5f86dfd44a	2863	// Select Instruction Set 1
wim	36:9f5f86dfd44a	2864	_writeCommand(0x40 \| (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set = 1)
wim	36:9f5f86dfd44a	2865	_writeData(data); // Set Icon pattern (Instr Set = 1)
wim	36:9f5f86dfd44a	2866
wim	36:9f5f86dfd44a	2867	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N DH RE(0) IS
wim	36:9f5f86dfd44a	2868	// Select IS=0
wim	36:9f5f86dfd44a	2869	break; // end SSD1803
wim	36:9f5f86dfd44a	2870
wim	36:9f5f86dfd44a	2871	case PCF2103_3V3:
wim	36:9f5f86dfd44a	2872	case PCF2113_3V3:
wim	39:e9c2319de9c5	2873	case PCF2119_3V3:
wim	39:e9c2319de9c5	2874	case PCF2119R_3V3:
wim	36:9f5f86dfd44a	2875	// Store UDC/Icon pattern for PCF2103 and PCF2113:
wim	36:9f5f86dfd44a	2876	// 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim	36:9f5f86dfd44a	2877	// 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim	36:9f5f86dfd44a	2878	// Store UDC/Icon pattern for PCF2119:
wim	36:9f5f86dfd44a	2879	// 4 x 8 rows x 5 bits = 160 bits for Normal pattern (UDC 0..3) and
wim	36:9f5f86dfd44a	2880	// 4 x 8 rows x 5 bits = 160 bits for Blink pattern (UDC 4..7)
wim	36:9f5f86dfd44a	2881	_writeCommand(0x40 \| (idx & 0x3F)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim	36:9f5f86dfd44a	2882	_writeData(data); // Set Icon pattern (Instr Set = 1)
wim	36:9f5f86dfd44a	2883	break; // case PCF2103_3V3 Controller
wim	36:9f5f86dfd44a	2884
wim	36:9f5f86dfd44a	2885	default:
wim	36:9f5f86dfd44a	2886	break; // end default
wim	36:9f5f86dfd44a	2887	} // end switch _ctrl
wim	36:9f5f86dfd44a	2888
wim	36:9f5f86dfd44a	2889	//Select DD RAM again for current LCD controller and restore the addresspointer
wim	36:9f5f86dfd44a	2890	int addr = getAddress(_column, _row);
wim	36:9f5f86dfd44a	2891	_writeCommand(0x80 \| addr);
wim	36:9f5f86dfd44a	2892
wim	36:9f5f86dfd44a	2893	} // end setIcon()
wim	36:9f5f86dfd44a	2894
wim	36:9f5f86dfd44a	2895	/** Clear Icons
wim	36:9f5f86dfd44a	2896	*
wim	36:9f5f86dfd44a	2897	* @param none
wim	36:9f5f86dfd44a	2898	* @return none
wim	36:9f5f86dfd44a	2899	*/
wim	36:9f5f86dfd44a	2900	//@TODO Add support for 40x4 dual controller
wim	36:9f5f86dfd44a	2901	void TextLCD_Base::clrIcon() {
wim	36:9f5f86dfd44a	2902	// Icons are defined by a byte bitpattern. The P0..P5 form the Icon pattern for KS0073, and P0..P4 for KS0078
wim	36:9f5f86dfd44a	2903	// P7 P6 P5 P4 P3 P2 P1 P0
wim	36:9f5f86dfd44a	2904	// 0 B1 B0 0 0 0 0 0 0
wim	36:9f5f86dfd44a	2905	// 1 B1 B0 0 0 0 0 0 0
wim	36:9f5f86dfd44a	2906	// .............
wim	36:9f5f86dfd44a	2907	// 15 B1 B0 0 0 0 0 0 0
wim	36:9f5f86dfd44a	2908	//
wim	36:9f5f86dfd44a	2909	// Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim	36:9f5f86dfd44a	2910	// B1 B0 Mode
wim	36:9f5f86dfd44a	2911	// 0 0 No Blinking for this icon row
wim	36:9f5f86dfd44a	2912	// 0 1 Enabled pixels in P5 will blink
wim	36:9f5f86dfd44a	2913	// 1 x Enabled pixels in P0..P5 will blink
wim	36:9f5f86dfd44a	2914	//
wim	36:9f5f86dfd44a	2915	// Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim	36:9f5f86dfd44a	2916	// 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim	36:9f5f86dfd44a	2917	// 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim	36:9f5f86dfd44a	2918	// Note: the PCF2119 uses UDCs to set Icons
wim	36:9f5f86dfd44a	2919	// 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim	36:9f5f86dfd44a	2920	// 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim	36:9f5f86dfd44a	2921	int idx;
wim	36:9f5f86dfd44a	2922
wim	36:9f5f86dfd44a	2923	switch (_ctrl) {
wim	36:9f5f86dfd44a	2924	case KS0073:
wim	36:9f5f86dfd44a	2925	case KS0078:
wim	36:9f5f86dfd44a	2926	_writeCommand(0x20 \| _function_1); // Set function, 0 0 1 DL N RE(1) BE LP
wim	36:9f5f86dfd44a	2927	// Select Extended Instruction Set
wim	36:9f5f86dfd44a	2928	for (idx=0; idx<16; idx++) {
wim	36:9f5f86dfd44a	2929	_writeCommand(0x40 \| idx); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim	36:9f5f86dfd44a	2930	_writeData(0x00); // Clear Icon pattern (Ext Instr Set)
wim	36:9f5f86dfd44a	2931	}
wim	36:9f5f86dfd44a	2932	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Std Instruction Set
wim	36:9f5f86dfd44a	2933	// Select Std Instr set
wim	36:9f5f86dfd44a	2934	break; // end KS0073, KS0078
wim	36:9f5f86dfd44a	2935
wim	36:9f5f86dfd44a	2936	case ST7032_3V3:
wim	36:9f5f86dfd44a	2937	case ST7032_5V:
wim	41:111ca62e8a59	2938	case SPLC792A_3V3:
wim	36:9f5f86dfd44a	2939	_writeCommand(0x20 \| _function \| 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim	36:9f5f86dfd44a	2940
wim	36:9f5f86dfd44a	2941	for (idx=0; idx<16; idx++) {
wim	36:9f5f86dfd44a	2942	_writeCommand(0x40 \| idx); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim	36:9f5f86dfd44a	2943	_writeData(0x00); // Clear Icon pattern (Instr Set 1)
wim	36:9f5f86dfd44a	2944	}
wim	36:9f5f86dfd44a	2945
wim	36:9f5f86dfd44a	2946	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim	36:9f5f86dfd44a	2947	// Select Std Instr set, Select IS=0
wim	36:9f5f86dfd44a	2948	break; // end ST7032
wim	36:9f5f86dfd44a	2949
wim	36:9f5f86dfd44a	2950	case ST7036_3V3:
wim	36:9f5f86dfd44a	2951	case ST7036_5V:
wim	36:9f5f86dfd44a	2952	_writeCommand(0x20 \| _function \| 0x01); // Set function, 0 0 1 DL N DH IS2,IS1 = 01 (Select Instr Set = 1)
wim	36:9f5f86dfd44a	2953
wim	36:9f5f86dfd44a	2954	for (idx=0; idx<16; idx++) {
wim	36:9f5f86dfd44a	2955	_writeCommand(0x40 \| idx); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim	36:9f5f86dfd44a	2956	_writeData(0x00); // Clear Icon pattern (Instr Set 1)
wim	36:9f5f86dfd44a	2957	}
wim	36:9f5f86dfd44a	2958
wim	36:9f5f86dfd44a	2959	_writeCommand(0x20 \| _function); // Set function, IS2,IS1 = 00 (Select Instr Set = 0)
wim	36:9f5f86dfd44a	2960	// Select Std Instr set, Select IS=0
wim	36:9f5f86dfd44a	2961	break; // end ST7036
wim	36:9f5f86dfd44a	2962
wim	36:9f5f86dfd44a	2963	case SSD1803_3V3:
wim	36:9f5f86dfd44a	2964	// case SSD1803_5V:
wim	36:9f5f86dfd44a	2965	_writeCommand(0x20 \| _function \| 0x01); // Set function, 0 0 1 DL N DH RE(0) IS
wim	36:9f5f86dfd44a	2966	// Select Instruction Set 1
wim	36:9f5f86dfd44a	2967	for (idx=0; idx<16; idx++) {
wim	36:9f5f86dfd44a	2968	_writeCommand(0x40 \| idx); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim	36:9f5f86dfd44a	2969	_writeData(0x00); // Clear Icon pattern (Ext Instr Set)
wim	36:9f5f86dfd44a	2970	}
wim	36:9f5f86dfd44a	2971	_writeCommand(0x20 \| _function); // Set function, 0 0 1 DL N DH RE(0) IS
wim	36:9f5f86dfd44a	2972	// Select IS=0
wim	36:9f5f86dfd44a	2973	break; // end SSD1803
wim	36:9f5f86dfd44a	2974
wim	36:9f5f86dfd44a	2975	case PCF2103_3V3:
wim	36:9f5f86dfd44a	2976	case PCF2113_3V3:
wim	36:9f5f86dfd44a	2977	// PCF2103 and PCF2113 use part of the UDC RAM to control Icons
wim	36:9f5f86dfd44a	2978	// Select CG RAM
wim	36:9f5f86dfd44a	2979
wim	36:9f5f86dfd44a	2980	_writeCommand(0x40 \| (0 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim	36:9f5f86dfd44a	2981	// Store UDC/Icon pattern:
wim	36:9f5f86dfd44a	2982	// 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim	36:9f5f86dfd44a	2983	for (int i=0; i<(3 * 8); i++) {
wim	36:9f5f86dfd44a	2984	// _writeData(0x1F); // All On
wim	36:9f5f86dfd44a	2985	_writeData(0x00); // All Off
wim	36:9f5f86dfd44a	2986	}
wim	36:9f5f86dfd44a	2987
wim	36:9f5f86dfd44a	2988	_writeCommand(0x40 \| (4 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim	36:9f5f86dfd44a	2989	// 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim	36:9f5f86dfd44a	2990	for (int i=0; i<(3 * 8); i++) {
wim	36:9f5f86dfd44a	2991	// _writeData(0x1F); // All On
wim	36:9f5f86dfd44a	2992	_writeData(0x00); // All Off
wim	36:9f5f86dfd44a	2993	}
wim	36:9f5f86dfd44a	2994	break; // case PCF2103_3V3 Controller
wim	36:9f5f86dfd44a	2995
wim	39:e9c2319de9c5	2996	case PCF2119_3V3:
wim	39:e9c2319de9c5	2997	case PCF2119R_3V3:
wim	36:9f5f86dfd44a	2998	// PCF2119 uses part of the UDC RAM to control Icons
wim	36:9f5f86dfd44a	2999	// Select CG RAM
wim	36:9f5f86dfd44a	3000
wim	36:9f5f86dfd44a	3001	_writeCommand(0x40 \| (0 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim	36:9f5f86dfd44a	3002	// Store UDC/Icon pattern:
wim	36:9f5f86dfd44a	3003	// 4 x 8 rows x 5 bits = 160 bits for Normal pattern (UDC 0..3) and
wim	36:9f5f86dfd44a	3004	for (int i=0; i<(4 * 8); i++) {
wim	36:9f5f86dfd44a	3005	// _writeData(0x1F); // All On
wim	36:9f5f86dfd44a	3006	_writeData(0x00); // All Off
wim	36:9f5f86dfd44a	3007	}
wim	36:9f5f86dfd44a	3008
wim	36:9f5f86dfd44a	3009	_writeCommand(0x40 \| (4 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim	36:9f5f86dfd44a	3010	// 4 x 8 rows x 5 bits = 160 bits for Blink pattern (UDC 4..7)
wim	36:9f5f86dfd44a	3011	for (int i=0; i<(4 * 8); i++) {
wim	36:9f5f86dfd44a	3012	// _writeData(0x1F); // All On
wim	36:9f5f86dfd44a	3013	_writeData(0x00); // All Off
wim	36:9f5f86dfd44a	3014	}
wim	36:9f5f86dfd44a	3015	break; // case PCF2119_3V3 Controller
wim	36:9f5f86dfd44a	3016
wim	36:9f5f86dfd44a	3017	default:
wim	36:9f5f86dfd44a	3018	break; // end default
wim	36:9f5f86dfd44a	3019	} // end switch _ctrl
wim	36:9f5f86dfd44a	3020
wim	36:9f5f86dfd44a	3021	//Select DD RAM again for current LCD controller and restore the addresspointer
wim	36:9f5f86dfd44a	3022	int addr = getAddress(_column, _row);
wim	36:9f5f86dfd44a	3023	_writeCommand(0x80 \| addr);
wim	36:9f5f86dfd44a	3024	} //end clrIcon()
wim	39:e9c2319de9c5	3025	#endif
wim	39:e9c2319de9c5	3026
wim	39:e9c2319de9c5	3027	#if(LCD_INVERT == 1)
wim	36:9f5f86dfd44a	3028	/** Set Invert
wim	36:9f5f86dfd44a	3029	* setInvert method is supported by some compatible devices (eg KS0073) to swap between black and white
wim	36:9f5f86dfd44a	3030	*
wim	36:9f5f86dfd44a	3031	* @param bool invertOn Invert on/off
wim	36:9f5f86dfd44a	3032	* @return none
wim	36:9f5f86dfd44a	3033	*/
wim	36:9f5f86dfd44a	3034	//@TODO Add support for 40x4 dual controller
wim	36:9f5f86dfd44a	3035	void TextLCD_Base::setInvert(bool invertOn) {
wim	36:9f5f86dfd44a	3036
wim	36:9f5f86dfd44a	3037	if (invertOn) {
wim	36:9f5f86dfd44a	3038	// Controllers that support Invert
wim	36:9f5f86dfd44a	3039	switch (_ctrl) {
wim	36:9f5f86dfd44a	3040	case KS0073:
wim	36:9f5f86dfd44a	3041	case KS0078:
wim	36:9f5f86dfd44a	3042	_function = _function \| 0x01; // Enable Invert
wim	36:9f5f86dfd44a	3043	_writeCommand(0x20 \| _function); // Activate Invert (Std Instr Set)
wim	36:9f5f86dfd44a	3044	break;
wim	36:9f5f86dfd44a	3045	case SSD1803_3V3 :
wim	36:9f5f86dfd44a	3046	// case SSD1803_5V :
wim	36:9f5f86dfd44a	3047	case US2066_3V3:
wim	36:9f5f86dfd44a	3048	// case USS2066_5V:
wim	36:9f5f86dfd44a	3049	_function_1 = _function_1 \| 0x01; // Enable Invert
wim	36:9f5f86dfd44a	3050	// Set function, 0 0 1 DL N BE RE(1) REV (SSD1803)
wim	36:9f5f86dfd44a	3051	// Set function, 0 0 1 X N BE RE(1) REV (US2066)
wim	36:9f5f86dfd44a	3052	_writeCommand(0x20 \| _function_1); // Activate Invert (Ext Instr Set)
wim	36:9f5f86dfd44a	3053	_writeCommand(0x20 \| _function); // Return to Std Instr Set
wim	36:9f5f86dfd44a	3054	break;
wim	36:9f5f86dfd44a	3055	default:
wim	36:9f5f86dfd44a	3056	//Unsupported feature for other controllers
wim	36:9f5f86dfd44a	3057	break;
wim	36:9f5f86dfd44a	3058	} // end switch
wim	36:9f5f86dfd44a	3059	}
wim	36:9f5f86dfd44a	3060	else {
wim	36:9f5f86dfd44a	3061	// Controllers that support Invert
wim	36:9f5f86dfd44a	3062	switch (_ctrl) {
wim	36:9f5f86dfd44a	3063	case KS0073:
wim	36:9f5f86dfd44a	3064	case KS0078:
wim	36:9f5f86dfd44a	3065	_function = _function & ~0x01; // Disable Invert
wim	36:9f5f86dfd44a	3066	_writeCommand(0x20 \| _function); // Disable Invert (Std Instr Set)
wim	36:9f5f86dfd44a	3067	break;
wim	36:9f5f86dfd44a	3068	case SSD1803_3V3 :
wim	36:9f5f86dfd44a	3069	// case SSD1803_5V :
wim	36:9f5f86dfd44a	3070	case US2066_3V3:
wim	36:9f5f86dfd44a	3071	// case USS2066_5V:
wim	36:9f5f86dfd44a	3072	_function_1 = _function_1 & ~0x01; // Disable Invert
wim	36:9f5f86dfd44a	3073	// Set function, 0 0 1 DL N BE RE(1) REV (SSD1803)
wim	36:9f5f86dfd44a	3074	// Set function, 0 0 1 X N BE RE(1) REV (US2066)
wim	36:9f5f86dfd44a	3075	_writeCommand(0x20 \| _function_1); // Activate Invert (Ext Instr Set)
wim	36:9f5f86dfd44a	3076	_writeCommand(0x20 \| _function); // Return to Std Instr Set
wim	36:9f5f86dfd44a	3077	break;
wim	36:9f5f86dfd44a	3078
wim	36:9f5f86dfd44a	3079	default:
wim	36:9f5f86dfd44a	3080	//Unsupported feature for other controllers
wim	36:9f5f86dfd44a	3081	break;
wim	36:9f5f86dfd44a	3082	} // end switch
wim	36:9f5f86dfd44a	3083	}
wim	36:9f5f86dfd44a	3084	} // end setInvert()
wim	39:e9c2319de9c5	3085	#endif
wim	36:9f5f86dfd44a	3086
wim	23:d47f226efb24	3087	//--------- End TextLCD_Base -----------
wim	21:9eb628d9e164	3088
wim	22:35742ec80c24	3089
wim	23:d47f226efb24	3090	//--------- Start TextLCD Bus -----------
wim	21:9eb628d9e164	3091
wim	21:9eb628d9e164	3092	/* Create a TextLCD interface for using regular mbed pins
wim	21:9eb628d9e164	3093	*
wim	21:9eb628d9e164	3094	* @param rs Instruction/data control line
wim	21:9eb628d9e164	3095	* @param e Enable line (clock)
wim	21:9eb628d9e164	3096	* @param d4-d7 Data lines for using as a 4-bit interface
wim	21:9eb628d9e164	3097	* @param type Sets the panel size/addressing mode (default = LCD16x2)
wim	21:9eb628d9e164	3098	* @param bl Backlight control line (optional, default = NC)
wim	21:9eb628d9e164	3099	* @param e2 Enable2 line (clock for second controller, LCD40x4 only)
wim	21:9eb628d9e164	3100	* @param ctrl LCD controller (default = HD44780)
wim	21:9eb628d9e164	3101	*/
wim	21:9eb628d9e164	3102	TextLCD::TextLCD(PinName rs, PinName e,
wim	21:9eb628d9e164	3103	PinName d4, PinName d5, PinName d6, PinName d7,
wim	21:9eb628d9e164	3104	LCDType type, PinName bl, PinName e2, LCDCtrl ctrl) :
wim	21:9eb628d9e164	3105	TextLCD_Base(type, ctrl),
wim	22:35742ec80c24	3106	_rs(rs), _e(e), _d(d4, d5, d6, d7) {
wim	22:35742ec80c24	3107
wim	22:35742ec80c24	3108	// The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim	22:35742ec80c24	3109	if (bl != NC) {
wim	22:35742ec80c24	3110	_bl = new DigitalOut(bl); //Construct new pin
wim	22:35742ec80c24	3111	_bl->write(0); //Deactivate
wim	22:35742ec80c24	3112	}
wim	22:35742ec80c24	3113	else {
wim	22:35742ec80c24	3114	// No Hardware Backlight pin
wim	22:35742ec80c24	3115	_bl = NULL; //Construct dummy pin
wim	22:35742ec80c24	3116	}
wim	22:35742ec80c24	3117
wim	22:35742ec80c24	3118	// The hardware Enable2 pin is only needed for LCD40x4. Test and make sure whether it exists or not to prevent illegal access.
wim	22:35742ec80c24	3119	if (e2 != NC) {
wim	22:35742ec80c24	3120	_e2 = new DigitalOut(e2); //Construct new pin
wim	22:35742ec80c24	3121	_e2->write(0); //Deactivate
wim	22:35742ec80c24	3122	}
wim	22:35742ec80c24	3123	else {
wim	22:35742ec80c24	3124	// No Hardware Enable pin
wim	22:35742ec80c24	3125	_e2 = NULL; //Construct dummy pin
wim	22:35742ec80c24	3126	}
wim	38:cbe275b0b647	3127
wim	38:cbe275b0b647	3128	_init(_LCD_DL_4); // Set Datalength to 4 bit for mbed bus interfaces
wim	21:9eb628d9e164	3129	}
wim	21:9eb628d9e164	3130
wim	29:a3663151aa65	3131	/** Destruct a TextLCD interface for using regular mbed pins
wim	29:a3663151aa65	3132	*
wim	29:a3663151aa65	3133	* @param none
wim	29:a3663151aa65	3134	* @return none
wim	29:a3663151aa65	3135	*/
wim	29:a3663151aa65	3136	TextLCD::~TextLCD() {
wim	29:a3663151aa65	3137	if (_bl != NULL) {delete _bl;} // BL pin
wim	29:a3663151aa65	3138	if (_e2 != NULL) {delete _e2;} // E2 pin
wim	29:a3663151aa65	3139	}
wim	29:a3663151aa65	3140
wim	22:35742ec80c24	3141	/** Set E pin (or E2 pin)
wim	22:35742ec80c24	3142	* Used for mbed pins, I2C bus expander or SPI shiftregister
wim	22:35742ec80c24	3143	* Default PinName value for E2 is NC, must be used as pointer to avoid issues with mbed lib and DigitalOut pins
wim	22:35742ec80c24	3144	* @param value true or false
wim	22:35742ec80c24	3145	* @return none
wim	22:35742ec80c24	3146	*/
wim	21:9eb628d9e164	3147	void TextLCD::_setEnable(bool value) {
wim	21:9eb628d9e164	3148
wim	22:35742ec80c24	3149	if(_ctrl_idx==_LCDCtrl_0) {
wim	22:35742ec80c24	3150	if (value) {
wim	22:35742ec80c24	3151	_e = 1; // Set E bit
wim	22:35742ec80c24	3152	}
wim	22:35742ec80c24	3153	else {
wim	22:35742ec80c24	3154	_e = 0; // Reset E bit
wim	22:35742ec80c24	3155	}
wim	22:35742ec80c24	3156	}
wim	22:35742ec80c24	3157	else {
wim	22:35742ec80c24	3158	if (value) {
wim	22:35742ec80c24	3159	if (_e2 != NULL) {_e2->write(1);} //Set E2 bit
wim	22:35742ec80c24	3160	}
wim	22:35742ec80c24	3161	else {
wim	22:35742ec80c24	3162	if (_e2 != NULL) {_e2->write(0);} //Reset E2 bit
wim	22:35742ec80c24	3163	}
wim	22:35742ec80c24	3164	}
wim	21:9eb628d9e164	3165	}
wim	21:9eb628d9e164	3166
wim	21:9eb628d9e164	3167	// Set RS pin
wim	21:9eb628d9e164	3168	// Used for mbed pins, I2C bus expander or SPI shiftregister
wim	21:9eb628d9e164	3169	void TextLCD::_setRS(bool value) {
wim	21:9eb628d9e164	3170
wim	22:35742ec80c24	3171	if (value) {
wim	21:9eb628d9e164	3172	_rs = 1; // Set RS bit
wim	22:35742ec80c24	3173	}
wim	22:35742ec80c24	3174	else {
wim	21:9eb628d9e164	3175	_rs = 0; // Reset RS bit
wim	22:35742ec80c24	3176	}
wim	21:9eb628d9e164	3177	}
wim	21:9eb628d9e164	3178
wim	22:35742ec80c24	3179	/** Set BL pin
wim	22:35742ec80c24	3180	* Used for mbed pins, I2C bus expander or SPI shiftregister
wim	22:35742ec80c24	3181	* Default PinName value is NC, must be used as pointer to avoid issues with mbed lib and DigitalOut pins
wim	22:35742ec80c24	3182	* @param value true or false
wim	22:35742ec80c24	3183	* @return none
wim	22:35742ec80c24	3184	*/
wim	21:9eb628d9e164	3185	void TextLCD::_setBL(bool value) {
wim	21:9eb628d9e164	3186
wim	22:35742ec80c24	3187	if (value) {
wim	22:35742ec80c24	3188	if (_bl != NULL) {_bl->write(1);} //Set BL bit
wim	22:35742ec80c24	3189	}
wim	22:35742ec80c24	3190	else {
wim	22:35742ec80c24	3191	if (_bl != NULL) {_bl->write(0);} //Reset BL bit
wim	22:35742ec80c24	3192	}
wim	21:9eb628d9e164	3193	}
wim	21:9eb628d9e164	3194
wim	21:9eb628d9e164	3195	// Place the 4bit data on the databus
wim	21:9eb628d9e164	3196	// Used for mbed pins, I2C bus expander or SPI shifregister
wim	21:9eb628d9e164	3197	void TextLCD::_setData(int value) {
wim	21:9eb628d9e164	3198	_d = value & 0x0F; // Write Databits
wim	21:9eb628d9e164	3199	}
wim	34:e5a0dcb43ecc	3200
wim	23:d47f226efb24	3201	//----------- End TextLCD ---------------
wim	21:9eb628d9e164	3202
wim	21:9eb628d9e164	3203
wim	23:d47f226efb24	3204	//--------- Start TextLCD_I2C -----------
wim	34:e5a0dcb43ecc	3205	#if(LCD_I2C == 1) /* I2C Expander PCF8574/MCP23008 */
wim	26:bd897a001012	3206	/** Create a TextLCD interface using an I2C PC8574 (or PCF8574A) or MCP23008 portexpander
wim	22:35742ec80c24	3207	*
wim	22:35742ec80c24	3208	* @param i2c I2C Bus
wim	26:bd897a001012	3209	* @param deviceAddress I2C slave address (PCF8574, PCF8574A or MCP23008, default = 0x40)
wim	22:35742ec80c24	3210	* @param type Sets the panel size/addressing mode (default = LCD16x2)
wim	22:35742ec80c24	3211	* @param ctrl LCD controller (default = HD44780)
wim	22:35742ec80c24	3212	*/
wim	21:9eb628d9e164	3213	TextLCD_I2C::TextLCD_I2C(I2C *i2c, char deviceAddress, LCDType type, LCDCtrl ctrl) :
wim	21:9eb628d9e164	3214	TextLCD_Base(type, ctrl),
wim	21:9eb628d9e164	3215	_i2c(i2c){
wim	21:9eb628d9e164	3216
wim	22:35742ec80c24	3217	_slaveAddress = deviceAddress & 0xFE;
wim	28:30fa94f7341c	3218
wim	28:30fa94f7341c	3219	// Setup the I2C bus
wim	28:30fa94f7341c	3220	// The max bitrate for PCF8574 is 100kbit, the max bitrate for MCP23008 is 400kbit,
wim	32:59c4b8f648d4	3221	_i2c->frequency(100000);
wim	21:9eb628d9e164	3222
wim	26:bd897a001012	3223	#if (MCP23008==1)
wim	26:bd897a001012	3224	// MCP23008 portexpander Init
wim	37:ce348c002929	3225	_writeRegister(IODIR, 0x00); // All pins are outputs
wim	37:ce348c002929	3226	_writeRegister(IPOL, 0x00); // No reverse polarity on inputs
wim	37:ce348c002929	3227	_writeRegister(GPINTEN, 0x00); // No interrupt on change of input pins
wim	37:ce348c002929	3228	_writeRegister(DEFVAL, 0x00); // Default value to compare against for interrupts
wim	37:ce348c002929	3229	_writeRegister(INTCON, 0x00); // No interrupt on changes, compare against previous pin value
wim	37:ce348c002929	3230	_writeRegister(IOCON, 0x20); // b1=0 - Interrupt polarity active low
wim	37:ce348c002929	3231	// b2=0 - Interrupt pin active driver output
wim	37:ce348c002929	3232	// b4=0 - Slew rate enable on SDA
wim	37:ce348c002929	3233	// b5=0 - Auto-increment on registeraddress
wim	37:ce348c002929	3234	// b5=1 - No auto-increment on registeraddress => needed for performance improved I2C expander mode
wim	37:ce348c002929	3235	_writeRegister(GPPU, 0x00); // No Pullup
wim	37:ce348c002929	3236	// INTF // Interrupt flags read (Read-Only)
wim	37:ce348c002929	3237	// INTCAP // Captured inputpins at time of interrupt (Read-Only)
wim	37:ce348c002929	3238	// _writeRegister(GPIO, 0x00); // Output/Input pins
wim	37:ce348c002929	3239	// _writeRegister(OLAT, 0x00); // Output Latch
wim	26:bd897a001012	3240
wim	21:9eb628d9e164	3241	// Init the portexpander bus
wim	38:cbe275b0b647	3242	_lcd_bus = LCD_BUS_I2C_DEF;
wim	21:9eb628d9e164	3243
wim	21:9eb628d9e164	3244	// write the new data to the portexpander
wim	37:ce348c002929	3245	_writeRegister(GPIO, _lcd_bus);
wim	26:bd897a001012	3246	#else
wim	26:bd897a001012	3247	// PCF8574 of PCF8574A portexpander
wim	26:bd897a001012	3248
wim	26:bd897a001012	3249	// Init the portexpander bus
wim	38:cbe275b0b647	3250	_lcd_bus = LCD_BUS_I2C_DEF;
wim	26:bd897a001012	3251
wim	26:bd897a001012	3252	// write the new data to the portexpander
wim	21:9eb628d9e164	3253	_i2c->write(_slaveAddress, &_lcd_bus, 1);
wim	26:bd897a001012	3254	#endif
wim	21:9eb628d9e164	3255
wim	37:ce348c002929	3256	_init(_LCD_DL_4); // Set Datalength to 4 bit for all serial expander interfaces
wim	21:9eb628d9e164	3257	}
wim	21:9eb628d9e164	3258
wim	37:ce348c002929	3259	// Set E bit (or E2 bit) in the databus shadowvalue
wim	37:ce348c002929	3260	// Used for mbed I2C bus expander
wim	37:ce348c002929	3261	void TextLCD_I2C::_setEnableBit(bool value) {
wim	21:9eb628d9e164	3262
wim	41:111ca62e8a59	3263	#if (LCD_TWO_CTRL == 1)
wim	22:35742ec80c24	3264	if(_ctrl_idx==_LCDCtrl_0) {
wim	26:bd897a001012	3265	if (value) {
wim	38:cbe275b0b647	3266	_lcd_bus \|= LCD_BUS_I2C_E; // Set E bit
wim	26:bd897a001012	3267	}
wim	26:bd897a001012	3268	else {
wim	38:cbe275b0b647	3269	_lcd_bus &= ~LCD_BUS_I2C_E; // Reset E bit
wim	26:bd897a001012	3270	}
wim	22:35742ec80c24	3271	}
wim	22:35742ec80c24	3272	else {
wim	26:bd897a001012	3273	if (value) {
wim	38:cbe275b0b647	3274	_lcd_bus \|= LCD_BUS_I2C_E2; // Set E2 bit
wim	26:bd897a001012	3275	}
wim	26:bd897a001012	3276	else {
wim	38:cbe275b0b647	3277	_lcd_bus &= ~LCD_BUS_I2C_E2; // Reset E2bit
wim	26:bd897a001012	3278	}
wim	26:bd897a001012	3279	}
wim	41:111ca62e8a59	3280	#else
wim	41:111ca62e8a59	3281	// Support only one controller
wim	41:111ca62e8a59	3282	if (value) {
wim	41:111ca62e8a59	3283	_lcd_bus \|= LCD_BUS_I2C_E; // Set E bit
wim	41:111ca62e8a59	3284	}
wim	41:111ca62e8a59	3285	else {
wim	41:111ca62e8a59	3286	_lcd_bus &= ~LCD_BUS_I2C_E; // Reset E bit
wim	41:111ca62e8a59	3287	}
wim	41:111ca62e8a59	3288
wim	41:111ca62e8a59	3289	#endif
wim	37:ce348c002929	3290	}
wim	37:ce348c002929	3291
wim	37:ce348c002929	3292	// Set E pin (or E2 pin)
wim	37:ce348c002929	3293	// Used for mbed pins, I2C bus expander or SPI shiftregister
wim	37:ce348c002929	3294	void TextLCD_I2C::_setEnable(bool value) {
wim	37:ce348c002929	3295
wim	37:ce348c002929	3296	// Place the E or E2 bit data on the databus shadowvalue
wim	37:ce348c002929	3297	_setEnableBit(value);
wim	26:bd897a001012	3298
wim	26:bd897a001012	3299	#if (MCP23008==1)
wim	26:bd897a001012	3300	// MCP23008 portexpander
wim	26:bd897a001012	3301
wim	26:bd897a001012	3302	// write the new data to the portexpander
wim	37:ce348c002929	3303	_writeRegister(GPIO, _lcd_bus);
wim	26:bd897a001012	3304	#else
wim	26:bd897a001012	3305	// PCF8574 of PCF8574A portexpander
wim	21:9eb628d9e164	3306
wim	22:35742ec80c24	3307	// write the new data to the I2C portexpander
wim	22:35742ec80c24	3308	_i2c->write(_slaveAddress, &_lcd_bus, 1);
wim	26:bd897a001012	3309	#endif
wim	21:9eb628d9e164	3310	}
wim	21:9eb628d9e164	3311
wim	37:ce348c002929	3312
wim	21:9eb628d9e164	3313	// Set RS pin
wim	21:9eb628d9e164	3314	// Used for mbed pins, I2C bus expander or SPI shiftregister
wim	21:9eb628d9e164	3315	void TextLCD_I2C::_setRS(bool value) {
wim	21:9eb628d9e164	3316
wim	26:bd897a001012	3317	if (value) {
wim	38:cbe275b0b647	3318	_lcd_bus \|= LCD_BUS_I2C_RS; // Set RS bit
wim	26:bd897a001012	3319	}
wim	26:bd897a001012	3320	else {
wim	38:cbe275b0b647	3321	_lcd_bus &= ~LCD_BUS_I2C_RS; // Reset RS bit
wim	26:bd897a001012	3322	}
wim	26:bd897a001012	3323
wim	26:bd897a001012	3324	#if (MCP23008==1)
wim	26:bd897a001012	3325	// MCP23008 portexpander
wim	26:bd897a001012	3326
wim	26:bd897a001012	3327	// write the new data to the portexpander
wim	37:ce348c002929	3328	_writeRegister(GPIO, _lcd_bus);
wim	26:bd897a001012	3329	#else
wim	26:bd897a001012	3330	// PCF8574 of PCF8574A portexpander
wim	21:9eb628d9e164	3331
wim	22:35742ec80c24	3332	// write the new data to the I2C portexpander
wim	22:35742ec80c24	3333	_i2c->write(_slaveAddress, &_lcd_bus, 1);
wim	30:033048611c01	3334	#endif
wim	21:9eb628d9e164	3335	}
wim	21:9eb628d9e164	3336
wim	21:9eb628d9e164	3337	// Set BL pin
wim	21:9eb628d9e164	3338	// Used for mbed pins, I2C bus expander or SPI shiftregister
wim	21:9eb628d9e164	3339	void TextLCD_I2C::_setBL(bool value) {
wim	21:9eb628d9e164	3340
wim	26:bd897a001012	3341	if (value) {
wim	38:cbe275b0b647	3342	_lcd_bus \|= LCD_BUS_I2C_BL; // Set BL bit
wim	26:bd897a001012	3343	}
wim	26:bd897a001012	3344	else {
wim	38:cbe275b0b647	3345	_lcd_bus &= ~LCD_BUS_I2C_BL; // Reset BL bit
wim	26:bd897a001012	3346	}
wim	26:bd897a001012	3347
wim	26:bd897a001012	3348	#if (MCP23008==1)
wim	26:bd897a001012	3349	// MCP23008 portexpander
wim	26:bd897a001012	3350
wim	26:bd897a001012	3351	// write the new data to the portexpander
wim	37:ce348c002929	3352	_writeRegister(GPIO, _lcd_bus);
wim	37:ce348c002929	3353	#else
wim	37:ce348c002929	3354	// PCF8574 of PCF8574A portexpander
wim	37:ce348c002929	3355
wim	37:ce348c002929	3356	// write the new data to the I2C portexpander
wim	37:ce348c002929	3357	_i2c->write(_slaveAddress, &_lcd_bus, 1);
wim	37:ce348c002929	3358	#endif
wim	37:ce348c002929	3359	}
wim	37:ce348c002929	3360
wim	38:cbe275b0b647	3361	#if(0)
wim	38:cbe275b0b647	3362	// New optimized v018
wim	38:cbe275b0b647	3363	// Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574), same as v018
wim	38:cbe275b0b647	3364	// Place the 4bit data in the databus shadowvalue
wim	38:cbe275b0b647	3365	// Used for mbed I2C bus expander
wim	38:cbe275b0b647	3366	const char _LCD_DATA_BITS[16] = {
wim	38:cbe275b0b647	3367	0x00,
wim	38:cbe275b0b647	3368	( LCD_BUS_I2C_D4),
wim	38:cbe275b0b647	3369	( LCD_BUS_I2C_D5 ),
wim	38:cbe275b0b647	3370	( LCD_BUS_I2C_D5 \| LCD_BUS_I2C_D4),
wim	38:cbe275b0b647	3371	( LCD_BUS_I2C_D6 ),
wim	38:cbe275b0b647	3372	( LCD_BUS_I2C_D6 \| LCD_BUS_I2C_D4),
wim	38:cbe275b0b647	3373	( LCD_BUS_I2C_D6 \| LCD_BUS_I2C_D5 ),
wim	38:cbe275b0b647	3374	( LCD_BUS_I2C_D6 \| LCD_BUS_I2C_D5 \| LCD_BUS_I2C_D4),
wim	38:cbe275b0b647	3375	(LCD_BUS_I2C_D7 ),
wim	38:cbe275b0b647	3376	(LCD_BUS_I2C_D7 \| LCD_BUS_I2C_D4),
wim	38:cbe275b0b647	3377	(LCD_BUS_I2C_D7 \| LCD_BUS_I2C_D5 ),
wim	38:cbe275b0b647	3378	(LCD_BUS_I2C_D7 \| LCD_BUS_I2C_D5 \| LCD_BUS_I2C_D4),
wim	38:cbe275b0b647	3379	(LCD_BUS_I2C_D7 \| LCD_BUS_I2C_D6 ),
wim	38:cbe275b0b647	3380	(LCD_BUS_I2C_D7 \| LCD_BUS_I2C_D6 \| LCD_BUS_I2C_D4),
wim	38:cbe275b0b647	3381	(LCD_BUS_I2C_D7 \| LCD_BUS_I2C_D6 \| LCD_BUS_I2C_D5 ),
wim	38:cbe275b0b647	3382	(LCD_BUS_I2C_D7 \| LCD_BUS_I2C_D6 \| LCD_BUS_I2C_D5 \| LCD_BUS_I2C_D4)
wim	38:cbe275b0b647	3383	};
wim	38:cbe275b0b647	3384	void TextLCD_I2C::_setDataBits(int value) {
wim	38:cbe275b0b647	3385
wim	38:cbe275b0b647	3386	//Clear all databits
wim	38:cbe275b0b647	3387	_lcd_bus &= ~LCD_BUS_I2C_MSK;
wim	38:cbe275b0b647	3388
wim	38:cbe275b0b647	3389	// Set bit by bit to support any mapping of expander portpins to LCD pins
wim	38:cbe275b0b647	3390	_lcd_bus \|= _LCD_DATA_BITS[value & 0x0F];
wim	38:cbe275b0b647	3391	}
wim	39:e9c2319de9c5	3392	#endif
wim	39:e9c2319de9c5	3393
wim	39:e9c2319de9c5	3394	// Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574)
wim	39:e9c2319de9c5	3395	// Place the 4bit data in the databus shadowvalue
wim	39:e9c2319de9c5	3396	// Used for mbed I2C bus expander
wim	39:e9c2319de9c5	3397	void TextLCD_I2C::_setDataBits(int value) {
wim	39:e9c2319de9c5	3398
wim	39:e9c2319de9c5	3399	//Clear all databits
wim	39:e9c2319de9c5	3400	_lcd_bus &= ~LCD_BUS_I2C_MSK;
wim	39:e9c2319de9c5	3401
wim	39:e9c2319de9c5	3402	// Set bit by bit to support any mapping of expander portpins to LCD pins
wim	39:e9c2319de9c5	3403	if (value & 0x01){
wim	39:e9c2319de9c5	3404	_lcd_bus \|= LCD_BUS_I2C_D4; // Set Databit
wim	39:e9c2319de9c5	3405	}
wim	39:e9c2319de9c5	3406
wim	39:e9c2319de9c5	3407	if (value & 0x02){
wim	39:e9c2319de9c5	3408	_lcd_bus \|= LCD_BUS_I2C_D5; // Set Databit
wim	39:e9c2319de9c5	3409	}
wim	39:e9c2319de9c5	3410
wim	39:e9c2319de9c5	3411	if (value & 0x04) {
wim	39:e9c2319de9c5	3412	_lcd_bus \|= LCD_BUS_I2C_D6; // Set Databit
wim	39:e9c2319de9c5	3413	}
wim	39:e9c2319de9c5	3414
wim	39:e9c2319de9c5	3415	if (value & 0x08) {
wim	39:e9c2319de9c5	3416	_lcd_bus \|= LCD_BUS_I2C_D7; // Set Databit
wim	39:e9c2319de9c5	3417	}
wim	39:e9c2319de9c5	3418	}
wim	41:111ca62e8a59	3419
wim	37:ce348c002929	3420
wim	37:ce348c002929	3421	// Place the 4bit data on the databus
wim	37:ce348c002929	3422	// Used for mbed pins, I2C bus expander or SPI shifregister
wim	37:ce348c002929	3423	void TextLCD_I2C::_setData(int value) {
wim	37:ce348c002929	3424
wim	37:ce348c002929	3425	// Place the 4bit data on the databus shadowvalue
wim	37:ce348c002929	3426	_setDataBits(value);
wim	37:ce348c002929	3427
wim	37:ce348c002929	3428	// Place the 4bit data on the databus
wim	37:ce348c002929	3429	#if (MCP23008==1)
wim	37:ce348c002929	3430	// MCP23008 portexpander
wim	37:ce348c002929	3431
wim	37:ce348c002929	3432	// write the new data to the portexpander
wim	37:ce348c002929	3433	_writeRegister(GPIO, _lcd_bus);
wim	26:bd897a001012	3434	#else
wim	26:bd897a001012	3435	// PCF8574 of PCF8574A portexpander
wim	21:9eb628d9e164	3436
wim	21:9eb628d9e164	3437	// write the new data to the I2C portexpander
wim	21:9eb628d9e164	3438	_i2c->write(_slaveAddress, &_lcd_bus, 1);
wim	30:033048611c01	3439	#endif
wim	21:9eb628d9e164	3440	}
wim	21:9eb628d9e164	3441
wim	37:ce348c002929	3442	// Write data to MCP23008 I2C portexpander
wim	37:ce348c002929	3443	// Used for mbed I2C bus expander
wim	37:ce348c002929	3444	void TextLCD_I2C::_writeRegister (int reg, int value) {
reedas	42:1962dc501f94	3445	char data[] = {(char)reg, (char)value};
wim	37:ce348c002929	3446
wim	37:ce348c002929	3447	_i2c->write(_slaveAddress, data, 2);
wim	37:ce348c002929	3448	}
wim	37:ce348c002929	3449
wim	37:ce348c002929	3450	//New optimized
wim	37:ce348c002929	3451	//Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574)
wim	37:ce348c002929	3452	//Test faster _writeByte 0.14s vs 0.34s for a 20x4 fillscreen (MCP23008)
wim	37:ce348c002929	3453
wim	37:ce348c002929	3454	// Write a byte using I2C
wim	37:ce348c002929	3455	void TextLCD_I2C::_writeByte(int value) {
wim	37:ce348c002929	3456	char data[6];
wim	37:ce348c002929	3457
wim	37:ce348c002929	3458	#if (MCP23008==1)
wim	37:ce348c002929	3459	// MCP23008 portexpander
wim	37:ce348c002929	3460
wim	37:ce348c002929	3461	data[0] = GPIO; // set registeraddres
wim	37:ce348c002929	3462	// Note: auto-increment is disabled so all data will go to GPIO register
wim	37:ce348c002929	3463
wim	37:ce348c002929	3464	_setEnableBit(true); // set E
wim	37:ce348c002929	3465	_setDataBits(value >> 4); // set data high
wim	37:ce348c002929	3466	data[1] = _lcd_bus;
wim	37:ce348c002929	3467
wim	37:ce348c002929	3468	_setEnableBit(false); // clear E
wim	37:ce348c002929	3469	data[2] = _lcd_bus;
wim	37:ce348c002929	3470
wim	37:ce348c002929	3471	_setEnableBit(true); // set E
wim	37:ce348c002929	3472	_setDataBits(value); // set data low
wim	37:ce348c002929	3473	data[3] = _lcd_bus;
wim	37:ce348c002929	3474
wim	37:ce348c002929	3475	_setEnableBit(false); // clear E
wim	37:ce348c002929	3476	data[4] = _lcd_bus;
wim	37:ce348c002929	3477
wim	37:ce348c002929	3478	// write the packed data to the I2C portexpander
wim	37:ce348c002929	3479	_i2c->write(_slaveAddress, data, 5);
wim	37:ce348c002929	3480	#else
wim	37:ce348c002929	3481	// PCF8574 of PCF8574A portexpander
wim	37:ce348c002929	3482
wim	37:ce348c002929	3483	_setEnableBit(true); // set E
wim	37:ce348c002929	3484	_setDataBits(value >> 4); // set data high
wim	37:ce348c002929	3485	data[0] = _lcd_bus;
wim	37:ce348c002929	3486
wim	37:ce348c002929	3487	_setEnableBit(false); // clear E
wim	37:ce348c002929	3488	data[1] = _lcd_bus;
wim	37:ce348c002929	3489
wim	37:ce348c002929	3490	_setEnableBit(true); // set E
wim	37:ce348c002929	3491	_setDataBits(value); // set data low
wim	37:ce348c002929	3492	data[2] = _lcd_bus;
wim	37:ce348c002929	3493
wim	37:ce348c002929	3494	_setEnableBit(false); // clear E
wim	37:ce348c002929	3495	data[3] = _lcd_bus;
wim	37:ce348c002929	3496
wim	37:ce348c002929	3497	// write the packed data to the I2C portexpander
wim	37:ce348c002929	3498	_i2c->write(_slaveAddress, data, 4);
wim	37:ce348c002929	3499	#endif
wim	37:ce348c002929	3500	}
wim	37:ce348c002929	3501
wim	37:ce348c002929	3502	#endif /* I2C Expander PCF8574/MCP23008 */
wim	37:ce348c002929	3503	//---------- End TextLCD_I2C ------------
wim	37:ce348c002929	3504
wim	37:ce348c002929	3505
wim	37:ce348c002929	3506	//--------- Start TextLCD_SPI -----------
wim	37:ce348c002929	3507	#if(LCD_SPI == 1) /* SPI Expander SN74595 */
wim	37:ce348c002929	3508
wim	37:ce348c002929	3509	/** Create a TextLCD interface using an SPI 74595 portexpander
wim	37:ce348c002929	3510	*
wim	37:ce348c002929	3511	* @param spi SPI Bus
wim	37:ce348c002929	3512	* @param cs chip select pin (active low)
wim	37:ce348c002929	3513	* @param type Sets the panel size/addressing mode (default = LCD16x2)
wim	37:ce348c002929	3514	* @param ctrl LCD controller (default = HD44780)
wim	37:ce348c002929	3515	*/
wim	37:ce348c002929	3516	TextLCD_SPI::TextLCD_SPI(SPI *spi, PinName cs, LCDType type, LCDCtrl ctrl) :
wim	37:ce348c002929	3517	TextLCD_Base(type, ctrl),
wim	37:ce348c002929	3518	_spi(spi),
wim	38:cbe275b0b647	3519	_cs(cs) {
wim	37:ce348c002929	3520	// Init cs
wim	37:ce348c002929	3521	_cs = 1;
wim	37:ce348c002929	3522
wim	37:ce348c002929	3523	// Setup the spi for 8 bit data, low steady state clock,
wim	37:ce348c002929	3524	// rising edge capture, with a 500KHz or 1MHz clock rate
wim	37:ce348c002929	3525	_spi->format(8,0);
wim	37:ce348c002929	3526	_spi->frequency(500000);
wim	37:ce348c002929	3527	//_spi.frequency(1000000);
wim	37:ce348c002929	3528
reedas	42:1962dc501f94	3529	ThisThread::sleep_for(100); // Wait 100ms to ensure LCD powered up
wim	38:cbe275b0b647	3530
wim	37:ce348c002929	3531	// Init the portexpander bus
wim	38:cbe275b0b647	3532	_lcd_bus = LCD_BUS_SPI_DEF;
wim	37:ce348c002929	3533
wim	37:ce348c002929	3534	// write the new data to the portexpander
wim	37:ce348c002929	3535	_cs = 0;
wim	37:ce348c002929	3536	_spi->write(_lcd_bus);
wim	37:ce348c002929	3537	_cs = 1;
wim	37:ce348c002929	3538
wim	37:ce348c002929	3539	_init(_LCD_DL_4); // Set Datalength to 4 bit for all serial expander interfaces
wim	37:ce348c002929	3540	}
wim	37:ce348c002929	3541
wim	37:ce348c002929	3542	// Set E pin (or E2 pin)
wim	37:ce348c002929	3543	// Used for mbed pins, I2C bus expander or SPI shiftregister
wim	37:ce348c002929	3544	void TextLCD_SPI::_setEnable(bool value) {
wim	37:ce348c002929	3545
wim	37:ce348c002929	3546	if(_ctrl_idx==_LCDCtrl_0) {
wim	37:ce348c002929	3547	if (value) {
wim	38:cbe275b0b647	3548	_lcd_bus \|= LCD_BUS_SPI_E; // Set E bit
wim	37:ce348c002929	3549	}
wim	37:ce348c002929	3550	else {
wim	38:cbe275b0b647	3551	_lcd_bus &= ~LCD_BUS_SPI_E; // Reset E bit
wim	37:ce348c002929	3552	}
wim	37:ce348c002929	3553	}
wim	37:ce348c002929	3554	else {
wim	37:ce348c002929	3555	if (value) {
wim	38:cbe275b0b647	3556	_lcd_bus \|= LCD_BUS_SPI_E2; // Set E2 bit
wim	37:ce348c002929	3557	}
wim	37:ce348c002929	3558	else {
wim	38:cbe275b0b647	3559	_lcd_bus &= ~LCD_BUS_SPI_E2; // Reset E2 bit
wim	37:ce348c002929	3560	}
wim	37:ce348c002929	3561	}
wim	37:ce348c002929	3562
wim	37:ce348c002929	3563	// write the new data to the SPI portexpander
wim	37:ce348c002929	3564	_cs = 0;
wim	37:ce348c002929	3565	_spi->write(_lcd_bus);
wim	37:ce348c002929	3566	_cs = 1;
wim	37:ce348c002929	3567	}
wim	37:ce348c002929	3568
wim	37:ce348c002929	3569	// Set RS pin
wim	37:ce348c002929	3570	// Used for mbed pins, I2C bus expander or SPI shiftregister and SPI_N
wim	37:ce348c002929	3571	void TextLCD_SPI::_setRS(bool value) {
wim	37:ce348c002929	3572
wim	37:ce348c002929	3573	if (value) {
wim	38:cbe275b0b647	3574	_lcd_bus \|= LCD_BUS_SPI_RS; // Set RS bit
wim	37:ce348c002929	3575	}
wim	37:ce348c002929	3576	else {
wim	38:cbe275b0b647	3577	_lcd_bus &= ~LCD_BUS_SPI_RS; // Reset RS bit
wim	37:ce348c002929	3578	}
wim	37:ce348c002929	3579
wim	37:ce348c002929	3580	// write the new data to the SPI portexpander
wim	37:ce348c002929	3581	_cs = 0;
wim	37:ce348c002929	3582	_spi->write(_lcd_bus);
wim	37:ce348c002929	3583	_cs = 1;
wim	37:ce348c002929	3584	}
wim	37:ce348c002929	3585
wim	37:ce348c002929	3586	// Set BL pin
wim	37:ce348c002929	3587	// Used for mbed pins, I2C bus expander or SPI shiftregister
wim	37:ce348c002929	3588	void TextLCD_SPI::_setBL(bool value) {
wim	37:ce348c002929	3589
wim	37:ce348c002929	3590	if (value) {
wim	38:cbe275b0b647	3591	_lcd_bus \|= LCD_BUS_SPI_BL; // Set BL bit
wim	37:ce348c002929	3592	}
wim	37:ce348c002929	3593	else {
wim	38:cbe275b0b647	3594	_lcd_bus &= ~LCD_BUS_SPI_BL; // Reset BL bit
wim	37:ce348c002929	3595	}
wim	37:ce348c002929	3596
wim	37:ce348c002929	3597	// write the new data to the SPI portexpander
wim	37:ce348c002929	3598	_cs = 0;
wim	37:ce348c002929	3599	_spi->write(_lcd_bus);
wim	37:ce348c002929	3600	_cs = 1;
wim	37:ce348c002929	3601	}
wim	21:9eb628d9e164	3602
wim	21:9eb628d9e164	3603	// Place the 4bit data on the databus
wim	37:ce348c002929	3604	// Used for mbed pins, I2C bus expander or SPI shiftregister
wim	37:ce348c002929	3605	void TextLCD_SPI::_setData(int value) {
wim	22:35742ec80c24	3606
wim	22:35742ec80c24	3607	// Set bit by bit to support any mapping of expander portpins to LCD pins
wim	37:ce348c002929	3608	if (value & 0x01) {
wim	38:cbe275b0b647	3609	_lcd_bus \|= LCD_BUS_SPI_D4; // Set Databit
wim	26:bd897a001012	3610	}
wim	37:ce348c002929	3611	else {
wim	38:cbe275b0b647	3612	_lcd_bus &= ~LCD_BUS_SPI_D4; // Reset Databit
wim	37:ce348c002929	3613	}
wim	37:ce348c002929	3614
wim	37:ce348c002929	3615	if (value & 0x02) {
wim	38:cbe275b0b647	3616	_lcd_bus \|= LCD_BUS_SPI_D5; // Set Databit
wim	26:bd897a001012	3617	}
wim	26:bd897a001012	3618	else {
wim	38:cbe275b0b647	3619	_lcd_bus &= ~LCD_BUS_SPI_D5; // Reset Databit
wim	37:ce348c002929	3620	}
wim	37:ce348c002929	3621
wim	37:ce348c002929	3622	if (value & 0x04) {
wim	38:cbe275b0b647	3623	_lcd_bus \|= LCD_BUS_SPI_D6; // Set Databit
wim	26:bd897a001012	3624	}
wim	37:ce348c002929	3625	else {
wim	38:cbe275b0b647	3626	_lcd_bus &= ~LCD_BUS_SPI_D6; // Reset Databit
wim	37:ce348c002929	3627	}
wim	37:ce348c002929	3628
wim	37:ce348c002929	3629	if (value & 0x08) {
wim	38:cbe275b0b647	3630	_lcd_bus \|= LCD_BUS_SPI_D7; // Set Databit
wim	26:bd897a001012	3631	}
wim	26:bd897a001012	3632	else {
wim	38:cbe275b0b647	3633	_lcd_bus &= ~LCD_BUS_SPI_D7; // Reset Databit
wim	26:bd897a001012	3634	}
wim	21:9eb628d9e164	3635
wim	37:ce348c002929	3636	// write the new data to the SPI portexpander
wim	37:ce348c002929	3637	_cs = 0;
wim	37:ce348c002929	3638	_spi->write(_lcd_bus);
wim	37:ce348c002929	3639	_cs = 1;
wim	22:35742ec80c24	3640	}
wim	21:9eb628d9e164	3641
wim	37:ce348c002929	3642	#endif /* SPI Expander SN74595 */
wim	37:ce348c002929	3643	//---------- End TextLCD_SPI ------------
wim	21:9eb628d9e164	3644
wim	21:9eb628d9e164	3645
wim	28:30fa94f7341c	3646	//--------- Start TextLCD_I2C_N ---------
wim	34:e5a0dcb43ecc	3647	#if(LCD_I2C_N == 1) /* Native I2C */
wim	28:30fa94f7341c	3648
wim	28:30fa94f7341c	3649	/** Create a TextLCD interface using a controller with native I2C interface
wim	28:30fa94f7341c	3650	*
wim	28:30fa94f7341c	3651	* @param i2c I2C Bus
wim	28:30fa94f7341c	3652	* @param deviceAddress I2C slave address (default = 0x7C)
wim	28:30fa94f7341c	3653	* @param type Sets the panel size/addressing mode (default = LCD16x2)
wim	28:30fa94f7341c	3654	* @param bl Backlight control line (optional, default = NC)
wim	28:30fa94f7341c	3655	* @param ctrl LCD controller (default = ST7032_3V3)
wim	28:30fa94f7341c	3656	*/
wim	28:30fa94f7341c	3657	TextLCD_I2C_N::TextLCD_I2C_N(I2C *i2c, char deviceAddress, LCDType type, PinName bl, LCDCtrl ctrl) :
wim	28:30fa94f7341c	3658	TextLCD_Base(type, ctrl),
wim	32:59c4b8f648d4	3659
wim	33:900a94bc7585	3660	_i2c(i2c){
wim	30:033048611c01	3661
wim	28:30fa94f7341c	3662	_slaveAddress = deviceAddress & 0xFE;
wim	28:30fa94f7341c	3663
wim	28:30fa94f7341c	3664	// Setup the I2C bus
wim	29:a3663151aa65	3665	// The max bitrate for ST7032i is 400kbit, lets stick to default here
wim	29:a3663151aa65	3666	_i2c->frequency(100000);
wim	32:59c4b8f648d4	3667
wim	30:033048611c01	3668
wim	28:30fa94f7341c	3669	// The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim	28:30fa94f7341c	3670	if (bl != NC) {
wim	28:30fa94f7341c	3671	_bl = new DigitalOut(bl); //Construct new pin
wim	28:30fa94f7341c	3672	_bl->write(0); //Deactivate
wim	28:30fa94f7341c	3673	}
wim	28:30fa94f7341c	3674	else {
wim	28:30fa94f7341c	3675	// No Hardware Backlight pin
wim	28:30fa94f7341c	3676	_bl = NULL; //Construct dummy pin
wim	28:30fa94f7341c	3677	}
wim	28:30fa94f7341c	3678
wim	30:033048611c01	3679	//Sanity check
wim	30:033048611c01	3680	if (_ctrl & LCD_C_I2C) {
wim	36:9f5f86dfd44a	3681	_init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim	30:033048611c01	3682	}
wim	30:033048611c01	3683	else {
wim	30:033048611c01	3684	error("Error: LCD Controller type does not support native I2C interface\n\r");
wim	30:033048611c01	3685	}
wim	28:30fa94f7341c	3686	}
wim	28:30fa94f7341c	3687
wim	28:30fa94f7341c	3688	TextLCD_I2C_N::~TextLCD_I2C_N() {
wim	28:30fa94f7341c	3689	if (_bl != NULL) {delete _bl;} // BL pin
wim	28:30fa94f7341c	3690	}
wim	28:30fa94f7341c	3691
wim	28:30fa94f7341c	3692	// Not used in this mode
wim	28:30fa94f7341c	3693	void TextLCD_I2C_N::_setEnable(bool value) {
wim	28:30fa94f7341c	3694	}
wim	28:30fa94f7341c	3695
wim	28:30fa94f7341c	3696	// Set RS pin
wim	28:30fa94f7341c	3697	// Used for mbed pins, I2C bus expander or SPI shiftregister and native I2C or SPI
wim	28:30fa94f7341c	3698	void TextLCD_I2C_N::_setRS(bool value) {
wim	30:033048611c01	3699	// The controlbyte defines the meaning of the next byte. This next byte can either be data or command.
wim	30:033048611c01	3700	// Start Slaveaddress+RW b7 b6 b5 b4 b3 b2 b1 b0 b7...........b0 Stop
wim	30:033048611c01	3701	// Co RS RW 0 0 0 0 0 command or data
wim	30:033048611c01	3702	//
wim	30:033048611c01	3703	// C0=1 indicates that another controlbyte will follow after the next data or command byte
wim	30:033048611c01	3704	// RS=1 means that next byte is data, RS=0 means that next byte is command
wim	30:033048611c01	3705	// RW=0 means write to controller. RW=1 means that controller will be read from after the next command.
wim	30:033048611c01	3706	// Many native I2C controllers dont support this option and it is not used by this lib.
wim	30:033048611c01	3707	//
wim	30:033048611c01	3708
wim	28:30fa94f7341c	3709	if (value) {
wim	28:30fa94f7341c	3710	_controlbyte = 0x40; // Next byte is data, No more control bytes will follow
wim	28:30fa94f7341c	3711	}
wim	28:30fa94f7341c	3712	else {
wim	28:30fa94f7341c	3713	_controlbyte = 0x00; // Next byte is command, No more control bytes will follow
wim	28:30fa94f7341c	3714	}
wim	28:30fa94f7341c	3715	}
wim	28:30fa94f7341c	3716
wim	28:30fa94f7341c	3717	// Set BL pin
wim	28:30fa94f7341c	3718	void TextLCD_I2C_N::_setBL(bool value) {
wim	28:30fa94f7341c	3719	if (_bl) {
wim	28:30fa94f7341c	3720	_bl->write(value);
wim	28:30fa94f7341c	3721	}
wim	28:30fa94f7341c	3722	}
wim	29:a3663151aa65	3723
wim	29:a3663151aa65	3724	// Not used in this mode
wim	29:a3663151aa65	3725	void TextLCD_I2C_N::_setData(int value) {
wim	29:a3663151aa65	3726	}
wim	29:a3663151aa65	3727
wim	28:30fa94f7341c	3728	// Write a byte using I2C
wim	28:30fa94f7341c	3729	void TextLCD_I2C_N::_writeByte(int value) {
wim	30:033048611c01	3730	// The controlbyte defines the meaning of the next byte. This next byte can either be data or command.
wim	30:033048611c01	3731	// Start Slaveaddress+RW b7 b6 b5 b4 b3 b2 b1 b0 b7...........b0 Stop
wim	30:033048611c01	3732	// Co RS RW 0 0 0 0 0 command or data
wim	30:033048611c01	3733	//
wim	30:033048611c01	3734	// C0=1 indicates that another controlbyte will follow after the next data or command byte
wim	30:033048611c01	3735	// RS=1 means that next byte is data, RS=0 means that next byte is command
wim	30:033048611c01	3736	// RW=0 means write to controller. RW=1 means that controller will be read from after the next command.
wim	30:033048611c01	3737	// Many native I2C controllers dont support this option and it is not used by this lib.
wim	30:033048611c01	3738	//
reedas	42:1962dc501f94	3739	char data[] = {(char)_controlbyte, (char)value};
wim	28:30fa94f7341c	3740
wim	32:59c4b8f648d4	3741	#if(LCD_I2C_ACK==1)
wim	32:59c4b8f648d4	3742	//Controllers that support ACK
wim	30:033048611c01	3743	_i2c->write(_slaveAddress, data, 2);
wim	32:59c4b8f648d4	3744	#else
wim	32:59c4b8f648d4	3745	//Controllers that dont support ACK
wim	37:ce348c002929	3746	//Note: This may be issue with some mbed platforms that dont fully/correctly support I2C byte operations.
wim	32:59c4b8f648d4	3747	_i2c->start();
wim	32:59c4b8f648d4	3748	_i2c->write(_slaveAddress);
wim	32:59c4b8f648d4	3749	_i2c->write(data[0]);
wim	32:59c4b8f648d4	3750	_i2c->write(data[1]);
wim	32:59c4b8f648d4	3751	_i2c->stop();
wim	32:59c4b8f648d4	3752	#endif
wim	28:30fa94f7341c	3753	}
wim	34:e5a0dcb43ecc	3754	#endif /* Native I2C */
wim	28:30fa94f7341c	3755	//-------- End TextLCD_I2C_N ------------
wim	28:30fa94f7341c	3756
wim	28:30fa94f7341c	3757
wim	25:6162b31128c9	3758	//--------- Start TextLCD_SPI_N ---------
wim	34:e5a0dcb43ecc	3759	#if(LCD_SPI_N == 1) /* Native SPI bus */
wim	30:033048611c01	3760	/** Create a TextLCD interface using a controller with a native SPI4 interface
Sissors	24:fb3399713710	3761	*
Sissors	24:fb3399713710	3762	* @param spi SPI Bus
Sissors	24:fb3399713710	3763	* @param cs chip select pin (active low)
wim	25:6162b31128c9	3764	* @param rs Instruction/data control line
Sissors	24:fb3399713710	3765	* @param type Sets the panel size/addressing mode (default = LCD16x2)
wim	25:6162b31128c9	3766	* @param bl Backlight control line (optional, default = NC)
wim	26:bd897a001012	3767	* @param ctrl LCD controller (default = ST7032_3V3)
wim	25:6162b31128c9	3768	*/
wim	25:6162b31128c9	3769	TextLCD_SPI_N::TextLCD_SPI_N(SPI *spi, PinName cs, PinName rs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim	25:6162b31128c9	3770	TextLCD_Base(type, ctrl),
wim	25:6162b31128c9	3771	_spi(spi),
wim	25:6162b31128c9	3772	_cs(cs),
wim	25:6162b31128c9	3773	_rs(rs) {
Sissors	24:fb3399713710	3774
wim	32:59c4b8f648d4	3775	// Init CS
wim	32:59c4b8f648d4	3776	_cs = 1;
wim	32:59c4b8f648d4	3777
wim	36:9f5f86dfd44a	3778	// Setup the spi for 8 bit data, high steady state clock,
wim	36:9f5f86dfd44a	3779	// rising edge capture, with a 500KHz or 1MHz clock rate
wim	36:9f5f86dfd44a	3780	// _spi->format(8,3);
wim	37:ce348c002929	3781	// _spi->frequency(500000);
wim	36:9f5f86dfd44a	3782	// _spi->frequency(1000000);
wim	36:9f5f86dfd44a	3783
Sissors	24:fb3399713710	3784	// Setup the spi for 8 bit data, low steady state clock,
Sissors	24:fb3399713710	3785	// rising edge capture, with a 500KHz or 1MHz clock rate
Sissors	24:fb3399713710	3786	_spi->format(8,0);
wim	36:9f5f86dfd44a	3787	// _spi->frequency(500000);
Sissors	24:fb3399713710	3788	_spi->frequency(1000000);
wim	36:9f5f86dfd44a	3789
Sissors	24:fb3399713710	3790	// The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
Sissors	24:fb3399713710	3791	if (bl != NC) {
Sissors	24:fb3399713710	3792	_bl = new DigitalOut(bl); //Construct new pin
Sissors	24:fb3399713710	3793	_bl->write(0); //Deactivate
Sissors	24:fb3399713710	3794	}
Sissors	24:fb3399713710	3795	else {
Sissors	24:fb3399713710	3796	// No Hardware Backlight pin
Sissors	24:fb3399713710	3797	_bl = NULL; //Construct dummy pin
Sissors	24:fb3399713710	3798	}
wim	30:033048611c01	3799
wim	30:033048611c01	3800	//Sanity check
wim	30:033048611c01	3801	if (_ctrl & LCD_C_SPI4) {
wim	36:9f5f86dfd44a	3802	_init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim	36:9f5f86dfd44a	3803	// ST7070 must set datalength to 8 bits!
wim	30:033048611c01	3804	}
wim	30:033048611c01	3805	else {
wim	30:033048611c01	3806	error("Error: LCD Controller type does not support native SPI4 interface\n\r");
wim	30:033048611c01	3807	}
Sissors	24:fb3399713710	3808	}
Sissors	24:fb3399713710	3809
wim	25:6162b31128c9	3810	TextLCD_SPI_N::~TextLCD_SPI_N() {
Sissors	24:fb3399713710	3811	if (_bl != NULL) {delete _bl;} // BL pin
Sissors	24:fb3399713710	3812	}
Sissors	24:fb3399713710	3813
Sissors	24:fb3399713710	3814	// Not used in this mode
wim	25:6162b31128c9	3815	void TextLCD_SPI_N::_setEnable(bool value) {
Sissors	24:fb3399713710	3816	}
Sissors	24:fb3399713710	3817
Sissors	24:fb3399713710	3818	// Set RS pin
wim	36:9f5f86dfd44a	3819	// Used for mbed pins, I2C bus expander or SPI shiftregister, SPI_N
wim	25:6162b31128c9	3820	void TextLCD_SPI_N::_setRS(bool value) {
Sissors	24:fb3399713710	3821	_rs = value;
Sissors	24:fb3399713710	3822	}
Sissors	24:fb3399713710	3823
Sissors	24:fb3399713710	3824	// Set BL pin
wim	25:6162b31128c9	3825	void TextLCD_SPI_N::_setBL(bool value) {
wim	26:bd897a001012	3826	if (_bl) {
Sissors	24:fb3399713710	3827	_bl->write(value);
wim	26:bd897a001012	3828	}
Sissors	24:fb3399713710	3829	}
Sissors	24:fb3399713710	3830
wim	29:a3663151aa65	3831	// Not used in this mode
wim	29:a3663151aa65	3832	void TextLCD_SPI_N::_setData(int value) {
wim	29:a3663151aa65	3833	}
wim	29:a3663151aa65	3834
Sissors	24:fb3399713710	3835	// Write a byte using SPI
wim	25:6162b31128c9	3836	void TextLCD_SPI_N::_writeByte(int value) {
Sissors	24:fb3399713710	3837	_cs = 0;
Sissors	24:fb3399713710	3838	wait_us(1);
Sissors	24:fb3399713710	3839	_spi->write(value);
Sissors	24:fb3399713710	3840	wait_us(1);
Sissors	24:fb3399713710	3841	_cs = 1;
Sissors	24:fb3399713710	3842	}
wim	34:e5a0dcb43ecc	3843	#endif /* Native SPI bus */
wim	25:6162b31128c9	3844	//-------- End TextLCD_SPI_N ------------
wim	21:9eb628d9e164	3845
wim	21:9eb628d9e164	3846
wim	36:9f5f86dfd44a	3847	//-------- Start TextLCD_SPI_N_3_8 --------
wim	36:9f5f86dfd44a	3848	#if(LCD_SPI_N_3_8 == 1) /* Native SPI bus */
wim	36:9f5f86dfd44a	3849
wim	36:9f5f86dfd44a	3850	/** Create a TextLCD interface using a controller with a native SPI3 8 bits interface
wim	36:9f5f86dfd44a	3851	* This mode is supported by ST7070. Note that implementation in TexTLCD is not very efficient due to
wim	36:9f5f86dfd44a	3852	* structure of the TextLCD library: each databyte is written separately and requires a separate 'count command' set to 1 byte.
wim	36:9f5f86dfd44a	3853	*
wim	36:9f5f86dfd44a	3854	* @param spi SPI Bus
wim	36:9f5f86dfd44a	3855	* @param cs chip select pin (active low)
wim	36:9f5f86dfd44a	3856	* @param type Sets the panel size/addressing mode (default = LCD16x2)
wim	36:9f5f86dfd44a	3857	* @param bl Backlight control line (optional, default = NC)
wim	36:9f5f86dfd44a	3858	* @param ctrl LCD controller (default = ST7070)
wim	36:9f5f86dfd44a	3859	*/
wim	36:9f5f86dfd44a	3860	TextLCD_SPI_N_3_8::TextLCD_SPI_N_3_8(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim	36:9f5f86dfd44a	3861	TextLCD_Base(type, ctrl),
wim	36:9f5f86dfd44a	3862	_spi(spi),
wim	36:9f5f86dfd44a	3863	_cs(cs) {
wim	36:9f5f86dfd44a	3864
wim	36:9f5f86dfd44a	3865	// Init CS
wim	36:9f5f86dfd44a	3866	_cs = 1;
wim	36:9f5f86dfd44a	3867
wim	36:9f5f86dfd44a	3868	// Setup the spi for 8 bit data, high steady state clock,
wim	36:9f5f86dfd44a	3869	// rising edge capture, with a 500KHz or 1MHz clock rate
wim	36:9f5f86dfd44a	3870	// _spi->format(8,3);
wim	37:ce348c002929	3871	// _spi->frequency(500000);
wim	36:9f5f86dfd44a	3872	// _spi->frequency(1000000);
wim	36:9f5f86dfd44a	3873
wim	36:9f5f86dfd44a	3874	// Setup the spi for 8 bit data, low steady state clock,
wim	36:9f5f86dfd44a	3875	// rising edge capture, with a 500KHz or 1MHz clock rate
wim	36:9f5f86dfd44a	3876	_spi->format(8,0);
wim	36:9f5f86dfd44a	3877	// _spi->frequency(500000);
wim	36:9f5f86dfd44a	3878	_spi->frequency(1000000);
wim	36:9f5f86dfd44a	3879
wim	36:9f5f86dfd44a	3880
wim	36:9f5f86dfd44a	3881	// The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim	36:9f5f86dfd44a	3882	if (bl != NC) {
wim	36:9f5f86dfd44a	3883	_bl = new DigitalOut(bl); //Construct new pin
wim	36:9f5f86dfd44a	3884	_bl->write(0); //Deactivate
wim	36:9f5f86dfd44a	3885	}
wim	36:9f5f86dfd44a	3886	else {
wim	36:9f5f86dfd44a	3887	// No Hardware Backlight pin
wim	36:9f5f86dfd44a	3888	_bl = NULL; //Construct dummy pin
wim	36:9f5f86dfd44a	3889	}
wim	36:9f5f86dfd44a	3890
wim	36:9f5f86dfd44a	3891	//Sanity check
wim	36:9f5f86dfd44a	3892	if (_ctrl & LCD_C_SPI3_8) {
wim	36:9f5f86dfd44a	3893	_init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim	36:9f5f86dfd44a	3894	}
wim	36:9f5f86dfd44a	3895	else {
wim	36:9f5f86dfd44a	3896	error("Error: LCD Controller type does not support native SPI3 8 bits interface\n\r");
wim	36:9f5f86dfd44a	3897	}
wim	36:9f5f86dfd44a	3898	}
wim	36:9f5f86dfd44a	3899
wim	36:9f5f86dfd44a	3900	TextLCD_SPI_N_3_8::~TextLCD_SPI_N_3_8() {
wim	36:9f5f86dfd44a	3901	if (_bl != NULL) {delete _bl;} // BL pin
wim	36:9f5f86dfd44a	3902	}
wim	36:9f5f86dfd44a	3903
wim	36:9f5f86dfd44a	3904	// Not used in this mode
wim	36:9f5f86dfd44a	3905	void TextLCD_SPI_N_3_8::_setEnable(bool value) {
wim	36:9f5f86dfd44a	3906	}
wim	36:9f5f86dfd44a	3907
wim	36:9f5f86dfd44a	3908	// Used for mbed pins, I2C bus expander or SPI shiftregister, SPI_N
wim	36:9f5f86dfd44a	3909	// RS=1 means that next byte is data, RS=0 means that next byte is command
wim	36:9f5f86dfd44a	3910	void TextLCD_SPI_N_3_8::_setRS(bool value) {
wim	36:9f5f86dfd44a	3911
wim	36:9f5f86dfd44a	3912	if (value) {
wim	36:9f5f86dfd44a	3913	_controlbyte = 0x01; // Next byte is data, No more control bytes will follow
wim	36:9f5f86dfd44a	3914	}
wim	36:9f5f86dfd44a	3915	else {
wim	36:9f5f86dfd44a	3916	_controlbyte = 0x00; // Next byte is command, No more control bytes will follow
wim	36:9f5f86dfd44a	3917	}
wim	36:9f5f86dfd44a	3918	}
wim	36:9f5f86dfd44a	3919
wim	36:9f5f86dfd44a	3920	// Set BL pin
wim	36:9f5f86dfd44a	3921	void TextLCD_SPI_N_3_8::_setBL(bool value) {
wim	36:9f5f86dfd44a	3922	if (_bl) {
wim	36:9f5f86dfd44a	3923	_bl->write(value);
wim	36:9f5f86dfd44a	3924	}
wim	36:9f5f86dfd44a	3925	}
wim	36:9f5f86dfd44a	3926
wim	36:9f5f86dfd44a	3927	// Not used in this mode
wim	36:9f5f86dfd44a	3928	void TextLCD_SPI_N_3_8::_setData(int value) {
wim	36:9f5f86dfd44a	3929	}
wim	36:9f5f86dfd44a	3930
wim	36:9f5f86dfd44a	3931	// Write a byte using SPI3 8 bits mode (ST7070)
wim	36:9f5f86dfd44a	3932	void TextLCD_SPI_N_3_8::_writeByte(int value) {
wim	36:9f5f86dfd44a	3933
wim	36:9f5f86dfd44a	3934	if (_controlbyte == 0x00) { // Byte is command
wim	36:9f5f86dfd44a	3935	_cs = 0;
wim	36:9f5f86dfd44a	3936	wait_us(1);
wim	36:9f5f86dfd44a	3937	_spi->write(value);
wim	36:9f5f86dfd44a	3938	wait_us(1);
wim	36:9f5f86dfd44a	3939	_cs = 1;
wim	36:9f5f86dfd44a	3940	}
wim	36:9f5f86dfd44a	3941	else { // Byte is data
wim	36:9f5f86dfd44a	3942	// Select Extended Instr Set
wim	36:9f5f86dfd44a	3943	_cs = 0;
wim	36:9f5f86dfd44a	3944	wait_us(1);
wim	36:9f5f86dfd44a	3945	_spi->write(0x20 \| _function \| 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1));
wim	36:9f5f86dfd44a	3946	wait_us(1);
wim	36:9f5f86dfd44a	3947	_cs = 1;
wim	36:9f5f86dfd44a	3948
wim	36:9f5f86dfd44a	3949	wait_us(40); // Wait until command has finished...
wim	36:9f5f86dfd44a	3950
wim	36:9f5f86dfd44a	3951	// Set Count to 1 databyte
wim	36:9f5f86dfd44a	3952	_cs = 0;
wim	36:9f5f86dfd44a	3953	wait_us(1);
wim	36:9f5f86dfd44a	3954	_spi->write(0x80); // Set display data length, 1 L6 L5 L4 L3 L2 L1 L0 (Instr Set = 1)
wim	36:9f5f86dfd44a	3955	wait_us(1);
wim	36:9f5f86dfd44a	3956	_cs = 1;
wim	36:9f5f86dfd44a	3957
wim	36:9f5f86dfd44a	3958	wait_us(40);
wim	36:9f5f86dfd44a	3959
wim	36:9f5f86dfd44a	3960	// Write 1 databyte
wim	36:9f5f86dfd44a	3961	_cs = 0;
wim	36:9f5f86dfd44a	3962	wait_us(1);
wim	36:9f5f86dfd44a	3963	_spi->write(value); // Write data (Instr Set = 1)
wim	36:9f5f86dfd44a	3964	wait_us(1);
wim	36:9f5f86dfd44a	3965	_cs = 1;
wim	36:9f5f86dfd44a	3966
wim	36:9f5f86dfd44a	3967	wait_us(40);
wim	36:9f5f86dfd44a	3968
wim	36:9f5f86dfd44a	3969	// Select Standard Instr Set
wim	36:9f5f86dfd44a	3970	_cs = 0;
wim	36:9f5f86dfd44a	3971	wait_us(1);
wim	36:9f5f86dfd44a	3972	_spi->write(0x20 \| _function); // Set function, 0 0 1 DL N EXT=0 x x (Select Instr Set = 0));
wim	36:9f5f86dfd44a	3973	wait_us(1);
wim	36:9f5f86dfd44a	3974	_cs = 1;
wim	36:9f5f86dfd44a	3975	}
wim	36:9f5f86dfd44a	3976	}
wim	36:9f5f86dfd44a	3977	#endif /* Native SPI bus */
wim	36:9f5f86dfd44a	3978	//------- End TextLCD_SPI_N_3_8 -----------
wim	36:9f5f86dfd44a	3979
wim	36:9f5f86dfd44a	3980
wim	30:033048611c01	3981	//-------- Start TextLCD_SPI_N_3_9 --------
wim	34:e5a0dcb43ecc	3982	#if(LCD_SPI_N_3_9 == 1) /* Native SPI bus */
wim	34:e5a0dcb43ecc	3983	//Code checked out on logic analyser. Not yet tested on hardware..
wim	30:033048611c01	3984
wim	30:033048611c01	3985	/** Create a TextLCD interface using a controller with a native SPI3 9 bits interface
wim	30:033048611c01	3986	*
wim	30:033048611c01	3987	* @param spi SPI Bus
wim	30:033048611c01	3988	* @param cs chip select pin (active low)
wim	30:033048611c01	3989	* @param type Sets the panel size/addressing mode (default = LCD16x2)
wim	30:033048611c01	3990	* @param bl Backlight control line (optional, default = NC)
wim	30:033048611c01	3991	* @param ctrl LCD controller (default = AIP31068)
wim	30:033048611c01	3992	*/
wim	30:033048611c01	3993	TextLCD_SPI_N_3_9::TextLCD_SPI_N_3_9(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim	30:033048611c01	3994	TextLCD_Base(type, ctrl),
wim	30:033048611c01	3995	_spi(spi),
wim	33:900a94bc7585	3996	_cs(cs) {
wim	32:59c4b8f648d4	3997
wim	32:59c4b8f648d4	3998	// Init CS
wim	32:59c4b8f648d4	3999	_cs = 1;
wim	32:59c4b8f648d4	4000
wim	34:e5a0dcb43ecc	4001	// Setup the spi for 9 bit data, high steady state clock,
wim	30:033048611c01	4002	// rising edge capture, with a 500KHz or 1MHz clock rate
wim	32:59c4b8f648d4	4003	_spi->format(9,3);
wim	30:033048611c01	4004	_spi->frequency(1000000);
wim	30:033048611c01	4005
wim	30:033048611c01	4006	// The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim	30:033048611c01	4007	if (bl != NC) {
wim	30:033048611c01	4008	_bl = new DigitalOut(bl); //Construct new pin
wim	30:033048611c01	4009	_bl->write(0); //Deactivate
wim	30:033048611c01	4010	}
wim	30:033048611c01	4011	else {
wim	30:033048611c01	4012	// No Hardware Backlight pin
wim	30:033048611c01	4013	_bl = NULL; //Construct dummy pin
wim	30:033048611c01	4014	}
wim	30:033048611c01	4015
wim	30:033048611c01	4016	//Sanity check
wim	36:9f5f86dfd44a	4017	if (_ctrl & LCD_C_SPI3_9) {
wim	36:9f5f86dfd44a	4018	_init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim	30:033048611c01	4019	}
wim	30:033048611c01	4020	else {
wim	30:033048611c01	4021	error("Error: LCD Controller type does not support native SPI3 9 bits interface\n\r");
wim	30:033048611c01	4022	}
wim	30:033048611c01	4023	}
wim	30:033048611c01	4024
wim	30:033048611c01	4025	TextLCD_SPI_N_3_9::~TextLCD_SPI_N_3_9() {
wim	30:033048611c01	4026	if (_bl != NULL) {delete _bl;} // BL pin
wim	30:033048611c01	4027	}
wim	30:033048611c01	4028
wim	30:033048611c01	4029	// Not used in this mode
wim	30:033048611c01	4030	void TextLCD_SPI_N_3_9::_setEnable(bool value) {
wim	30:033048611c01	4031	}
wim	30:033048611c01	4032
wim	30:033048611c01	4033	// Set RS pin
wim	30:033048611c01	4034	// Used for mbed pins, I2C bus expander or SPI shiftregister
wim	30:033048611c01	4035	void TextLCD_SPI_N_3_9::_setRS(bool value) {
wim	30:033048611c01	4036	// The controlbits define the meaning of the next byte. This next byte can either be data or command.
wim	30:033048611c01	4037	// b8 b7...........b0
wim	30:033048611c01	4038	// RS command or data
wim	30:033048611c01	4039	//
wim	30:033048611c01	4040	// RS=1 means that next byte is data, RS=0 means that next byte is command
wim	30:033048611c01	4041	//
wim	30:033048611c01	4042
wim	30:033048611c01	4043	if (value) {
wim	30:033048611c01	4044	_controlbyte = 0x01; // Next byte is data
wim	30:033048611c01	4045	}
wim	30:033048611c01	4046	else {
wim	30:033048611c01	4047	_controlbyte = 0x00; // Next byte is command
wim	34:e5a0dcb43ecc	4048	}
wim	30:033048611c01	4049	}
wim	30:033048611c01	4050
wim	30:033048611c01	4051	// Set BL pin
wim	30:033048611c01	4052	void TextLCD_SPI_N_3_9::_setBL(bool value) {
wim	30:033048611c01	4053	if (_bl) {
wim	30:033048611c01	4054	_bl->write(value);
wim	30:033048611c01	4055	}
wim	30:033048611c01	4056	}
wim	30:033048611c01	4057
wim	30:033048611c01	4058	// Not used in this mode
wim	30:033048611c01	4059	void TextLCD_SPI_N_3_9::_setData(int value) {
wim	30:033048611c01	4060	}
wim	30:033048611c01	4061
wim	30:033048611c01	4062	// Write a byte using SPI3 9 bits mode
wim	30:033048611c01	4063	void TextLCD_SPI_N_3_9::_writeByte(int value) {
wim	30:033048611c01	4064	_cs = 0;
wim	30:033048611c01	4065	wait_us(1);
wim	30:033048611c01	4066	_spi->write( (_controlbyte << 8) \| (value & 0xFF));
wim	30:033048611c01	4067	wait_us(1);
wim	30:033048611c01	4068	_cs = 1;
wim	30:033048611c01	4069	}
wim	34:e5a0dcb43ecc	4070	#endif /* Native SPI bus */
wim	30:033048611c01	4071	//------- End TextLCD_SPI_N_3_9 -----------
wim	34:e5a0dcb43ecc	4072
wim	34:e5a0dcb43ecc	4073
wim	30:033048611c01	4074	//------- Start TextLCD_SPI_N_3_10 --------
wim	34:e5a0dcb43ecc	4075	#if(LCD_SPI_N_3_10 == 1) /* Native SPI bus */
wim	30:033048611c01	4076
wim	30:033048611c01	4077	/** Create a TextLCD interface using a controller with a native SPI3 10 bits interface
wim	30:033048611c01	4078	*
wim	30:033048611c01	4079	* @param spi SPI Bus
wim	30:033048611c01	4080	* @param cs chip select pin (active low)
wim	30:033048611c01	4081	* @param type Sets the panel size/addressing mode (default = LCD16x2)
wim	30:033048611c01	4082	* @param bl Backlight control line (optional, default = NC)
wim	30:033048611c01	4083	* @param ctrl LCD controller (default = AIP31068)
wim	30:033048611c01	4084	*/
wim	30:033048611c01	4085	TextLCD_SPI_N_3_10::TextLCD_SPI_N_3_10(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim	30:033048611c01	4086	TextLCD_Base(type, ctrl),
wim	30:033048611c01	4087	_spi(spi),
wim	30:033048611c01	4088	_cs(cs) {
wim	30:033048611c01	4089
wim	32:59c4b8f648d4	4090	// Init CS
wim	32:59c4b8f648d4	4091	_cs = 1;
wim	32:59c4b8f648d4	4092
wim	30:033048611c01	4093	// Setup the spi for 10 bit data, low steady state clock,
wim	30:033048611c01	4094	// rising edge capture, with a 500KHz or 1MHz clock rate
wim	30:033048611c01	4095	_spi->format(10,0);
wim	30:033048611c01	4096	_spi->frequency(1000000);
wim	30:033048611c01	4097
wim	30:033048611c01	4098	// The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim	30:033048611c01	4099	if (bl != NC) {
wim	30:033048611c01	4100	_bl = new DigitalOut(bl); //Construct new pin
wim	30:033048611c01	4101	_bl->write(0); //Deactivate
wim	30:033048611c01	4102	}
wim	30:033048611c01	4103	else {
wim	30:033048611c01	4104	// No Hardware Backlight pin
wim	30:033048611c01	4105	_bl = NULL; //Construct dummy pin
wim	30:033048611c01	4106	}
wim	30:033048611c01	4107
wim	30:033048611c01	4108	//Sanity check
wim	30:033048611c01	4109	if (_ctrl & LCD_C_SPI3_10) {
wim	36:9f5f86dfd44a	4110	_init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim	30:033048611c01	4111	}
wim	30:033048611c01	4112	else {
wim	30:033048611c01	4113	error("Error: LCD Controller type does not support native SPI3 10 bits interface\n\r");
wim	30:033048611c01	4114	}
wim	30:033048611c01	4115	}
wim	30:033048611c01	4116
wim	30:033048611c01	4117	TextLCD_SPI_N_3_10::~TextLCD_SPI_N_3_10() {
wim	30:033048611c01	4118	if (_bl != NULL) {delete _bl;} // BL pin
wim	30:033048611c01	4119	}
wim	30:033048611c01	4120
wim	30:033048611c01	4121	// Not used in this mode
wim	30:033048611c01	4122	void TextLCD_SPI_N_3_10::_setEnable(bool value) {
wim	30:033048611c01	4123	}
wim	30:033048611c01	4124
wim	30:033048611c01	4125	// Set RS pin
wim	30:033048611c01	4126	// Used for mbed pins, I2C bus expander or SPI shiftregister
wim	30:033048611c01	4127	void TextLCD_SPI_N_3_10::_setRS(bool value) {
wim	30:033048611c01	4128	// The controlbits define the meaning of the next byte. This next byte can either be data or command.
wim	30:033048611c01	4129	// b9 b8 b7...........b0
wim	30:033048611c01	4130	// RS RW command or data
wim	30:033048611c01	4131	//
wim	30:033048611c01	4132	// RS=1 means that next byte is data, RS=0 means that next byte is command
wim	30:033048611c01	4133	// RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim	30:033048611c01	4134	//
wim	30:033048611c01	4135
wim	30:033048611c01	4136	if (value) {
wim	30:033048611c01	4137	_controlbyte = 0x02; // Next byte is data
wim	30:033048611c01	4138	}
wim	30:033048611c01	4139	else {
wim	30:033048611c01	4140	_controlbyte = 0x00; // Next byte is command
wim	34:e5a0dcb43ecc	4141	}
wim	30:033048611c01	4142	}
wim	30:033048611c01	4143
wim	30:033048611c01	4144	// Set BL pin
wim	30:033048611c01	4145	void TextLCD_SPI_N_3_10::_setBL(bool value) {
wim	30:033048611c01	4146	if (_bl) {
wim	30:033048611c01	4147	_bl->write(value);
wim	30:033048611c01	4148	}
wim	30:033048611c01	4149	}
wim	30:033048611c01	4150
wim	30:033048611c01	4151	// Not used in this mode
wim	30:033048611c01	4152	void TextLCD_SPI_N_3_10::_setData(int value) {
wim	30:033048611c01	4153	}
wim	30:033048611c01	4154
wim	30:033048611c01	4155	// Write a byte using SPI3 10 bits mode
wim	30:033048611c01	4156	void TextLCD_SPI_N_3_10::_writeByte(int value) {
wim	30:033048611c01	4157	_cs = 0;
wim	30:033048611c01	4158	wait_us(1);
wim	30:033048611c01	4159	_spi->write( (_controlbyte << 8) \| (value & 0xFF));
wim	30:033048611c01	4160	wait_us(1);
wim	30:033048611c01	4161	_cs = 1;
wim	30:033048611c01	4162	}
wim	34:e5a0dcb43ecc	4163	#endif /* Native SPI bus */
wim	30:033048611c01	4164	//------- End TextLCD_SPI_N_3_10 ----------
wim	34:e5a0dcb43ecc	4165
wim	32:59c4b8f648d4	4166
wim	32:59c4b8f648d4	4167	//------- Start TextLCD_SPI_N_3_16 --------
wim	34:e5a0dcb43ecc	4168	#if(LCD_SPI_N_3_16 == 1) /* Native SPI bus */
wim	32:59c4b8f648d4	4169
wim	32:59c4b8f648d4	4170	/** Create a TextLCD interface using a controller with a native SPI3 16 bits interface
wim	32:59c4b8f648d4	4171	*
wim	32:59c4b8f648d4	4172	* @param spi SPI Bus
wim	32:59c4b8f648d4	4173	* @param cs chip select pin (active low)
wim	32:59c4b8f648d4	4174	* @param type Sets the panel size/addressing mode (default = LCD16x2)
wim	32:59c4b8f648d4	4175	* @param bl Backlight control line (optional, default = NC)
wim	32:59c4b8f648d4	4176	* @param ctrl LCD controller (default = PT6314)
wim	32:59c4b8f648d4	4177	*/
wim	32:59c4b8f648d4	4178	TextLCD_SPI_N_3_16::TextLCD_SPI_N_3_16(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim	32:59c4b8f648d4	4179	TextLCD_Base(type, ctrl),
wim	32:59c4b8f648d4	4180	_spi(spi),
wim	32:59c4b8f648d4	4181	_cs(cs) {
wim	32:59c4b8f648d4	4182
wim	32:59c4b8f648d4	4183	// Init CS
wim	32:59c4b8f648d4	4184	_cs = 1;
wim	32:59c4b8f648d4	4185
wim	32:59c4b8f648d4	4186	// Setup the spi for 8 bit data, low steady state clock,
wim	32:59c4b8f648d4	4187	// rising edge capture, with a 500KHz or 1MHz clock rate
wim	32:59c4b8f648d4	4188	_spi->format(8,0);
wim	32:59c4b8f648d4	4189	_spi->frequency(1000000);
wim	32:59c4b8f648d4	4190
wim	32:59c4b8f648d4	4191	// The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim	32:59c4b8f648d4	4192	if (bl != NC) {
wim	32:59c4b8f648d4	4193	_bl = new DigitalOut(bl); //Construct new pin
wim	32:59c4b8f648d4	4194	_bl->write(0); //Deactivate
wim	32:59c4b8f648d4	4195	}
wim	32:59c4b8f648d4	4196	else {
wim	32:59c4b8f648d4	4197	// No Hardware Backlight pin
wim	32:59c4b8f648d4	4198	_bl = NULL; //Construct dummy pin
wim	32:59c4b8f648d4	4199	}
wim	32:59c4b8f648d4	4200
wim	32:59c4b8f648d4	4201	//Sanity check
wim	32:59c4b8f648d4	4202	if (_ctrl & LCD_C_SPI3_16) {
wim	36:9f5f86dfd44a	4203	_init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim	32:59c4b8f648d4	4204	}
wim	32:59c4b8f648d4	4205	else {
wim	32:59c4b8f648d4	4206	error("Error: LCD Controller type does not support native SPI3 16 bits interface\n\r");
wim	32:59c4b8f648d4	4207	}
wim	32:59c4b8f648d4	4208	}
wim	32:59c4b8f648d4	4209
wim	32:59c4b8f648d4	4210	TextLCD_SPI_N_3_16::~TextLCD_SPI_N_3_16() {
wim	32:59c4b8f648d4	4211	if (_bl != NULL) {delete _bl;} // BL pin
wim	32:59c4b8f648d4	4212	}
wim	32:59c4b8f648d4	4213
wim	32:59c4b8f648d4	4214	// Not used in this mode
wim	32:59c4b8f648d4	4215	void TextLCD_SPI_N_3_16::_setEnable(bool value) {
wim	32:59c4b8f648d4	4216	}
wim	32:59c4b8f648d4	4217
wim	32:59c4b8f648d4	4218	// Set RS pin
wim	32:59c4b8f648d4	4219	// Used for mbed pins, I2C bus expander or SPI shiftregister
wim	32:59c4b8f648d4	4220	void TextLCD_SPI_N_3_16::_setRS(bool value) {
wim	32:59c4b8f648d4	4221	// The 16bit mode is split in 2 bytes. The first byte is for synchronisation and controlbits. The controlbits define the meaning of the next byte.
wim	32:59c4b8f648d4	4222	// The 8 actual bits represent either a data or a command byte.
wim	32:59c4b8f648d4	4223	// b15 b14 b13 b12 b11 b10 b9 b8 - b7 b6 b5 b4 b3 b2 b1 b0
wim	32:59c4b8f648d4	4224	// 1 1 1 1 1 RW RS 0 d7 d6 d5 d4 d3 d2 d1 d0
wim	32:59c4b8f648d4	4225	//
wim	32:59c4b8f648d4	4226	// RS=1 means that next byte is data, RS=0 means that next byte is command
wim	32:59c4b8f648d4	4227	// RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim	32:59c4b8f648d4	4228	//
wim	32:59c4b8f648d4	4229
wim	32:59c4b8f648d4	4230	if (value) {
wim	32:59c4b8f648d4	4231	_controlbyte = 0xFA; // Next byte is data
wim	32:59c4b8f648d4	4232	}
wim	32:59c4b8f648d4	4233	else {
wim	32:59c4b8f648d4	4234	_controlbyte = 0xF8; // Next byte is command
wim	32:59c4b8f648d4	4235	}
wim	32:59c4b8f648d4	4236	}
wim	32:59c4b8f648d4	4237
wim	32:59c4b8f648d4	4238	// Set BL pin
wim	32:59c4b8f648d4	4239	void TextLCD_SPI_N_3_16::_setBL(bool value) {
wim	32:59c4b8f648d4	4240	if (_bl) {
wim	32:59c4b8f648d4	4241	_bl->write(value);
wim	32:59c4b8f648d4	4242	}
wim	32:59c4b8f648d4	4243	}
wim	32:59c4b8f648d4	4244
wim	32:59c4b8f648d4	4245	// Not used in this mode
wim	32:59c4b8f648d4	4246	void TextLCD_SPI_N_3_16::_setData(int value) {
wim	32:59c4b8f648d4	4247	}
wim	34:e5a0dcb43ecc	4248
wim	32:59c4b8f648d4	4249	// Write a byte using SPI3 16 bits mode
wim	32:59c4b8f648d4	4250	void TextLCD_SPI_N_3_16::_writeByte(int value) {
wim	32:59c4b8f648d4	4251	_cs = 0;
wim	32:59c4b8f648d4	4252	wait_us(1);
wim	32:59c4b8f648d4	4253
wim	32:59c4b8f648d4	4254	_spi->write(_controlbyte);
wim	32:59c4b8f648d4	4255
wim	32:59c4b8f648d4	4256	_spi->write(value);
wim	32:59c4b8f648d4	4257
wim	32:59c4b8f648d4	4258	wait_us(1);
wim	32:59c4b8f648d4	4259	_cs = 1;
wim	32:59c4b8f648d4	4260	}
wim	34:e5a0dcb43ecc	4261	#endif /* Native SPI bus */
wim	32:59c4b8f648d4	4262	//------- End TextLCD_SPI_N_3_16 ----------
wim	34:e5a0dcb43ecc	4263
wim	34:e5a0dcb43ecc	4264
wim	32:59c4b8f648d4	4265	//------- Start TextLCD_SPI_N_3_24 --------
wim	34:e5a0dcb43ecc	4266	#if(LCD_SPI_N_3_24 == 1) /* Native SPI bus */
wim	32:59c4b8f648d4	4267
wim	32:59c4b8f648d4	4268	/** Create a TextLCD interface using a controller with a native SPI3 24 bits interface
wim	32:59c4b8f648d4	4269	*
wim	32:59c4b8f648d4	4270	* @param spi SPI Bus
wim	32:59c4b8f648d4	4271	* @param cs chip select pin (active low)
wim	32:59c4b8f648d4	4272	* @param type Sets the panel size/addressing mode (default = LCD16x2)
wim	32:59c4b8f648d4	4273	* @param bl Backlight control line (optional, default = NC)
wim	32:59c4b8f648d4	4274	* @param ctrl LCD controller (default = SSD1803)
wim	32:59c4b8f648d4	4275	*/
wim	32:59c4b8f648d4	4276	TextLCD_SPI_N_3_24::TextLCD_SPI_N_3_24(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim	32:59c4b8f648d4	4277	TextLCD_Base(type, ctrl),
wim	32:59c4b8f648d4	4278	_spi(spi),
wim	32:59c4b8f648d4	4279	_cs(cs) {
wim	32:59c4b8f648d4	4280
wim	32:59c4b8f648d4	4281	// Init CS
wim	32:59c4b8f648d4	4282	_cs = 1;
wim	32:59c4b8f648d4	4283
wim	34:e5a0dcb43ecc	4284	// Setup the spi for 8 bit data, high steady state clock,
wim	32:59c4b8f648d4	4285	// rising edge capture, with a 500KHz or 1MHz clock rate
wim	34:e5a0dcb43ecc	4286	_spi->format(8,3);
wim	32:59c4b8f648d4	4287	_spi->frequency(1000000);
wim	32:59c4b8f648d4	4288
wim	32:59c4b8f648d4	4289	// The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim	32:59c4b8f648d4	4290	if (bl != NC) {
wim	32:59c4b8f648d4	4291	_bl = new DigitalOut(bl); //Construct new pin
wim	32:59c4b8f648d4	4292	_bl->write(0); //Deactivate
wim	32:59c4b8f648d4	4293	}
wim	32:59c4b8f648d4	4294	else {
wim	32:59c4b8f648d4	4295	// No Hardware Backlight pin
wim	32:59c4b8f648d4	4296	_bl = NULL; //Construct dummy pin
wim	32:59c4b8f648d4	4297	}
wim	32:59c4b8f648d4	4298
wim	32:59c4b8f648d4	4299	//Sanity check
wim	32:59c4b8f648d4	4300	if (_ctrl & LCD_C_SPI3_24) {
wim	36:9f5f86dfd44a	4301	_init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim	32:59c4b8f648d4	4302	}
wim	32:59c4b8f648d4	4303	else {
wim	32:59c4b8f648d4	4304	error("Error: LCD Controller type does not support native SPI3 24 bits interface\n\r");
wim	32:59c4b8f648d4	4305	}
wim	32:59c4b8f648d4	4306	}
wim	32:59c4b8f648d4	4307
wim	32:59c4b8f648d4	4308	TextLCD_SPI_N_3_24::~TextLCD_SPI_N_3_24() {
wim	32:59c4b8f648d4	4309	if (_bl != NULL) {delete _bl;} // BL pin
wim	32:59c4b8f648d4	4310	}
wim	32:59c4b8f648d4	4311
wim	32:59c4b8f648d4	4312	// Not used in this mode
wim	32:59c4b8f648d4	4313	void TextLCD_SPI_N_3_24::_setEnable(bool value) {
wim	32:59c4b8f648d4	4314	}
wim	32:59c4b8f648d4	4315
wim	32:59c4b8f648d4	4316	// Set RS pin
wim	32:59c4b8f648d4	4317	// Used for mbed pins, I2C bus expander or SPI shiftregister
wim	32:59c4b8f648d4	4318	void TextLCD_SPI_N_3_24::_setRS(bool value) {
wim	32:59c4b8f648d4	4319	// The 24bit mode is split in 3 bytes. The first byte is for synchronisation and controlbits. The controlbits define the meaning of the next two bytes.
wim	32:59c4b8f648d4	4320	// Each byte encodes 4 actual bits. The 8 actual bits represent either a data or a command byte.
wim	32:59c4b8f648d4	4321	// b23 b22 b21 b20 b19 b18 b17 b16 - b15 b14 b13 b12 b11 b10 b9 b8 - b7 b6 b5 b4 b3 b2 b1 b0
wim	32:59c4b8f648d4	4322	// 1 1 1 1 1 RW RS 0 d0 d1 d2 d3 0 0 0 0 d4 d5 d6 d7 0 0 0 0
wim	32:59c4b8f648d4	4323	//
wim	32:59c4b8f648d4	4324	// RS=1 means that next byte is data, RS=0 means that next byte is command
wim	32:59c4b8f648d4	4325	// RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim	32:59c4b8f648d4	4326	//
wim	32:59c4b8f648d4	4327	// Note: SPI3_24 expects LSB first. This is inconsistent with regular SPI convention (and hardware) that sends MSB first.
wim	32:59c4b8f648d4	4328
wim	32:59c4b8f648d4	4329	if (value) {
wim	32:59c4b8f648d4	4330	_controlbyte = 0xFA; // Next byte is data
wim	32:59c4b8f648d4	4331	}
wim	32:59c4b8f648d4	4332	else {
wim	32:59c4b8f648d4	4333	_controlbyte = 0xF8; // Next byte is command
wim	34:e5a0dcb43ecc	4334	}
wim	32:59c4b8f648d4	4335	}
wim	32:59c4b8f648d4	4336
wim	32:59c4b8f648d4	4337	// Set BL pin
wim	32:59c4b8f648d4	4338	void TextLCD_SPI_N_3_24::_setBL(bool value) {
wim	32:59c4b8f648d4	4339	if (_bl) {
wim	32:59c4b8f648d4	4340	_bl->write(value);
wim	32:59c4b8f648d4	4341	}
wim	32:59c4b8f648d4	4342	}
wim	32:59c4b8f648d4	4343
wim	32:59c4b8f648d4	4344	// Not used in this mode
wim	32:59c4b8f648d4	4345	void TextLCD_SPI_N_3_24::_setData(int value) {
wim	32:59c4b8f648d4	4346	}
wim	32:59c4b8f648d4	4347
wim	32:59c4b8f648d4	4348	//Mapping table to flip the bits around cause SPI3_24 expects LSB first.
wim	32:59c4b8f648d4	4349	const uint8_t map3_24[16] = {0x00, 0x80, 0x40, 0xC0, 0x20, 0xA0, 0x60, 0xE0, 0x10, 0x90, 0x50, 0xD0, 0x30, 0xB0, 0x70, 0xF0};
wim	32:59c4b8f648d4	4350
wim	32:59c4b8f648d4	4351	// Write a byte using SPI3 24 bits mode
wim	32:59c4b8f648d4	4352	void TextLCD_SPI_N_3_24::_writeByte(int value) {
wim	32:59c4b8f648d4	4353	_cs = 0;
wim	32:59c4b8f648d4	4354	wait_us(1);
wim	32:59c4b8f648d4	4355	_spi->write(_controlbyte);
wim	32:59c4b8f648d4	4356
wim	32:59c4b8f648d4	4357	//Map and send the LSB nibble
wim	32:59c4b8f648d4	4358	_spi->write( map3_24[value & 0x0F]);
wim	32:59c4b8f648d4	4359
wim	32:59c4b8f648d4	4360	//Map and send the MSB nibble
wim	32:59c4b8f648d4	4361	_spi->write( map3_24[(value >> 4) & 0x0F]);
wim	32:59c4b8f648d4	4362
wim	32:59c4b8f648d4	4363	wait_us(1);
wim	32:59c4b8f648d4	4364	_cs = 1;
wim	32:59c4b8f648d4	4365	}
wim	34:e5a0dcb43ecc	4366	#endif /* Native SPI bus */
wim	32:59c4b8f648d4	4367	//------- End TextLCD_SPI_N_3_24 ----------

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Type:	Library
Created:	14 Jan 2020
Imports:	5
Forks:	0
Commits:	43
Dependents:	0
Dependencies:	0
Followers:	1

TextLCD.cpp@42:1962dc501f94, 2020-01-14 (annotated)

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