Aleksandrs Gumenuks / MaximInterface_Extended

Extended MaximInterface

Dependents:   mbed_DS28EC20_GPIO

Devices/DS2482_DS2484.cpp@0:f77ad7f72d04, 2017-11-06 (annotated)

Committer:
IanBenzMaxim
Date:
Mon Nov 06 14:39:18 2017 -0600
Revision:
0:f77ad7f72d04
Child:
6:a8c83a2e6fa4
Initial commit.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
IanBenzMaxim 0:f77ad7f72d04 1 /*******************************************************************************
IanBenzMaxim 0:f77ad7f72d04 2 * Copyright (C) 2017 Maxim Integrated Products, Inc., All Rights Reserved.
IanBenzMaxim 0:f77ad7f72d04 3 *
IanBenzMaxim 0:f77ad7f72d04 4 * Permission is hereby granted, free of charge, to any person obtaining a
IanBenzMaxim 0:f77ad7f72d04 5 * copy of this software and associated documentation files (the "Software"),
IanBenzMaxim 0:f77ad7f72d04 6 * to deal in the Software without restriction, including without limitation
IanBenzMaxim 0:f77ad7f72d04 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
IanBenzMaxim 0:f77ad7f72d04 8 * and/or sell copies of the Software, and to permit persons to whom the
IanBenzMaxim 0:f77ad7f72d04 9 * Software is furnished to do so, subject to the following conditions:
IanBenzMaxim 0:f77ad7f72d04 10 *
IanBenzMaxim 0:f77ad7f72d04 11 * The above copyright notice and this permission notice shall be included
IanBenzMaxim 0:f77ad7f72d04 12 * in all copies or substantial portions of the Software.
IanBenzMaxim 0:f77ad7f72d04 13 *
IanBenzMaxim 0:f77ad7f72d04 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
IanBenzMaxim 0:f77ad7f72d04 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
IanBenzMaxim 0:f77ad7f72d04 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IanBenzMaxim 0:f77ad7f72d04 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
IanBenzMaxim 0:f77ad7f72d04 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
IanBenzMaxim 0:f77ad7f72d04 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
IanBenzMaxim 0:f77ad7f72d04 20 * OTHER DEALINGS IN THE SOFTWARE.
IanBenzMaxim 0:f77ad7f72d04 21 *
IanBenzMaxim 0:f77ad7f72d04 22 * Except as contained in this notice, the name of Maxim Integrated
IanBenzMaxim 0:f77ad7f72d04 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
IanBenzMaxim 0:f77ad7f72d04 24 * Products, Inc. Branding Policy.
IanBenzMaxim 0:f77ad7f72d04 25 *
IanBenzMaxim 0:f77ad7f72d04 26 * The mere transfer of this software does not imply any licenses
IanBenzMaxim 0:f77ad7f72d04 27 * of trade secrets, proprietary technology, copyrights, patents,
IanBenzMaxim 0:f77ad7f72d04 28 * trademarks, maskwork rights, or any other form of intellectual
IanBenzMaxim 0:f77ad7f72d04 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
IanBenzMaxim 0:f77ad7f72d04 30 * ownership rights.
IanBenzMaxim 0:f77ad7f72d04 31 *******************************************************************************/
IanBenzMaxim 0:f77ad7f72d04 32
IanBenzMaxim 0:f77ad7f72d04 33 #include <MaximInterface/Utilities/Error.hpp>
IanBenzMaxim 0:f77ad7f72d04 34 #include "DS2482_DS2484.hpp"
IanBenzMaxim 0:f77ad7f72d04 35
IanBenzMaxim 0:f77ad7f72d04 36 namespace MaximInterface {
IanBenzMaxim 0:f77ad7f72d04 37
IanBenzMaxim 0:f77ad7f72d04 38 enum Command {
IanBenzMaxim 0:f77ad7f72d04 39 DeviceResetCmd = 0xF0,
IanBenzMaxim 0:f77ad7f72d04 40 WriteDeviceConfigCmd = 0xD2,
IanBenzMaxim 0:f77ad7f72d04 41 AdjustOwPortCmd = 0xC3, // DS2484 only
IanBenzMaxim 0:f77ad7f72d04 42 ChannelSelectCmd = 0xC3, // DS2482-800 only
IanBenzMaxim 0:f77ad7f72d04 43 SetReadPointerCmd = 0xE1,
IanBenzMaxim 0:f77ad7f72d04 44 OwResetCmd = 0xB4,
IanBenzMaxim 0:f77ad7f72d04 45 OwWriteByteCmd = 0xA5,
IanBenzMaxim 0:f77ad7f72d04 46 OwReadByteCmd = 0x96,
IanBenzMaxim 0:f77ad7f72d04 47 OwSingleBitCmd = 0x87,
IanBenzMaxim 0:f77ad7f72d04 48 OwTripletCmd = 0x78
IanBenzMaxim 0:f77ad7f72d04 49 };
IanBenzMaxim 0:f77ad7f72d04 50
IanBenzMaxim 0:f77ad7f72d04 51 // Device register pointers.
IanBenzMaxim 0:f77ad7f72d04 52 enum Register {
IanBenzMaxim 0:f77ad7f72d04 53 ConfigReg = 0xC3,
IanBenzMaxim 0:f77ad7f72d04 54 StatusReg = 0xF0,
IanBenzMaxim 0:f77ad7f72d04 55 ReadDataReg = 0xE1
IanBenzMaxim 0:f77ad7f72d04 56 };
IanBenzMaxim 0:f77ad7f72d04 57
IanBenzMaxim 0:f77ad7f72d04 58 // Device Status bits
IanBenzMaxim 0:f77ad7f72d04 59 enum StatusBit {
IanBenzMaxim 0:f77ad7f72d04 60 Status_1WB = 0x01,
IanBenzMaxim 0:f77ad7f72d04 61 Status_PPD = 0x02,
IanBenzMaxim 0:f77ad7f72d04 62 Status_SD = 0x04,
IanBenzMaxim 0:f77ad7f72d04 63 Status_LL = 0x08,
IanBenzMaxim 0:f77ad7f72d04 64 Status_RST = 0x10,
IanBenzMaxim 0:f77ad7f72d04 65 Status_SBR = 0x20,
IanBenzMaxim 0:f77ad7f72d04 66 Status_TSB = 0x40,
IanBenzMaxim 0:f77ad7f72d04 67 Status_DIR = 0x80
IanBenzMaxim 0:f77ad7f72d04 68 };
IanBenzMaxim 0:f77ad7f72d04 69
IanBenzMaxim 0:f77ad7f72d04 70 error_code DS2482_DS2484::initialize(Config config) {
IanBenzMaxim 0:f77ad7f72d04 71 // reset device
IanBenzMaxim 0:f77ad7f72d04 72 error_code result = resetDevice();
IanBenzMaxim 0:f77ad7f72d04 73 if (result) {
IanBenzMaxim 0:f77ad7f72d04 74 return result;
IanBenzMaxim 0:f77ad7f72d04 75 }
IanBenzMaxim 0:f77ad7f72d04 76
IanBenzMaxim 0:f77ad7f72d04 77 // write the default configuration setup
IanBenzMaxim 0:f77ad7f72d04 78 result = writeConfig(config);
IanBenzMaxim 0:f77ad7f72d04 79 return result;
IanBenzMaxim 0:f77ad7f72d04 80 }
IanBenzMaxim 0:f77ad7f72d04 81
IanBenzMaxim 0:f77ad7f72d04 82 error_code DS2482_DS2484::resetDevice() {
IanBenzMaxim 0:f77ad7f72d04 83 // Device Reset
IanBenzMaxim 0:f77ad7f72d04 84 // S AD,0 [A] DRST [A] Sr AD,1 [A] [SS] A\ P
IanBenzMaxim 0:f77ad7f72d04 85 // [] indicates from slave
IanBenzMaxim 0:f77ad7f72d04 86 // SS status byte to read to verify state
IanBenzMaxim 0:f77ad7f72d04 87
IanBenzMaxim 0:f77ad7f72d04 88 uint_least8_t buf;
IanBenzMaxim 0:f77ad7f72d04 89 error_code result = sendCommand(DeviceResetCmd);
IanBenzMaxim 0:f77ad7f72d04 90
IanBenzMaxim 0:f77ad7f72d04 91 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 92 result = readRegister(buf);
IanBenzMaxim 0:f77ad7f72d04 93 }
IanBenzMaxim 0:f77ad7f72d04 94
IanBenzMaxim 0:f77ad7f72d04 95 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 96 if ((buf & 0xF7) != 0x10) {
IanBenzMaxim 0:f77ad7f72d04 97 result = make_error_code(HardwareError);
IanBenzMaxim 0:f77ad7f72d04 98 }
IanBenzMaxim 0:f77ad7f72d04 99 }
IanBenzMaxim 0:f77ad7f72d04 100
IanBenzMaxim 0:f77ad7f72d04 101 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 102 reset(); // do a command to get 1-Wire master reset out of holding state
IanBenzMaxim 0:f77ad7f72d04 103 }
IanBenzMaxim 0:f77ad7f72d04 104
IanBenzMaxim 0:f77ad7f72d04 105 return result;
IanBenzMaxim 0:f77ad7f72d04 106 }
IanBenzMaxim 0:f77ad7f72d04 107
IanBenzMaxim 0:f77ad7f72d04 108 error_code DS2482_DS2484::triplet(TripletData & data) {
IanBenzMaxim 0:f77ad7f72d04 109 // 1-Wire Triplet (Case B)
IanBenzMaxim 0:f77ad7f72d04 110 // S AD,0 [A] 1WT [A] SS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 0:f77ad7f72d04 111 // \--------/
IanBenzMaxim 0:f77ad7f72d04 112 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 0:f77ad7f72d04 113 // [] indicates from slave
IanBenzMaxim 0:f77ad7f72d04 114 // SS indicates byte containing search direction bit value in msbit
IanBenzMaxim 0:f77ad7f72d04 115
IanBenzMaxim 0:f77ad7f72d04 116 error_code result = sendCommand(OwTripletCmd, data.writeBit ? 0x80 : 0x00);
IanBenzMaxim 0:f77ad7f72d04 117 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 118 uint_least8_t status;
IanBenzMaxim 0:f77ad7f72d04 119 result = pollBusy(&status);
IanBenzMaxim 0:f77ad7f72d04 120 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 121 // check bit results in status byte
IanBenzMaxim 0:f77ad7f72d04 122 data.readBit = ((status & Status_SBR) == Status_SBR);
IanBenzMaxim 0:f77ad7f72d04 123 data.readBitComplement = ((status & Status_TSB) == Status_TSB);
IanBenzMaxim 0:f77ad7f72d04 124 data.writeBit = ((status & Status_DIR) == Status_DIR);
IanBenzMaxim 0:f77ad7f72d04 125 }
IanBenzMaxim 0:f77ad7f72d04 126 }
IanBenzMaxim 0:f77ad7f72d04 127 return result;
IanBenzMaxim 0:f77ad7f72d04 128 }
IanBenzMaxim 0:f77ad7f72d04 129
IanBenzMaxim 0:f77ad7f72d04 130 error_code DS2482_DS2484::reset() {
IanBenzMaxim 0:f77ad7f72d04 131 // 1-Wire reset (Case B)
IanBenzMaxim 0:f77ad7f72d04 132 // S AD,0 [A] 1WRS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 0:f77ad7f72d04 133 // \--------/
IanBenzMaxim 0:f77ad7f72d04 134 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 0:f77ad7f72d04 135 // [] indicates from slave
IanBenzMaxim 0:f77ad7f72d04 136
IanBenzMaxim 0:f77ad7f72d04 137 error_code result = sendCommand(OwResetCmd);
IanBenzMaxim 0:f77ad7f72d04 138 uint_least8_t buf;
IanBenzMaxim 0:f77ad7f72d04 139
IanBenzMaxim 0:f77ad7f72d04 140 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 141 result = pollBusy(&buf);
IanBenzMaxim 0:f77ad7f72d04 142 }
IanBenzMaxim 0:f77ad7f72d04 143
IanBenzMaxim 0:f77ad7f72d04 144 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 145 if ((buf & Status_SD) == Status_SD) {
IanBenzMaxim 0:f77ad7f72d04 146 result = make_error_code(ShortDetectedError);
IanBenzMaxim 0:f77ad7f72d04 147 }
IanBenzMaxim 0:f77ad7f72d04 148 else if ((buf & Status_PPD) != Status_PPD) {
IanBenzMaxim 0:f77ad7f72d04 149 result = make_error_code(NoSlaveError);
IanBenzMaxim 0:f77ad7f72d04 150 }
IanBenzMaxim 0:f77ad7f72d04 151 }
IanBenzMaxim 0:f77ad7f72d04 152
IanBenzMaxim 0:f77ad7f72d04 153 return result;
IanBenzMaxim 0:f77ad7f72d04 154 }
IanBenzMaxim 0:f77ad7f72d04 155
IanBenzMaxim 0:f77ad7f72d04 156 error_code DS2482_DS2484::touchBitSetLevel(bool & sendRecvBit, Level afterLevel) {
IanBenzMaxim 0:f77ad7f72d04 157 // 1-Wire bit (Case B)
IanBenzMaxim 0:f77ad7f72d04 158 // S AD,0 [A] 1WSB [A] BB [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 0:f77ad7f72d04 159 // \--------/
IanBenzMaxim 0:f77ad7f72d04 160 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 0:f77ad7f72d04 161 // [] indicates from slave
IanBenzMaxim 0:f77ad7f72d04 162 // BB indicates byte containing bit value in msbit
IanBenzMaxim 0:f77ad7f72d04 163
IanBenzMaxim 0:f77ad7f72d04 164 error_code result = configureLevel(afterLevel);
IanBenzMaxim 0:f77ad7f72d04 165
IanBenzMaxim 0:f77ad7f72d04 166 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 167 result = sendCommand(OwSingleBitCmd, sendRecvBit ? 0x80 : 0x00);
IanBenzMaxim 0:f77ad7f72d04 168 }
IanBenzMaxim 0:f77ad7f72d04 169
IanBenzMaxim 0:f77ad7f72d04 170 uint_least8_t status;
IanBenzMaxim 0:f77ad7f72d04 171
IanBenzMaxim 0:f77ad7f72d04 172 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 173 result = pollBusy(&status);
IanBenzMaxim 0:f77ad7f72d04 174 }
IanBenzMaxim 0:f77ad7f72d04 175
IanBenzMaxim 0:f77ad7f72d04 176 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 177 sendRecvBit = ((status & Status_SBR) == Status_SBR);
IanBenzMaxim 0:f77ad7f72d04 178 }
IanBenzMaxim 0:f77ad7f72d04 179
IanBenzMaxim 0:f77ad7f72d04 180 return result;
IanBenzMaxim 0:f77ad7f72d04 181 }
IanBenzMaxim 0:f77ad7f72d04 182
IanBenzMaxim 0:f77ad7f72d04 183 error_code DS2482_DS2484::writeByteSetLevel(uint_least8_t sendByte, Level afterLevel) {
IanBenzMaxim 0:f77ad7f72d04 184 // 1-Wire Write Byte (Case B)
IanBenzMaxim 0:f77ad7f72d04 185 // S AD,0 [A] 1WWB [A] DD [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 0:f77ad7f72d04 186 // \--------/
IanBenzMaxim 0:f77ad7f72d04 187 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 0:f77ad7f72d04 188 // [] indicates from slave
IanBenzMaxim 0:f77ad7f72d04 189 // DD data to write
IanBenzMaxim 0:f77ad7f72d04 190
IanBenzMaxim 0:f77ad7f72d04 191 error_code result = configureLevel(afterLevel);
IanBenzMaxim 0:f77ad7f72d04 192 if (result) {
IanBenzMaxim 0:f77ad7f72d04 193 return result;
IanBenzMaxim 0:f77ad7f72d04 194 }
IanBenzMaxim 0:f77ad7f72d04 195
IanBenzMaxim 0:f77ad7f72d04 196 result = sendCommand(OwWriteByteCmd, sendByte);
IanBenzMaxim 0:f77ad7f72d04 197 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 198 result = pollBusy();
IanBenzMaxim 0:f77ad7f72d04 199 }
IanBenzMaxim 0:f77ad7f72d04 200
IanBenzMaxim 0:f77ad7f72d04 201 return result;
IanBenzMaxim 0:f77ad7f72d04 202 }
IanBenzMaxim 0:f77ad7f72d04 203
IanBenzMaxim 0:f77ad7f72d04 204 error_code DS2482_DS2484::readByteSetLevel(uint_least8_t & recvByte,
IanBenzMaxim 0:f77ad7f72d04 205 Level afterLevel) {
IanBenzMaxim 0:f77ad7f72d04 206 // 1-Wire Read Bytes (Case C)
IanBenzMaxim 0:f77ad7f72d04 207 // S AD,0 [A] 1WRB [A] Sr AD,1 [A] [Status] A [Status] A
IanBenzMaxim 0:f77ad7f72d04 208 // \--------/
IanBenzMaxim 0:f77ad7f72d04 209 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 0:f77ad7f72d04 210 // Sr AD,0 [A] SRP [A] E1 [A] Sr AD,1 [A] DD A\ P
IanBenzMaxim 0:f77ad7f72d04 211 //
IanBenzMaxim 0:f77ad7f72d04 212 // [] indicates from slave
IanBenzMaxim 0:f77ad7f72d04 213 // DD data read
IanBenzMaxim 0:f77ad7f72d04 214
IanBenzMaxim 0:f77ad7f72d04 215 error_code result = configureLevel(afterLevel);
IanBenzMaxim 0:f77ad7f72d04 216 if (result) {
IanBenzMaxim 0:f77ad7f72d04 217 return result;
IanBenzMaxim 0:f77ad7f72d04 218 }
IanBenzMaxim 0:f77ad7f72d04 219
IanBenzMaxim 0:f77ad7f72d04 220 result = sendCommand(OwReadByteCmd);
IanBenzMaxim 0:f77ad7f72d04 221
IanBenzMaxim 0:f77ad7f72d04 222 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 223 result = pollBusy();
IanBenzMaxim 0:f77ad7f72d04 224 }
IanBenzMaxim 0:f77ad7f72d04 225
IanBenzMaxim 0:f77ad7f72d04 226 uint_least8_t buf;
IanBenzMaxim 0:f77ad7f72d04 227
IanBenzMaxim 0:f77ad7f72d04 228 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 229 result = readRegister(ReadDataReg, buf);
IanBenzMaxim 0:f77ad7f72d04 230 }
IanBenzMaxim 0:f77ad7f72d04 231
IanBenzMaxim 0:f77ad7f72d04 232 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 233 recvByte = buf;
IanBenzMaxim 0:f77ad7f72d04 234 }
IanBenzMaxim 0:f77ad7f72d04 235
IanBenzMaxim 0:f77ad7f72d04 236 return result;
IanBenzMaxim 0:f77ad7f72d04 237 }
IanBenzMaxim 0:f77ad7f72d04 238
IanBenzMaxim 0:f77ad7f72d04 239 error_code DS2482_DS2484::setSpeed(Speed newSpeed) {
IanBenzMaxim 0:f77ad7f72d04 240 // Check if supported speed
IanBenzMaxim 0:f77ad7f72d04 241 if (!((newSpeed == OverdriveSpeed) || (newSpeed == StandardSpeed))) {
IanBenzMaxim 0:f77ad7f72d04 242 return make_error_code(InvalidSpeedError);
IanBenzMaxim 0:f77ad7f72d04 243 }
IanBenzMaxim 0:f77ad7f72d04 244 // Check if requested speed is already set
IanBenzMaxim 0:f77ad7f72d04 245 if (curConfig.get1WS() == (newSpeed == OverdriveSpeed)) {
IanBenzMaxim 0:f77ad7f72d04 246 return error_code();
IanBenzMaxim 0:f77ad7f72d04 247 }
IanBenzMaxim 0:f77ad7f72d04 248 // Set the speed
IanBenzMaxim 0:f77ad7f72d04 249 Config newConfig = curConfig;
IanBenzMaxim 0:f77ad7f72d04 250 newConfig.set1WS(newSpeed == OverdriveSpeed);
IanBenzMaxim 0:f77ad7f72d04 251 return writeConfig(newConfig);
IanBenzMaxim 0:f77ad7f72d04 252 }
IanBenzMaxim 0:f77ad7f72d04 253
IanBenzMaxim 0:f77ad7f72d04 254 error_code DS2482_DS2484::setLevel(Level newLevel) {
IanBenzMaxim 0:f77ad7f72d04 255 if (newLevel == StrongLevel) {
IanBenzMaxim 0:f77ad7f72d04 256 return make_error_code(InvalidLevelError);
IanBenzMaxim 0:f77ad7f72d04 257 }
IanBenzMaxim 0:f77ad7f72d04 258
IanBenzMaxim 0:f77ad7f72d04 259 return configureLevel(newLevel);
IanBenzMaxim 0:f77ad7f72d04 260 }
IanBenzMaxim 0:f77ad7f72d04 261
IanBenzMaxim 0:f77ad7f72d04 262 error_code DS2482_DS2484::writeConfig(Config config) {
IanBenzMaxim 0:f77ad7f72d04 263 uint_least8_t configBuf = ((config.readByte() ^ 0xF) << 4) | config.readByte();
IanBenzMaxim 0:f77ad7f72d04 264 error_code result = sendCommand(WriteDeviceConfigCmd, configBuf);
IanBenzMaxim 0:f77ad7f72d04 265 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 266 result = readRegister(ConfigReg, configBuf);
IanBenzMaxim 0:f77ad7f72d04 267 }
IanBenzMaxim 0:f77ad7f72d04 268 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 269 if (configBuf != config.readByte()) {
IanBenzMaxim 0:f77ad7f72d04 270 result = make_error_code(HardwareError);
IanBenzMaxim 0:f77ad7f72d04 271 }
IanBenzMaxim 0:f77ad7f72d04 272 }
IanBenzMaxim 0:f77ad7f72d04 273 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 274 curConfig = config;
IanBenzMaxim 0:f77ad7f72d04 275 }
IanBenzMaxim 0:f77ad7f72d04 276 return result;
IanBenzMaxim 0:f77ad7f72d04 277 }
IanBenzMaxim 0:f77ad7f72d04 278
IanBenzMaxim 0:f77ad7f72d04 279 error_code DS2482_DS2484::readRegister(uint_least8_t reg, uint_least8_t & buf) const {
IanBenzMaxim 0:f77ad7f72d04 280 error_code result = sendCommand(SetReadPointerCmd, reg);
IanBenzMaxim 0:f77ad7f72d04 281 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 282 result = readRegister(buf);
IanBenzMaxim 0:f77ad7f72d04 283 }
IanBenzMaxim 0:f77ad7f72d04 284 return result;
IanBenzMaxim 0:f77ad7f72d04 285 }
IanBenzMaxim 0:f77ad7f72d04 286
IanBenzMaxim 0:f77ad7f72d04 287 error_code DS2482_DS2484::readRegister(uint_least8_t & buf) const {
IanBenzMaxim 0:f77ad7f72d04 288 return i2cMaster->readPacket(i2cAddress_, &buf, 1);
IanBenzMaxim 0:f77ad7f72d04 289 }
IanBenzMaxim 0:f77ad7f72d04 290
IanBenzMaxim 0:f77ad7f72d04 291 error_code DS2482_DS2484::pollBusy(uint_least8_t * pStatus) {
IanBenzMaxim 0:f77ad7f72d04 292 const int pollLimit = 200;
IanBenzMaxim 0:f77ad7f72d04 293
IanBenzMaxim 0:f77ad7f72d04 294 int pollCount = 0;
IanBenzMaxim 0:f77ad7f72d04 295 uint_least8_t status;
IanBenzMaxim 0:f77ad7f72d04 296 do {
IanBenzMaxim 0:f77ad7f72d04 297 error_code result = readRegister(status);
IanBenzMaxim 0:f77ad7f72d04 298 if (result) {
IanBenzMaxim 0:f77ad7f72d04 299 return result;
IanBenzMaxim 0:f77ad7f72d04 300 }
IanBenzMaxim 0:f77ad7f72d04 301 if (pStatus != NULL) {
IanBenzMaxim 0:f77ad7f72d04 302 *pStatus = status;
IanBenzMaxim 0:f77ad7f72d04 303 }
IanBenzMaxim 0:f77ad7f72d04 304 if (pollCount++ >= pollLimit) {
IanBenzMaxim 0:f77ad7f72d04 305 return make_error_code(HardwareError);
IanBenzMaxim 0:f77ad7f72d04 306 }
IanBenzMaxim 0:f77ad7f72d04 307 } while (status & Status_1WB);
IanBenzMaxim 0:f77ad7f72d04 308
IanBenzMaxim 0:f77ad7f72d04 309 return error_code();
IanBenzMaxim 0:f77ad7f72d04 310 }
IanBenzMaxim 0:f77ad7f72d04 311
IanBenzMaxim 0:f77ad7f72d04 312 error_code DS2482_DS2484::configureLevel(Level level) {
IanBenzMaxim 0:f77ad7f72d04 313 // Check if supported level
IanBenzMaxim 0:f77ad7f72d04 314 if (!((level == NormalLevel) || (level == StrongLevel))) {
IanBenzMaxim 0:f77ad7f72d04 315 return make_error_code(InvalidLevelError);
IanBenzMaxim 0:f77ad7f72d04 316 }
IanBenzMaxim 0:f77ad7f72d04 317 // Check if requested level already set
IanBenzMaxim 0:f77ad7f72d04 318 if (curConfig.getSPU() == (level == StrongLevel)) {
IanBenzMaxim 0:f77ad7f72d04 319 return error_code();
IanBenzMaxim 0:f77ad7f72d04 320 }
IanBenzMaxim 0:f77ad7f72d04 321 // Set the level
IanBenzMaxim 0:f77ad7f72d04 322 Config newConfig = curConfig;
IanBenzMaxim 0:f77ad7f72d04 323 newConfig.setSPU(level == StrongLevel);
IanBenzMaxim 0:f77ad7f72d04 324 return writeConfig(newConfig);
IanBenzMaxim 0:f77ad7f72d04 325 }
IanBenzMaxim 0:f77ad7f72d04 326
IanBenzMaxim 0:f77ad7f72d04 327 error_code DS2482_DS2484::sendCommand(uint_least8_t cmd) const {
IanBenzMaxim 0:f77ad7f72d04 328 return i2cMaster->writePacket(i2cAddress_, &cmd, 1);
IanBenzMaxim 0:f77ad7f72d04 329 }
IanBenzMaxim 0:f77ad7f72d04 330
IanBenzMaxim 0:f77ad7f72d04 331 error_code DS2482_DS2484::sendCommand(uint_least8_t cmd, uint_least8_t param) const {
IanBenzMaxim 0:f77ad7f72d04 332 uint_least8_t buf[] = {cmd, param};
IanBenzMaxim 0:f77ad7f72d04 333 return i2cMaster->writePacket(i2cAddress_, buf, sizeof(buf) / sizeof(buf[0]));
IanBenzMaxim 0:f77ad7f72d04 334 }
IanBenzMaxim 0:f77ad7f72d04 335
IanBenzMaxim 0:f77ad7f72d04 336 const error_category & DS2482_DS2484::errorCategory() {
IanBenzMaxim 0:f77ad7f72d04 337 static class : public error_category {
IanBenzMaxim 0:f77ad7f72d04 338 public:
IanBenzMaxim 0:f77ad7f72d04 339 virtual const char * name() const { return "DS2482_DS2484"; }
IanBenzMaxim 0:f77ad7f72d04 340
IanBenzMaxim 0:f77ad7f72d04 341 virtual std::string message(int condition) const {
IanBenzMaxim 0:f77ad7f72d04 342 switch (condition) {
IanBenzMaxim 0:f77ad7f72d04 343 case HardwareError:
IanBenzMaxim 0:f77ad7f72d04 344 return "Hardware Error";
IanBenzMaxim 0:f77ad7f72d04 345
IanBenzMaxim 0:f77ad7f72d04 346 case ArgumentOutOfRangeError:
IanBenzMaxim 0:f77ad7f72d04 347 return "Argument Out of Range Error";
IanBenzMaxim 0:f77ad7f72d04 348
IanBenzMaxim 0:f77ad7f72d04 349 default:
IanBenzMaxim 0:f77ad7f72d04 350 return defaultErrorMessage(condition);
IanBenzMaxim 0:f77ad7f72d04 351 }
IanBenzMaxim 0:f77ad7f72d04 352 }
IanBenzMaxim 0:f77ad7f72d04 353 } instance;
IanBenzMaxim 0:f77ad7f72d04 354 return instance;
IanBenzMaxim 0:f77ad7f72d04 355 }
IanBenzMaxim 0:f77ad7f72d04 356
IanBenzMaxim 0:f77ad7f72d04 357 error_code DS2482_800::selectChannel(int channel) {
IanBenzMaxim 0:f77ad7f72d04 358 // Channel Select (Case A)
IanBenzMaxim 0:f77ad7f72d04 359 // S AD,0 [A] CHSL [A] CC [A] Sr AD,1 [A] [RR] A\ P
IanBenzMaxim 0:f77ad7f72d04 360 // [] indicates from slave
IanBenzMaxim 0:f77ad7f72d04 361 // CC channel value
IanBenzMaxim 0:f77ad7f72d04 362 // RR channel read back
IanBenzMaxim 0:f77ad7f72d04 363
IanBenzMaxim 0:f77ad7f72d04 364 uint_least8_t ch;
IanBenzMaxim 0:f77ad7f72d04 365 uint_least8_t ch_read;
IanBenzMaxim 0:f77ad7f72d04 366 switch (channel) {
IanBenzMaxim 0:f77ad7f72d04 367 case 0:
IanBenzMaxim 0:f77ad7f72d04 368 ch = 0xF0;
IanBenzMaxim 0:f77ad7f72d04 369 ch_read = 0xB8;
IanBenzMaxim 0:f77ad7f72d04 370 break;
IanBenzMaxim 0:f77ad7f72d04 371
IanBenzMaxim 0:f77ad7f72d04 372 case 1:
IanBenzMaxim 0:f77ad7f72d04 373 ch = 0xE1;
IanBenzMaxim 0:f77ad7f72d04 374 ch_read = 0xB1;
IanBenzMaxim 0:f77ad7f72d04 375 break;
IanBenzMaxim 0:f77ad7f72d04 376
IanBenzMaxim 0:f77ad7f72d04 377 case 2:
IanBenzMaxim 0:f77ad7f72d04 378 ch = 0xD2;
IanBenzMaxim 0:f77ad7f72d04 379 ch_read = 0xAA;
IanBenzMaxim 0:f77ad7f72d04 380 break;
IanBenzMaxim 0:f77ad7f72d04 381
IanBenzMaxim 0:f77ad7f72d04 382 case 3:
IanBenzMaxim 0:f77ad7f72d04 383 ch = 0xC3;
IanBenzMaxim 0:f77ad7f72d04 384 ch_read = 0xA3;
IanBenzMaxim 0:f77ad7f72d04 385 break;
IanBenzMaxim 0:f77ad7f72d04 386
IanBenzMaxim 0:f77ad7f72d04 387 case 4:
IanBenzMaxim 0:f77ad7f72d04 388 ch = 0xB4;
IanBenzMaxim 0:f77ad7f72d04 389 ch_read = 0x9C;
IanBenzMaxim 0:f77ad7f72d04 390 break;
IanBenzMaxim 0:f77ad7f72d04 391
IanBenzMaxim 0:f77ad7f72d04 392 case 5:
IanBenzMaxim 0:f77ad7f72d04 393 ch = 0xA5;
IanBenzMaxim 0:f77ad7f72d04 394 ch_read = 0x95;
IanBenzMaxim 0:f77ad7f72d04 395 break;
IanBenzMaxim 0:f77ad7f72d04 396
IanBenzMaxim 0:f77ad7f72d04 397 case 6:
IanBenzMaxim 0:f77ad7f72d04 398 ch = 0x96;
IanBenzMaxim 0:f77ad7f72d04 399 ch_read = 0x8E;
IanBenzMaxim 0:f77ad7f72d04 400 break;
IanBenzMaxim 0:f77ad7f72d04 401
IanBenzMaxim 0:f77ad7f72d04 402 case 7:
IanBenzMaxim 0:f77ad7f72d04 403 ch = 0x87;
IanBenzMaxim 0:f77ad7f72d04 404 ch_read = 0x87;
IanBenzMaxim 0:f77ad7f72d04 405 break;
IanBenzMaxim 0:f77ad7f72d04 406
IanBenzMaxim 0:f77ad7f72d04 407 default:
IanBenzMaxim 0:f77ad7f72d04 408 return make_error_code(ArgumentOutOfRangeError);
IanBenzMaxim 0:f77ad7f72d04 409 };
IanBenzMaxim 0:f77ad7f72d04 410
IanBenzMaxim 0:f77ad7f72d04 411 error_code result = sendCommand(ChannelSelectCmd, ch);
IanBenzMaxim 0:f77ad7f72d04 412 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 413 result = readRegister(ch);
IanBenzMaxim 0:f77ad7f72d04 414 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 415 // check for failure due to incorrect read back of channel
IanBenzMaxim 0:f77ad7f72d04 416 if (ch != ch_read) {
IanBenzMaxim 0:f77ad7f72d04 417 result = make_error_code(HardwareError);
IanBenzMaxim 0:f77ad7f72d04 418 }
IanBenzMaxim 0:f77ad7f72d04 419 }
IanBenzMaxim 0:f77ad7f72d04 420 }
IanBenzMaxim 0:f77ad7f72d04 421
IanBenzMaxim 0:f77ad7f72d04 422 return result;
IanBenzMaxim 0:f77ad7f72d04 423 }
IanBenzMaxim 0:f77ad7f72d04 424
IanBenzMaxim 0:f77ad7f72d04 425 error_code DS2484::adjustPort(PortParameter param, int val) {
IanBenzMaxim 0:f77ad7f72d04 426 if (val < 0 || val > 15) {
IanBenzMaxim 0:f77ad7f72d04 427 return make_error_code(ArgumentOutOfRangeError);
IanBenzMaxim 0:f77ad7f72d04 428 }
IanBenzMaxim 0:f77ad7f72d04 429
IanBenzMaxim 0:f77ad7f72d04 430 error_code result = sendCommand(AdjustOwPortCmd, (param << 4) | val);
IanBenzMaxim 0:f77ad7f72d04 431 if (result) {
IanBenzMaxim 0:f77ad7f72d04 432 return result;
IanBenzMaxim 0:f77ad7f72d04 433 }
IanBenzMaxim 0:f77ad7f72d04 434
IanBenzMaxim 0:f77ad7f72d04 435 uint_least8_t portConfig;
IanBenzMaxim 0:f77ad7f72d04 436 for (int paramNum = param + 1; paramNum > 0; paramNum--) {
IanBenzMaxim 0:f77ad7f72d04 437 result = readRegister(portConfig);
IanBenzMaxim 0:f77ad7f72d04 438 if (result) {
IanBenzMaxim 0:f77ad7f72d04 439 return result;
IanBenzMaxim 0:f77ad7f72d04 440 }
IanBenzMaxim 0:f77ad7f72d04 441 }
IanBenzMaxim 0:f77ad7f72d04 442 if (val != portConfig) {
IanBenzMaxim 0:f77ad7f72d04 443 result = make_error_code(HardwareError);
IanBenzMaxim 0:f77ad7f72d04 444 }
IanBenzMaxim 0:f77ad7f72d04 445
IanBenzMaxim 0:f77ad7f72d04 446 return result;
IanBenzMaxim 0:f77ad7f72d04 447 }
IanBenzMaxim 0:f77ad7f72d04 448
IanBenzMaxim 0:f77ad7f72d04 449 } // namespace MaximInterface