Aleksandrs Gumenuks / MaximInterface_Extended

Extended MaximInterface

Dependents:   mbed_DS28EC20_GPIO

Devices/DS2482_DS2484.cpp@8:211d1b8f730c, 2019-04-03 (annotated)

Committer:
reARMnimator
Date:
Wed Apr 03 12:33:10 2019 +0000
Revision:
8:211d1b8f730c
Parent:
7:471901a04573 
Merge with version 1.7;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
IanBenzMaxim 0:f77ad7f72d04 1 /*******************************************************************************
IanBenzMaxim 0:f77ad7f72d04 2 * Copyright (C) 2017 Maxim Integrated Products, Inc., All Rights Reserved.
IanBenzMaxim 0:f77ad7f72d04 3 *
IanBenzMaxim 0:f77ad7f72d04 4 * Permission is hereby granted, free of charge, to any person obtaining a
IanBenzMaxim 0:f77ad7f72d04 5 * copy of this software and associated documentation files (the "Software"),
IanBenzMaxim 0:f77ad7f72d04 6 * to deal in the Software without restriction, including without limitation
IanBenzMaxim 0:f77ad7f72d04 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
IanBenzMaxim 0:f77ad7f72d04 8 * and/or sell copies of the Software, and to permit persons to whom the
IanBenzMaxim 0:f77ad7f72d04 9 * Software is furnished to do so, subject to the following conditions:
IanBenzMaxim 0:f77ad7f72d04 10 *
IanBenzMaxim 0:f77ad7f72d04 11 * The above copyright notice and this permission notice shall be included
IanBenzMaxim 0:f77ad7f72d04 12 * in all copies or substantial portions of the Software.
IanBenzMaxim 0:f77ad7f72d04 13 *
IanBenzMaxim 0:f77ad7f72d04 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
IanBenzMaxim 0:f77ad7f72d04 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
IanBenzMaxim 0:f77ad7f72d04 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IanBenzMaxim 0:f77ad7f72d04 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
IanBenzMaxim 0:f77ad7f72d04 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
IanBenzMaxim 0:f77ad7f72d04 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
IanBenzMaxim 0:f77ad7f72d04 20 * OTHER DEALINGS IN THE SOFTWARE.
IanBenzMaxim 0:f77ad7f72d04 21 *
IanBenzMaxim 0:f77ad7f72d04 22 * Except as contained in this notice, the name of Maxim Integrated
IanBenzMaxim 0:f77ad7f72d04 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
IanBenzMaxim 0:f77ad7f72d04 24 * Products, Inc. Branding Policy.
IanBenzMaxim 0:f77ad7f72d04 25 *
IanBenzMaxim 0:f77ad7f72d04 26 * The mere transfer of this software does not imply any licenses
IanBenzMaxim 0:f77ad7f72d04 27 * of trade secrets, proprietary technology, copyrights, patents,
IanBenzMaxim 0:f77ad7f72d04 28 * trademarks, maskwork rights, or any other form of intellectual
IanBenzMaxim 0:f77ad7f72d04 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
IanBenzMaxim 0:f77ad7f72d04 30 * ownership rights.
IanBenzMaxim 0:f77ad7f72d04 31 *******************************************************************************/
IanBenzMaxim 0:f77ad7f72d04 32
IanBenzMaxim 0:f77ad7f72d04 33 #include <MaximInterface/Utilities/Error.hpp>
IanBenzMaxim 0:f77ad7f72d04 34 #include "DS2482_DS2484.hpp"
IanBenzMaxim 0:f77ad7f72d04 35
IanBenzMaxim 0:f77ad7f72d04 36 namespace MaximInterface {
IanBenzMaxim 0:f77ad7f72d04 37
IanBenzMaxim 0:f77ad7f72d04 38 // Device Status bits
IanBenzMaxim 0:f77ad7f72d04 39 enum StatusBit {
IanBenzMaxim 0:f77ad7f72d04 40 Status_1WB = 0x01,
IanBenzMaxim 0:f77ad7f72d04 41 Status_PPD = 0x02,
IanBenzMaxim 0:f77ad7f72d04 42 Status_SD = 0x04,
IanBenzMaxim 0:f77ad7f72d04 43 Status_LL = 0x08,
IanBenzMaxim 0:f77ad7f72d04 44 Status_RST = 0x10,
IanBenzMaxim 0:f77ad7f72d04 45 Status_SBR = 0x20,
IanBenzMaxim 0:f77ad7f72d04 46 Status_TSB = 0x40,
IanBenzMaxim 0:f77ad7f72d04 47 Status_DIR = 0x80
IanBenzMaxim 0:f77ad7f72d04 48 };
IanBenzMaxim 0:f77ad7f72d04 49
IanBenzMaxim 0:f77ad7f72d04 50 error_code DS2482_DS2484::initialize(Config config) {
IanBenzMaxim 0:f77ad7f72d04 51 error_code result = resetDevice();
IanBenzMaxim 0:f77ad7f72d04 52 if (result) {
IanBenzMaxim 0:f77ad7f72d04 53 return result;
IanBenzMaxim 0:f77ad7f72d04 54 }
IanBenzMaxim 6:a8c83a2e6fa4 55 // Write the default configuration setup.
IanBenzMaxim 0:f77ad7f72d04 56 result = writeConfig(config);
IanBenzMaxim 0:f77ad7f72d04 57 return result;
IanBenzMaxim 0:f77ad7f72d04 58 }
IanBenzMaxim 0:f77ad7f72d04 59
IanBenzMaxim 0:f77ad7f72d04 60 error_code DS2482_DS2484::resetDevice() {
IanBenzMaxim 0:f77ad7f72d04 61 // Device Reset
IanBenzMaxim 0:f77ad7f72d04 62 // S AD,0 [A] DRST [A] Sr AD,1 [A] [SS] A\ P
IanBenzMaxim 0:f77ad7f72d04 63 // [] indicates from slave
IanBenzMaxim 0:f77ad7f72d04 64 // SS status byte to read to verify state
IanBenzMaxim 0:f77ad7f72d04 65
IanBenzMaxim 6:a8c83a2e6fa4 66 error_code result = sendCommand(0xF0);
IanBenzMaxim 6:a8c83a2e6fa4 67 if (result) {
IanBenzMaxim 6:a8c83a2e6fa4 68 return result;
IanBenzMaxim 0:f77ad7f72d04 69 }
IanBenzMaxim 0:f77ad7f72d04 70
IanBenzMaxim 6:a8c83a2e6fa4 71 uint_least8_t buf;
IanBenzMaxim 6:a8c83a2e6fa4 72 result = readRegister(buf);
IanBenzMaxim 6:a8c83a2e6fa4 73 if (result) {
IanBenzMaxim 6:a8c83a2e6fa4 74 return result;
IanBenzMaxim 0:f77ad7f72d04 75 }
IanBenzMaxim 0:f77ad7f72d04 76
IanBenzMaxim 6:a8c83a2e6fa4 77 if ((buf & 0xF7) != 0x10) {
IanBenzMaxim 6:a8c83a2e6fa4 78 return make_error_code(HardwareError);
IanBenzMaxim 0:f77ad7f72d04 79 }
IanBenzMaxim 0:f77ad7f72d04 80
IanBenzMaxim 6:a8c83a2e6fa4 81 // Do a command to get 1-Wire master reset out of holding state.
IanBenzMaxim 6:a8c83a2e6fa4 82 reset();
IanBenzMaxim 6:a8c83a2e6fa4 83
IanBenzMaxim 0:f77ad7f72d04 84 return result;
IanBenzMaxim 0:f77ad7f72d04 85 }
IanBenzMaxim 0:f77ad7f72d04 86
IanBenzMaxim 0:f77ad7f72d04 87 error_code DS2482_DS2484::triplet(TripletData & data) {
IanBenzMaxim 0:f77ad7f72d04 88 // 1-Wire Triplet (Case B)
IanBenzMaxim 0:f77ad7f72d04 89 // S AD,0 [A] 1WT [A] SS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 0:f77ad7f72d04 90 // \--------/
IanBenzMaxim 0:f77ad7f72d04 91 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 0:f77ad7f72d04 92 // [] indicates from slave
IanBenzMaxim 0:f77ad7f72d04 93 // SS indicates byte containing search direction bit value in msbit
IanBenzMaxim 0:f77ad7f72d04 94
IanBenzMaxim 6:a8c83a2e6fa4 95 error_code result = sendCommand(0x78, data.writeBit ? 0x80 : 0x00);
IanBenzMaxim 0:f77ad7f72d04 96 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 97 uint_least8_t status;
IanBenzMaxim 0:f77ad7f72d04 98 result = pollBusy(&status);
IanBenzMaxim 0:f77ad7f72d04 99 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 100 data.readBit = ((status & Status_SBR) == Status_SBR);
IanBenzMaxim 0:f77ad7f72d04 101 data.readBitComplement = ((status & Status_TSB) == Status_TSB);
IanBenzMaxim 0:f77ad7f72d04 102 data.writeBit = ((status & Status_DIR) == Status_DIR);
IanBenzMaxim 0:f77ad7f72d04 103 }
IanBenzMaxim 0:f77ad7f72d04 104 }
IanBenzMaxim 0:f77ad7f72d04 105 return result;
IanBenzMaxim 0:f77ad7f72d04 106 }
IanBenzMaxim 0:f77ad7f72d04 107
IanBenzMaxim 0:f77ad7f72d04 108 error_code DS2482_DS2484::reset() {
IanBenzMaxim 0:f77ad7f72d04 109 // 1-Wire reset (Case B)
IanBenzMaxim 0:f77ad7f72d04 110 // S AD,0 [A] 1WRS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 0:f77ad7f72d04 111 // \--------/
IanBenzMaxim 0:f77ad7f72d04 112 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 0:f77ad7f72d04 113 // [] indicates from slave
IanBenzMaxim 0:f77ad7f72d04 114
IanBenzMaxim 6:a8c83a2e6fa4 115 error_code result = sendCommand(0xB4);
IanBenzMaxim 6:a8c83a2e6fa4 116 if (result) {
IanBenzMaxim 6:a8c83a2e6fa4 117 return result;
IanBenzMaxim 0:f77ad7f72d04 118 }
IanBenzMaxim 0:f77ad7f72d04 119
IanBenzMaxim 6:a8c83a2e6fa4 120 uint_least8_t buf;
IanBenzMaxim 6:a8c83a2e6fa4 121 result = pollBusy(&buf);
IanBenzMaxim 6:a8c83a2e6fa4 122 if (result) {
IanBenzMaxim 6:a8c83a2e6fa4 123 return result;
IanBenzMaxim 6:a8c83a2e6fa4 124 }
IanBenzMaxim 6:a8c83a2e6fa4 125
IanBenzMaxim 6:a8c83a2e6fa4 126 if ((buf & Status_SD) == Status_SD) {
IanBenzMaxim 6:a8c83a2e6fa4 127 result = make_error_code(ShortDetectedError);
IanBenzMaxim 6:a8c83a2e6fa4 128 } else if ((buf & Status_PPD) != Status_PPD) {
IanBenzMaxim 6:a8c83a2e6fa4 129 result = make_error_code(NoSlaveError);
IanBenzMaxim 0:f77ad7f72d04 130 }
IanBenzMaxim 0:f77ad7f72d04 131
IanBenzMaxim 0:f77ad7f72d04 132 return result;
IanBenzMaxim 0:f77ad7f72d04 133 }
IanBenzMaxim 0:f77ad7f72d04 134
IanBenzMaxim 6:a8c83a2e6fa4 135 error_code DS2482_DS2484::touchBitSetLevel(bool & sendRecvBit,
IanBenzMaxim 6:a8c83a2e6fa4 136 Level afterLevel) {
IanBenzMaxim 0:f77ad7f72d04 137 // 1-Wire bit (Case B)
IanBenzMaxim 0:f77ad7f72d04 138 // S AD,0 [A] 1WSB [A] BB [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 0:f77ad7f72d04 139 // \--------/
IanBenzMaxim 0:f77ad7f72d04 140 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 0:f77ad7f72d04 141 // [] indicates from slave
IanBenzMaxim 0:f77ad7f72d04 142 // BB indicates byte containing bit value in msbit
IanBenzMaxim 0:f77ad7f72d04 143
IanBenzMaxim 0:f77ad7f72d04 144 error_code result = configureLevel(afterLevel);
IanBenzMaxim 6:a8c83a2e6fa4 145 if (result) {
IanBenzMaxim 6:a8c83a2e6fa4 146 return result;
IanBenzMaxim 6:a8c83a2e6fa4 147 }
IanBenzMaxim 0:f77ad7f72d04 148
IanBenzMaxim 6:a8c83a2e6fa4 149 result = sendCommand(0x87, sendRecvBit ? 0x80 : 0x00);
IanBenzMaxim 6:a8c83a2e6fa4 150 if (result) {
IanBenzMaxim 6:a8c83a2e6fa4 151 return result;
IanBenzMaxim 0:f77ad7f72d04 152 }
IanBenzMaxim 0:f77ad7f72d04 153
IanBenzMaxim 0:f77ad7f72d04 154 uint_least8_t status;
IanBenzMaxim 6:a8c83a2e6fa4 155 result = pollBusy(&status);
IanBenzMaxim 0:f77ad7f72d04 156 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 157 sendRecvBit = ((status & Status_SBR) == Status_SBR);
IanBenzMaxim 0:f77ad7f72d04 158 }
IanBenzMaxim 0:f77ad7f72d04 159 return result;
IanBenzMaxim 0:f77ad7f72d04 160 }
IanBenzMaxim 0:f77ad7f72d04 161
IanBenzMaxim 6:a8c83a2e6fa4 162 error_code DS2482_DS2484::writeByteSetLevel(uint_least8_t sendByte,
IanBenzMaxim 6:a8c83a2e6fa4 163 Level afterLevel) {
IanBenzMaxim 0:f77ad7f72d04 164 // 1-Wire Write Byte (Case B)
IanBenzMaxim 0:f77ad7f72d04 165 // S AD,0 [A] 1WWB [A] DD [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 0:f77ad7f72d04 166 // \--------/
IanBenzMaxim 0:f77ad7f72d04 167 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 0:f77ad7f72d04 168 // [] indicates from slave
IanBenzMaxim 0:f77ad7f72d04 169 // DD data to write
IanBenzMaxim 0:f77ad7f72d04 170
IanBenzMaxim 0:f77ad7f72d04 171 error_code result = configureLevel(afterLevel);
IanBenzMaxim 0:f77ad7f72d04 172 if (result) {
IanBenzMaxim 0:f77ad7f72d04 173 return result;
IanBenzMaxim 0:f77ad7f72d04 174 }
IanBenzMaxim 0:f77ad7f72d04 175
IanBenzMaxim 6:a8c83a2e6fa4 176 result = sendCommand(0xA5, sendByte);
IanBenzMaxim 6:a8c83a2e6fa4 177 if (result) {
IanBenzMaxim 6:a8c83a2e6fa4 178 return result;
IanBenzMaxim 0:f77ad7f72d04 179 }
IanBenzMaxim 0:f77ad7f72d04 180
IanBenzMaxim 6:a8c83a2e6fa4 181 result = pollBusy();
IanBenzMaxim 0:f77ad7f72d04 182 return result;
IanBenzMaxim 0:f77ad7f72d04 183 }
IanBenzMaxim 0:f77ad7f72d04 184
IanBenzMaxim 0:f77ad7f72d04 185 error_code DS2482_DS2484::readByteSetLevel(uint_least8_t & recvByte,
IanBenzMaxim 6:a8c83a2e6fa4 186 Level afterLevel) {
IanBenzMaxim 0:f77ad7f72d04 187 // 1-Wire Read Bytes (Case C)
IanBenzMaxim 0:f77ad7f72d04 188 // S AD,0 [A] 1WRB [A] Sr AD,1 [A] [Status] A [Status] A
IanBenzMaxim 0:f77ad7f72d04 189 // \--------/
IanBenzMaxim 0:f77ad7f72d04 190 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 0:f77ad7f72d04 191 // Sr AD,0 [A] SRP [A] E1 [A] Sr AD,1 [A] DD A\ P
IanBenzMaxim 0:f77ad7f72d04 192 //
IanBenzMaxim 0:f77ad7f72d04 193 // [] indicates from slave
IanBenzMaxim 0:f77ad7f72d04 194 // DD data read
IanBenzMaxim 0:f77ad7f72d04 195
IanBenzMaxim 0:f77ad7f72d04 196 error_code result = configureLevel(afterLevel);
IanBenzMaxim 0:f77ad7f72d04 197 if (result) {
IanBenzMaxim 0:f77ad7f72d04 198 return result;
IanBenzMaxim 0:f77ad7f72d04 199 }
IanBenzMaxim 0:f77ad7f72d04 200
IanBenzMaxim 6:a8c83a2e6fa4 201 result = sendCommand(0x96);
IanBenzMaxim 6:a8c83a2e6fa4 202 if (result) {
IanBenzMaxim 6:a8c83a2e6fa4 203 return result;
IanBenzMaxim 0:f77ad7f72d04 204 }
IanBenzMaxim 0:f77ad7f72d04 205
IanBenzMaxim 6:a8c83a2e6fa4 206 result = pollBusy();
IanBenzMaxim 6:a8c83a2e6fa4 207 if (result) {
IanBenzMaxim 6:a8c83a2e6fa4 208 return result;
IanBenzMaxim 0:f77ad7f72d04 209 }
IanBenzMaxim 0:f77ad7f72d04 210
IanBenzMaxim 6:a8c83a2e6fa4 211 result = readRegister(0xE1, recvByte);
IanBenzMaxim 0:f77ad7f72d04 212 return result;
IanBenzMaxim 0:f77ad7f72d04 213 }
IanBenzMaxim 0:f77ad7f72d04 214
IanBenzMaxim 0:f77ad7f72d04 215 error_code DS2482_DS2484::setSpeed(Speed newSpeed) {
IanBenzMaxim 0:f77ad7f72d04 216 // Check if supported speed
IanBenzMaxim 0:f77ad7f72d04 217 if (!((newSpeed == OverdriveSpeed) || (newSpeed == StandardSpeed))) {
IanBenzMaxim 0:f77ad7f72d04 218 return make_error_code(InvalidSpeedError);
IanBenzMaxim 0:f77ad7f72d04 219 }
IanBenzMaxim 0:f77ad7f72d04 220 // Check if requested speed is already set
IanBenzMaxim 0:f77ad7f72d04 221 if (curConfig.get1WS() == (newSpeed == OverdriveSpeed)) {
IanBenzMaxim 0:f77ad7f72d04 222 return error_code();
IanBenzMaxim 0:f77ad7f72d04 223 }
IanBenzMaxim 0:f77ad7f72d04 224 // Set the speed
IanBenzMaxim 7:471901a04573 225 return writeConfig(Config(curConfig).set1WS(newSpeed == OverdriveSpeed));
IanBenzMaxim 0:f77ad7f72d04 226 }
IanBenzMaxim 0:f77ad7f72d04 227
IanBenzMaxim 0:f77ad7f72d04 228 error_code DS2482_DS2484::setLevel(Level newLevel) {
IanBenzMaxim 0:f77ad7f72d04 229 if (newLevel == StrongLevel) {
IanBenzMaxim 0:f77ad7f72d04 230 return make_error_code(InvalidLevelError);
IanBenzMaxim 0:f77ad7f72d04 231 }
IanBenzMaxim 0:f77ad7f72d04 232
IanBenzMaxim 0:f77ad7f72d04 233 return configureLevel(newLevel);
IanBenzMaxim 0:f77ad7f72d04 234 }
IanBenzMaxim 0:f77ad7f72d04 235
IanBenzMaxim 0:f77ad7f72d04 236 error_code DS2482_DS2484::writeConfig(Config config) {
IanBenzMaxim 6:a8c83a2e6fa4 237 uint_least8_t configBuf =
IanBenzMaxim 6:a8c83a2e6fa4 238 ((config.readByte() ^ 0xF) << 4) | config.readByte();
IanBenzMaxim 6:a8c83a2e6fa4 239 error_code result = sendCommand(0xD2, configBuf);
IanBenzMaxim 0:f77ad7f72d04 240 if (!result) {
IanBenzMaxim 6:a8c83a2e6fa4 241 result = readRegister(0xC3, configBuf);
IanBenzMaxim 0:f77ad7f72d04 242 }
IanBenzMaxim 0:f77ad7f72d04 243 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 244 if (configBuf != config.readByte()) {
IanBenzMaxim 0:f77ad7f72d04 245 result = make_error_code(HardwareError);
IanBenzMaxim 0:f77ad7f72d04 246 }
IanBenzMaxim 0:f77ad7f72d04 247 }
IanBenzMaxim 0:f77ad7f72d04 248 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 249 curConfig = config;
IanBenzMaxim 0:f77ad7f72d04 250 }
IanBenzMaxim 0:f77ad7f72d04 251 return result;
IanBenzMaxim 0:f77ad7f72d04 252 }
IanBenzMaxim 0:f77ad7f72d04 253
IanBenzMaxim 6:a8c83a2e6fa4 254 error_code DS2482_DS2484::readRegister(uint_least8_t reg,
IanBenzMaxim 6:a8c83a2e6fa4 255 uint_least8_t & buf) const {
IanBenzMaxim 6:a8c83a2e6fa4 256 error_code result = sendCommand(0xE1, reg);
IanBenzMaxim 0:f77ad7f72d04 257 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 258 result = readRegister(buf);
IanBenzMaxim 0:f77ad7f72d04 259 }
IanBenzMaxim 0:f77ad7f72d04 260 return result;
IanBenzMaxim 0:f77ad7f72d04 261 }
IanBenzMaxim 0:f77ad7f72d04 262
IanBenzMaxim 0:f77ad7f72d04 263 error_code DS2482_DS2484::readRegister(uint_least8_t & buf) const {
IanBenzMaxim 6:a8c83a2e6fa4 264 return master->readPacket(address_, make_span(&buf, 1));
IanBenzMaxim 0:f77ad7f72d04 265 }
IanBenzMaxim 0:f77ad7f72d04 266
IanBenzMaxim 0:f77ad7f72d04 267 error_code DS2482_DS2484::pollBusy(uint_least8_t * pStatus) {
IanBenzMaxim 0:f77ad7f72d04 268 const int pollLimit = 200;
IanBenzMaxim 0:f77ad7f72d04 269
IanBenzMaxim 0:f77ad7f72d04 270 int pollCount = 0;
IanBenzMaxim 0:f77ad7f72d04 271 uint_least8_t status;
IanBenzMaxim 0:f77ad7f72d04 272 do {
IanBenzMaxim 0:f77ad7f72d04 273 error_code result = readRegister(status);
IanBenzMaxim 0:f77ad7f72d04 274 if (result) {
IanBenzMaxim 0:f77ad7f72d04 275 return result;
IanBenzMaxim 0:f77ad7f72d04 276 }
IanBenzMaxim 0:f77ad7f72d04 277 if (pStatus != NULL) {
IanBenzMaxim 0:f77ad7f72d04 278 *pStatus = status;
IanBenzMaxim 0:f77ad7f72d04 279 }
IanBenzMaxim 0:f77ad7f72d04 280 if (pollCount++ >= pollLimit) {
IanBenzMaxim 0:f77ad7f72d04 281 return make_error_code(HardwareError);
IanBenzMaxim 0:f77ad7f72d04 282 }
IanBenzMaxim 0:f77ad7f72d04 283 } while (status & Status_1WB);
IanBenzMaxim 0:f77ad7f72d04 284
IanBenzMaxim 0:f77ad7f72d04 285 return error_code();
IanBenzMaxim 0:f77ad7f72d04 286 }
IanBenzMaxim 0:f77ad7f72d04 287
IanBenzMaxim 0:f77ad7f72d04 288 error_code DS2482_DS2484::configureLevel(Level level) {
IanBenzMaxim 0:f77ad7f72d04 289 // Check if supported level
IanBenzMaxim 0:f77ad7f72d04 290 if (!((level == NormalLevel) || (level == StrongLevel))) {
IanBenzMaxim 0:f77ad7f72d04 291 return make_error_code(InvalidLevelError);
IanBenzMaxim 0:f77ad7f72d04 292 }
IanBenzMaxim 0:f77ad7f72d04 293 // Check if requested level already set
IanBenzMaxim 0:f77ad7f72d04 294 if (curConfig.getSPU() == (level == StrongLevel)) {
IanBenzMaxim 0:f77ad7f72d04 295 return error_code();
IanBenzMaxim 0:f77ad7f72d04 296 }
IanBenzMaxim 0:f77ad7f72d04 297 // Set the level
IanBenzMaxim 7:471901a04573 298 return writeConfig(Config(curConfig).setSPU(level == StrongLevel));
IanBenzMaxim 0:f77ad7f72d04 299 }
IanBenzMaxim 0:f77ad7f72d04 300
IanBenzMaxim 0:f77ad7f72d04 301 error_code DS2482_DS2484::sendCommand(uint_least8_t cmd) const {
IanBenzMaxim 6:a8c83a2e6fa4 302 return master->writePacket(address_, make_span(&cmd, 1));
IanBenzMaxim 0:f77ad7f72d04 303 }
IanBenzMaxim 0:f77ad7f72d04 304
IanBenzMaxim 6:a8c83a2e6fa4 305 error_code DS2482_DS2484::sendCommand(uint_least8_t cmd,
IanBenzMaxim 6:a8c83a2e6fa4 306 uint_least8_t param) const {
IanBenzMaxim 0:f77ad7f72d04 307 uint_least8_t buf[] = {cmd, param};
IanBenzMaxim 6:a8c83a2e6fa4 308 return master->writePacket(address_, buf);
IanBenzMaxim 0:f77ad7f72d04 309 }
IanBenzMaxim 0:f77ad7f72d04 310
IanBenzMaxim 0:f77ad7f72d04 311 const error_category & DS2482_DS2484::errorCategory() {
IanBenzMaxim 0:f77ad7f72d04 312 static class : public error_category {
IanBenzMaxim 0:f77ad7f72d04 313 public:
IanBenzMaxim 0:f77ad7f72d04 314 virtual const char * name() const { return "DS2482_DS2484"; }
IanBenzMaxim 0:f77ad7f72d04 315
IanBenzMaxim 0:f77ad7f72d04 316 virtual std::string message(int condition) const {
IanBenzMaxim 0:f77ad7f72d04 317 switch (condition) {
IanBenzMaxim 0:f77ad7f72d04 318 case HardwareError:
IanBenzMaxim 0:f77ad7f72d04 319 return "Hardware Error";
IanBenzMaxim 0:f77ad7f72d04 320
IanBenzMaxim 0:f77ad7f72d04 321 case ArgumentOutOfRangeError:
IanBenzMaxim 0:f77ad7f72d04 322 return "Argument Out of Range Error";
IanBenzMaxim 0:f77ad7f72d04 323
IanBenzMaxim 0:f77ad7f72d04 324 default:
IanBenzMaxim 0:f77ad7f72d04 325 return defaultErrorMessage(condition);
IanBenzMaxim 0:f77ad7f72d04 326 }
IanBenzMaxim 0:f77ad7f72d04 327 }
IanBenzMaxim 0:f77ad7f72d04 328 } instance;
IanBenzMaxim 0:f77ad7f72d04 329 return instance;
IanBenzMaxim 0:f77ad7f72d04 330 }
IanBenzMaxim 0:f77ad7f72d04 331
IanBenzMaxim 0:f77ad7f72d04 332 error_code DS2482_800::selectChannel(int channel) {
IanBenzMaxim 0:f77ad7f72d04 333 // Channel Select (Case A)
IanBenzMaxim 0:f77ad7f72d04 334 // S AD,0 [A] CHSL [A] CC [A] Sr AD,1 [A] [RR] A\ P
IanBenzMaxim 0:f77ad7f72d04 335 // [] indicates from slave
IanBenzMaxim 0:f77ad7f72d04 336 // CC channel value
IanBenzMaxim 0:f77ad7f72d04 337 // RR channel read back
IanBenzMaxim 0:f77ad7f72d04 338
IanBenzMaxim 0:f77ad7f72d04 339 uint_least8_t ch;
IanBenzMaxim 0:f77ad7f72d04 340 uint_least8_t ch_read;
IanBenzMaxim 0:f77ad7f72d04 341 switch (channel) {
IanBenzMaxim 0:f77ad7f72d04 342 case 0:
IanBenzMaxim 0:f77ad7f72d04 343 ch = 0xF0;
IanBenzMaxim 0:f77ad7f72d04 344 ch_read = 0xB8;
IanBenzMaxim 0:f77ad7f72d04 345 break;
IanBenzMaxim 0:f77ad7f72d04 346
IanBenzMaxim 0:f77ad7f72d04 347 case 1:
IanBenzMaxim 0:f77ad7f72d04 348 ch = 0xE1;
IanBenzMaxim 0:f77ad7f72d04 349 ch_read = 0xB1;
IanBenzMaxim 0:f77ad7f72d04 350 break;
IanBenzMaxim 0:f77ad7f72d04 351
IanBenzMaxim 0:f77ad7f72d04 352 case 2:
IanBenzMaxim 0:f77ad7f72d04 353 ch = 0xD2;
IanBenzMaxim 0:f77ad7f72d04 354 ch_read = 0xAA;
IanBenzMaxim 0:f77ad7f72d04 355 break;
IanBenzMaxim 0:f77ad7f72d04 356
IanBenzMaxim 0:f77ad7f72d04 357 case 3:
IanBenzMaxim 0:f77ad7f72d04 358 ch = 0xC3;
IanBenzMaxim 0:f77ad7f72d04 359 ch_read = 0xA3;
IanBenzMaxim 0:f77ad7f72d04 360 break;
IanBenzMaxim 0:f77ad7f72d04 361
IanBenzMaxim 0:f77ad7f72d04 362 case 4:
IanBenzMaxim 0:f77ad7f72d04 363 ch = 0xB4;
IanBenzMaxim 0:f77ad7f72d04 364 ch_read = 0x9C;
IanBenzMaxim 0:f77ad7f72d04 365 break;
IanBenzMaxim 0:f77ad7f72d04 366
IanBenzMaxim 0:f77ad7f72d04 367 case 5:
IanBenzMaxim 0:f77ad7f72d04 368 ch = 0xA5;
IanBenzMaxim 0:f77ad7f72d04 369 ch_read = 0x95;
IanBenzMaxim 0:f77ad7f72d04 370 break;
IanBenzMaxim 0:f77ad7f72d04 371
IanBenzMaxim 0:f77ad7f72d04 372 case 6:
IanBenzMaxim 0:f77ad7f72d04 373 ch = 0x96;
IanBenzMaxim 0:f77ad7f72d04 374 ch_read = 0x8E;
IanBenzMaxim 0:f77ad7f72d04 375 break;
IanBenzMaxim 0:f77ad7f72d04 376
IanBenzMaxim 0:f77ad7f72d04 377 case 7:
IanBenzMaxim 0:f77ad7f72d04 378 ch = 0x87;
IanBenzMaxim 0:f77ad7f72d04 379 ch_read = 0x87;
IanBenzMaxim 0:f77ad7f72d04 380 break;
IanBenzMaxim 0:f77ad7f72d04 381
IanBenzMaxim 0:f77ad7f72d04 382 default:
IanBenzMaxim 0:f77ad7f72d04 383 return make_error_code(ArgumentOutOfRangeError);
IanBenzMaxim 0:f77ad7f72d04 384 };
IanBenzMaxim 0:f77ad7f72d04 385
IanBenzMaxim 6:a8c83a2e6fa4 386 error_code result = sendCommand(0xC3, ch);
IanBenzMaxim 0:f77ad7f72d04 387 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 388 result = readRegister(ch);
IanBenzMaxim 0:f77ad7f72d04 389 if (!result) {
IanBenzMaxim 0:f77ad7f72d04 390 // check for failure due to incorrect read back of channel
IanBenzMaxim 0:f77ad7f72d04 391 if (ch != ch_read) {
IanBenzMaxim 0:f77ad7f72d04 392 result = make_error_code(HardwareError);
IanBenzMaxim 0:f77ad7f72d04 393 }
IanBenzMaxim 0:f77ad7f72d04 394 }
IanBenzMaxim 0:f77ad7f72d04 395 }
IanBenzMaxim 0:f77ad7f72d04 396
IanBenzMaxim 0:f77ad7f72d04 397 return result;
IanBenzMaxim 0:f77ad7f72d04 398 }
IanBenzMaxim 0:f77ad7f72d04 399
IanBenzMaxim 0:f77ad7f72d04 400 error_code DS2484::adjustPort(PortParameter param, int val) {
IanBenzMaxim 0:f77ad7f72d04 401 if (val < 0 || val > 15) {
IanBenzMaxim 0:f77ad7f72d04 402 return make_error_code(ArgumentOutOfRangeError);
IanBenzMaxim 0:f77ad7f72d04 403 }
IanBenzMaxim 0:f77ad7f72d04 404
IanBenzMaxim 6:a8c83a2e6fa4 405 error_code result = sendCommand(0xC3, (param << 4) | val);
IanBenzMaxim 0:f77ad7f72d04 406 if (result) {
IanBenzMaxim 0:f77ad7f72d04 407 return result;
IanBenzMaxim 0:f77ad7f72d04 408 }
IanBenzMaxim 0:f77ad7f72d04 409
IanBenzMaxim 6:a8c83a2e6fa4 410 uint_least8_t portConfig = val + 1;
IanBenzMaxim 7:471901a04573 411 for (int reads = -1; reads < param; ++reads) {
IanBenzMaxim 0:f77ad7f72d04 412 result = readRegister(portConfig);
IanBenzMaxim 0:f77ad7f72d04 413 if (result) {
IanBenzMaxim 0:f77ad7f72d04 414 return result;
IanBenzMaxim 0:f77ad7f72d04 415 }
IanBenzMaxim 0:f77ad7f72d04 416 }
IanBenzMaxim 0:f77ad7f72d04 417 if (val != portConfig) {
IanBenzMaxim 0:f77ad7f72d04 418 result = make_error_code(HardwareError);
IanBenzMaxim 0:f77ad7f72d04 419 }
IanBenzMaxim 0:f77ad7f72d04 420
IanBenzMaxim 0:f77ad7f72d04 421 return result;
IanBenzMaxim 0:f77ad7f72d04 422 }
IanBenzMaxim 0:f77ad7f72d04 423
IanBenzMaxim 0:f77ad7f72d04 424 } // namespace MaximInterface