Umar Naeem / mbed-dev

mbed library sources. Supersedes mbed-src.

Fork of mbed-dev by Umar Naeem

targets/TARGET_Maxim/TARGET_MAX32630/mxc/tmr.c@165:2dd56e6daeec, 2017-05-23 (annotated)

Committer:
ranaumarnaeem
Date:
Tue May 23 12:54:50 2017 +0000
Revision:
165:2dd56e6daeec
Parent:
157:ff67d9f36b67 
jhjg

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 157:ff67d9f36b67 1 /**
<> 157:ff67d9f36b67 2 * @file
<> 157:ff67d9f36b67 3 * @brief Timer Peripheral Driver Source.
<> 157:ff67d9f36b67 4 */
<> 157:ff67d9f36b67 5 /* *****************************************************************************
<> 157:ff67d9f36b67 6 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 157:ff67d9f36b67 7 *
<> 157:ff67d9f36b67 8 * Permission is hereby granted, free of charge, to any person obtaining a
<> 157:ff67d9f36b67 9 * copy of this software and associated documentation files (the "Software"),
<> 157:ff67d9f36b67 10 * to deal in the Software without restriction, including without limitation
<> 157:ff67d9f36b67 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 157:ff67d9f36b67 12 * and/or sell copies of the Software, and to permit persons to whom the
<> 157:ff67d9f36b67 13 * Software is furnished to do so, subject to the following conditions:
<> 157:ff67d9f36b67 14 *
<> 157:ff67d9f36b67 15 * The above copyright notice and this permission notice shall be included
<> 157:ff67d9f36b67 16 * in all copies or substantial portions of the Software.
<> 157:ff67d9f36b67 17 *
<> 157:ff67d9f36b67 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 157:ff67d9f36b67 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 157:ff67d9f36b67 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 157:ff67d9f36b67 21 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 157:ff67d9f36b67 22 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 157:ff67d9f36b67 23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 157:ff67d9f36b67 24 * OTHER DEALINGS IN THE SOFTWARE.
<> 157:ff67d9f36b67 25 *
<> 157:ff67d9f36b67 26 * Except as contained in this notice, the name of Maxim Integrated
<> 157:ff67d9f36b67 27 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 157:ff67d9f36b67 28 * Products, Inc. Branding Policy.
<> 157:ff67d9f36b67 29 *
<> 157:ff67d9f36b67 30 * The mere transfer of this software does not imply any licenses
<> 157:ff67d9f36b67 31 * of trade secrets, proprietary technology, copyrights, patents,
<> 157:ff67d9f36b67 32 * trademarks, maskwork rights, or any other form of intellectual
<> 157:ff67d9f36b67 33 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 157:ff67d9f36b67 34 * ownership rights.
<> 157:ff67d9f36b67 35 *
<> 157:ff67d9f36b67 36 * $Date: 2016-09-08 17:30:35 -0500 (Thu, 08 Sep 2016) $
<> 157:ff67d9f36b67 37 * $Revision: 24322 $
<> 157:ff67d9f36b67 38 *
<> 157:ff67d9f36b67 39 **************************************************************************** */
<> 157:ff67d9f36b67 40
<> 157:ff67d9f36b67 41 /* **** Includes **** */
<> 157:ff67d9f36b67 42 #include <stddef.h>
<> 157:ff67d9f36b67 43 #include "mxc_assert.h"
<> 157:ff67d9f36b67 44 #include "tmr.h"
<> 157:ff67d9f36b67 45
<> 157:ff67d9f36b67 46 /**
<> 157:ff67d9f36b67 47 * @ingroup tmr
<> 157:ff67d9f36b67 48 * @{
<> 157:ff67d9f36b67 49 */
<> 157:ff67d9f36b67 50 static tmr_prescale_t prescaler[MXC_CFG_TMR_INSTANCES];
<> 157:ff67d9f36b67 51
<> 157:ff67d9f36b67 52 /* ************************************************************************* */
<> 157:ff67d9f36b67 53 int TMR_Init(mxc_tmr_regs_t *tmr, tmr_prescale_t prescale, const sys_cfg_tmr_t *sysCfg)
<> 157:ff67d9f36b67 54 {
<> 157:ff67d9f36b67 55 int err;
<> 157:ff67d9f36b67 56 int tmrNum;
<> 157:ff67d9f36b67 57
<> 157:ff67d9f36b67 58 //get the timer number
<> 157:ff67d9f36b67 59 tmrNum = MXC_TMR_GET_IDX(tmr);
<> 157:ff67d9f36b67 60
<> 157:ff67d9f36b67 61 //check for valid pointer
<> 157:ff67d9f36b67 62 MXC_ASSERT(tmrNum >= 0);
<> 157:ff67d9f36b67 63
<> 157:ff67d9f36b67 64 //steup system GPIO config
<> 157:ff67d9f36b67 65 if((err = SYS_TMR_Init(tmr, sysCfg)) != E_NO_ERROR)
<> 157:ff67d9f36b67 66 return err;
<> 157:ff67d9f36b67 67
<> 157:ff67d9f36b67 68 //save the prescale value for this timer
<> 157:ff67d9f36b67 69 prescaler[tmrNum] = prescale;
<> 157:ff67d9f36b67 70
<> 157:ff67d9f36b67 71 //Disable timer and clear settings
<> 157:ff67d9f36b67 72 tmr->ctrl = 0;
<> 157:ff67d9f36b67 73
<> 157:ff67d9f36b67 74 //reset all counts to 0
<> 157:ff67d9f36b67 75 tmr->count32 = 0;
<> 157:ff67d9f36b67 76 tmr->count16_0 = 0;
<> 157:ff67d9f36b67 77 tmr->count16_1 = 0;
<> 157:ff67d9f36b67 78
<> 157:ff67d9f36b67 79 // Clear interrupt flag
<> 157:ff67d9f36b67 80 tmr->intfl = MXC_F_TMR_INTFL_TIMER0 | MXC_F_TMR_INTFL_TIMER1;
<> 157:ff67d9f36b67 81
<> 157:ff67d9f36b67 82 return E_NO_ERROR;
<> 157:ff67d9f36b67 83 }
<> 157:ff67d9f36b67 84
<> 157:ff67d9f36b67 85 /* ************************************************************************* */
<> 157:ff67d9f36b67 86 void TMR32_Config(mxc_tmr_regs_t *tmr, const tmr32_cfg_t *config)
<> 157:ff67d9f36b67 87 {
<> 157:ff67d9f36b67 88 //stop timer
<> 157:ff67d9f36b67 89 TMR32_Stop(tmr);
<> 157:ff67d9f36b67 90
<> 157:ff67d9f36b67 91 //setup timer configuration register
<> 157:ff67d9f36b67 92 //clear tmr2x16 (32bit mode), mode and polarity bits
<> 157:ff67d9f36b67 93 tmr->ctrl &= ~(MXC_F_TMR_CTRL_TMR2X16 | MXC_F_TMR_CTRL_MODE |
<> 157:ff67d9f36b67 94 MXC_F_TMR_CTRL_POLARITY);
<> 157:ff67d9f36b67 95
<> 157:ff67d9f36b67 96 //set mode and polarity
<> 157:ff67d9f36b67 97 tmr->ctrl |= ((config->mode << MXC_F_TMR_CTRL_MODE_POS) |
<> 157:ff67d9f36b67 98 (config->polarity << MXC_F_TMR_CTRL_POLARITY_POS));
<> 157:ff67d9f36b67 99
<> 157:ff67d9f36b67 100 //setup timer Tick registers
<> 157:ff67d9f36b67 101 tmr->term_cnt32 = config->compareCount;
<> 157:ff67d9f36b67 102
<> 157:ff67d9f36b67 103 return;
<> 157:ff67d9f36b67 104 }
<> 157:ff67d9f36b67 105
<> 157:ff67d9f36b67 106 /* ************************************************************************* */
<> 157:ff67d9f36b67 107 void TMR32_PWMConfig(mxc_tmr_regs_t *tmr, const tmr32_cfg_pwm_t *config)
<> 157:ff67d9f36b67 108 {
<> 157:ff67d9f36b67 109 //stop timer
<> 157:ff67d9f36b67 110 TMR32_Stop(tmr);
<> 157:ff67d9f36b67 111
<> 157:ff67d9f36b67 112 //setup timer configuration register
<> 157:ff67d9f36b67 113 //clear tmr2x16 (32bit mode), mode and polarity bits
<> 157:ff67d9f36b67 114 tmr->ctrl &= ~(MXC_F_TMR_CTRL_TMR2X16 | MXC_F_TMR_CTRL_MODE |
<> 157:ff67d9f36b67 115 MXC_F_TMR_CTRL_POLARITY);
<> 157:ff67d9f36b67 116
<> 157:ff67d9f36b67 117 //set mode and polarity
<> 157:ff67d9f36b67 118 tmr->ctrl |= ((TMR32_MODE_PWM << MXC_F_TMR_CTRL_MODE_POS) |
<> 157:ff67d9f36b67 119 (config->polarity << MXC_F_TMR_CTRL_POLARITY_POS));
<> 157:ff67d9f36b67 120
<> 157:ff67d9f36b67 121 tmr->pwm_cap32 = config->dutyCount;
<> 157:ff67d9f36b67 122
<> 157:ff67d9f36b67 123 //setup timer Tick registers
<> 157:ff67d9f36b67 124 tmr->count32 = 0;
<> 157:ff67d9f36b67 125 tmr->term_cnt32 = config->periodCount;
<> 157:ff67d9f36b67 126
<> 157:ff67d9f36b67 127 return;
<> 157:ff67d9f36b67 128 }
<> 157:ff67d9f36b67 129
<> 157:ff67d9f36b67 130 /* ************************************************************************* */
<> 157:ff67d9f36b67 131 void TMR16_Config(mxc_tmr_regs_t *tmr, uint8_t index, const tmr16_cfg_t *config)
<> 157:ff67d9f36b67 132 {
<> 157:ff67d9f36b67 133 //stop timer
<> 157:ff67d9f36b67 134 TMR16_Stop(tmr, index);
<> 157:ff67d9f36b67 135
<> 157:ff67d9f36b67 136 if(index > 0) { //configure timer 16_1
<> 157:ff67d9f36b67 137
<> 157:ff67d9f36b67 138 //setup timer configuration register
<> 157:ff67d9f36b67 139 tmr->ctrl |= MXC_F_TMR_CTRL_TMR2X16; //1 = 16bit mode
<> 157:ff67d9f36b67 140
<> 157:ff67d9f36b67 141 //set mode
<> 157:ff67d9f36b67 142 if(config->mode)
<> 157:ff67d9f36b67 143 tmr->ctrl |= MXC_F_TMR_CTRL_MODE_16_1;
<> 157:ff67d9f36b67 144 else
<> 157:ff67d9f36b67 145 tmr->ctrl &= ~MXC_F_TMR_CTRL_MODE_16_1;
<> 157:ff67d9f36b67 146
<> 157:ff67d9f36b67 147 //setup timer Ticks registers
<> 157:ff67d9f36b67 148 tmr->term_cnt16_1 = config->compareCount;
<> 157:ff67d9f36b67 149 } else { //configure timer 16_0
<> 157:ff67d9f36b67 150
<> 157:ff67d9f36b67 151 //setup timer configuration register
<> 157:ff67d9f36b67 152 tmr->ctrl |= MXC_F_TMR_CTRL_TMR2X16; //1 = 16bit mode
<> 157:ff67d9f36b67 153
<> 157:ff67d9f36b67 154 //set mode
<> 157:ff67d9f36b67 155 if(config->mode)
<> 157:ff67d9f36b67 156 tmr->ctrl |= MXC_F_TMR_CTRL_MODE_16_0;
<> 157:ff67d9f36b67 157 else
<> 157:ff67d9f36b67 158 tmr->ctrl &= ~MXC_F_TMR_CTRL_MODE_16_0;
<> 157:ff67d9f36b67 159
<> 157:ff67d9f36b67 160 //setup timer Ticks registers
<> 157:ff67d9f36b67 161 tmr->term_cnt16_0 = config->compareCount;
<> 157:ff67d9f36b67 162 }
<> 157:ff67d9f36b67 163
<> 157:ff67d9f36b67 164 return;
<> 157:ff67d9f36b67 165 }
<> 157:ff67d9f36b67 166
<> 157:ff67d9f36b67 167 /* ************************************************************************* */
<> 157:ff67d9f36b67 168 void TMR32_Start(mxc_tmr_regs_t *tmr)
<> 157:ff67d9f36b67 169 {
<> 157:ff67d9f36b67 170 int tmrNum;
<> 157:ff67d9f36b67 171 uint32_t ctrl;
<> 157:ff67d9f36b67 172
<> 157:ff67d9f36b67 173 //get the timer number
<> 157:ff67d9f36b67 174 tmrNum = MXC_TMR_GET_IDX(tmr);
<> 157:ff67d9f36b67 175
<> 157:ff67d9f36b67 176 //prescaler gets reset to 0 when timer is disabled
<> 157:ff67d9f36b67 177 //set the prescale to the saved value for this timer
<> 157:ff67d9f36b67 178 ctrl = tmr->ctrl;
<> 157:ff67d9f36b67 179 ctrl &= ~(MXC_F_TMR_CTRL_PRESCALE); //clear prescaler bits
<> 157:ff67d9f36b67 180 ctrl |= prescaler[tmrNum] << MXC_F_TMR_CTRL_PRESCALE_POS; //set prescaler
<> 157:ff67d9f36b67 181 ctrl |= MXC_F_TMR_CTRL_ENABLE0; //set enable to start the timer
<> 157:ff67d9f36b67 182
<> 157:ff67d9f36b67 183 tmr->ctrl = ctrl;
<> 157:ff67d9f36b67 184
<> 157:ff67d9f36b67 185 return;
<> 157:ff67d9f36b67 186 }
<> 157:ff67d9f36b67 187
<> 157:ff67d9f36b67 188 /* ************************************************************************* */
<> 157:ff67d9f36b67 189 void TMR16_Start(mxc_tmr_regs_t *tmr, uint8_t index)
<> 157:ff67d9f36b67 190 {
<> 157:ff67d9f36b67 191 int tmrNum;
<> 157:ff67d9f36b67 192 uint32_t ctrl;
<> 157:ff67d9f36b67 193
<> 157:ff67d9f36b67 194 //get the timer number
<> 157:ff67d9f36b67 195 tmrNum = MXC_TMR_GET_IDX(tmr);
<> 157:ff67d9f36b67 196
<> 157:ff67d9f36b67 197 ctrl = tmr->ctrl;
<> 157:ff67d9f36b67 198
<> 157:ff67d9f36b67 199 //prescaler gets reset to 0 when both 16 bit timers are disabled
<> 157:ff67d9f36b67 200 //set the prescale to the saved value for this timer if is is not already set
<> 157:ff67d9f36b67 201 if((ctrl & MXC_F_TMR_CTRL_PRESCALE) != (uint32_t)(prescaler[tmrNum] << MXC_F_TMR_CTRL_PRESCALE_POS)) {
<> 157:ff67d9f36b67 202 ctrl &= ~(MXC_F_TMR_CTRL_PRESCALE); //clear prescaler bits
<> 157:ff67d9f36b67 203 ctrl |= prescaler[tmrNum] << MXC_F_TMR_CTRL_PRESCALE_POS; //set prescaler
<> 157:ff67d9f36b67 204 }
<> 157:ff67d9f36b67 205
<> 157:ff67d9f36b67 206 if(index > 0)
<> 157:ff67d9f36b67 207 ctrl |= MXC_F_TMR_CTRL_ENABLE1; //start timer 16_1
<> 157:ff67d9f36b67 208 else
<> 157:ff67d9f36b67 209 ctrl |= MXC_F_TMR_CTRL_ENABLE0; //start timer 16_0
<> 157:ff67d9f36b67 210
<> 157:ff67d9f36b67 211 tmr->ctrl = ctrl;
<> 157:ff67d9f36b67 212
<> 157:ff67d9f36b67 213 return;
<> 157:ff67d9f36b67 214 }
<> 157:ff67d9f36b67 215
<> 157:ff67d9f36b67 216 /* ************************************************************************* */
<> 157:ff67d9f36b67 217 uint32_t TMR_GetPrescaler(mxc_tmr_regs_t *tmr)
<> 157:ff67d9f36b67 218 {
<> 157:ff67d9f36b67 219 int tmrNum;
<> 157:ff67d9f36b67 220
<> 157:ff67d9f36b67 221 //get the timer number
<> 157:ff67d9f36b67 222 tmrNum = MXC_TMR_GET_IDX(tmr);
<> 157:ff67d9f36b67 223
<> 157:ff67d9f36b67 224 return ((uint32_t)prescaler[tmrNum]);
<> 157:ff67d9f36b67 225 }
<> 157:ff67d9f36b67 226
<> 157:ff67d9f36b67 227
<> 157:ff67d9f36b67 228 /* ************************************************************************* */
<> 157:ff67d9f36b67 229 int TMR32_GetPWMTicks(mxc_tmr_regs_t *tmr, uint8_t dutyPercent, uint32_t freq, uint32_t *dutyTicks, uint32_t *periodTicks)
<> 157:ff67d9f36b67 230 {
<> 157:ff67d9f36b67 231 uint32_t timerClock;
<> 157:ff67d9f36b67 232 uint32_t prescale;
<> 157:ff67d9f36b67 233 uint64_t ticks;
<> 157:ff67d9f36b67 234
<> 157:ff67d9f36b67 235 if(dutyPercent > 100)
<> 157:ff67d9f36b67 236 return E_BAD_PARAM;
<> 157:ff67d9f36b67 237
<> 157:ff67d9f36b67 238 if(freq == 0)
<> 157:ff67d9f36b67 239 return E_BAD_PARAM;
<> 157:ff67d9f36b67 240
<> 157:ff67d9f36b67 241 timerClock = SYS_TMR_GetFreq(tmr);
<> 157:ff67d9f36b67 242 prescale = TMR_GetPrescaler(tmr);
<> 157:ff67d9f36b67 243
<> 157:ff67d9f36b67 244 if(timerClock == 0 || prescale > TMR_PRESCALE_DIV_2_12)
<> 157:ff67d9f36b67 245 return E_UNINITIALIZED;
<> 157:ff67d9f36b67 246
<> 157:ff67d9f36b67 247 ticks = timerClock / (1 << (prescale & 0xF)) / freq;
<> 157:ff67d9f36b67 248
<> 157:ff67d9f36b67 249 //make sure ticks is within a 32 bit value
<> 157:ff67d9f36b67 250 if (!(ticks & 0xffffffff00000000) && (ticks & 0xffffffff)) {
<> 157:ff67d9f36b67 251 *periodTicks = ticks;
<> 157:ff67d9f36b67 252
<> 157:ff67d9f36b67 253 *dutyTicks = ((uint64_t)*periodTicks * dutyPercent) / 100;
<> 157:ff67d9f36b67 254
<> 157:ff67d9f36b67 255 return E_NO_ERROR;
<> 157:ff67d9f36b67 256 }
<> 157:ff67d9f36b67 257
<> 157:ff67d9f36b67 258 return E_INVALID;
<> 157:ff67d9f36b67 259 }
<> 157:ff67d9f36b67 260
<> 157:ff67d9f36b67 261 /* ************************************************************************* */
<> 157:ff67d9f36b67 262 int TMR32_TimeToTicks(mxc_tmr_regs_t *tmr, uint32_t time, tmr_unit_t units, uint32_t *ticks)
<> 157:ff67d9f36b67 263 {
<> 157:ff67d9f36b67 264 uint32_t unit_div0, unit_div1;
<> 157:ff67d9f36b67 265 uint32_t timerClock;
<> 157:ff67d9f36b67 266 uint32_t prescale;
<> 157:ff67d9f36b67 267 uint64_t temp_ticks;
<> 157:ff67d9f36b67 268
<> 157:ff67d9f36b67 269 timerClock = SYS_TMR_GetFreq(tmr);
<> 157:ff67d9f36b67 270 prescale = TMR_GetPrescaler(tmr);
<> 157:ff67d9f36b67 271
<> 157:ff67d9f36b67 272 if(timerClock == 0 || prescale > TMR_PRESCALE_DIV_2_12)
<> 157:ff67d9f36b67 273 return E_UNINITIALIZED;
<> 157:ff67d9f36b67 274
<> 157:ff67d9f36b67 275 switch (units) {
<> 157:ff67d9f36b67 276 case TMR_UNIT_NANOSEC:
<> 157:ff67d9f36b67 277 unit_div0 = 1000000;
<> 157:ff67d9f36b67 278 unit_div1 = 1000;
<> 157:ff67d9f36b67 279 break;
<> 157:ff67d9f36b67 280 case TMR_UNIT_MICROSEC:
<> 157:ff67d9f36b67 281 unit_div0 = 1000;
<> 157:ff67d9f36b67 282 unit_div1 = 1000;
<> 157:ff67d9f36b67 283 break;
<> 157:ff67d9f36b67 284 case TMR_UNIT_MILLISEC:
<> 157:ff67d9f36b67 285 unit_div0 = 1;
<> 157:ff67d9f36b67 286 unit_div1 = 1000;
<> 157:ff67d9f36b67 287 break;
<> 157:ff67d9f36b67 288 case TMR_UNIT_SEC:
<> 157:ff67d9f36b67 289 unit_div0 = 1;
<> 157:ff67d9f36b67 290 unit_div1 = 1;
<> 157:ff67d9f36b67 291 break;
<> 157:ff67d9f36b67 292 default:
<> 157:ff67d9f36b67 293 return E_BAD_PARAM;
<> 157:ff67d9f36b67 294 }
<> 157:ff67d9f36b67 295
<> 157:ff67d9f36b67 296 temp_ticks = (uint64_t)time * (timerClock / unit_div0) / (unit_div1 * (1 << (prescale & 0xF)));
<> 157:ff67d9f36b67 297
<> 157:ff67d9f36b67 298 //make sure ticks is within a 32 bit value
<> 157:ff67d9f36b67 299 if (!(temp_ticks & 0xffffffff00000000) && (temp_ticks & 0xffffffff)) {
<> 157:ff67d9f36b67 300 *ticks = temp_ticks;
<> 157:ff67d9f36b67 301 return E_NO_ERROR;
<> 157:ff67d9f36b67 302 }
<> 157:ff67d9f36b67 303
<> 157:ff67d9f36b67 304 return E_INVALID;
<> 157:ff67d9f36b67 305 }
<> 157:ff67d9f36b67 306
<> 157:ff67d9f36b67 307 /* ************************************************************************* */
<> 157:ff67d9f36b67 308 int TMR16_TimeToTicks(mxc_tmr_regs_t *tmr, uint32_t time, tmr_unit_t units, uint16_t *ticks)
<> 157:ff67d9f36b67 309 {
<> 157:ff67d9f36b67 310 uint32_t unit_div0, unit_div1;
<> 157:ff67d9f36b67 311 uint32_t timerClock;
<> 157:ff67d9f36b67 312 uint32_t prescale;
<> 157:ff67d9f36b67 313 uint64_t temp_ticks;
<> 157:ff67d9f36b67 314
<> 157:ff67d9f36b67 315 timerClock = SYS_TMR_GetFreq(tmr);
<> 157:ff67d9f36b67 316 prescale = TMR_GetPrescaler(tmr);
<> 157:ff67d9f36b67 317
<> 157:ff67d9f36b67 318 if(timerClock == 0 || prescale > TMR_PRESCALE_DIV_2_12)
<> 157:ff67d9f36b67 319 return E_UNINITIALIZED;
<> 157:ff67d9f36b67 320
<> 157:ff67d9f36b67 321 switch (units) {
<> 157:ff67d9f36b67 322 case TMR_UNIT_NANOSEC:
<> 157:ff67d9f36b67 323 unit_div0 = 1000000;
<> 157:ff67d9f36b67 324 unit_div1 = 1000;
<> 157:ff67d9f36b67 325 break;
<> 157:ff67d9f36b67 326 case TMR_UNIT_MICROSEC:
<> 157:ff67d9f36b67 327 unit_div0 = 1000;
<> 157:ff67d9f36b67 328 unit_div1 = 1000;
<> 157:ff67d9f36b67 329 break;
<> 157:ff67d9f36b67 330 case TMR_UNIT_MILLISEC:
<> 157:ff67d9f36b67 331 unit_div0 = 1;
<> 157:ff67d9f36b67 332 unit_div1 = 1000;
<> 157:ff67d9f36b67 333 break;
<> 157:ff67d9f36b67 334 case TMR_UNIT_SEC:
<> 157:ff67d9f36b67 335 unit_div0 = 1;
<> 157:ff67d9f36b67 336 unit_div1 = 1;
<> 157:ff67d9f36b67 337 break;
<> 157:ff67d9f36b67 338 default:
<> 157:ff67d9f36b67 339 return E_BAD_PARAM;
<> 157:ff67d9f36b67 340 }
<> 157:ff67d9f36b67 341
<> 157:ff67d9f36b67 342 temp_ticks = (uint64_t)time * (timerClock / unit_div0) / (unit_div1 * (1 << (prescale & 0xF)));
<> 157:ff67d9f36b67 343
<> 157:ff67d9f36b67 344 //make sure ticks is within a 32 bit value
<> 157:ff67d9f36b67 345 if (!(temp_ticks & 0xffffffffffff0000) && (temp_ticks & 0xffff)) {
<> 157:ff67d9f36b67 346 *ticks = temp_ticks;
<> 157:ff67d9f36b67 347 return E_NO_ERROR;
<> 157:ff67d9f36b67 348 }
<> 157:ff67d9f36b67 349
<> 157:ff67d9f36b67 350 return E_INVALID;
<> 157:ff67d9f36b67 351 }
<> 157:ff67d9f36b67 352
<> 157:ff67d9f36b67 353
<> 157:ff67d9f36b67 354 /* ************************************************************************* */
<> 157:ff67d9f36b67 355 int TMR_TicksToTime(mxc_tmr_regs_t *tmr, uint32_t ticks, uint32_t *time, tmr_unit_t *units)
<> 157:ff67d9f36b67 356 {
<> 157:ff67d9f36b67 357 uint64_t temp_time = 0;
<> 157:ff67d9f36b67 358
<> 157:ff67d9f36b67 359 uint32_t timerClock = SYS_TMR_GetFreq(tmr);
<> 157:ff67d9f36b67 360 uint32_t prescale = TMR_GetPrescaler(tmr);
<> 157:ff67d9f36b67 361
<> 157:ff67d9f36b67 362 if(timerClock == 0 || prescale > TMR_PRESCALE_DIV_2_12)
<> 157:ff67d9f36b67 363 return E_UNINITIALIZED;
<> 157:ff67d9f36b67 364
<> 157:ff67d9f36b67 365 tmr_unit_t temp_unit = TMR_UNIT_NANOSEC;
<> 157:ff67d9f36b67 366 temp_time = (uint64_t)ticks * 1000 * (1 << (prescale & 0xF)) / (timerClock / 1000000);
<> 157:ff67d9f36b67 367 if (!(temp_time & 0xffffffff00000000)) {
<> 157:ff67d9f36b67 368 *time = temp_time;
<> 157:ff67d9f36b67 369 *units = temp_unit;
<> 157:ff67d9f36b67 370 return E_NO_ERROR;
<> 157:ff67d9f36b67 371 }
<> 157:ff67d9f36b67 372
<> 157:ff67d9f36b67 373 temp_unit = TMR_UNIT_MICROSEC;
<> 157:ff67d9f36b67 374 temp_time = (uint64_t)ticks * 1000 * (1 << (prescale & 0xF)) / (timerClock / 1000);
<> 157:ff67d9f36b67 375 if (!(temp_time & 0xffffffff00000000)) {
<> 157:ff67d9f36b67 376 *time = temp_time;
<> 157:ff67d9f36b67 377 *units = temp_unit;
<> 157:ff67d9f36b67 378 return E_NO_ERROR;
<> 157:ff67d9f36b67 379 }
<> 157:ff67d9f36b67 380
<> 157:ff67d9f36b67 381 temp_unit = TMR_UNIT_MILLISEC;
<> 157:ff67d9f36b67 382 temp_time = (uint64_t)ticks * 1000 * (1 << (prescale & 0xF)) / timerClock;
<> 157:ff67d9f36b67 383 if (!(temp_time & 0xffffffff00000000)) {
<> 157:ff67d9f36b67 384 *time = temp_time;
<> 157:ff67d9f36b67 385 *units = temp_unit;
<> 157:ff67d9f36b67 386 return E_NO_ERROR;
<> 157:ff67d9f36b67 387 }
<> 157:ff67d9f36b67 388
<> 157:ff67d9f36b67 389 temp_unit = TMR_UNIT_SEC;
<> 157:ff67d9f36b67 390 temp_time = (uint64_t)ticks * (1 << (prescale & 0xF)) / timerClock;
<> 157:ff67d9f36b67 391 if (!(temp_time & 0xffffffff00000000)) {
<> 157:ff67d9f36b67 392 *time = temp_time;
<> 157:ff67d9f36b67 393 *units = temp_unit;
<> 157:ff67d9f36b67 394 return E_NO_ERROR;
<> 157:ff67d9f36b67 395 }
<> 157:ff67d9f36b67 396
<> 157:ff67d9f36b67 397 return E_INVALID;
<> 157:ff67d9f36b67 398 }
<> 157:ff67d9f36b67 399 /**@} end of ingroup tmr */