Umar Naeem / mbed-dev

mbed library sources. Supersedes mbed-src.

Fork of mbed-dev by Umar Naeem

targets/TARGET_ONSEMI/TARGET_NCS36510/Pad.c@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Child:
150:02e0a0aed4ec
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 #ifdef REVD
<> 149:156823d33999 2 /**
<> 149:156823d33999 3 ******************************************************************************
<> 149:156823d33999 4 * @file pad.c
<> 149:156823d33999 5 * @brief PAD management support code
<> 149:156823d33999 6 * @internal
<> 149:156823d33999 7 * @author ON Semiconductor
<> 149:156823d33999 8 * $Rev: 2848 $
<> 149:156823d33999 9 * $Date: 2014-04-01 22:48:18 +0530 (Tue, 01 Apr 2014) $
<> 149:156823d33999 10 ******************************************************************************
<> 149:156823d33999 11 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
<> 149:156823d33999 12 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
<> 149:156823d33999 13 * under limited terms and conditions. The terms and conditions pertaining to the software
<> 149:156823d33999 14 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
<> 149:156823d33999 15 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
<> 149:156823d33999 16 * if applicable the software license agreement. Do not use this software and/or
<> 149:156823d33999 17 * documentation unless you have carefully read and you agree to the limited terms and
<> 149:156823d33999 18 * conditions. By using this software and/or documentation, you agree to the limited
<> 149:156823d33999 19 * terms and conditions.
<> 149:156823d33999 20 *
<> 149:156823d33999 21 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 149:156823d33999 22 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 149:156823d33999 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 149:156823d33999 24 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 149:156823d33999 25 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 149:156823d33999 26 * @endinternal
<> 149:156823d33999 27 *
<> 149:156823d33999 28 * @ingroup pad
<> 149:156823d33999 29 *
<> 149:156823d33999 30 * @details
<> 149:156823d33999 31 */
<> 149:156823d33999 32
<> 149:156823d33999 33 /*************************************************************************************************
<> 149:156823d33999 34 * *
<> 149:156823d33999 35 * Header files *
<> 149:156823d33999 36 * *
<> 149:156823d33999 37 *************************************************************************************************/
<> 149:156823d33999 38
<> 149:156823d33999 39 #include "memory_map.h"
<> 149:156823d33999 40 #include "pad_map.h"
<> 149:156823d33999 41 #include "clock.h"
<> 149:156823d33999 42
<> 149:156823d33999 43 /*************************************************************************************************
<> 149:156823d33999 44 * *
<> 149:156823d33999 45 * Symbolic Constants *
<> 149:156823d33999 46 * *
<> 149:156823d33999 47 *************************************************************************************************/
<> 149:156823d33999 48 #define PAD_CTRL_OP_DRIVE_STRENGTH_MASK (uint32_t)0x1C
<> 149:156823d33999 49 #define PAD_NUM_OF_IO 17
<> 149:156823d33999 50 #define PAD_OP_DRIVE_STRGTH_MAX 7
<> 149:156823d33999 51 #define PAD_OP_DRIVE_TYPE_MAX 1
<> 149:156823d33999 52 #define PAD_OP_PULL_TYPE_MAX 3
<> 149:156823d33999 53
<> 149:156823d33999 54 #define PAD_REG_ADRS_BYTE_SIZE 4
<> 149:156823d33999 55
<> 149:156823d33999 56 #define PAD_OP_DRIVE_STRGTH_BIT_POS 2
<> 149:156823d33999 57 #define PAD_OP_DRIVE_TYPE_BIT_POS 5
<> 149:156823d33999 58 #define PAD_OP_PULL_TYPE_BIT_POS 0
<> 149:156823d33999 59
<> 149:156823d33999 60 /*************************************************************************************************
<> 149:156823d33999 61 * *
<> 149:156823d33999 62 * Global variables *
<> 149:156823d33999 63 * *
<> 149:156823d33999 64 *************************************************************************************************/
<> 149:156823d33999 65
<> 149:156823d33999 66 /* Peripheral PAD register mutex */
<> 149:156823d33999 67 /* sem_pt GlobMutexPadReg; */
<> 149:156823d33999 68
<> 149:156823d33999 69 /*************************************************************************************************
<> 149:156823d33999 70 * *
<> 149:156823d33999 71 * Functions *
<> 149:156823d33999 72 * *
<> 149:156823d33999 73 *************************************************************************************************/
<> 149:156823d33999 74
<> 149:156823d33999 75 /** Find description at pad.h */
<> 149:156823d33999 76 void fPadInit()
<> 149:156823d33999 77 {
<> 149:156823d33999 78 /** - Enable the clock for PAD peripheral device */
<> 149:156823d33999 79 CLOCK_ENABLE(CLOCK_PAD);
<> 149:156823d33999 80
<> 149:156823d33999 81 /** - Set pad parameters, output drive strength, pull piece control, output drive type */
<> 149:156823d33999 82 PADREG->PADIO0.WORD = PAD_OUTPUT_PN_L1_OD; /* UART1 TXD */
<> 149:156823d33999 83 PADREG->PADIO1.WORD = PAD_INPUT_PD_L1_PP; /* UART1 RXD */
<> 149:156823d33999 84 PADREG->PADIO2.WORD = PAD_INPUT_PD_L1_PP; /* UART1 CTS */
<> 149:156823d33999 85 PADREG->PADIO3.WORD = PAD_OUTPUT_PN_L1_OD; /* UART1 RTS */
<> 149:156823d33999 86 PADREG->PADIO4.WORD = PAD_UNUSED_PD_L0_PP;
<> 149:156823d33999 87 PADREG->PADIO5.WORD = PAD_UNUSED_PD_L0_PP;
<> 149:156823d33999 88 PADREG->PADIO6.WORD = PAD_UNUSED_PD_L0_PP;
<> 149:156823d33999 89 PADREG->PADIO7.WORD = PAD_UNUSED_PD_L0_PP;
<> 149:156823d33999 90 PADREG->PADIO8.WORD = PAD_OUTPUT_PN_L1_OD; /* UART2 TXD */
<> 149:156823d33999 91 PADREG->PADIO9.WORD = PAD_INPUT_PD_L1_PP; /* UART2 RXD */
<> 149:156823d33999 92 PADREG->PADIO10.WORD = PAD_UNUSED_PD_L0_PP;
<> 149:156823d33999 93 PADREG->PADIO11.WORD = PAD_INPUT_PD_L1_PP; /* SWO */
<> 149:156823d33999 94 PADREG->PADIO12.WORD = PAD_INPUT_PD_L1_PP; /* SWCLK */
<> 149:156823d33999 95 PADREG->PADIO13.WORD = PAD_INPUT_PD_L1_PP; /* SWDIO */
<> 149:156823d33999 96 PADREG->PADIO14.WORD = PAD_INPUT_PD_L1_PP;
<> 149:156823d33999 97 PADREG->PADIO15.WORD = PAD_UNUSED_PD_L0_PP;
<> 149:156823d33999 98 PADREG->PADIO16.WORD = PAD_UNUSED_PD_L0_PP;
<> 149:156823d33999 99 PADREG->PADIO17.WORD = PAD_UNUSED_PD_L0_PP;
<> 149:156823d33999 100
<> 149:156823d33999 101 /** - Disable the clock for PAD peripheral device */
<> 149:156823d33999 102 CLOCK_DISABLE(CLOCK_PAD);
<> 149:156823d33999 103
<> 149:156823d33999 104 }
<> 149:156823d33999 105
<> 149:156823d33999 106 /** Find description at pad.h */
<> 149:156823d33999 107 boolean fPadIOCtrl(uint8_t PadNum, uint8_t OutputDriveStrength, uint8_t OutputDriveType, uint8_t PullType)
<> 149:156823d33999 108 {
<> 149:156823d33999 109 PadReg_t *PadRegOffset;
<> 149:156823d33999 110 /** \verbatim
<> 149:156823d33999 111 Table: O/p drive strength
<> 149:156823d33999 112
<> 149:156823d33999 113 Drive strength 3.3V (min/typ/max) 1V (min/typ/max)
<> 149:156823d33999 114 000 1/1.4/2.1 mA 0.043/0.07/0.11 mA
<> 149:156823d33999 115 001 2/2.7/4.1 mA 0.086/0.15/0.215 mA
<> 149:156823d33999 116 010 4.1/5.3/7.8 mA 0.188/0.3/0.4 mA
<> 149:156823d33999 117 011 8.1/10.4/15 8 mA 0.4/0.6/0.81 mA
<> 149:156823d33999 118 100 20.8/26/37 mA* 1/1.6/2.2 mA
<> 149:156823d33999 119 101 40.5/50/70 mA* 2/3/4.3 mA
<> 149:156823d33999 120 11x 57/73/102 mA* 3/4.6/6.2 mA
<> 149:156823d33999 121
<> 149:156823d33999 122 *Values are only accessible when CDBGPWRUPREQ is high. This limits the maximum output current in functional mode. \endverbatim */
<> 149:156823d33999 123
<> 149:156823d33999 124
<> 149:156823d33999 125 if((PadNum <= PAD_NUM_OF_IO) &&
<> 149:156823d33999 126 (OutputDriveStrength <= PAD_OP_DRIVE_STRGTH_MAX) &&
<> 149:156823d33999 127 (OutputDriveType <= PAD_OP_DRIVE_TYPE_MAX) && (PullType <= PAD_OP_PULL_TYPE_MAX)) {
<> 149:156823d33999 128 /** - Get PAD IO register address for the PAD number */
<> 149:156823d33999 129 PadRegOffset = (PadReg_t*)(PADREG_BASE + (PadNum * PAD_REG_ADRS_BYTE_SIZE));
<> 149:156823d33999 130
<> 149:156823d33999 131 /** - Enable the clock for PAD peripheral device */
<> 149:156823d33999 132 CLOCK_ENABLE(CLOCK_PAD);
<> 149:156823d33999 133
<> 149:156823d33999 134 /** - Set drive type, pulltype & drive strength */
<> 149:156823d33999 135 PadRegOffset->PADIO0.WORD = (uint32_t)((PullType << PAD_OP_PULL_TYPE_BIT_POS) |
<> 149:156823d33999 136 (OutputDriveStrength << PAD_OP_DRIVE_STRGTH_BIT_POS) |
<> 149:156823d33999 137 (OutputDriveType << PAD_OP_DRIVE_TYPE_BIT_POS));
<> 149:156823d33999 138
<> 149:156823d33999 139 /** - Disable the clock for PAD peripheral device */
<> 149:156823d33999 140 CLOCK_DISABLE(CLOCK_PAD);
<> 149:156823d33999 141 return True;
<> 149:156823d33999 142 }
<> 149:156823d33999 143 /* Invalid parameter/s */
<> 149:156823d33999 144 return False;
<> 149:156823d33999 145 }
<> 149:156823d33999 146 #endif /* REVD */