mbed library sources. Supersedes mbed-src.

Fork of mbed-dev by Umar Naeem

Committer:
ranaumarnaeem
Date:
Tue May 23 12:54:50 2017 +0000
Revision:
165:2dd56e6daeec
Parent:
149:156823d33999
jhjg

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2013 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 #include "rtc_api.h"
<> 144:ef7eb2e8f9f7 17
<> 144:ef7eb2e8f9f7 18 // ensure rtc is running (unchanged if already running)
<> 144:ef7eb2e8f9f7 19
<> 144:ef7eb2e8f9f7 20 /* Setup the RTC based on a time structure, ensuring RTC is enabled
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * Can be clocked by a 32.768KHz oscillator or prescale divider based on the APB clock
<> 144:ef7eb2e8f9f7 23 * - We want to use the 32khz clock, allowing for sleep mode
<> 144:ef7eb2e8f9f7 24 *
<> 144:ef7eb2e8f9f7 25 * Most registers are not changed by a Reset
<> 144:ef7eb2e8f9f7 26 * - We must initialize these registers between power-on and setting the RTC into operation
<> 144:ef7eb2e8f9f7 27
<> 144:ef7eb2e8f9f7 28 * Clock Control Register
<> 144:ef7eb2e8f9f7 29 * RTC_CCR[0] : Enable - 0 = Disabled, 1 = Enabled
<> 144:ef7eb2e8f9f7 30 * RTC_CCR[1] : Reset - 0 = Normal, 1 = Reset
<> 144:ef7eb2e8f9f7 31 * RTC_CCR[4] : Clock Source - 0 = Prescaler, 1 = 32k Xtal
<> 144:ef7eb2e8f9f7 32 *
<> 144:ef7eb2e8f9f7 33 * The RTC may already be running, so we should set it up
<> 144:ef7eb2e8f9f7 34 * without impacting if it is the case
<> 144:ef7eb2e8f9f7 35 */
<> 144:ef7eb2e8f9f7 36 void rtc_init(void) {
<> 144:ef7eb2e8f9f7 37 LPC_SC->PCONP |= 0x200; // Ensure power is on
<> 144:ef7eb2e8f9f7 38 LPC_RTC->CCR = 0x00;
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 // clock source on 2368 is special test mode on 1768!
<> 144:ef7eb2e8f9f7 41 LPC_RTC->CCR |= 1 << 4; // Ensure clock source is 32KHz Xtal
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 LPC_RTC->CCR |= 1 << 0; // Ensure the RTC is enabled
<> 144:ef7eb2e8f9f7 44 }
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 void rtc_free(void) {
<> 144:ef7eb2e8f9f7 47 // [TODO]
<> 144:ef7eb2e8f9f7 48 }
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 /*
<> 144:ef7eb2e8f9f7 51 * Little check routine to see if the RTC has been enabled
<> 144:ef7eb2e8f9f7 52 *
<> 144:ef7eb2e8f9f7 53 * Clock Control Register
<> 144:ef7eb2e8f9f7 54 * RTC_CCR[0] : 0 = Disabled, 1 = Enabled
<> 144:ef7eb2e8f9f7 55 *
<> 144:ef7eb2e8f9f7 56 */
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 int rtc_isenabled(void) {
<> 144:ef7eb2e8f9f7 59 return(((LPC_RTC->CCR) & 0x01) != 0);
<> 144:ef7eb2e8f9f7 60 }
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /*
<> 144:ef7eb2e8f9f7 63 * RTC Registers
<> 144:ef7eb2e8f9f7 64 * RTC_SEC Seconds 0-59
<> 144:ef7eb2e8f9f7 65 * RTC_MIN Minutes 0-59
<> 144:ef7eb2e8f9f7 66 * RTC_HOUR Hour 0-23
<> 144:ef7eb2e8f9f7 67 * RTC_DOM Day of Month 1-28..31
<> 144:ef7eb2e8f9f7 68 * RTC_DOW Day of Week 0-6
<> 144:ef7eb2e8f9f7 69 * RTC_DOY Day of Year 1-365
<> 144:ef7eb2e8f9f7 70 * RTC_MONTH Month 1-12
<> 144:ef7eb2e8f9f7 71 * RTC_YEAR Year 0-4095
<> 144:ef7eb2e8f9f7 72 *
<> 144:ef7eb2e8f9f7 73 * struct tm
<> 144:ef7eb2e8f9f7 74 * tm_sec seconds after the minute 0-61
<> 144:ef7eb2e8f9f7 75 * tm_min minutes after the hour 0-59
<> 144:ef7eb2e8f9f7 76 * tm_hour hours since midnight 0-23
<> 144:ef7eb2e8f9f7 77 * tm_mday day of the month 1-31
<> 144:ef7eb2e8f9f7 78 * tm_mon months since January 0-11
<> 144:ef7eb2e8f9f7 79 * tm_year years since 1900
<> 144:ef7eb2e8f9f7 80 * tm_wday days since Sunday 0-6
<> 144:ef7eb2e8f9f7 81 * tm_yday days since January 1 0-365
<> 144:ef7eb2e8f9f7 82 * tm_isdst Daylight Saving Time flag
<> 144:ef7eb2e8f9f7 83 */
<> 144:ef7eb2e8f9f7 84 time_t rtc_read(void) {
<> 144:ef7eb2e8f9f7 85 // Setup a tm structure based on the RTC
<> 144:ef7eb2e8f9f7 86 struct tm timeinfo;
<> 144:ef7eb2e8f9f7 87 timeinfo.tm_sec = LPC_RTC->SEC;
<> 144:ef7eb2e8f9f7 88 timeinfo.tm_min = LPC_RTC->MIN;
<> 144:ef7eb2e8f9f7 89 timeinfo.tm_hour = LPC_RTC->HOUR;
<> 144:ef7eb2e8f9f7 90 timeinfo.tm_mday = LPC_RTC->DOM;
<> 144:ef7eb2e8f9f7 91 timeinfo.tm_mon = LPC_RTC->MONTH - 1;
<> 144:ef7eb2e8f9f7 92 timeinfo.tm_year = LPC_RTC->YEAR - 1900;
<> 144:ef7eb2e8f9f7 93
<> 144:ef7eb2e8f9f7 94 // Convert to timestamp
<> 144:ef7eb2e8f9f7 95 time_t t = mktime(&timeinfo);
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97 return t;
<> 144:ef7eb2e8f9f7 98 }
<> 144:ef7eb2e8f9f7 99
<> 144:ef7eb2e8f9f7 100 void rtc_write(time_t t) {
<> 144:ef7eb2e8f9f7 101 // Convert the time in to a tm
<> 144:ef7eb2e8f9f7 102 struct tm *timeinfo = localtime(&t);
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 // Pause clock, and clear counter register (clears us count)
<> 144:ef7eb2e8f9f7 105 LPC_RTC->CCR |= 2;
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107 // Set the RTC
<> 144:ef7eb2e8f9f7 108 LPC_RTC->SEC = timeinfo->tm_sec;
<> 144:ef7eb2e8f9f7 109 LPC_RTC->MIN = timeinfo->tm_min;
<> 144:ef7eb2e8f9f7 110 LPC_RTC->HOUR = timeinfo->tm_hour;
<> 144:ef7eb2e8f9f7 111 LPC_RTC->DOM = timeinfo->tm_mday;
<> 144:ef7eb2e8f9f7 112 LPC_RTC->MONTH = timeinfo->tm_mon + 1;
<> 144:ef7eb2e8f9f7 113 LPC_RTC->YEAR = timeinfo->tm_year + 1900;
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 // Restart clock
<> 144:ef7eb2e8f9f7 116 LPC_RTC->CCR &= ~((uint32_t)2);
<> 144:ef7eb2e8f9f7 117 }