Umar Naeem / mbed-dev

mbed library sources. Supersedes mbed-src.

Fork of mbed-dev by Umar Naeem

targets/TARGET_Maxim/TARGET_MAX32630/mxc/pt.c@165:2dd56e6daeec, 2017-05-23 (annotated)

Committer:
ranaumarnaeem
Date:
Tue May 23 12:54:50 2017 +0000
Revision:
165:2dd56e6daeec
Parent:
157:ff67d9f36b67 
jhjg

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 157:ff67d9f36b67 1 /**
<> 157:ff67d9f36b67 2 * @file
<> 157:ff67d9f36b67 3 * @brief Pulse Train Engine Function Implementations.
<> 157:ff67d9f36b67 4 */
<> 157:ff67d9f36b67 5 /* *****************************************************************************
<> 157:ff67d9f36b67 6 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 157:ff67d9f36b67 7 *
<> 157:ff67d9f36b67 8 * Permission is hereby granted, free of charge, to any person obtaining a
<> 157:ff67d9f36b67 9 * copy of this software and associated documentation files (the "Software"),
<> 157:ff67d9f36b67 10 * to deal in the Software without restriction, including without limitation
<> 157:ff67d9f36b67 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 157:ff67d9f36b67 12 * and/or sell copies of the Software, and to permit persons to whom the
<> 157:ff67d9f36b67 13 * Software is furnished to do so, subject to the following conditions:
<> 157:ff67d9f36b67 14 *
<> 157:ff67d9f36b67 15 * The above copyright notice and this permission notice shall be included
<> 157:ff67d9f36b67 16 * in all copies or substantial portions of the Software.
<> 157:ff67d9f36b67 17 *
<> 157:ff67d9f36b67 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 157:ff67d9f36b67 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 157:ff67d9f36b67 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 157:ff67d9f36b67 21 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 157:ff67d9f36b67 22 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 157:ff67d9f36b67 23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 157:ff67d9f36b67 24 * OTHER DEALINGS IN THE SOFTWARE.
<> 157:ff67d9f36b67 25 *
<> 157:ff67d9f36b67 26 * Except as contained in this notice, the name of Maxim Integrated
<> 157:ff67d9f36b67 27 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 157:ff67d9f36b67 28 * Products, Inc. Branding Policy.
<> 157:ff67d9f36b67 29 *
<> 157:ff67d9f36b67 30 * The mere transfer of this software does not imply any licenses
<> 157:ff67d9f36b67 31 * of trade secrets, proprietary technology, copyrights, patents,
<> 157:ff67d9f36b67 32 * trademarks, maskwork rights, or any other form of intellectual
<> 157:ff67d9f36b67 33 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 157:ff67d9f36b67 34 * ownership rights.
<> 157:ff67d9f36b67 35 *
<> 157:ff67d9f36b67 36 * $Date: 2016-09-08 17:43:36 -0500 (Thu, 08 Sep 2016) $
<> 157:ff67d9f36b67 37 * $Revision: 24327 $
<> 157:ff67d9f36b67 38 *
<> 157:ff67d9f36b67 39 **************************************************************************** */
<> 157:ff67d9f36b67 40
<> 157:ff67d9f36b67 41 /* **** Includes **** */
<> 157:ff67d9f36b67 42 #include <stddef.h>
<> 157:ff67d9f36b67 43 #include "pt.h"
<> 157:ff67d9f36b67 44
<> 157:ff67d9f36b67 45 /**
<> 157:ff67d9f36b67 46 * @ingroup pulsetrain
<> 157:ff67d9f36b67 47 * @{
<> 157:ff67d9f36b67 48 */
<> 157:ff67d9f36b67 49
<> 157:ff67d9f36b67 50 /* ************************************************************************* */
<> 157:ff67d9f36b67 51 void PT_Init(sys_pt_clk_scale clk_scale)
<> 157:ff67d9f36b67 52 {
<> 157:ff67d9f36b67 53 //disable all pulse trains
<> 157:ff67d9f36b67 54 MXC_PTG->enable = 0;
<> 157:ff67d9f36b67 55
<> 157:ff67d9f36b67 56 //clear all interrupts
<> 157:ff67d9f36b67 57 MXC_PTG->intfl = MXC_PTG->intfl;
<> 157:ff67d9f36b67 58
<> 157:ff67d9f36b67 59 SYS_PT_Init(clk_scale);
<> 157:ff67d9f36b67 60 }
<> 157:ff67d9f36b67 61
<> 157:ff67d9f36b67 62 /* ************************************************************************* */
<> 157:ff67d9f36b67 63 int PT_PTConfig(mxc_pt_regs_t *pt, pt_pt_cfg_t *cfg, const sys_cfg_pt_t *sysCfg)
<> 157:ff67d9f36b67 64 {
<> 157:ff67d9f36b67 65 int err;
<> 157:ff67d9f36b67 66 uint32_t ptClock;
<> 157:ff67d9f36b67 67 uint32_t rate;
<> 157:ff67d9f36b67 68
<> 157:ff67d9f36b67 69 //check for valid base pointer
<> 157:ff67d9f36b67 70 MXC_ASSERT(MXC_PT_GET_IDX(pt) >= 0);
<> 157:ff67d9f36b67 71
<> 157:ff67d9f36b67 72 if(cfg == NULL)
<> 157:ff67d9f36b67 73 return E_NULL_PTR;
<> 157:ff67d9f36b67 74
<> 157:ff67d9f36b67 75 if(cfg->bps == 0)
<> 157:ff67d9f36b67 76 return E_BAD_PARAM;
<> 157:ff67d9f36b67 77
<> 157:ff67d9f36b67 78 //disable pulse train
<> 157:ff67d9f36b67 79 PT_Stop(pt);
<> 157:ff67d9f36b67 80
<> 157:ff67d9f36b67 81 //setup system GPIO configuration
<> 157:ff67d9f36b67 82 if((err = SYS_PT_Config(pt, sysCfg)) != E_NO_ERROR)
<> 157:ff67d9f36b67 83 return err;
<> 157:ff67d9f36b67 84
<> 157:ff67d9f36b67 85 //get PT clock frequency from SYS level
<> 157:ff67d9f36b67 86 ptClock = SYS_PT_GetFreq();
<> 157:ff67d9f36b67 87
<> 157:ff67d9f36b67 88 if(ptClock == 0)
<> 157:ff67d9f36b67 89 return E_UNINITIALIZED;
<> 157:ff67d9f36b67 90
<> 157:ff67d9f36b67 91 if(ptClock < (cfg->bps))
<> 157:ff67d9f36b67 92 return E_BAD_STATE;
<> 157:ff67d9f36b67 93
<> 157:ff67d9f36b67 94 rate = (ptClock / (cfg->bps));
<> 157:ff67d9f36b67 95
<> 157:ff67d9f36b67 96 pt->rate_length = ((rate << MXC_F_PT_RATE_LENGTH_RATE_CONTROL_POS)
<> 157:ff67d9f36b67 97 & MXC_F_PT_RATE_LENGTH_RATE_CONTROL) |
<> 157:ff67d9f36b67 98 ((cfg->ptLength << MXC_F_PT_RATE_LENGTH_MODE_POS)
<> 157:ff67d9f36b67 99 & MXC_F_PT_RATE_LENGTH_MODE);
<> 157:ff67d9f36b67 100
<> 157:ff67d9f36b67 101 pt->train = cfg->pattern;
<> 157:ff67d9f36b67 102 pt->loop = ((cfg->loop << MXC_F_PT_LOOP_COUNT_POS) & MXC_F_PT_LOOP_COUNT) |
<> 157:ff67d9f36b67 103 ((cfg->loopDelay << MXC_F_PT_LOOP_DELAY_POS) & MXC_F_PT_LOOP_DELAY);
<> 157:ff67d9f36b67 104
<> 157:ff67d9f36b67 105 return E_NO_ERROR;
<> 157:ff67d9f36b67 106 }
<> 157:ff67d9f36b67 107
<> 157:ff67d9f36b67 108 /* ************************************************************************* */
<> 157:ff67d9f36b67 109 int PT_SqrWaveConfig(mxc_pt_regs_t *pt, uint32_t freq, const sys_cfg_pt_t *sysCfg)
<> 157:ff67d9f36b67 110 {
<> 157:ff67d9f36b67 111 int err;
<> 157:ff67d9f36b67 112 uint32_t ptClock;
<> 157:ff67d9f36b67 113 uint32_t rate;
<> 157:ff67d9f36b67 114
<> 157:ff67d9f36b67 115 //check for valid base pointer
<> 157:ff67d9f36b67 116 MXC_ASSERT(MXC_PT_GET_IDX(pt) >= 0);
<> 157:ff67d9f36b67 117
<> 157:ff67d9f36b67 118 if(freq == 0)
<> 157:ff67d9f36b67 119 return E_BAD_PARAM;
<> 157:ff67d9f36b67 120
<> 157:ff67d9f36b67 121 //disable pulse train
<> 157:ff67d9f36b67 122 PT_Stop(pt);
<> 157:ff67d9f36b67 123
<> 157:ff67d9f36b67 124 //setup system GPIO configuration
<> 157:ff67d9f36b67 125 if((err = SYS_PT_Config(pt, sysCfg)) != E_NO_ERROR)
<> 157:ff67d9f36b67 126 return err;
<> 157:ff67d9f36b67 127
<> 157:ff67d9f36b67 128 //get PT clock frequency from SYS level
<> 157:ff67d9f36b67 129 ptClock = SYS_PT_GetFreq();
<> 157:ff67d9f36b67 130
<> 157:ff67d9f36b67 131 if(ptClock == 0)
<> 157:ff67d9f36b67 132 return E_UNINITIALIZED;
<> 157:ff67d9f36b67 133
<> 157:ff67d9f36b67 134 if(ptClock < (2*freq))
<> 157:ff67d9f36b67 135 return E_BAD_STATE;
<> 157:ff67d9f36b67 136
<> 157:ff67d9f36b67 137 rate = (ptClock / (2*freq)) + 1;
<> 157:ff67d9f36b67 138
<> 157:ff67d9f36b67 139 pt->rate_length = ((rate << MXC_F_PT_RATE_LENGTH_RATE_CONTROL_POS)
<> 157:ff67d9f36b67 140 & MXC_F_PT_RATE_LENGTH_RATE_CONTROL) |
<> 157:ff67d9f36b67 141 (MXC_V_PT_RATE_LENGTH_MODE_SQUARE_WAVE << MXC_F_PT_RATE_LENGTH_MODE_POS);
<> 157:ff67d9f36b67 142
<> 157:ff67d9f36b67 143 return E_NO_ERROR;
<> 157:ff67d9f36b67 144 }
<> 157:ff67d9f36b67 145 /**@} end of ingroup pulsetrain*/