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pal/Test/all_tests.mk@0:a2cb7295a1f7, 2017-05-14 (annotated)

Committer:
ram54288
Date:
Sun May 14 18:35:07 2017 +0000
Revision:
0:a2cb7295a1f7
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ram54288 0:a2cb7295a1f7 1 # -----------------------------------------------------------------------
ram54288 0:a2cb7295a1f7 2 # Copyright (c) 2016 ARM Limited. All rights reserved.
ram54288 0:a2cb7295a1f7 3 # SPDX-License-Identifier: Apache-2.0
ram54288 0:a2cb7295a1f7 4 # Licensed under the Apache License, Version 2.0 (the License); you may
ram54288 0:a2cb7295a1f7 5 # not use this file except in compliance with the License.
ram54288 0:a2cb7295a1f7 6 # You may obtain a copy of the License at
ram54288 0:a2cb7295a1f7 7 #
ram54288 0:a2cb7295a1f7 8 # http://www.apache.org/licenses/LICENSE-2.0
ram54288 0:a2cb7295a1f7 9 #
ram54288 0:a2cb7295a1f7 10 # Unless required by applicable law or agreed to in writing, software
ram54288 0:a2cb7295a1f7 11 # distributed under the License is distributed on an AS IS BASIS, WITHOUT
ram54288 0:a2cb7295a1f7 12 # WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ram54288 0:a2cb7295a1f7 13 # See the License for the specific language governing permissions and
ram54288 0:a2cb7295a1f7 14 # limitations under the License.
ram54288 0:a2cb7295a1f7 15 # -----------------------------------------------------------------------
ram54288 0:a2cb7295a1f7 16
ram54288 0:a2cb7295a1f7 17
ram54288 0:a2cb7295a1f7 18 ###########################################################################
ram54288 0:a2cb7295a1f7 19 # Define test targets based on PROJECT
ram54288 0:a2cb7295a1f7 20 # Make files that include this must define TARGET_PLATFORM and TARGET_CONFIGURATION_DEFINES
ram54288 0:a2cb7295a1f7 21 #
ram54288 0:a2cb7295a1f7 22 # Clive Bluston
ram54288 0:a2cb7295a1f7 23 ###########################################################################
ram54288 0:a2cb7295a1f7 24
ram54288 0:a2cb7295a1f7 25 # The root of PAL. All sources should be relative to this.
ram54288 0:a2cb7295a1f7 26 #PAL_ROOT = $(dir $(abspath $(lastword $(MAKEFILE_LIST))))
ram54288 0:a2cb7295a1f7 27 PAL_ROOT=..
ram54288 0:a2cb7295a1f7 28 $(info PAL_ROOT=$(PAL_ROOT))
ram54288 0:a2cb7295a1f7 29
ram54288 0:a2cb7295a1f7 30 # output folder:
ram54288 0:a2cb7295a1f7 31 OUT:=$(PAL_ROOT)/out/$(TARGET_PLATFORM)
ram54288 0:a2cb7295a1f7 32 OUTOBJ:=$(OUT)/obj
ram54288 0:a2cb7295a1f7 33 $(OUTOBJ):
ram54288 0:a2cb7295a1f7 34 $(MKDIR_QUIET) $@
ram54288 0:a2cb7295a1f7 35
ram54288 0:a2cb7295a1f7 36
ram54288 0:a2cb7295a1f7 37 INIT_SRC = $(PAL_ROOT)/Source/PAL-Impl/pal_init.c
ram54288 0:a2cb7295a1f7 38
ram54288 0:a2cb7295a1f7 39 RTOS_SRC = $(PAL_ROOT)/Source/PAL-Impl/Modules/RTOS/pal_rtos.c \
ram54288 0:a2cb7295a1f7 40 $(PAL_ROOT)/Source/Port/Reference-Impl/$(TARGET_PLATFORM)/RTOS/pal_plat_rtos.c \
ram54288 0:a2cb7295a1f7 41
ram54288 0:a2cb7295a1f7 42 SOCKET_SRC = $(PAL_ROOT)/Source/PAL-Impl/Modules/Networking/pal_network.c \
ram54288 0:a2cb7295a1f7 43 $(PAL_ROOT)/Source/Port/Reference-Impl/$(TARGET_PLATFORM)/Networking/pal_plat_network.cpp
ram54288 0:a2cb7295a1f7 44
ram54288 0:a2cb7295a1f7 45 UPDATE_SRC =
ram54288 0:a2cb7295a1f7 46
ram54288 0:a2cb7295a1f7 47
ram54288 0:a2cb7295a1f7 48
ram54288 0:a2cb7295a1f7 49 ALL_SRC = $(INIT_SRC) $(RTOS_SRC) $(SOCKET_SRC) $(UPDATE_SRC)
ram54288 0:a2cb7295a1f7 50
ram54288 0:a2cb7295a1f7 51
ram54288 0:a2cb7295a1f7 52
ram54288 0:a2cb7295a1f7 53 #========================================================================
ram54288 0:a2cb7295a1f7 54 ifeq ($(findstring HAS_ALL,$(TARGET_CONFIGURATION_DEFINES)),HAS_ALL)
ram54288 0:a2cb7295a1f7 55 PROJECT=pal_all
ram54288 0:a2cb7295a1f7 56 TYPE=Unitest
ram54288 0:a2cb7295a1f7 57
ram54288 0:a2cb7295a1f7 58 $(PROJECT)_ADDITIONAL_SOURCES:= $(ALL_SRC) \
ram54288 0:a2cb7295a1f7 59 $(PAL_ROOT)/Test/$(TYPE)/pal_socket_test.c \
ram54288 0:a2cb7295a1f7 60 $(PAL_ROOT)/Test/$(TYPE)/pal_socket_test_runner.c \
ram54288 0:a2cb7295a1f7 61 $(PAL_ROOT)/Test/$(TYPE)/pal_rtos_test.c \
ram54288 0:a2cb7295a1f7 62 $(PAL_ROOT)/Test/$(TYPE)/pal_rtos_test_runner.c \
ram54288 0:a2cb7295a1f7 63
ram54288 0:a2cb7295a1f7 64
ram54288 0:a2cb7295a1f7 65 include BUILD_TEST_$(TARGET_PLATFORM).mk
ram54288 0:a2cb7295a1f7 66 else
ram54288 0:a2cb7295a1f7 67 #========================================================================
ram54288 0:a2cb7295a1f7 68 #=======================================================================
ram54288 0:a2cb7295a1f7 69 ifeq ($(findstring HAS_SOCKET,$(TARGET_CONFIGURATION_DEFINES)),HAS_SOCKET)
ram54288 0:a2cb7295a1f7 70 PROJECT=pal_socket
ram54288 0:a2cb7295a1f7 71 TYPE=Unitest
ram54288 0:a2cb7295a1f7 72
ram54288 0:a2cb7295a1f7 73 $(PROJECT)_ADDITIONAL_SOURCES:= $(ALL_SRC)
ram54288 0:a2cb7295a1f7 74
ram54288 0:a2cb7295a1f7 75
ram54288 0:a2cb7295a1f7 76
ram54288 0:a2cb7295a1f7 77 include BUILD_TEST_$(TARGET_PLATFORM).mk
ram54288 0:a2cb7295a1f7 78 endif
ram54288 0:a2cb7295a1f7 79 #========================================================================
ram54288 0:a2cb7295a1f7 80 ifeq ($(findstring HAS_RTOS,$(TARGET_CONFIGURATION_DEFINES)),HAS_RTOS)
ram54288 0:a2cb7295a1f7 81 PROJECT=pal_rtos
ram54288 0:a2cb7295a1f7 82 TYPE=Unitest
ram54288 0:a2cb7295a1f7 83
ram54288 0:a2cb7295a1f7 84 $(PROJECT)_ADDITIONAL_SOURCES:= $(ALL_SRC)
ram54288 0:a2cb7295a1f7 85
ram54288 0:a2cb7295a1f7 86 include BUILD_TEST_$(TARGET_PLATFORM).mk
ram54288 0:a2cb7295a1f7 87 endif
ram54288 0:a2cb7295a1f7 88
ram54288 0:a2cb7295a1f7 89 #========================================================================
ram54288 0:a2cb7295a1f7 90
ram54288 0:a2cb7295a1f7 91 #========================================================================
ram54288 0:a2cb7295a1f7 92 ifeq ($(findstring HAS_UPDATE,$(TARGET_CONFIGURATION_DEFINES)),HAS_UPDATE)
ram54288 0:a2cb7295a1f7 93 PROJECT=pal_update
ram54288 0:a2cb7295a1f7 94 TYPE=Unitest
ram54288 0:a2cb7295a1f7 95
ram54288 0:a2cb7295a1f7 96 $(PROJECT)_ADDITIONAL_SOURCES:= $(ALL_SRC)
ram54288 0:a2cb7295a1f7 97
ram54288 0:a2cb7295a1f7 98 include BUILD_TEST_$(TARGET_PLATFORM).mk
ram54288 0:a2cb7295a1f7 99 endif
ram54288 0:a2cb7295a1f7 100 #========================================================================
ram54288 0:a2cb7295a1f7 101
ram54288 0:a2cb7295a1f7 102 endif