Ram Gandikota / Mbed OS IOTMetronome

FRDM K64F Metronome

mbed-client/test/mbedclient/utest/stub/m2minterfaceimpl_stub.cpp@0:dbad57390bd1, 2017-05-14 (annotated)

Committer:
ram54288
Date:
Sun May 14 18:37:05 2017 +0000
Revision:
0:dbad57390bd1
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ram54288 0:dbad57390bd1 1 /*
ram54288 0:dbad57390bd1 2 * Copyright (c) 2015 ARM Limited. All rights reserved.
ram54288 0:dbad57390bd1 3 * SPDX-License-Identifier: Apache-2.0
ram54288 0:dbad57390bd1 4 * Licensed under the Apache License, Version 2.0 (the License); you may
ram54288 0:dbad57390bd1 5 * not use this file except in compliance with the License.
ram54288 0:dbad57390bd1 6 * You may obtain a copy of the License at
ram54288 0:dbad57390bd1 7 *
ram54288 0:dbad57390bd1 8 * http://www.apache.org/licenses/LICENSE-2.0
ram54288 0:dbad57390bd1 9 *
ram54288 0:dbad57390bd1 10 * Unless required by applicable law or agreed to in writing, software
ram54288 0:dbad57390bd1 11 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
ram54288 0:dbad57390bd1 12 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ram54288 0:dbad57390bd1 13 * See the License for the specific language governing permissions and
ram54288 0:dbad57390bd1 14 * limitations under the License.
ram54288 0:dbad57390bd1 15 */
ram54288 0:dbad57390bd1 16 #include "m2minterfaceimpl_stub.h"
ram54288 0:dbad57390bd1 17 #include "common_stub.h"
ram54288 0:dbad57390bd1 18
ram54288 0:dbad57390bd1 19 u_int8_t m2minterfaceimpl_stub::int_value;
ram54288 0:dbad57390bd1 20 bool m2minterfaceimpl_stub::bool_value;
ram54288 0:dbad57390bd1 21
ram54288 0:dbad57390bd1 22 void m2minterfaceimpl_stub::clear()
ram54288 0:dbad57390bd1 23 {
ram54288 0:dbad57390bd1 24 int_value = 0;
ram54288 0:dbad57390bd1 25 bool_value = false;
ram54288 0:dbad57390bd1 26 }
ram54288 0:dbad57390bd1 27
ram54288 0:dbad57390bd1 28 M2MInterfaceImpl::M2MInterfaceImpl(M2MInterfaceObserver& observer,
ram54288 0:dbad57390bd1 29 const String &,
ram54288 0:dbad57390bd1 30 const String &,
ram54288 0:dbad57390bd1 31 const int32_t,
ram54288 0:dbad57390bd1 32 const uint16_t,
ram54288 0:dbad57390bd1 33 const String &,
ram54288 0:dbad57390bd1 34 M2MInterface::BindingMode mode,
ram54288 0:dbad57390bd1 35 M2MInterface::NetworkStack stack,
ram54288 0:dbad57390bd1 36 const String &)
ram54288 0:dbad57390bd1 37 : _observer(observer),
ram54288 0:dbad57390bd1 38 _current_state(0),
ram54288 0:dbad57390bd1 39 _max_states( STATE_MAX_STATES ),
ram54288 0:dbad57390bd1 40 _event_generated(false),
ram54288 0:dbad57390bd1 41 _event_data(NULL),
ram54288 0:dbad57390bd1 42 _nsdl_interface(*this),
ram54288 0:dbad57390bd1 43 _queue_sleep_timer(*this),
ram54288 0:dbad57390bd1 44 _retry_timer(*this),
ram54288 0:dbad57390bd1 45 _connection_handler(*this, NULL, mode, stack)
ram54288 0:dbad57390bd1 46 {
ram54288 0:dbad57390bd1 47 }
ram54288 0:dbad57390bd1 48
ram54288 0:dbad57390bd1 49 M2MInterfaceImpl::~M2MInterfaceImpl()
ram54288 0:dbad57390bd1 50 {
ram54288 0:dbad57390bd1 51 }
ram54288 0:dbad57390bd1 52 void M2MInterfaceImpl::bootstrap(M2MSecurity *)
ram54288 0:dbad57390bd1 53 {
ram54288 0:dbad57390bd1 54 }
ram54288 0:dbad57390bd1 55
ram54288 0:dbad57390bd1 56 void M2MInterfaceImpl::cancel_bootstrap()
ram54288 0:dbad57390bd1 57 {
ram54288 0:dbad57390bd1 58 }
ram54288 0:dbad57390bd1 59
ram54288 0:dbad57390bd1 60 void M2MInterfaceImpl::register_object(M2MSecurity *, const M2MObjectList &)
ram54288 0:dbad57390bd1 61 {
ram54288 0:dbad57390bd1 62 }
ram54288 0:dbad57390bd1 63
ram54288 0:dbad57390bd1 64 void M2MInterfaceImpl::update_registration(M2MSecurity *, const uint32_t)
ram54288 0:dbad57390bd1 65 {
ram54288 0:dbad57390bd1 66 }
ram54288 0:dbad57390bd1 67 void M2MInterfaceImpl::update_registration(M2MSecurity *,
ram54288 0:dbad57390bd1 68 const M2MObjectList &,
ram54288 0:dbad57390bd1 69 const uint32_t)
ram54288 0:dbad57390bd1 70 {
ram54288 0:dbad57390bd1 71 }
ram54288 0:dbad57390bd1 72
ram54288 0:dbad57390bd1 73 void M2MInterfaceImpl::unregister_object(M2MSecurity*)
ram54288 0:dbad57390bd1 74 {
ram54288 0:dbad57390bd1 75 }
ram54288 0:dbad57390bd1 76
ram54288 0:dbad57390bd1 77 void M2MInterfaceImpl::set_queue_sleep_handler(callback_handler)
ram54288 0:dbad57390bd1 78 {
ram54288 0:dbad57390bd1 79
ram54288 0:dbad57390bd1 80 }
ram54288 0:dbad57390bd1 81
ram54288 0:dbad57390bd1 82 void M2MInterfaceImpl::set_platform_network_handler(void *)
ram54288 0:dbad57390bd1 83 {
ram54288 0:dbad57390bd1 84
ram54288 0:dbad57390bd1 85 }
ram54288 0:dbad57390bd1 86
ram54288 0:dbad57390bd1 87 void M2MInterfaceImpl::set_random_number_callback(random_number_cb)
ram54288 0:dbad57390bd1 88 {
ram54288 0:dbad57390bd1 89
ram54288 0:dbad57390bd1 90 }
ram54288 0:dbad57390bd1 91
ram54288 0:dbad57390bd1 92 void M2MInterfaceImpl::set_entropy_callback(entropy_cb)
ram54288 0:dbad57390bd1 93 {
ram54288 0:dbad57390bd1 94
ram54288 0:dbad57390bd1 95 }
ram54288 0:dbad57390bd1 96
ram54288 0:dbad57390bd1 97 void M2MInterfaceImpl::coap_message_ready(uint8_t *,
ram54288 0:dbad57390bd1 98 uint16_t ,
ram54288 0:dbad57390bd1 99 sn_nsdl_addr_s *)
ram54288 0:dbad57390bd1 100 {
ram54288 0:dbad57390bd1 101
ram54288 0:dbad57390bd1 102 }
ram54288 0:dbad57390bd1 103
ram54288 0:dbad57390bd1 104 void M2MInterfaceImpl::client_registered(M2MServer*)
ram54288 0:dbad57390bd1 105 {
ram54288 0:dbad57390bd1 106
ram54288 0:dbad57390bd1 107 }
ram54288 0:dbad57390bd1 108
ram54288 0:dbad57390bd1 109 void M2MInterfaceImpl::registration_error(uint8_t, bool)
ram54288 0:dbad57390bd1 110 {
ram54288 0:dbad57390bd1 111
ram54288 0:dbad57390bd1 112 }
ram54288 0:dbad57390bd1 113
ram54288 0:dbad57390bd1 114 void M2MInterfaceImpl::client_unregistered()
ram54288 0:dbad57390bd1 115 {
ram54288 0:dbad57390bd1 116
ram54288 0:dbad57390bd1 117 }
ram54288 0:dbad57390bd1 118
ram54288 0:dbad57390bd1 119 void M2MInterfaceImpl::bootstrap_done(M2MSecurity *)
ram54288 0:dbad57390bd1 120 {
ram54288 0:dbad57390bd1 121
ram54288 0:dbad57390bd1 122 }
ram54288 0:dbad57390bd1 123
ram54288 0:dbad57390bd1 124 void M2MInterfaceImpl::bootstrap_wait(M2MSecurity *)
ram54288 0:dbad57390bd1 125 {
ram54288 0:dbad57390bd1 126
ram54288 0:dbad57390bd1 127 }
ram54288 0:dbad57390bd1 128
ram54288 0:dbad57390bd1 129 void M2MInterfaceImpl::bootstrap_error()
ram54288 0:dbad57390bd1 130 {
ram54288 0:dbad57390bd1 131
ram54288 0:dbad57390bd1 132 }
ram54288 0:dbad57390bd1 133
ram54288 0:dbad57390bd1 134 void M2MInterfaceImpl::coap_data_processed()
ram54288 0:dbad57390bd1 135 {
ram54288 0:dbad57390bd1 136
ram54288 0:dbad57390bd1 137 }
ram54288 0:dbad57390bd1 138
ram54288 0:dbad57390bd1 139 void M2MInterfaceImpl::data_available(uint8_t*,
ram54288 0:dbad57390bd1 140 uint16_t,
ram54288 0:dbad57390bd1 141 const M2MConnectionObserver::SocketAddress &)
ram54288 0:dbad57390bd1 142 {
ram54288 0:dbad57390bd1 143
ram54288 0:dbad57390bd1 144 }
ram54288 0:dbad57390bd1 145
ram54288 0:dbad57390bd1 146 void M2MInterfaceImpl::socket_error(uint8_t, bool)
ram54288 0:dbad57390bd1 147 {
ram54288 0:dbad57390bd1 148
ram54288 0:dbad57390bd1 149 }
ram54288 0:dbad57390bd1 150
ram54288 0:dbad57390bd1 151 void M2MInterfaceImpl::address_ready(const M2MConnectionObserver::SocketAddress &,
ram54288 0:dbad57390bd1 152 M2MConnectionObserver::ServerType,
ram54288 0:dbad57390bd1 153 const uint16_t)
ram54288 0:dbad57390bd1 154 {
ram54288 0:dbad57390bd1 155
ram54288 0:dbad57390bd1 156 }
ram54288 0:dbad57390bd1 157
ram54288 0:dbad57390bd1 158 void M2MInterfaceImpl::data_sent()
ram54288 0:dbad57390bd1 159 {
ram54288 0:dbad57390bd1 160 }
ram54288 0:dbad57390bd1 161
ram54288 0:dbad57390bd1 162 void M2MInterfaceImpl::timer_expired(M2MTimerObserver::Type)
ram54288 0:dbad57390bd1 163 {
ram54288 0:dbad57390bd1 164
ram54288 0:dbad57390bd1 165 }
ram54288 0:dbad57390bd1 166
ram54288 0:dbad57390bd1 167 void M2MInterfaceImpl::registration_updated(const M2MServer &)
ram54288 0:dbad57390bd1 168 {
ram54288 0:dbad57390bd1 169 }
ram54288 0:dbad57390bd1 170
ram54288 0:dbad57390bd1 171 void M2MInterfaceImpl::value_updated(M2MBase *)
ram54288 0:dbad57390bd1 172 {
ram54288 0:dbad57390bd1 173
ram54288 0:dbad57390bd1 174 }
ram54288 0:dbad57390bd1 175