Ram Gandikota / Mbed OS IOTMetronome

FRDM K64F Metronome

mbed-client/test/mbedclient/utest/common/CThunk.h@0:dbad57390bd1, 2017-05-14 (annotated)

Committer:
ram54288
Date:
Sun May 14 18:37:05 2017 +0000
Revision:
0:dbad57390bd1
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ram54288 0:dbad57390bd1 1 /* General C++ Object Thunking class
ram54288 0:dbad57390bd1 2 *
ram54288 0:dbad57390bd1 3 * - allows direct callbacks to non-static C++ class functions
ram54288 0:dbad57390bd1 4 * - keeps track for the corresponding class instance
ram54288 0:dbad57390bd1 5 * - supports an optional context parameter for the called function
ram54288 0:dbad57390bd1 6 * - ideally suited for class object receiving interrupts (NVIC_SetVector)
ram54288 0:dbad57390bd1 7 *
ram54288 0:dbad57390bd1 8 * Copyright (c) 2014-2015 ARM Limited
ram54288 0:dbad57390bd1 9 *
ram54288 0:dbad57390bd1 10 * Licensed under the Apache License, Version 2.0 (the "License");
ram54288 0:dbad57390bd1 11 * you may not use this file except in compliance with the License.
ram54288 0:dbad57390bd1 12 * You may obtain a copy of the License at
ram54288 0:dbad57390bd1 13 *
ram54288 0:dbad57390bd1 14 * http://www.apache.org/licenses/LICENSE-2.0
ram54288 0:dbad57390bd1 15 *
ram54288 0:dbad57390bd1 16 * Unless required by applicable law or agreed to in writing, software
ram54288 0:dbad57390bd1 17 * distributed under the License is distributed on an "AS IS" BASIS,
ram54288 0:dbad57390bd1 18 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ram54288 0:dbad57390bd1 19 * See the License for the specific language governing permissions and
ram54288 0:dbad57390bd1 20 * limitations under the License.
ram54288 0:dbad57390bd1 21 */
ram54288 0:dbad57390bd1 22 #ifndef __CTHUNK_H__
ram54288 0:dbad57390bd1 23 #define __CTHUNK_H__
ram54288 0:dbad57390bd1 24
ram54288 0:dbad57390bd1 25 #define CTHUNK_ADDRESS 1
ram54288 0:dbad57390bd1 26
ram54288 0:dbad57390bd1 27 #if defined(__CORTEX_M3) || defined(__CORTEX_M4) || defined(__thumb2__)
ram54288 0:dbad57390bd1 28 #define CTHUNK_VARIABLES volatile uint32_t code[1]
ram54288 0:dbad57390bd1 29 /**
ram54288 0:dbad57390bd1 30 * CTHUNK disassembly for Cortex-M3/M4 (thumb2):
ram54288 0:dbad57390bd1 31 * * ldm.w pc,{r0,r1,r2,pc}
ram54288 0:dbad57390bd1 32 *
ram54288 0:dbad57390bd1 33 * This instruction loads the arguments for the static thunking function to r0-r2, and
ram54288 0:dbad57390bd1 34 * branches to that function by loading its address into PC.
ram54288 0:dbad57390bd1 35 *
ram54288 0:dbad57390bd1 36 * This is safe for both regular calling and interrupt calling, since it only touches scratch registers
ram54288 0:dbad57390bd1 37 * which should be saved by the caller, and are automatically saved as part of the IRQ context switch.
ram54288 0:dbad57390bd1 38 */
ram54288 0:dbad57390bd1 39 #define CTHUNK_ASSIGMENT m_thunk.code[0] = 0x8007E89F
ram54288 0:dbad57390bd1 40
ram54288 0:dbad57390bd1 41 #elif defined(__CORTEX_M0PLUS) || defined(__CORTEX_M0)
ram54288 0:dbad57390bd1 42 /*
ram54288 0:dbad57390bd1 43 * CTHUNK disassembly for Cortex M0 (thumb):
ram54288 0:dbad57390bd1 44 * * push {r0,r1,r2,r3,r4,lr} save touched registers and return address
ram54288 0:dbad57390bd1 45 * * movs r4,#4 set up address to load arguments from (immediately following this code block) (1)
ram54288 0:dbad57390bd1 46 * * add r4,pc set up address to load arguments from (immediately following this code block) (2)
ram54288 0:dbad57390bd1 47 * * ldm r4!,{r0,r1,r2,r3} load arguments for static thunk function
ram54288 0:dbad57390bd1 48 * * blx r3 call static thunk function
ram54288 0:dbad57390bd1 49 * * pop {r0,r1,r2,r3,r4,pc} restore scratch registers and return from function
ram54288 0:dbad57390bd1 50 */
ram54288 0:dbad57390bd1 51 #define CTHUNK_VARIABLES volatile uint32_t code[3]
ram54288 0:dbad57390bd1 52 #define CTHUNK_ASSIGMENT do { \
ram54288 0:dbad57390bd1 53 m_thunk.code[0] = 0x2404B51F; \
ram54288 0:dbad57390bd1 54 m_thunk.code[1] = 0xCC0F447C; \
ram54288 0:dbad57390bd1 55 m_thunk.code[2] = 0xBD1F4798; \
ram54288 0:dbad57390bd1 56 } while (0)
ram54288 0:dbad57390bd1 57
ram54288 0:dbad57390bd1 58 #else
ram54288 0:dbad57390bd1 59 #error "Target is not currently suported."
ram54288 0:dbad57390bd1 60 #endif
ram54288 0:dbad57390bd1 61
ram54288 0:dbad57390bd1 62 /* IRQ/Exception compatible thunk entry function */
ram54288 0:dbad57390bd1 63 typedef void (*CThunkEntry)(void);
ram54288 0:dbad57390bd1 64
ram54288 0:dbad57390bd1 65 template<class T>
ram54288 0:dbad57390bd1 66 class CThunk
ram54288 0:dbad57390bd1 67 {
ram54288 0:dbad57390bd1 68 public:
ram54288 0:dbad57390bd1 69 typedef void (T::*CCallbackSimple)(void);
ram54288 0:dbad57390bd1 70 typedef void (T::*CCallback)(void* context);
ram54288 0:dbad57390bd1 71
ram54288 0:dbad57390bd1 72 inline CThunk(T *instance)
ram54288 0:dbad57390bd1 73 {
ram54288 0:dbad57390bd1 74 init(instance, NULL, NULL);
ram54288 0:dbad57390bd1 75 }
ram54288 0:dbad57390bd1 76
ram54288 0:dbad57390bd1 77 inline CThunk(T *instance, CCallback cb)
ram54288 0:dbad57390bd1 78 {
ram54288 0:dbad57390bd1 79 init(instance, cb, NULL);
ram54288 0:dbad57390bd1 80 }
ram54288 0:dbad57390bd1 81
ram54288 0:dbad57390bd1 82 ~CThunk() {
ram54288 0:dbad57390bd1 83
ram54288 0:dbad57390bd1 84 }
ram54288 0:dbad57390bd1 85
ram54288 0:dbad57390bd1 86 inline CThunk(T *instance, CCallbackSimple cb)
ram54288 0:dbad57390bd1 87 {
ram54288 0:dbad57390bd1 88 init(instance, (CCallback)cb, NULL);
ram54288 0:dbad57390bd1 89 }
ram54288 0:dbad57390bd1 90
ram54288 0:dbad57390bd1 91 inline CThunk(T &instance, CCallback cb)
ram54288 0:dbad57390bd1 92 {
ram54288 0:dbad57390bd1 93 init(instance, cb, NULL);
ram54288 0:dbad57390bd1 94 }
ram54288 0:dbad57390bd1 95
ram54288 0:dbad57390bd1 96 inline CThunk(T &instance, CCallbackSimple cb)
ram54288 0:dbad57390bd1 97 {
ram54288 0:dbad57390bd1 98 init(instance, (CCallback)cb, NULL);
ram54288 0:dbad57390bd1 99 }
ram54288 0:dbad57390bd1 100
ram54288 0:dbad57390bd1 101 inline CThunk(T &instance, CCallback cb, void* ctx)
ram54288 0:dbad57390bd1 102 {
ram54288 0:dbad57390bd1 103 init(instance, cb, ctx);
ram54288 0:dbad57390bd1 104 }
ram54288 0:dbad57390bd1 105
ram54288 0:dbad57390bd1 106 inline void callback(CCallback cb)
ram54288 0:dbad57390bd1 107 {
ram54288 0:dbad57390bd1 108 m_callback = cb;
ram54288 0:dbad57390bd1 109 }
ram54288 0:dbad57390bd1 110
ram54288 0:dbad57390bd1 111 inline void callback(CCallbackSimple cb)
ram54288 0:dbad57390bd1 112 {
ram54288 0:dbad57390bd1 113 m_callback = (CCallback)cb;
ram54288 0:dbad57390bd1 114 }
ram54288 0:dbad57390bd1 115
ram54288 0:dbad57390bd1 116 inline void context(void* ctx)
ram54288 0:dbad57390bd1 117 {
ram54288 0:dbad57390bd1 118 m_thunk.context = (uint32_t)ctx;
ram54288 0:dbad57390bd1 119 }
ram54288 0:dbad57390bd1 120
ram54288 0:dbad57390bd1 121 inline void context(uint32_t ctx)
ram54288 0:dbad57390bd1 122 {
ram54288 0:dbad57390bd1 123 m_thunk.context = ctx;
ram54288 0:dbad57390bd1 124 }
ram54288 0:dbad57390bd1 125
ram54288 0:dbad57390bd1 126 inline uint32_t entry(void)
ram54288 0:dbad57390bd1 127 {
ram54288 0:dbad57390bd1 128 return (((uint32_t)&m_thunk)|CTHUNK_ADDRESS);
ram54288 0:dbad57390bd1 129 }
ram54288 0:dbad57390bd1 130
ram54288 0:dbad57390bd1 131 /* get thunk entry point for connecting rhunk to an IRQ table */
ram54288 0:dbad57390bd1 132 inline operator CThunkEntry(void)
ram54288 0:dbad57390bd1 133 {
ram54288 0:dbad57390bd1 134 return (CThunkEntry)entry();
ram54288 0:dbad57390bd1 135 }
ram54288 0:dbad57390bd1 136
ram54288 0:dbad57390bd1 137 /* get thunk entry point for connecting rhunk to an IRQ table */
ram54288 0:dbad57390bd1 138 inline operator uint32_t(void)
ram54288 0:dbad57390bd1 139 {
ram54288 0:dbad57390bd1 140 return entry();
ram54288 0:dbad57390bd1 141 }
ram54288 0:dbad57390bd1 142
ram54288 0:dbad57390bd1 143 /* simple test function */
ram54288 0:dbad57390bd1 144 inline void call(void)
ram54288 0:dbad57390bd1 145 {
ram54288 0:dbad57390bd1 146 (((CThunkEntry)(entry()))());
ram54288 0:dbad57390bd1 147 }
ram54288 0:dbad57390bd1 148
ram54288 0:dbad57390bd1 149 private:
ram54288 0:dbad57390bd1 150 T* m_instance;
ram54288 0:dbad57390bd1 151 volatile CCallback m_callback;
ram54288 0:dbad57390bd1 152
ram54288 0:dbad57390bd1 153 // TODO: this needs proper fix, to refactor toolchain header file and all its use
ram54288 0:dbad57390bd1 154 // PACKED there is not defined properly for IAR
ram54288 0:dbad57390bd1 155 #if defined (__ICCARM__)
ram54288 0:dbad57390bd1 156 typedef __packed struct
ram54288 0:dbad57390bd1 157 {
ram54288 0:dbad57390bd1 158 CTHUNK_VARIABLES;
ram54288 0:dbad57390bd1 159 volatile uint32_t instance;
ram54288 0:dbad57390bd1 160 volatile uint32_t context;
ram54288 0:dbad57390bd1 161 volatile uint32_t callback;
ram54288 0:dbad57390bd1 162 volatile uint32_t trampoline;
ram54288 0:dbad57390bd1 163 } CThunkTrampoline;
ram54288 0:dbad57390bd1 164 #else
ram54288 0:dbad57390bd1 165 typedef struct
ram54288 0:dbad57390bd1 166 {
ram54288 0:dbad57390bd1 167 CTHUNK_VARIABLES;
ram54288 0:dbad57390bd1 168 volatile uint32_t instance;
ram54288 0:dbad57390bd1 169 volatile uint32_t context;
ram54288 0:dbad57390bd1 170 volatile uint32_t callback;
ram54288 0:dbad57390bd1 171 volatile uint32_t trampoline;
ram54288 0:dbad57390bd1 172 } __attribute__((__packed__)) CThunkTrampoline;
ram54288 0:dbad57390bd1 173 #endif
ram54288 0:dbad57390bd1 174
ram54288 0:dbad57390bd1 175 static void trampoline(T* instance, void* ctx, CCallback* cb)
ram54288 0:dbad57390bd1 176 {
ram54288 0:dbad57390bd1 177 if(instance && *cb) {
ram54288 0:dbad57390bd1 178 (static_cast<T*>(instance)->**cb)(ctx);
ram54288 0:dbad57390bd1 179 }
ram54288 0:dbad57390bd1 180 }
ram54288 0:dbad57390bd1 181
ram54288 0:dbad57390bd1 182 volatile CThunkTrampoline m_thunk;
ram54288 0:dbad57390bd1 183
ram54288 0:dbad57390bd1 184 inline void init(T *instance, CCallback cb, void* ctx)
ram54288 0:dbad57390bd1 185 {
ram54288 0:dbad57390bd1 186 /* remember callback - need to add this level of redirection
ram54288 0:dbad57390bd1 187 as pointer size for member functions differs between platforms */
ram54288 0:dbad57390bd1 188 m_callback = cb;
ram54288 0:dbad57390bd1 189
ram54288 0:dbad57390bd1 190 /* populate thunking trampoline */
ram54288 0:dbad57390bd1 191 // CTHUNK_ASSIGMENT;
ram54288 0:dbad57390bd1 192 // m_thunk.context = (uint32_t)ctx;
ram54288 0:dbad57390bd1 193 // m_thunk.instance = (uint32_t)instance;
ram54288 0:dbad57390bd1 194 // m_thunk.callback = (uint32_t)&m_callback;
ram54288 0:dbad57390bd1 195 // m_thunk.trampoline = (uint32_t)&trampoline;
ram54288 0:dbad57390bd1 196
ram54288 0:dbad57390bd1 197 // __ISB();
ram54288 0:dbad57390bd1 198 // __DSB();
ram54288 0:dbad57390bd1 199 }
ram54288 0:dbad57390bd1 200 };
ram54288 0:dbad57390bd1 201
ram54288 0:dbad57390bd1 202 #endif/*__CTHUNK_H__*/