Ram Gandikota / Mbed OS IOTMetronome

FRDM K64F Metronome

easy-connect/atmel-rf-driver/source/AT86RFReg.h@0:dbad57390bd1, 2017-05-14 (annotated)

Committer:
ram54288
Date:
Sun May 14 18:37:05 2017 +0000
Revision:
0:dbad57390bd1
Initial commit

Who changed what in which revision?

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ram54288 0:dbad57390bd1 1 /*
ram54288 0:dbad57390bd1 2 * Copyright (c) 2014-2015 ARM Limited. All rights reserved.
ram54288 0:dbad57390bd1 3 * SPDX-License-Identifier: Apache-2.0
ram54288 0:dbad57390bd1 4 * Licensed under the Apache License, Version 2.0 (the License); you may
ram54288 0:dbad57390bd1 5 * not use this file except in compliance with the License.
ram54288 0:dbad57390bd1 6 * You may obtain a copy of the License at
ram54288 0:dbad57390bd1 7 *
ram54288 0:dbad57390bd1 8 * http://www.apache.org/licenses/LICENSE-2.0
ram54288 0:dbad57390bd1 9 *
ram54288 0:dbad57390bd1 10 * Unless required by applicable law or agreed to in writing, software
ram54288 0:dbad57390bd1 11 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
ram54288 0:dbad57390bd1 12 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ram54288 0:dbad57390bd1 13 * See the License for the specific language governing permissions and
ram54288 0:dbad57390bd1 14 * limitations under the License.
ram54288 0:dbad57390bd1 15 */
ram54288 0:dbad57390bd1 16
ram54288 0:dbad57390bd1 17 #ifndef AT86RFREG_H_
ram54288 0:dbad57390bd1 18 #define AT86RFREG_H_
ram54288 0:dbad57390bd1 19 #ifdef __cplusplus
ram54288 0:dbad57390bd1 20 extern "C" {
ram54288 0:dbad57390bd1 21 #endif
ram54288 0:dbad57390bd1 22
ram54288 0:dbad57390bd1 23 /*AT86RF212 PHY Modes*/
ram54288 0:dbad57390bd1 24 #define BPSK_20 0x00
ram54288 0:dbad57390bd1 25 #define BPSK_40 0x04
ram54288 0:dbad57390bd1 26 #define BPSK_40_ALT 0x14
ram54288 0:dbad57390bd1 27 #define OQPSK_SIN_RC_100 0x08
ram54288 0:dbad57390bd1 28 #define OQPSK_SIN_RC_200 0x09
ram54288 0:dbad57390bd1 29 #define OQPSK_RC_100 0x18
ram54288 0:dbad57390bd1 30 #define OQPSK_RC_200 0x19
ram54288 0:dbad57390bd1 31 #define OQPSK_SIN_250 0x0c
ram54288 0:dbad57390bd1 32 #define OQPSK_SIN_500 0x0d
ram54288 0:dbad57390bd1 33 #define OQPSK_SIN_500_ALT 0x0f
ram54288 0:dbad57390bd1 34 #define OQPSK_RC_250 0x1c
ram54288 0:dbad57390bd1 35 #define OQPSK_RC_500 0x1d
ram54288 0:dbad57390bd1 36 #define OQPSK_RC_500_ALT 0x1f
ram54288 0:dbad57390bd1 37 #define OQPSK_SIN_RC_400_SCR_ON 0x2A
ram54288 0:dbad57390bd1 38 #define OQPSK_SIN_RC_400_SCR_OFF 0x0A
ram54288 0:dbad57390bd1 39 #define OQPSK_RC_400_SCR_ON 0x3A
ram54288 0:dbad57390bd1 40 #define OQPSK_RC_400_SCR_OFF 0x1A
ram54288 0:dbad57390bd1 41 #define OQPSK_SIN_1000_SCR_ON 0x2E
ram54288 0:dbad57390bd1 42 #define OQPSK_SIN_1000_SCR_OFF 0x0E
ram54288 0:dbad57390bd1 43 #define OQPSK_RC_1000_SCR_ON 0x3E
ram54288 0:dbad57390bd1 44 #define OQPSK_RC_1000_SCR_OFF 0x1E
ram54288 0:dbad57390bd1 45
ram54288 0:dbad57390bd1 46 /*Supported transceivers*/
ram54288 0:dbad57390bd1 47 #define PART_AT86RF231 0x03
ram54288 0:dbad57390bd1 48 #define PART_AT86RF212 0x07
ram54288 0:dbad57390bd1 49 #define PART_AT86RF233 0x0B
ram54288 0:dbad57390bd1 50 #define VERSION_AT86RF212 0x01
ram54288 0:dbad57390bd1 51 #define VERSION_AT86RF212B 0x03
ram54288 0:dbad57390bd1 52
ram54288 0:dbad57390bd1 53 /*RF Configuration Registers*/
ram54288 0:dbad57390bd1 54 #define TRX_STATUS 0x01
ram54288 0:dbad57390bd1 55 #define TRX_STATE 0x02
ram54288 0:dbad57390bd1 56 #define TRX_CTRL_0 0x03
ram54288 0:dbad57390bd1 57 #define TRX_CTRL_1 0x04
ram54288 0:dbad57390bd1 58 #define PHY_TX_PWR 0x05
ram54288 0:dbad57390bd1 59 #define PHY_RSSI 0x06
ram54288 0:dbad57390bd1 60 #define PHY_ED_LEVEL 0x07
ram54288 0:dbad57390bd1 61 #define PHY_CC_CCA 0x08
ram54288 0:dbad57390bd1 62 #define RX_CTRL 0x0A
ram54288 0:dbad57390bd1 63 #define SFD_VALUE 0x0B
ram54288 0:dbad57390bd1 64 #define TRX_CTRL_2 0x0C
ram54288 0:dbad57390bd1 65 #define ANT_DIV 0x0D
ram54288 0:dbad57390bd1 66 #define IRQ_MASK 0x0E
ram54288 0:dbad57390bd1 67 #define IRQ_STATUS 0x0F
ram54288 0:dbad57390bd1 68 #define VREG_CTRL 0x10
ram54288 0:dbad57390bd1 69 #define BATMON 0x11
ram54288 0:dbad57390bd1 70 #define XOSC_CTRL 0x12
ram54288 0:dbad57390bd1 71 #define CC_CTRL_0 0x13
ram54288 0:dbad57390bd1 72 #define CC_CTRL_1 0x14
ram54288 0:dbad57390bd1 73 #define RX_SYN 0x15
ram54288 0:dbad57390bd1 74 #define TRX_RPC 0x16
ram54288 0:dbad57390bd1 75 #define RF_CTRL_0 0x16
ram54288 0:dbad57390bd1 76 #define XAH_CTRL_1 0x17
ram54288 0:dbad57390bd1 77 #define FTN_CTRL 0x18
ram54288 0:dbad57390bd1 78 #define PLL_CF 0x1A
ram54288 0:dbad57390bd1 79 #define PLL_DCU 0x1B
ram54288 0:dbad57390bd1 80 #define PART_NUM 0x1C
ram54288 0:dbad57390bd1 81 #define VERSION_NUM 0x1D
ram54288 0:dbad57390bd1 82 #define MAN_ID_0 0x1E
ram54288 0:dbad57390bd1 83 #define MAN_ID_1 0x1F
ram54288 0:dbad57390bd1 84 #define SHORT_ADDR_0 0x20
ram54288 0:dbad57390bd1 85 #define SHORT_ADDR_1 0x21
ram54288 0:dbad57390bd1 86 #define PAN_ID_0 0x22
ram54288 0:dbad57390bd1 87 #define PAN_ID_1 0x23
ram54288 0:dbad57390bd1 88 #define IEEE_ADDR_0 0x24
ram54288 0:dbad57390bd1 89 #define IEEE_ADDR_1 0x25
ram54288 0:dbad57390bd1 90 #define IEEE_ADDR_2 0x26
ram54288 0:dbad57390bd1 91 #define IEEE_ADDR_3 0x27
ram54288 0:dbad57390bd1 92 #define IEEE_ADDR_4 0x28
ram54288 0:dbad57390bd1 93 #define IEEE_ADDR_5 0x29
ram54288 0:dbad57390bd1 94 #define IEEE_ADDR_6 0x2A
ram54288 0:dbad57390bd1 95 #define IEEE_ADDR_7 0x2B
ram54288 0:dbad57390bd1 96 #define XAH_CTRL_0 0x2C
ram54288 0:dbad57390bd1 97 #define CSMA_SEED_0 0x2D
ram54288 0:dbad57390bd1 98 #define CSMA_SEED_1 0x2E
ram54288 0:dbad57390bd1 99 #define CSMA_BE 0x2F
ram54288 0:dbad57390bd1 100
ram54288 0:dbad57390bd1 101 /* CSMA_SEED_1*/
ram54288 0:dbad57390bd1 102 #define AACK_FVN_MODE1 7
ram54288 0:dbad57390bd1 103 #define AACK_FVN_MODE0 6
ram54288 0:dbad57390bd1 104 #define AACK_SET_PD 5
ram54288 0:dbad57390bd1 105 #define AACK_DIS_ACK 4
ram54288 0:dbad57390bd1 106 #define AACK_I_AM_COORD 3
ram54288 0:dbad57390bd1 107 #define CSMA_SEED_12 2
ram54288 0:dbad57390bd1 108 #define CSMA_SEED_11 1
ram54288 0:dbad57390bd1 109 #define CSMA_SEED_10 0
ram54288 0:dbad57390bd1 110
ram54288 0:dbad57390bd1 111 /*TRX_STATUS bits*/
ram54288 0:dbad57390bd1 112 #define CCA_STATUS 0x40
ram54288 0:dbad57390bd1 113 #define CCA_DONE 0x80
ram54288 0:dbad57390bd1 114
ram54288 0:dbad57390bd1 115 /*PHY_CC_CCA bits*/
ram54288 0:dbad57390bd1 116 #define CCA_REQUEST 0x80
ram54288 0:dbad57390bd1 117 #define CCA_MODE_1 0x20
ram54288 0:dbad57390bd1 118 #define CCA_MODE_3 0x60
ram54288 0:dbad57390bd1 119
ram54288 0:dbad57390bd1 120 /*IRQ_MASK bits*/
ram54288 0:dbad57390bd1 121 #define RX_START 0x04
ram54288 0:dbad57390bd1 122 #define TRX_END 0x08
ram54288 0:dbad57390bd1 123 #define CCA_ED_DONE 0x10
ram54288 0:dbad57390bd1 124 #define AMI 0x20
ram54288 0:dbad57390bd1 125 #define TRX_UR 0x40
ram54288 0:dbad57390bd1 126
ram54288 0:dbad57390bd1 127 /*ANT_DIV bits*/
ram54288 0:dbad57390bd1 128 #define ANT_DIV_EN 0x08
ram54288 0:dbad57390bd1 129 #define ANT_EXT_SW_EN 0x04
ram54288 0:dbad57390bd1 130 #define ANT_CTRL_DEFAULT 0x03
ram54288 0:dbad57390bd1 131
ram54288 0:dbad57390bd1 132 /*TRX_CTRL_1 bits*/
ram54288 0:dbad57390bd1 133 #define PA_EXT_EN 0x80
ram54288 0:dbad57390bd1 134
ram54288 0:dbad57390bd1 135 /*FTN_CTRL bits*/
ram54288 0:dbad57390bd1 136 #define FTN_START 0x80
ram54288 0:dbad57390bd1 137
ram54288 0:dbad57390bd1 138 /*PHY_RSSI bits*/
ram54288 0:dbad57390bd1 139 #define CRC_VALID 0x80
ram54288 0:dbad57390bd1 140
ram54288 0:dbad57390bd1 141 /*RX_SYN bits*/
ram54288 0:dbad57390bd1 142 #define RX_PDT_DIS 0x80
ram54288 0:dbad57390bd1 143
ram54288 0:dbad57390bd1 144 /*TRX_RPC bits */
ram54288 0:dbad57390bd1 145 #define RX_RPC_CTRL 0xC0
ram54288 0:dbad57390bd1 146 #define RX_RPC_EN 0x20
ram54288 0:dbad57390bd1 147 #define PDT_RPC_EN 0x10
ram54288 0:dbad57390bd1 148 #define PLL_RPC_EN 0x08
ram54288 0:dbad57390bd1 149 #define XAH_TX_RPC_EN 0x04
ram54288 0:dbad57390bd1 150 #define IPAN_RPC_EN 0x02
ram54288 0:dbad57390bd1 151 #define TRX_RPC_RSVD_1 0x01
ram54288 0:dbad57390bd1 152
ram54288 0:dbad57390bd1 153 /*XAH_CTRL_1 bits*/
ram54288 0:dbad57390bd1 154 #define AACK_PROM_MODE 0x02
ram54288 0:dbad57390bd1 155
ram54288 0:dbad57390bd1 156
ram54288 0:dbad57390bd1 157 #ifdef __cplusplus
ram54288 0:dbad57390bd1 158 }
ram54288 0:dbad57390bd1 159 #endif
ram54288 0:dbad57390bd1 160
ram54288 0:dbad57390bd1 161 #endif /* AT86RFREG_H_ */