Rajath Ravi / Mbed 2 deprecated ravi_blinkycode

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Dependencies:   mbed

stm32f4xx_syscfg_mort.c@0:34ee385f4d2d, 2021-10-23 (annotated)

Committer:
rajathr
Date:
Sat Oct 23 05:49:09 2021 +0000
Revision:
0:34ee385f4d2d
At 23rd Oct 21 - All Code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rajathr 0:34ee385f4d2d 1 /**
rajathr 0:34ee385f4d2d 2 ******************************************************************************
rajathr 0:34ee385f4d2d 3 * @file stm32f4xx_syscfg.c
rajathr 0:34ee385f4d2d 4 * @author MCD Application Team
rajathr 0:34ee385f4d2d 5 * @version V1.8.0
rajathr 0:34ee385f4d2d 6 * @date 04-November-2016
rajathr 0:34ee385f4d2d 7 * @brief This file provides firmware functions to manage the SYSCFG_MORT peripheral.
rajathr 0:34ee385f4d2d 8 *
rajathr 0:34ee385f4d2d 9 @verbatim
rajathr 0:34ee385f4d2d 10
rajathr 0:34ee385f4d2d 11 ===============================================================================
rajathr 0:34ee385f4d2d 12 ##### How to use this driver #####
rajathr 0:34ee385f4d2d 13 ===============================================================================
rajathr 0:34ee385f4d2d 14 [..] This driver provides functions for:
rajathr 0:34ee385f4d2d 15
rajathr 0:34ee385f4d2d 16 (#) Remapping the memory accessible in the code area using SYSCFG_MemoryRemapConfig()
rajathr 0:34ee385f4d2d 17
rajathr 0:34ee385f4d2d 18 (#) Swapping the internal flash Bank1 and Bank2 this features is only visible for
rajathr 0:34ee385f4d2d 19 STM32F42xxx/43xxx devices Devices.
rajathr 0:34ee385f4d2d 20
rajathr 0:34ee385f4d2d 21 (#) Manage the EXTI lines connection to the GPIOs using SYSCFG_EXTILineConfig_mort()
rajathr 0:34ee385f4d2d 22
rajathr 0:34ee385f4d2d 23 (#) Select the ETHERNET media interface (RMII/RII) using SYSCFG_ETH_MediaInterfaceConfig_mort()
rajathr 0:34ee385f4d2d 24
rajathr 0:34ee385f4d2d 25 -@- SYSCFG_MORT APB clock must be enabled to get write access to SYSCFG_MORT registers,
rajathr 0:34ee385f4d2d 26 using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
rajathr 0:34ee385f4d2d 27
rajathr 0:34ee385f4d2d 28 @endverbatim
rajathr 0:34ee385f4d2d 29 ******************************************************************************
rajathr 0:34ee385f4d2d 30 * @attention
rajathr 0:34ee385f4d2d 31 *
rajathr 0:34ee385f4d2d 32 * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
rajathr 0:34ee385f4d2d 33 *
rajathr 0:34ee385f4d2d 34 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
rajathr 0:34ee385f4d2d 35 * You may not use this file except in compliance with the License.
rajathr 0:34ee385f4d2d 36 * You may obtain a copy of the License at:
rajathr 0:34ee385f4d2d 37 *
rajathr 0:34ee385f4d2d 38 * http://www.st.com/software_license_agreement_liberty_v2
rajathr 0:34ee385f4d2d 39 *
rajathr 0:34ee385f4d2d 40 * Unless required by applicable law or agreed to in writing, software
rajathr 0:34ee385f4d2d 41 * distributed under the License is distributed on an "AS IS" BASIS,
rajathr 0:34ee385f4d2d 42 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
rajathr 0:34ee385f4d2d 43 * See the License for the specific language governing permissions and
rajathr 0:34ee385f4d2d 44 * limitations under the License.
rajathr 0:34ee385f4d2d 45 *
rajathr 0:34ee385f4d2d 46 ******************************************************************************
rajathr 0:34ee385f4d2d 47 */
rajathr 0:34ee385f4d2d 48
rajathr 0:34ee385f4d2d 49 /* Includes ------------------------------------------------------------------*/
rajathr 0:34ee385f4d2d 50 #include "stm32f4xx_syscfg_mort.h"
rajathr 0:34ee385f4d2d 51 #include "stm32f4xx_rcc_mort.h"
rajathr 0:34ee385f4d2d 52
rajathr 0:34ee385f4d2d 53 /** @addtogroup STM32F4xx_StdPeriph_Driver
rajathr 0:34ee385f4d2d 54 * @{
rajathr 0:34ee385f4d2d 55 */
rajathr 0:34ee385f4d2d 56
rajathr 0:34ee385f4d2d 57 /** @defgroup SYSCFG_MORT
rajathr 0:34ee385f4d2d 58 * @brief SYSCFG_MORT driver modules
rajathr 0:34ee385f4d2d 59 * @{
rajathr 0:34ee385f4d2d 60 */
rajathr 0:34ee385f4d2d 61
rajathr 0:34ee385f4d2d 62 /* Private typedef -----------------------------------------------------------*/
rajathr 0:34ee385f4d2d 63 /* Private define ------------------------------------------------------------*/
rajathr 0:34ee385f4d2d 64 /* ------------ RCC registers bit address in the alias region ----------- */
rajathr 0:34ee385f4d2d 65 #define SYSCFG_OFFSET_MORT (SYSCFG_BASE_MORT - PERIPH_BASE_MORT)
rajathr 0:34ee385f4d2d 66 /* --- MEMRMP Register ---*/
rajathr 0:34ee385f4d2d 67 /* Alias word address of UFB_MODE bit */
rajathr 0:34ee385f4d2d 68 #define MEMRMP_OFFSET_MORT SYSCFG_OFFSET_MORT
rajathr 0:34ee385f4d2d 69 #define UFB_MODE_BitNumber_MORT ((uint8_t)0x8)
rajathr 0:34ee385f4d2d 70 #define UFB_MODE_BB_MORT (PERIPH_BB_BASE + (MEMRMP_OFFSET_MORT * 32) + (UFB_MODE_BitNumber_MORT * 4))
rajathr 0:34ee385f4d2d 71
rajathr 0:34ee385f4d2d 72 /* --- PMC Register ---*/
rajathr 0:34ee385f4d2d 73 /* Alias word address of MII_RMII_SEL bit */
rajathr 0:34ee385f4d2d 74 #define PMC_OFFSET_MORT (SYSCFG_OFFSET_MORT + 0x04)
rajathr 0:34ee385f4d2d 75 #define MII_RMII_SEL_BitNumber_MORT ((uint8_t)0x17)
rajathr 0:34ee385f4d2d 76 #define PMC_MII_RMII_SEL_BB_MORT (PERIPH_BB_BASE + (PMC_OFFSET_MORT * 32) + (MII_RMII_SEL_BitNumber_MORT * 4))
rajathr 0:34ee385f4d2d 77
rajathr 0:34ee385f4d2d 78 /* --- CMPCR Register ---*/
rajathr 0:34ee385f4d2d 79 /* Alias word address of CMP_PD bit */
rajathr 0:34ee385f4d2d 80 #define CMPCR_OFFSET_MORT (SYSCFG_OFFSET_MORT + 0x20)
rajathr 0:34ee385f4d2d 81 #define CMP_PD_BitNumber_MORT ((uint8_t)0x00)
rajathr 0:34ee385f4d2d 82 #define CMPCR_CMP_PD_BB_MORT (PERIPH_BB_BASE + (CMPCR_OFFSET_MORT * 32) + (CMP_PD_BitNumber_MORT * 4))
rajathr 0:34ee385f4d2d 83
rajathr 0:34ee385f4d2d 84 /* --- MCHDLYCR Register ---*/
rajathr 0:34ee385f4d2d 85 /* Alias word address of BSCKSEL bit */
rajathr 0:34ee385f4d2d 86 #define MCHDLYCR_OFFSET_MORT (SYSCFG_OFFSET_MORT + 0x30)
rajathr 0:34ee385f4d2d 87 #define BSCKSEL_BIT_NUMBER_MORT POSITION_VAL(SYSCFG_MCHDLYCR_BSCKSEL)
rajathr 0:34ee385f4d2d 88 #define MCHDLYCR_BSCKSEL_BB_MORT (uint32_t)(PERIPH_BB_BASE + (MCHDLYCR_OFFSET_MORT * 32) + (BSCKSEL_BIT_NUMBER_MORT * 4))
rajathr 0:34ee385f4d2d 89
rajathr 0:34ee385f4d2d 90 /* Private macro -------------------------------------------------------------*/
rajathr 0:34ee385f4d2d 91 /* Private variables ---------------------------------------------------------*/
rajathr 0:34ee385f4d2d 92 /* Private function prototypes -----------------------------------------------*/
rajathr 0:34ee385f4d2d 93 /* Private functions ---------------------------------------------------------*/
rajathr 0:34ee385f4d2d 94
rajathr 0:34ee385f4d2d 95 /** @defgroup SYSCFG_Private_Functions
rajathr 0:34ee385f4d2d 96 * @{
rajathr 0:34ee385f4d2d 97 */
rajathr 0:34ee385f4d2d 98
rajathr 0:34ee385f4d2d 99 /**
rajathr 0:34ee385f4d2d 100 * @brief Deinitializes the Alternate Functions (remap and EXTI configuration)
rajathr 0:34ee385f4d2d 101 * registers to their default reset values.
rajathr 0:34ee385f4d2d 102 * @param None
rajathr 0:34ee385f4d2d 103 * @retval None
rajathr 0:34ee385f4d2d 104 */
rajathr 0:34ee385f4d2d 105 void SYSCFG_DeInit_mort(void)
rajathr 0:34ee385f4d2d 106 {
rajathr 0:34ee385f4d2d 107 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, ENABLE);
rajathr 0:34ee385f4d2d 108 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, DISABLE);
rajathr 0:34ee385f4d2d 109 }
rajathr 0:34ee385f4d2d 110
rajathr 0:34ee385f4d2d 111
rajathr 0:34ee385f4d2d 112 /**
rajathr 0:34ee385f4d2d 113 * @brief Selects the GPIO pin used as EXTI Line.
rajathr 0:34ee385f4d2d 114 * @param EXTI_PortSourceGPIOx : selects the GPIO port to be used as source for
rajathr 0:34ee385f4d2d 115 * EXTI lines where x can be (A..K) for STM32F42xxx/43xxx devices, (A..I)
rajathr 0:34ee385f4d2d 116 * for STM32F405xx/407xx and STM32F415xx/417xx devices or (A, B, C, D and H)
rajathr 0:34ee385f4d2d 117 * for STM32401xx devices.
rajathr 0:34ee385f4d2d 118 *
rajathr 0:34ee385f4d2d 119 * @param EXTI_PinSourcex: specifies the EXTI line to be configured.
rajathr 0:34ee385f4d2d 120 * This parameter can be EXTI_PinSourcex where x can be (0..15, except
rajathr 0:34ee385f4d2d 121 * for EXTI_PortSourceGPIOI_MORT x can be (0..11) for STM32F405xx/407xx
rajathr 0:34ee385f4d2d 122 * and STM32F405xx/407xx devices and for EXTI_PortSourceGPIOK_MORT x can
rajathr 0:34ee385f4d2d 123 * be (0..7) for STM32F42xxx/43xxx devices.
rajathr 0:34ee385f4d2d 124 *
rajathr 0:34ee385f4d2d 125 * @retval None
rajathr 0:34ee385f4d2d 126 */
rajathr 0:34ee385f4d2d 127 void SYSCFG_EXTILineConfig_mort(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex)
rajathr 0:34ee385f4d2d 128 {
rajathr 0:34ee385f4d2d 129 uint32_t tmp = 0x00;
rajathr 0:34ee385f4d2d 130
rajathr 0:34ee385f4d2d 131 /* Check the parameters */
rajathr 0:34ee385f4d2d 132 assert_param(IS_EXTI_PORT_SOURCE_MORT(EXTI_PortSourceGPIOx));
rajathr 0:34ee385f4d2d 133 assert_param(IS_EXTI_PIN_SOURCE_MORT(EXTI_PinSourcex));
rajathr 0:34ee385f4d2d 134
rajathr 0:34ee385f4d2d 135 tmp = ((uint32_t)0x0F) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03));
rajathr 0:34ee385f4d2d 136 SYSCFG_MORT->EXTICR[EXTI_PinSourcex >> 0x02] &= ~tmp;
rajathr 0:34ee385f4d2d 137 SYSCFG_MORT->EXTICR[EXTI_PinSourcex >> 0x02] |= (((uint32_t)EXTI_PortSourceGPIOx) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03)));
rajathr 0:34ee385f4d2d 138 }
rajathr 0:34ee385f4d2d 139
rajathr 0:34ee385f4d2d 140 /**
rajathr 0:34ee385f4d2d 141 * @brief Selects the ETHERNET media interface
rajathr 0:34ee385f4d2d 142 * @param SYSCFG_ETH_MediaInterface: specifies the Media Interface mode.
rajathr 0:34ee385f4d2d 143 * This parameter can be one of the following values:
rajathr 0:34ee385f4d2d 144 * @arg SYSCFG_ETH_MediaInterface_MII_MORT: MII mode selected
rajathr 0:34ee385f4d2d 145 * @arg SYSCFG_ETH_MediaInterface_RMII_MORT: RMII mode selected
rajathr 0:34ee385f4d2d 146 * @retval None
rajathr 0:34ee385f4d2d 147 */
rajathr 0:34ee385f4d2d 148 void SYSCFG_ETH_MediaInterfaceConfig_mort(uint32_t SYSCFG_ETH_MediaInterface)
rajathr 0:34ee385f4d2d 149 {
rajathr 0:34ee385f4d2d 150 assert_param(IS_SYSCFG_ETH_MEDIA_INTERFACE_MORT(SYSCFG_ETH_MediaInterface));
rajathr 0:34ee385f4d2d 151 /* Configure MII_RMII selection bit */
rajathr 0:34ee385f4d2d 152 *(__IO uint32_t *) PMC_MII_RMII_SEL_BB_MORT = SYSCFG_ETH_MediaInterface;
rajathr 0:34ee385f4d2d 153 }
rajathr 0:34ee385f4d2d 154
rajathr 0:34ee385f4d2d 155 /**
rajathr 0:34ee385f4d2d 156 * @brief Enables or disables the I/O Compensation Cell.
rajathr 0:34ee385f4d2d 157 * @note The I/O compensation cell can be used only when the device supply
rajathr 0:34ee385f4d2d 158 * voltage ranges from 2.4 to 3.6 V.
rajathr 0:34ee385f4d2d 159 * @param NewState: new state of the I/O Compensation Cell.
rajathr 0:34ee385f4d2d 160 * This parameter can be one of the following values:
rajathr 0:34ee385f4d2d 161 * @arg ENABLE: I/O compensation cell enabled
rajathr 0:34ee385f4d2d 162 * @arg DISABLE: I/O compensation cell power-down mode
rajathr 0:34ee385f4d2d 163 * @retval None
rajathr 0:34ee385f4d2d 164 */
rajathr 0:34ee385f4d2d 165 void SYSCFG_CompensationCellCmd_mort(FunctionalState NewState)
rajathr 0:34ee385f4d2d 166 {
rajathr 0:34ee385f4d2d 167 /* Check the parameters */
rajathr 0:34ee385f4d2d 168 assert_param(IS_FUNCTIONAL_STATE(NewState));
rajathr 0:34ee385f4d2d 169
rajathr 0:34ee385f4d2d 170 *(__IO uint32_t *) CMPCR_CMP_PD_BB_MORT = (uint32_t)NewState;
rajathr 0:34ee385f4d2d 171 }
rajathr 0:34ee385f4d2d 172
rajathr 0:34ee385f4d2d 173 /**
rajathr 0:34ee385f4d2d 174 * @brief Checks whether the I/O Compensation Cell ready flag is set or not.
rajathr 0:34ee385f4d2d 175 * @param None
rajathr 0:34ee385f4d2d 176 * @retval The new state of the I/O Compensation Cell ready flag (SET or RESET)
rajathr 0:34ee385f4d2d 177 */
rajathr 0:34ee385f4d2d 178 FlagStatus SYSCFG_GetCompensationCellStatus_mort(void)
rajathr 0:34ee385f4d2d 179 {
rajathr 0:34ee385f4d2d 180 FlagStatus bitstatus = RESET;
rajathr 0:34ee385f4d2d 181
rajathr 0:34ee385f4d2d 182 if ((SYSCFG_MORT->CMPCR & SYSCFG_CMPCR_READY ) != (uint32_t)RESET)
rajathr 0:34ee385f4d2d 183 {
rajathr 0:34ee385f4d2d 184 bitstatus = SET;
rajathr 0:34ee385f4d2d 185 }
rajathr 0:34ee385f4d2d 186 else
rajathr 0:34ee385f4d2d 187 {
rajathr 0:34ee385f4d2d 188 bitstatus = RESET;
rajathr 0:34ee385f4d2d 189 }
rajathr 0:34ee385f4d2d 190 return bitstatus;
rajathr 0:34ee385f4d2d 191 }
rajathr 0:34ee385f4d2d 192
rajathr 0:34ee385f4d2d 193
rajathr 0:34ee385f4d2d 194
rajathr 0:34ee385f4d2d 195
rajathr 0:34ee385f4d2d 196 /**
rajathr 0:34ee385f4d2d 197 * @}
rajathr 0:34ee385f4d2d 198 */
rajathr 0:34ee385f4d2d 199
rajathr 0:34ee385f4d2d 200 /**
rajathr 0:34ee385f4d2d 201 * @}
rajathr 0:34ee385f4d2d 202 */
rajathr 0:34ee385f4d2d 203
rajathr 0:34ee385f4d2d 204 /**
rajathr 0:34ee385f4d2d 205 * @}
rajathr 0:34ee385f4d2d 206 */
rajathr 0:34ee385f4d2d 207
rajathr 0:34ee385f4d2d 208 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
rajathr 0:34ee385f4d2d 209
rajathr 0:34ee385f4d2d 210
rajathr 0:34ee385f4d2d 211
rajathr 0:34ee385f4d2d 212
rajathr 0:34ee385f4d2d 213
rajathr 0:34ee385f4d2d 214