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stm32f4xx_gpio_mort.c@0:34ee385f4d2d, 2021-10-23 (annotated)
- Committer:
- rajathr
- Date:
- Sat Oct 23 05:49:09 2021 +0000
- Revision:
- 0:34ee385f4d2d
At 23rd Oct 21 - All Code
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| rajathr | 0:34ee385f4d2d | 1 | /** |
| rajathr | 0:34ee385f4d2d | 2 | ****************************************************************************** |
| rajathr | 0:34ee385f4d2d | 3 | * @file stm32f4xx_gpio_mort.c |
| rajathr | 0:34ee385f4d2d | 4 | * @author MCD Application Team |
| rajathr | 0:34ee385f4d2d | 5 | * @version V1.8.0 |
| rajathr | 0:34ee385f4d2d | 6 | * @date 04-November-2016 |
| rajathr | 0:34ee385f4d2d | 7 | * @brief This file provides firmware functions to manage the following |
| rajathr | 0:34ee385f4d2d | 8 | * functionalities of the GPIO peripheral: |
| rajathr | 0:34ee385f4d2d | 9 | * + Initialization and Configuration |
| rajathr | 0:34ee385f4d2d | 10 | * + GPIO Read and Write |
| rajathr | 0:34ee385f4d2d | 11 | * + GPIO Alternate functions configuration |
| rajathr | 0:34ee385f4d2d | 12 | * |
| rajathr | 0:34ee385f4d2d | 13 | @verbatim |
| rajathr | 0:34ee385f4d2d | 14 | =============================================================================== |
| rajathr | 0:34ee385f4d2d | 15 | ##### How to use this driver ##### |
| rajathr | 0:34ee385f4d2d | 16 | =============================================================================== |
| rajathr | 0:34ee385f4d2d | 17 | [..] |
| rajathr | 0:34ee385f4d2d | 18 | (#) Enable the GPIO AHB clock using the following function |
| rajathr | 0:34ee385f4d2d | 19 | RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE); |
| rajathr | 0:34ee385f4d2d | 20 | |
| rajathr | 0:34ee385f4d2d | 21 | (#) Configure the GPIO pin(s) using GPIO_Init() |
| rajathr | 0:34ee385f4d2d | 22 | Four possible configuration are available for each pin: |
| rajathr | 0:34ee385f4d2d | 23 | (++) Input: Floating, Pull-up, Pull-down. |
| rajathr | 0:34ee385f4d2d | 24 | (++) Output: Push-Pull (Pull-up, Pull-down or no Pull) |
| rajathr | 0:34ee385f4d2d | 25 | Open Drain (Pull-up, Pull-down or no Pull). In output mode, the speed |
| rajathr | 0:34ee385f4d2d | 26 | is configurable: 2 MHz, 25 MHz, 50 MHz or 100 MHz. |
| rajathr | 0:34ee385f4d2d | 27 | (++) Alternate Function: Push-Pull (Pull-up, Pull-down or no Pull) Open |
| rajathr | 0:34ee385f4d2d | 28 | Drain (Pull-up, Pull-down or no Pull). |
| rajathr | 0:34ee385f4d2d | 29 | (++) Analog: required mode when a pin is to be used as ADC channel or DAC |
| rajathr | 0:34ee385f4d2d | 30 | output. |
| rajathr | 0:34ee385f4d2d | 31 | |
| rajathr | 0:34ee385f4d2d | 32 | (#) Peripherals alternate function: |
| rajathr | 0:34ee385f4d2d | 33 | (++) For ADC and DAC, configure the desired pin in analog mode using |
| rajathr | 0:34ee385f4d2d | 34 | GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AN; |
| rajathr | 0:34ee385f4d2d | 35 | (+++) For other peripherals (TIM, USART...): |
| rajathr | 0:34ee385f4d2d | 36 | (+++) Connect the pin to the desired peripherals' Alternate |
| rajathr | 0:34ee385f4d2d | 37 | Function (AF) using GPIO_PinAFConfig() function |
| rajathr | 0:34ee385f4d2d | 38 | (+++) Configure the desired pin in alternate function mode using |
| rajathr | 0:34ee385f4d2d | 39 | GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF |
| rajathr | 0:34ee385f4d2d | 40 | (+++) Select the type, pull-up/pull-down and output speed via |
| rajathr | 0:34ee385f4d2d | 41 | GPIO_PuPd, GPIO_OType and GPIO_Speed members |
| rajathr | 0:34ee385f4d2d | 42 | (+++) Call GPIO_Init() function |
| rajathr | 0:34ee385f4d2d | 43 | |
| rajathr | 0:34ee385f4d2d | 44 | (#) To get the level of a pin configured in input mode use GPIO_ReadInputDataBit() |
| rajathr | 0:34ee385f4d2d | 45 | |
| rajathr | 0:34ee385f4d2d | 46 | (#) To set/reset the level of a pin configured in output mode use |
| rajathr | 0:34ee385f4d2d | 47 | GPIO_SetBits()/GPIO_ResetBits() |
| rajathr | 0:34ee385f4d2d | 48 | |
| rajathr | 0:34ee385f4d2d | 49 | (#) During and just after reset, the alternate functions are not |
| rajathr | 0:34ee385f4d2d | 50 | active and the GPIO pins are configured in input floating mode (except JTAG |
| rajathr | 0:34ee385f4d2d | 51 | pins). |
| rajathr | 0:34ee385f4d2d | 52 | |
| rajathr | 0:34ee385f4d2d | 53 | (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose |
| rajathr | 0:34ee385f4d2d | 54 | (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has |
| rajathr | 0:34ee385f4d2d | 55 | priority over the GPIO function. |
| rajathr | 0:34ee385f4d2d | 56 | |
| rajathr | 0:34ee385f4d2d | 57 | (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as |
| rajathr | 0:34ee385f4d2d | 58 | general purpose PH0 and PH1, respectively, when the HSE oscillator is off. |
| rajathr | 0:34ee385f4d2d | 59 | The HSE has priority over the GPIO function. |
| rajathr | 0:34ee385f4d2d | 60 | |
| rajathr | 0:34ee385f4d2d | 61 | @endverbatim |
| rajathr | 0:34ee385f4d2d | 62 | * |
| rajathr | 0:34ee385f4d2d | 63 | ****************************************************************************** |
| rajathr | 0:34ee385f4d2d | 64 | * @attention |
| rajathr | 0:34ee385f4d2d | 65 | * |
| rajathr | 0:34ee385f4d2d | 66 | * <h2><center>© COPYRIGHT 2016 STMicroelectronics</center></h2> |
| rajathr | 0:34ee385f4d2d | 67 | * |
| rajathr | 0:34ee385f4d2d | 68 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); |
| rajathr | 0:34ee385f4d2d | 69 | * You may not use this file except in compliance with the License. |
| rajathr | 0:34ee385f4d2d | 70 | * You may obtain a copy of the License at: |
| rajathr | 0:34ee385f4d2d | 71 | * |
| rajathr | 0:34ee385f4d2d | 72 | * http://www.st.com/software_license_agreement_liberty_v2 |
| rajathr | 0:34ee385f4d2d | 73 | * |
| rajathr | 0:34ee385f4d2d | 74 | * Unless required by applicable law or agreed to in writing, software |
| rajathr | 0:34ee385f4d2d | 75 | * distributed under the License is distributed on an "AS IS" BASIS, |
| rajathr | 0:34ee385f4d2d | 76 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| rajathr | 0:34ee385f4d2d | 77 | * See the License for the specific language governing permissions and |
| rajathr | 0:34ee385f4d2d | 78 | * limitations under the License. |
| rajathr | 0:34ee385f4d2d | 79 | * |
| rajathr | 0:34ee385f4d2d | 80 | ****************************************************************************** |
| rajathr | 0:34ee385f4d2d | 81 | */ |
| rajathr | 0:34ee385f4d2d | 82 | |
| rajathr | 0:34ee385f4d2d | 83 | /* Includes ------------------------------------------------------------------*/ |
| rajathr | 0:34ee385f4d2d | 84 | #include "stm32f4xx_gpio_mort.h" |
| rajathr | 0:34ee385f4d2d | 85 | #include "stm32f4xx_rcc_mort.h" |
| rajathr | 0:34ee385f4d2d | 86 | |
| rajathr | 0:34ee385f4d2d | 87 | /** @addtogroup STM32F4xx_StdPeriph_Driver |
| rajathr | 0:34ee385f4d2d | 88 | * @{ |
| rajathr | 0:34ee385f4d2d | 89 | */ |
| rajathr | 0:34ee385f4d2d | 90 | |
| rajathr | 0:34ee385f4d2d | 91 | /** @defgroup GPIO |
| rajathr | 0:34ee385f4d2d | 92 | * @brief GPIO driver modules |
| rajathr | 0:34ee385f4d2d | 93 | * @{ |
| rajathr | 0:34ee385f4d2d | 94 | */ |
| rajathr | 0:34ee385f4d2d | 95 | |
| rajathr | 0:34ee385f4d2d | 96 | /* Private typedef -----------------------------------------------------------*/ |
| rajathr | 0:34ee385f4d2d | 97 | /* Private define ------------------------------------------------------------*/ |
| rajathr | 0:34ee385f4d2d | 98 | /* Private macro -------------------------------------------------------------*/ |
| rajathr | 0:34ee385f4d2d | 99 | /* Private variables ---------------------------------------------------------*/ |
| rajathr | 0:34ee385f4d2d | 100 | /* Private function prototypes -----------------------------------------------*/ |
| rajathr | 0:34ee385f4d2d | 101 | /* Private functions ---------------------------------------------------------*/ |
| rajathr | 0:34ee385f4d2d | 102 | |
| rajathr | 0:34ee385f4d2d | 103 | /** @defgroup GPIO_Private_Functions |
| rajathr | 0:34ee385f4d2d | 104 | * @{ |
| rajathr | 0:34ee385f4d2d | 105 | */ |
| rajathr | 0:34ee385f4d2d | 106 | |
| rajathr | 0:34ee385f4d2d | 107 | /** @defgroup GPIO_Group1 Initialization and Configuration |
| rajathr | 0:34ee385f4d2d | 108 | * @brief Initialization and Configuration |
| rajathr | 0:34ee385f4d2d | 109 | * |
| rajathr | 0:34ee385f4d2d | 110 | @verbatim |
| rajathr | 0:34ee385f4d2d | 111 | =============================================================================== |
| rajathr | 0:34ee385f4d2d | 112 | ##### Initialization and Configuration ##### |
| rajathr | 0:34ee385f4d2d | 113 | =============================================================================== |
| rajathr | 0:34ee385f4d2d | 114 | |
| rajathr | 0:34ee385f4d2d | 115 | @endverbatim |
| rajathr | 0:34ee385f4d2d | 116 | * @{ |
| rajathr | 0:34ee385f4d2d | 117 | */ |
| rajathr | 0:34ee385f4d2d | 118 | |
| rajathr | 0:34ee385f4d2d | 119 | /** |
| rajathr | 0:34ee385f4d2d | 120 | * @brief De-initializes the GPIOx peripheral registers to their default reset values. |
| rajathr | 0:34ee385f4d2d | 121 | * @note By default, The GPIO pins are configured in input floating mode (except JTAG pins). |
| rajathr | 0:34ee385f4d2d | 122 | * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices |
| rajathr | 0:34ee385f4d2d | 123 | * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices. |
| rajathr | 0:34ee385f4d2d | 124 | * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. |
| rajathr | 0:34ee385f4d2d | 125 | * @retval None |
| rajathr | 0:34ee385f4d2d | 126 | */ |
| rajathr | 0:34ee385f4d2d | 127 | void GPIO_DeInit_mort(GPIO_TypeDef_mort* GPIOx) |
| rajathr | 0:34ee385f4d2d | 128 | { |
| rajathr | 0:34ee385f4d2d | 129 | /* Check the parameters */ |
| rajathr | 0:34ee385f4d2d | 130 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| rajathr | 0:34ee385f4d2d | 131 | |
| rajathr | 0:34ee385f4d2d | 132 | if (GPIOx == GPIOA_MORT) |
| rajathr | 0:34ee385f4d2d | 133 | { |
| rajathr | 0:34ee385f4d2d | 134 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOA, ENABLE); |
| rajathr | 0:34ee385f4d2d | 135 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOA, DISABLE); |
| rajathr | 0:34ee385f4d2d | 136 | } |
| rajathr | 0:34ee385f4d2d | 137 | else if (GPIOx == GPIOB_MORT) |
| rajathr | 0:34ee385f4d2d | 138 | { |
| rajathr | 0:34ee385f4d2d | 139 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOB, ENABLE); |
| rajathr | 0:34ee385f4d2d | 140 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOB, DISABLE); |
| rajathr | 0:34ee385f4d2d | 141 | } |
| rajathr | 0:34ee385f4d2d | 142 | else if (GPIOx == GPIOC_MORT) |
| rajathr | 0:34ee385f4d2d | 143 | { |
| rajathr | 0:34ee385f4d2d | 144 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOC, ENABLE); |
| rajathr | 0:34ee385f4d2d | 145 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOC, DISABLE); |
| rajathr | 0:34ee385f4d2d | 146 | } |
| rajathr | 0:34ee385f4d2d | 147 | else if (GPIOx == GPIOD_MORT) |
| rajathr | 0:34ee385f4d2d | 148 | { |
| rajathr | 0:34ee385f4d2d | 149 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOD, ENABLE); |
| rajathr | 0:34ee385f4d2d | 150 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOD, DISABLE); |
| rajathr | 0:34ee385f4d2d | 151 | } |
| rajathr | 0:34ee385f4d2d | 152 | else if (GPIOx == GPIOE_MORT) |
| rajathr | 0:34ee385f4d2d | 153 | { |
| rajathr | 0:34ee385f4d2d | 154 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOE, ENABLE); |
| rajathr | 0:34ee385f4d2d | 155 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOE, DISABLE); |
| rajathr | 0:34ee385f4d2d | 156 | } |
| rajathr | 0:34ee385f4d2d | 157 | else if (GPIOx == GPIOF_MORT) |
| rajathr | 0:34ee385f4d2d | 158 | { |
| rajathr | 0:34ee385f4d2d | 159 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOF, ENABLE); |
| rajathr | 0:34ee385f4d2d | 160 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOF, DISABLE); |
| rajathr | 0:34ee385f4d2d | 161 | } |
| rajathr | 0:34ee385f4d2d | 162 | else if (GPIOx == GPIOG_MORT) |
| rajathr | 0:34ee385f4d2d | 163 | { |
| rajathr | 0:34ee385f4d2d | 164 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOG, ENABLE); |
| rajathr | 0:34ee385f4d2d | 165 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOG, DISABLE); |
| rajathr | 0:34ee385f4d2d | 166 | } |
| rajathr | 0:34ee385f4d2d | 167 | else if(GPIOx == GPIOH_MORT) |
| rajathr | 0:34ee385f4d2d | 168 | { |
| rajathr | 0:34ee385f4d2d | 169 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOH, ENABLE); |
| rajathr | 0:34ee385f4d2d | 170 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOH, DISABLE); |
| rajathr | 0:34ee385f4d2d | 171 | } |
| rajathr | 0:34ee385f4d2d | 172 | |
| rajathr | 0:34ee385f4d2d | 173 | /*else if (GPIOx == GPIOI) |
| rajathr | 0:34ee385f4d2d | 174 | { |
| rajathr | 0:34ee385f4d2d | 175 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOI, ENABLE); |
| rajathr | 0:34ee385f4d2d | 176 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOI, DISABLE); |
| rajathr | 0:34ee385f4d2d | 177 | } |
| rajathr | 0:34ee385f4d2d | 178 | else if (GPIOx == GPIOJ) |
| rajathr | 0:34ee385f4d2d | 179 | { |
| rajathr | 0:34ee385f4d2d | 180 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOJ, ENABLE); |
| rajathr | 0:34ee385f4d2d | 181 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOJ, DISABLE); |
| rajathr | 0:34ee385f4d2d | 182 | } |
| rajathr | 0:34ee385f4d2d | 183 | else |
| rajathr | 0:34ee385f4d2d | 184 | { |
| rajathr | 0:34ee385f4d2d | 185 | if (GPIOx == GPIOK) |
| rajathr | 0:34ee385f4d2d | 186 | { |
| rajathr | 0:34ee385f4d2d | 187 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOK, ENABLE); |
| rajathr | 0:34ee385f4d2d | 188 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOK, DISABLE); |
| rajathr | 0:34ee385f4d2d | 189 | } |
| rajathr | 0:34ee385f4d2d | 190 | }*/ |
| rajathr | 0:34ee385f4d2d | 191 | } |
| rajathr | 0:34ee385f4d2d | 192 | |
| rajathr | 0:34ee385f4d2d | 193 | /** |
| rajathr | 0:34ee385f4d2d | 194 | * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_InitStruct. |
| rajathr | 0:34ee385f4d2d | 195 | * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices |
| rajathr | 0:34ee385f4d2d | 196 | * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices. |
| rajathr | 0:34ee385f4d2d | 197 | * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. |
| rajathr | 0:34ee385f4d2d | 198 | * @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that contains |
| rajathr | 0:34ee385f4d2d | 199 | * the configuration information for the specified GPIO peripheral. |
| rajathr | 0:34ee385f4d2d | 200 | * @retval None |
| rajathr | 0:34ee385f4d2d | 201 | */ |
| rajathr | 0:34ee385f4d2d | 202 | void GPIO_Init_mort(GPIO_TypeDef_mort* GPIOx, GPIO_InitTypeDef_mort* GPIO_InitStruct) |
| rajathr | 0:34ee385f4d2d | 203 | { |
| rajathr | 0:34ee385f4d2d | 204 | uint32_t pinpos = 0x00, pos = 0x00 , currentpin = 0x00; |
| rajathr | 0:34ee385f4d2d | 205 | |
| rajathr | 0:34ee385f4d2d | 206 | /* Check the parameters */ |
| rajathr | 0:34ee385f4d2d | 207 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| rajathr | 0:34ee385f4d2d | 208 | assert_param(IS_GPIO_PIN_MORT(GPIO_InitStruct->GPIO_Pin)); |
| rajathr | 0:34ee385f4d2d | 209 | assert_param(IS_GPIO_MODE_MORT(GPIO_InitStruct->GPIO_Mode)); |
| rajathr | 0:34ee385f4d2d | 210 | assert_param(IS_GPIO_PUPD(GPIO_InitStruct->GPIO_PuPd)); |
| rajathr | 0:34ee385f4d2d | 211 | |
| rajathr | 0:34ee385f4d2d | 212 | /* ------------------------- Configure the port pins ---------------- */ |
| rajathr | 0:34ee385f4d2d | 213 | /*-- GPIO Mode Configuration --*/ |
| rajathr | 0:34ee385f4d2d | 214 | for (pinpos = 0x00; pinpos < 0x10; pinpos++) |
| rajathr | 0:34ee385f4d2d | 215 | { |
| rajathr | 0:34ee385f4d2d | 216 | pos = ((uint32_t)0x01) << pinpos; |
| rajathr | 0:34ee385f4d2d | 217 | /* Get the port pins position */ |
| rajathr | 0:34ee385f4d2d | 218 | currentpin = (GPIO_InitStruct->GPIO_Pin) & pos; |
| rajathr | 0:34ee385f4d2d | 219 | |
| rajathr | 0:34ee385f4d2d | 220 | if (currentpin == pos) |
| rajathr | 0:34ee385f4d2d | 221 | { |
| rajathr | 0:34ee385f4d2d | 222 | GPIOx->MODER &= ~(GPIO_MODER_MODER0_MORT << (pinpos * 2)); |
| rajathr | 0:34ee385f4d2d | 223 | GPIOx->MODER |= (((uint32_t)GPIO_InitStruct->GPIO_Mode) << (pinpos * 2)); |
| rajathr | 0:34ee385f4d2d | 224 | |
| rajathr | 0:34ee385f4d2d | 225 | if ((GPIO_InitStruct->GPIO_Mode == GPIO_Mode_OUT) || (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_AF)) |
| rajathr | 0:34ee385f4d2d | 226 | { |
| rajathr | 0:34ee385f4d2d | 227 | /* Check Speed mode parameters */ |
| rajathr | 0:34ee385f4d2d | 228 | assert_param(IS_GPIO_SPEED_MORT_MORT(GPIO_InitStruct->GPIO_Speed)); |
| rajathr | 0:34ee385f4d2d | 229 | |
| rajathr | 0:34ee385f4d2d | 230 | /* Speed mode configuration */ |
| rajathr | 0:34ee385f4d2d | 231 | GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0_MORT << (pinpos * 2)); |
| rajathr | 0:34ee385f4d2d | 232 | GPIOx->OSPEEDR |= ((uint32_t)(GPIO_InitStruct->GPIO_Speed) << (pinpos * 2)); |
| rajathr | 0:34ee385f4d2d | 233 | |
| rajathr | 0:34ee385f4d2d | 234 | /* Check Output mode parameters */ |
| rajathr | 0:34ee385f4d2d | 235 | assert_param(IS_GPIO_OTYPE(GPIO_InitStruct->GPIO_OType)); |
| rajathr | 0:34ee385f4d2d | 236 | |
| rajathr | 0:34ee385f4d2d | 237 | /* Output mode configuration*/ |
| rajathr | 0:34ee385f4d2d | 238 | GPIOx->OTYPER &= ~((GPIO_OTYPER_OT_0_MORT) << ((uint16_t)pinpos)) ; |
| rajathr | 0:34ee385f4d2d | 239 | GPIOx->OTYPER |= (uint16_t)(((uint16_t)GPIO_InitStruct->GPIO_OType) << ((uint16_t)pinpos)); |
| rajathr | 0:34ee385f4d2d | 240 | } |
| rajathr | 0:34ee385f4d2d | 241 | |
| rajathr | 0:34ee385f4d2d | 242 | /* Pull-up Pull down resistor configuration*/ |
| rajathr | 0:34ee385f4d2d | 243 | GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0_MORT << ((uint16_t)pinpos * 2)); |
| rajathr | 0:34ee385f4d2d | 244 | GPIOx->PUPDR |= (((uint32_t)GPIO_InitStruct->GPIO_PuPd) << (pinpos * 2)); |
| rajathr | 0:34ee385f4d2d | 245 | } |
| rajathr | 0:34ee385f4d2d | 246 | } |
| rajathr | 0:34ee385f4d2d | 247 | } |
| rajathr | 0:34ee385f4d2d | 248 | |
| rajathr | 0:34ee385f4d2d | 249 | /** |
| rajathr | 0:34ee385f4d2d | 250 | * @brief Fills each GPIO_InitStruct member with its default value. |
| rajathr | 0:34ee385f4d2d | 251 | * @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will be initialized. |
| rajathr | 0:34ee385f4d2d | 252 | * @retval None |
| rajathr | 0:34ee385f4d2d | 253 | */ |
| rajathr | 0:34ee385f4d2d | 254 | void GPIO_StructInit_mort(GPIO_InitTypeDef_mort* GPIO_InitStruct) |
| rajathr | 0:34ee385f4d2d | 255 | { |
| rajathr | 0:34ee385f4d2d | 256 | /* Reset GPIO init structure parameters values */ |
| rajathr | 0:34ee385f4d2d | 257 | GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All; |
| rajathr | 0:34ee385f4d2d | 258 | GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN; |
| rajathr | 0:34ee385f4d2d | 259 | GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz; |
| rajathr | 0:34ee385f4d2d | 260 | GPIO_InitStruct->GPIO_OType = GPIO_OType_PP; |
| rajathr | 0:34ee385f4d2d | 261 | GPIO_InitStruct->GPIO_PuPd = GPIO_PuPd_NOPULL; |
| rajathr | 0:34ee385f4d2d | 262 | } |
| rajathr | 0:34ee385f4d2d | 263 | |
| rajathr | 0:34ee385f4d2d | 264 | /** |
| rajathr | 0:34ee385f4d2d | 265 | * @brief Locks GPIO Pins configuration registers. |
| rajathr | 0:34ee385f4d2d | 266 | * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, |
| rajathr | 0:34ee385f4d2d | 267 | * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. |
| rajathr | 0:34ee385f4d2d | 268 | * @note The configuration of the locked GPIO pins can no longer be modified |
| rajathr | 0:34ee385f4d2d | 269 | * until the next reset. |
| rajathr | 0:34ee385f4d2d | 270 | * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices |
| rajathr | 0:34ee385f4d2d | 271 | * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices. |
| rajathr | 0:34ee385f4d2d | 272 | * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. |
| rajathr | 0:34ee385f4d2d | 273 | * @param GPIO_Pin: specifies the port bit to be locked. |
| rajathr | 0:34ee385f4d2d | 274 | * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). |
| rajathr | 0:34ee385f4d2d | 275 | * @retval None |
| rajathr | 0:34ee385f4d2d | 276 | */ |
| rajathr | 0:34ee385f4d2d | 277 | void GPIO_PinLockConfig_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin) |
| rajathr | 0:34ee385f4d2d | 278 | { |
| rajathr | 0:34ee385f4d2d | 279 | __IO uint32_t tmp = 0x00010000; |
| rajathr | 0:34ee385f4d2d | 280 | |
| rajathr | 0:34ee385f4d2d | 281 | /* Check the parameters */ |
| rajathr | 0:34ee385f4d2d | 282 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| rajathr | 0:34ee385f4d2d | 283 | assert_param(IS_GPIO_PIN_MORT(GPIO_Pin)); |
| rajathr | 0:34ee385f4d2d | 284 | |
| rajathr | 0:34ee385f4d2d | 285 | tmp |= GPIO_Pin; |
| rajathr | 0:34ee385f4d2d | 286 | /* Set LCKK bit */ |
| rajathr | 0:34ee385f4d2d | 287 | GPIOx->LCKR = tmp; |
| rajathr | 0:34ee385f4d2d | 288 | /* Reset LCKK bit */ |
| rajathr | 0:34ee385f4d2d | 289 | GPIOx->LCKR = GPIO_Pin; |
| rajathr | 0:34ee385f4d2d | 290 | /* Set LCKK bit */ |
| rajathr | 0:34ee385f4d2d | 291 | GPIOx->LCKR = tmp; |
| rajathr | 0:34ee385f4d2d | 292 | /* Read LCKK bit*/ |
| rajathr | 0:34ee385f4d2d | 293 | tmp = GPIOx->LCKR; |
| rajathr | 0:34ee385f4d2d | 294 | /* Read LCKK bit*/ |
| rajathr | 0:34ee385f4d2d | 295 | tmp = GPIOx->LCKR; |
| rajathr | 0:34ee385f4d2d | 296 | } |
| rajathr | 0:34ee385f4d2d | 297 | |
| rajathr | 0:34ee385f4d2d | 298 | /** |
| rajathr | 0:34ee385f4d2d | 299 | * @} |
| rajathr | 0:34ee385f4d2d | 300 | */ |
| rajathr | 0:34ee385f4d2d | 301 | |
| rajathr | 0:34ee385f4d2d | 302 | /** @defgroup GPIO_Group2 GPIO Read and Write |
| rajathr | 0:34ee385f4d2d | 303 | * @brief GPIO Read and Write |
| rajathr | 0:34ee385f4d2d | 304 | * |
| rajathr | 0:34ee385f4d2d | 305 | @verbatim |
| rajathr | 0:34ee385f4d2d | 306 | =============================================================================== |
| rajathr | 0:34ee385f4d2d | 307 | ##### GPIO Read and Write ##### |
| rajathr | 0:34ee385f4d2d | 308 | =============================================================================== |
| rajathr | 0:34ee385f4d2d | 309 | |
| rajathr | 0:34ee385f4d2d | 310 | @endverbatim |
| rajathr | 0:34ee385f4d2d | 311 | * @{ |
| rajathr | 0:34ee385f4d2d | 312 | */ |
| rajathr | 0:34ee385f4d2d | 313 | |
| rajathr | 0:34ee385f4d2d | 314 | /** |
| rajathr | 0:34ee385f4d2d | 315 | * @brief Reads the specified input port pin. |
| rajathr | 0:34ee385f4d2d | 316 | * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices |
| rajathr | 0:34ee385f4d2d | 317 | * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices. |
| rajathr | 0:34ee385f4d2d | 318 | * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. |
| rajathr | 0:34ee385f4d2d | 319 | * @param GPIO_Pin: specifies the port bit to read. |
| rajathr | 0:34ee385f4d2d | 320 | * This parameter can be GPIO_Pin_x where x can be (0..15). |
| rajathr | 0:34ee385f4d2d | 321 | * @retval The input port pin value. |
| rajathr | 0:34ee385f4d2d | 322 | */ |
| rajathr | 0:34ee385f4d2d | 323 | uint8_t GPIO_ReadInputDataBit_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin) |
| rajathr | 0:34ee385f4d2d | 324 | { |
| rajathr | 0:34ee385f4d2d | 325 | uint8_t bitstatus = 0x00; |
| rajathr | 0:34ee385f4d2d | 326 | |
| rajathr | 0:34ee385f4d2d | 327 | /* Check the parameters */ |
| rajathr | 0:34ee385f4d2d | 328 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| rajathr | 0:34ee385f4d2d | 329 | assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); |
| rajathr | 0:34ee385f4d2d | 330 | |
| rajathr | 0:34ee385f4d2d | 331 | if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET) |
| rajathr | 0:34ee385f4d2d | 332 | { |
| rajathr | 0:34ee385f4d2d | 333 | bitstatus = (uint8_t)Bit_SET; |
| rajathr | 0:34ee385f4d2d | 334 | } |
| rajathr | 0:34ee385f4d2d | 335 | else |
| rajathr | 0:34ee385f4d2d | 336 | { |
| rajathr | 0:34ee385f4d2d | 337 | bitstatus = (uint8_t)Bit_RESET; |
| rajathr | 0:34ee385f4d2d | 338 | } |
| rajathr | 0:34ee385f4d2d | 339 | return bitstatus; |
| rajathr | 0:34ee385f4d2d | 340 | } |
| rajathr | 0:34ee385f4d2d | 341 | |
| rajathr | 0:34ee385f4d2d | 342 | /** |
| rajathr | 0:34ee385f4d2d | 343 | * @brief Reads the specified GPIO input data port. |
| rajathr | 0:34ee385f4d2d | 344 | * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices |
| rajathr | 0:34ee385f4d2d | 345 | * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices. |
| rajathr | 0:34ee385f4d2d | 346 | * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. |
| rajathr | 0:34ee385f4d2d | 347 | * @retval GPIO input data port value. |
| rajathr | 0:34ee385f4d2d | 348 | */ |
| rajathr | 0:34ee385f4d2d | 349 | uint16_t GPIO_ReadInputData_mort(GPIO_TypeDef_mort* GPIOx) |
| rajathr | 0:34ee385f4d2d | 350 | { |
| rajathr | 0:34ee385f4d2d | 351 | /* Check the parameters */ |
| rajathr | 0:34ee385f4d2d | 352 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| rajathr | 0:34ee385f4d2d | 353 | |
| rajathr | 0:34ee385f4d2d | 354 | return ((uint16_t)GPIOx->IDR); |
| rajathr | 0:34ee385f4d2d | 355 | } |
| rajathr | 0:34ee385f4d2d | 356 | |
| rajathr | 0:34ee385f4d2d | 357 | /** |
| rajathr | 0:34ee385f4d2d | 358 | * @brief Reads the specified output data port bit. |
| rajathr | 0:34ee385f4d2d | 359 | * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices |
| rajathr | 0:34ee385f4d2d | 360 | * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices. |
| rajathr | 0:34ee385f4d2d | 361 | * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. |
| rajathr | 0:34ee385f4d2d | 362 | * @param GPIO_Pin: specifies the port bit to read. |
| rajathr | 0:34ee385f4d2d | 363 | * This parameter can be GPIO_Pin_x where x can be (0..15). |
| rajathr | 0:34ee385f4d2d | 364 | * @retval The output port pin value. |
| rajathr | 0:34ee385f4d2d | 365 | */ |
| rajathr | 0:34ee385f4d2d | 366 | uint8_t GPIO_ReadOutputDataBit_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin) |
| rajathr | 0:34ee385f4d2d | 367 | { |
| rajathr | 0:34ee385f4d2d | 368 | uint8_t bitstatus = 0x00; |
| rajathr | 0:34ee385f4d2d | 369 | |
| rajathr | 0:34ee385f4d2d | 370 | /* Check the parameters */ |
| rajathr | 0:34ee385f4d2d | 371 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| rajathr | 0:34ee385f4d2d | 372 | assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); |
| rajathr | 0:34ee385f4d2d | 373 | |
| rajathr | 0:34ee385f4d2d | 374 | if (((GPIOx->ODR) & GPIO_Pin) != (uint32_t)Bit_RESET) |
| rajathr | 0:34ee385f4d2d | 375 | { |
| rajathr | 0:34ee385f4d2d | 376 | bitstatus = (uint8_t)Bit_SET; |
| rajathr | 0:34ee385f4d2d | 377 | } |
| rajathr | 0:34ee385f4d2d | 378 | else |
| rajathr | 0:34ee385f4d2d | 379 | { |
| rajathr | 0:34ee385f4d2d | 380 | bitstatus = (uint8_t)Bit_RESET; |
| rajathr | 0:34ee385f4d2d | 381 | } |
| rajathr | 0:34ee385f4d2d | 382 | return bitstatus; |
| rajathr | 0:34ee385f4d2d | 383 | } |
| rajathr | 0:34ee385f4d2d | 384 | |
| rajathr | 0:34ee385f4d2d | 385 | /** |
| rajathr | 0:34ee385f4d2d | 386 | * @brief Reads the specified GPIO output data port. |
| rajathr | 0:34ee385f4d2d | 387 | * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices |
| rajathr | 0:34ee385f4d2d | 388 | * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices. |
| rajathr | 0:34ee385f4d2d | 389 | * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. |
| rajathr | 0:34ee385f4d2d | 390 | * @retval GPIO output data port value. |
| rajathr | 0:34ee385f4d2d | 391 | */ |
| rajathr | 0:34ee385f4d2d | 392 | uint16_t GPIO_ReadOutputData_mort(GPIO_TypeDef_mort* GPIOx) |
| rajathr | 0:34ee385f4d2d | 393 | { |
| rajathr | 0:34ee385f4d2d | 394 | /* Check the parameters */ |
| rajathr | 0:34ee385f4d2d | 395 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| rajathr | 0:34ee385f4d2d | 396 | |
| rajathr | 0:34ee385f4d2d | 397 | return ((uint16_t)GPIOx->ODR); |
| rajathr | 0:34ee385f4d2d | 398 | } |
| rajathr | 0:34ee385f4d2d | 399 | |
| rajathr | 0:34ee385f4d2d | 400 | /** |
| rajathr | 0:34ee385f4d2d | 401 | * @brief Sets the selected data port bits. |
| rajathr | 0:34ee385f4d2d | 402 | * @note This functions uses GPIOx_BSRR register to allow atomic read/modify |
| rajathr | 0:34ee385f4d2d | 403 | * accesses. In this way, there is no risk of an IRQ occurring between |
| rajathr | 0:34ee385f4d2d | 404 | * the read and the modify access. |
| rajathr | 0:34ee385f4d2d | 405 | * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices |
| rajathr | 0:34ee385f4d2d | 406 | * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices. |
| rajathr | 0:34ee385f4d2d | 407 | * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. |
| rajathr | 0:34ee385f4d2d | 408 | * @param GPIO_Pin: specifies the port bits to be written. |
| rajathr | 0:34ee385f4d2d | 409 | * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). |
| rajathr | 0:34ee385f4d2d | 410 | * @retval None |
| rajathr | 0:34ee385f4d2d | 411 | */ |
| rajathr | 0:34ee385f4d2d | 412 | void GPIO_SetBits_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin) |
| rajathr | 0:34ee385f4d2d | 413 | { |
| rajathr | 0:34ee385f4d2d | 414 | /* Check the parameters */ |
| rajathr | 0:34ee385f4d2d | 415 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| rajathr | 0:34ee385f4d2d | 416 | assert_param(IS_GPIO_PIN_MORT(GPIO_Pin)); |
| rajathr | 0:34ee385f4d2d | 417 | |
| rajathr | 0:34ee385f4d2d | 418 | GPIOx->BSRRL = GPIO_Pin; |
| rajathr | 0:34ee385f4d2d | 419 | } |
| rajathr | 0:34ee385f4d2d | 420 | |
| rajathr | 0:34ee385f4d2d | 421 | /** |
| rajathr | 0:34ee385f4d2d | 422 | * @brief Clears the selected data port bits. |
| rajathr | 0:34ee385f4d2d | 423 | * @note This functions uses GPIOx_BSRR register to allow atomic read/modify |
| rajathr | 0:34ee385f4d2d | 424 | * accesses. In this way, there is no risk of an IRQ occurring between |
| rajathr | 0:34ee385f4d2d | 425 | * the read and the modify access. |
| rajathr | 0:34ee385f4d2d | 426 | * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices |
| rajathr | 0:34ee385f4d2d | 427 | * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices. |
| rajathr | 0:34ee385f4d2d | 428 | * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. |
| rajathr | 0:34ee385f4d2d | 429 | * @param GPIO_Pin: specifies the port bits to be written. |
| rajathr | 0:34ee385f4d2d | 430 | * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). |
| rajathr | 0:34ee385f4d2d | 431 | * @retval None |
| rajathr | 0:34ee385f4d2d | 432 | */ |
| rajathr | 0:34ee385f4d2d | 433 | void GPIO_ResetBits_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin) |
| rajathr | 0:34ee385f4d2d | 434 | { |
| rajathr | 0:34ee385f4d2d | 435 | /* Check the parameters */ |
| rajathr | 0:34ee385f4d2d | 436 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| rajathr | 0:34ee385f4d2d | 437 | assert_param(IS_GPIO_PIN_MORT(GPIO_Pin)); |
| rajathr | 0:34ee385f4d2d | 438 | |
| rajathr | 0:34ee385f4d2d | 439 | GPIOx->BSRRH = GPIO_Pin; |
| rajathr | 0:34ee385f4d2d | 440 | } |
| rajathr | 0:34ee385f4d2d | 441 | |
| rajathr | 0:34ee385f4d2d | 442 | /** |
| rajathr | 0:34ee385f4d2d | 443 | * @brief Sets or clears the selected data port bit. |
| rajathr | 0:34ee385f4d2d | 444 | * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices |
| rajathr | 0:34ee385f4d2d | 445 | * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices. |
| rajathr | 0:34ee385f4d2d | 446 | * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. |
| rajathr | 0:34ee385f4d2d | 447 | * @param GPIO_Pin: specifies the port bit to be written. |
| rajathr | 0:34ee385f4d2d | 448 | * This parameter can be one of GPIO_Pin_x where x can be (0..15). |
| rajathr | 0:34ee385f4d2d | 449 | * @param BitVal: specifies the value to be written to the selected bit. |
| rajathr | 0:34ee385f4d2d | 450 | * This parameter can be one of the BitAction enum values: |
| rajathr | 0:34ee385f4d2d | 451 | * @arg Bit_RESET: to clear the port pin |
| rajathr | 0:34ee385f4d2d | 452 | * @arg Bit_SET: to set the port pin |
| rajathr | 0:34ee385f4d2d | 453 | * @retval None |
| rajathr | 0:34ee385f4d2d | 454 | */ |
| rajathr | 0:34ee385f4d2d | 455 | void GPIO_WriteBit_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin, BitAction BitVal) |
| rajathr | 0:34ee385f4d2d | 456 | { |
| rajathr | 0:34ee385f4d2d | 457 | /* Check the parameters */ |
| rajathr | 0:34ee385f4d2d | 458 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| rajathr | 0:34ee385f4d2d | 459 | assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); |
| rajathr | 0:34ee385f4d2d | 460 | assert_param(IS_GPIO_BIT_ACTION(BitVal)); |
| rajathr | 0:34ee385f4d2d | 461 | |
| rajathr | 0:34ee385f4d2d | 462 | if (BitVal != Bit_RESET) |
| rajathr | 0:34ee385f4d2d | 463 | { |
| rajathr | 0:34ee385f4d2d | 464 | GPIOx->BSRRL = GPIO_Pin; |
| rajathr | 0:34ee385f4d2d | 465 | } |
| rajathr | 0:34ee385f4d2d | 466 | else |
| rajathr | 0:34ee385f4d2d | 467 | { |
| rajathr | 0:34ee385f4d2d | 468 | GPIOx->BSRRH = GPIO_Pin ; |
| rajathr | 0:34ee385f4d2d | 469 | } |
| rajathr | 0:34ee385f4d2d | 470 | } |
| rajathr | 0:34ee385f4d2d | 471 | |
| rajathr | 0:34ee385f4d2d | 472 | /** |
| rajathr | 0:34ee385f4d2d | 473 | * @brief Writes data to the specified GPIO data port. |
| rajathr | 0:34ee385f4d2d | 474 | * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices |
| rajathr | 0:34ee385f4d2d | 475 | * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices. |
| rajathr | 0:34ee385f4d2d | 476 | * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. |
| rajathr | 0:34ee385f4d2d | 477 | * @param PortVal: specifies the value to be written to the port output data register. |
| rajathr | 0:34ee385f4d2d | 478 | * @retval None |
| rajathr | 0:34ee385f4d2d | 479 | */ |
| rajathr | 0:34ee385f4d2d | 480 | void GPIO_Write_mort(GPIO_TypeDef_mort* GPIOx, uint16_t PortVal) |
| rajathr | 0:34ee385f4d2d | 481 | { |
| rajathr | 0:34ee385f4d2d | 482 | /* Check the parameters */ |
| rajathr | 0:34ee385f4d2d | 483 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| rajathr | 0:34ee385f4d2d | 484 | |
| rajathr | 0:34ee385f4d2d | 485 | GPIOx->ODR = PortVal; |
| rajathr | 0:34ee385f4d2d | 486 | } |
| rajathr | 0:34ee385f4d2d | 487 | |
| rajathr | 0:34ee385f4d2d | 488 | /** |
| rajathr | 0:34ee385f4d2d | 489 | * @brief Toggles the specified GPIO pins.. |
| rajathr | 0:34ee385f4d2d | 490 | * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices |
| rajathr | 0:34ee385f4d2d | 491 | * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices. |
| rajathr | 0:34ee385f4d2d | 492 | * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. |
| rajathr | 0:34ee385f4d2d | 493 | * @param GPIO_Pin: Specifies the pins to be toggled. |
| rajathr | 0:34ee385f4d2d | 494 | * @retval None |
| rajathr | 0:34ee385f4d2d | 495 | */ |
| rajathr | 0:34ee385f4d2d | 496 | void GPIO_ToggleBits_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin) |
| rajathr | 0:34ee385f4d2d | 497 | { |
| rajathr | 0:34ee385f4d2d | 498 | /* Check the parameters */ |
| rajathr | 0:34ee385f4d2d | 499 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| rajathr | 0:34ee385f4d2d | 500 | |
| rajathr | 0:34ee385f4d2d | 501 | GPIOx->ODR ^= GPIO_Pin; |
| rajathr | 0:34ee385f4d2d | 502 | } |
| rajathr | 0:34ee385f4d2d | 503 | |
| rajathr | 0:34ee385f4d2d | 504 | /** |
| rajathr | 0:34ee385f4d2d | 505 | * @} |
| rajathr | 0:34ee385f4d2d | 506 | */ |
| rajathr | 0:34ee385f4d2d | 507 | |
| rajathr | 0:34ee385f4d2d | 508 | /** @defgroup GPIO_Group3 GPIO Alternate functions configuration function |
| rajathr | 0:34ee385f4d2d | 509 | * @brief GPIO Alternate functions configuration function |
| rajathr | 0:34ee385f4d2d | 510 | * |
| rajathr | 0:34ee385f4d2d | 511 | @verbatim |
| rajathr | 0:34ee385f4d2d | 512 | =============================================================================== |
| rajathr | 0:34ee385f4d2d | 513 | ##### GPIO Alternate functions configuration function ##### |
| rajathr | 0:34ee385f4d2d | 514 | =============================================================================== |
| rajathr | 0:34ee385f4d2d | 515 | |
| rajathr | 0:34ee385f4d2d | 516 | @endverbatim |
| rajathr | 0:34ee385f4d2d | 517 | * @{ |
| rajathr | 0:34ee385f4d2d | 518 | */ |
| rajathr | 0:34ee385f4d2d | 519 | |
| rajathr | 0:34ee385f4d2d | 520 | /** |
| rajathr | 0:34ee385f4d2d | 521 | * @brief Changes the mapping of the specified pin. |
| rajathr | 0:34ee385f4d2d | 522 | * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F405xx/407xx and STM32F415xx/417xx devices |
| rajathr | 0:34ee385f4d2d | 523 | * x can be (A..I) to select the GPIO peripheral for STM32F42xxx/43xxx devices. |
| rajathr | 0:34ee385f4d2d | 524 | * x can be (A, B, C, D and H) to select the GPIO peripheral for STM32F401xx devices. |
| rajathr | 0:34ee385f4d2d | 525 | * @param GPIO_PinSource: specifies the pin for the Alternate function. |
| rajathr | 0:34ee385f4d2d | 526 | * This parameter can be GPIO_PinSourcex where x can be (0..15). |
| rajathr | 0:34ee385f4d2d | 527 | * @param GPIO_AFSelection: selects the pin to used as Alternate function. |
| rajathr | 0:34ee385f4d2d | 528 | * This parameter can be one of the following values: |
| rajathr | 0:34ee385f4d2d | 529 | * @arg GPIO_AF_RTC_50Hz: Connect RTC_50Hz pin to AF0 (default after reset) |
| rajathr | 0:34ee385f4d2d | 530 | * @arg GPIO_AF_MCO: Connect MCO pin (MCO1 and MCO2) to AF0 (default after reset) |
| rajathr | 0:34ee385f4d2d | 531 | * @arg GPIO_AF_TAMPER: Connect TAMPER pins (TAMPER_1 and TAMPER_2) to AF0 (default after reset) |
| rajathr | 0:34ee385f4d2d | 532 | * @arg GPIO_AF_SWJ: Connect SWJ pins (SWD and JTAG)to AF0 (default after reset) |
| rajathr | 0:34ee385f4d2d | 533 | * @arg GPIO_AF_TRACE: Connect TRACE pins to AF0 (default after reset) |
| rajathr | 0:34ee385f4d2d | 534 | * @arg GPIO_AF_TIM1: Connect TIM1 pins to AF1 |
| rajathr | 0:34ee385f4d2d | 535 | * @arg GPIO_AF_TIM2: Connect TIM2 pins to AF1 |
| rajathr | 0:34ee385f4d2d | 536 | * @arg GPIO_AF_TIM3: Connect TIM3 pins to AF2 |
| rajathr | 0:34ee385f4d2d | 537 | * @arg GPIO_AF_TIM4: Connect TIM4 pins to AF2 |
| rajathr | 0:34ee385f4d2d | 538 | * @arg GPIO_AF_TIM5: Connect TIM5 pins to AF2 |
| rajathr | 0:34ee385f4d2d | 539 | * @arg GPIO_AF_TIM8: Connect TIM8 pins to AF3 |
| rajathr | 0:34ee385f4d2d | 540 | * @arg GPIO_AF_TIM9: Connect TIM9 pins to AF3 |
| rajathr | 0:34ee385f4d2d | 541 | * @arg GPIO_AF_TIM10: Connect TIM10 pins to AF3 |
| rajathr | 0:34ee385f4d2d | 542 | * @arg GPIO_AF_TIM11: Connect TIM11 pins to AF3 |
| rajathr | 0:34ee385f4d2d | 543 | * @arg GPIO_AF_I2C1: Connect I2C1 pins to AF4 |
| rajathr | 0:34ee385f4d2d | 544 | * @arg GPIO_AF_I2C2: Connect I2C2 pins to AF4 |
| rajathr | 0:34ee385f4d2d | 545 | * @arg GPIO_AF_I2C3: Connect I2C3 pins to AF4 |
| rajathr | 0:34ee385f4d2d | 546 | * @arg GPIO_AF_SPI1: Connect SPI1 pins to AF5 |
| rajathr | 0:34ee385f4d2d | 547 | * @arg GPIO_AF_SPI2: Connect SPI2/I2S2 pins to AF5 |
| rajathr | 0:34ee385f4d2d | 548 | * @arg GPIO_AF_SPI4: Connect SPI4 pins to AF5 |
| rajathr | 0:34ee385f4d2d | 549 | * @arg GPIO_AF_SPI5: Connect SPI5 pins to AF5 |
| rajathr | 0:34ee385f4d2d | 550 | * @arg GPIO_AF_SPI6: Connect SPI6 pins to AF5 |
| rajathr | 0:34ee385f4d2d | 551 | * @arg GPIO_AF_SAI1: Connect SAI1 pins to AF6 for STM32F42xxx/43xxx devices. |
| rajathr | 0:34ee385f4d2d | 552 | * @arg GPIO_AF_SPI3: Connect SPI3/I2S3 pins to AF6 |
| rajathr | 0:34ee385f4d2d | 553 | * @arg GPIO_AF_I2S3ext: Connect I2S3ext pins to AF7 |
| rajathr | 0:34ee385f4d2d | 554 | * @arg GPIO_AF_USART1: Connect USART1 pins to AF7 |
| rajathr | 0:34ee385f4d2d | 555 | * @arg GPIO_AF_USART2: Connect USART2 pins to AF7 |
| rajathr | 0:34ee385f4d2d | 556 | * @arg GPIO_AF_USART3: Connect USART3 pins to AF7 |
| rajathr | 0:34ee385f4d2d | 557 | * @arg GPIO_AF_UART4: Connect UART4 pins to AF8 |
| rajathr | 0:34ee385f4d2d | 558 | * @arg GPIO_AF_UART5: Connect UART5 pins to AF8 |
| rajathr | 0:34ee385f4d2d | 559 | * @arg GPIO_AF_USART6: Connect USART6 pins to AF8 |
| rajathr | 0:34ee385f4d2d | 560 | * @arg GPIO_AF_UART7: Connect UART7 pins to AF8 |
| rajathr | 0:34ee385f4d2d | 561 | * @arg GPIO_AF_UART8: Connect UART8 pins to AF8 |
| rajathr | 0:34ee385f4d2d | 562 | * @arg GPIO_AF_CAN1: Connect CAN1 pins to AF9 |
| rajathr | 0:34ee385f4d2d | 563 | * @arg GPIO_AF_CAN2: Connect CAN2 pins to AF9 |
| rajathr | 0:34ee385f4d2d | 564 | * @arg GPIO_AF_TIM12: Connect TIM12 pins to AF9 |
| rajathr | 0:34ee385f4d2d | 565 | * @arg GPIO_AF_TIM13: Connect TIM13 pins to AF9 |
| rajathr | 0:34ee385f4d2d | 566 | * @arg GPIO_AF_TIM14: Connect TIM14 pins to AF9 |
| rajathr | 0:34ee385f4d2d | 567 | * @arg GPIO_AF_OTG_FS: Connect OTG_FS pins to AF10 |
| rajathr | 0:34ee385f4d2d | 568 | * @arg GPIO_AF_OTG_HS: Connect OTG_HS pins to AF10 |
| rajathr | 0:34ee385f4d2d | 569 | * @arg GPIO_AF_ETH: Connect ETHERNET pins to AF11 |
| rajathr | 0:34ee385f4d2d | 570 | * @arg GPIO_AF_FSMC: Connect FSMC pins to AF12 |
| rajathr | 0:34ee385f4d2d | 571 | * @arg GPIO_AF_FMC: Connect FMC pins to AF12 for STM32F42xxx/43xxx devices. |
| rajathr | 0:34ee385f4d2d | 572 | * @arg GPIO_AF_OTG_HS_FS: Connect OTG HS (configured in FS) pins to AF12 |
| rajathr | 0:34ee385f4d2d | 573 | * @arg GPIO_AF_SDIO: Connect SDIO pins to AF12 |
| rajathr | 0:34ee385f4d2d | 574 | * @arg GPIO_AF_DCMI: Connect DCMI pins to AF13 |
| rajathr | 0:34ee385f4d2d | 575 | * @arg GPIO_AF_LTDC: Connect LTDC pins to AF14 for STM32F429xx/439xx devices. |
| rajathr | 0:34ee385f4d2d | 576 | * @arg GPIO_AF_EVENTOUT: Connect EVENTOUT pins to AF15 |
| rajathr | 0:34ee385f4d2d | 577 | * @retval None |
| rajathr | 0:34ee385f4d2d | 578 | */ |
| rajathr | 0:34ee385f4d2d | 579 | void GPIO_PinAFConfig_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF) |
| rajathr | 0:34ee385f4d2d | 580 | { |
| rajathr | 0:34ee385f4d2d | 581 | uint32_t temp = 0x00; |
| rajathr | 0:34ee385f4d2d | 582 | uint32_t temp_2 = 0x00; |
| rajathr | 0:34ee385f4d2d | 583 | |
| rajathr | 0:34ee385f4d2d | 584 | /* Check the parameters */ |
| rajathr | 0:34ee385f4d2d | 585 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
| rajathr | 0:34ee385f4d2d | 586 | assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource)); |
| rajathr | 0:34ee385f4d2d | 587 | assert_param(IS_GPIO_AF(GPIO_AF)); |
| rajathr | 0:34ee385f4d2d | 588 | |
| rajathr | 0:34ee385f4d2d | 589 | temp = ((uint32_t)(GPIO_AF) << ((uint32_t)((uint32_t)GPIO_PinSource & (uint32_t)0x07) * 4)) ; |
| rajathr | 0:34ee385f4d2d | 590 | GPIOx->AFR[GPIO_PinSource >> 0x03] &= ~((uint32_t)0xF << ((uint32_t)((uint32_t)GPIO_PinSource & (uint32_t)0x07) * 4)) ; |
| rajathr | 0:34ee385f4d2d | 591 | temp_2 = GPIOx->AFR[GPIO_PinSource >> 0x03] | temp; |
| rajathr | 0:34ee385f4d2d | 592 | GPIOx->AFR[GPIO_PinSource >> 0x03] = temp_2; |
| rajathr | 0:34ee385f4d2d | 593 | } |
| rajathr | 0:34ee385f4d2d | 594 | |
| rajathr | 0:34ee385f4d2d | 595 | /** |
| rajathr | 0:34ee385f4d2d | 596 | * @} |
| rajathr | 0:34ee385f4d2d | 597 | */ |
| rajathr | 0:34ee385f4d2d | 598 | |
| rajathr | 0:34ee385f4d2d | 599 | /** |
| rajathr | 0:34ee385f4d2d | 600 | * @} |
| rajathr | 0:34ee385f4d2d | 601 | */ |
| rajathr | 0:34ee385f4d2d | 602 | |
| rajathr | 0:34ee385f4d2d | 603 | /** |
| rajathr | 0:34ee385f4d2d | 604 | * @} |
| rajathr | 0:34ee385f4d2d | 605 | */ |
| rajathr | 0:34ee385f4d2d | 606 | |
| rajathr | 0:34ee385f4d2d | 607 | /** |
| rajathr | 0:34ee385f4d2d | 608 | * @} |
| rajathr | 0:34ee385f4d2d | 609 | */ |
| rajathr | 0:34ee385f4d2d | 610 | |
| rajathr | 0:34ee385f4d2d | 611 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
| rajathr | 0:34ee385f4d2d | 612 | |
| rajathr | 0:34ee385f4d2d | 613 | |
| rajathr | 0:34ee385f4d2d | 614 | |
| rajathr | 0:34ee385f4d2d | 615 | |
| rajathr | 0:34ee385f4d2d | 616 |