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Dependencies:   mbed

misc_mort.c@0:34ee385f4d2d, 2021-10-23 (annotated)

Committer:
rajathr
Date:
Sat Oct 23 05:49:09 2021 +0000
Revision:
0:34ee385f4d2d
At 23rd Oct 21 - All Code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rajathr 0:34ee385f4d2d 1 /**
rajathr 0:34ee385f4d2d 2 ******************************************************************************
rajathr 0:34ee385f4d2d 3 * @file misc.c
rajathr 0:34ee385f4d2d 4 * @author MCD Application Team
rajathr 0:34ee385f4d2d 5 * @version V1.8.0
rajathr 0:34ee385f4d2d 6 * @date 04-November-2016
rajathr 0:34ee385f4d2d 7 * @brief This file provides all the miscellaneous firmware functions (add-on
rajathr 0:34ee385f4d2d 8 * to CMSIS functions).
rajathr 0:34ee385f4d2d 9 *
rajathr 0:34ee385f4d2d 10 * @verbatim
rajathr 0:34ee385f4d2d 11 *
rajathr 0:34ee385f4d2d 12 * ===================================================================
rajathr 0:34ee385f4d2d 13 * How to configure Interrupts using driver
rajathr 0:34ee385f4d2d 14 * ===================================================================
rajathr 0:34ee385f4d2d 15 *
rajathr 0:34ee385f4d2d 16 * This section provide functions allowing to configure the NVIC interrupts (IRQ).
rajathr 0:34ee385f4d2d 17 * The Cortex-M4 exceptions are managed by CMSIS functions.
rajathr 0:34ee385f4d2d 18 *
rajathr 0:34ee385f4d2d 19 * 1. Configure the NVIC Priority Grouping using NVIC_PriorityGroupConfig_mort()
rajathr 0:34ee385f4d2d 20 * function according to the following table.
rajathr 0:34ee385f4d2d 21
rajathr 0:34ee385f4d2d 22 * The table below gives the allowed values of the pre-emption priority and subpriority according
rajathr 0:34ee385f4d2d 23 * to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig_mort function
rajathr 0:34ee385f4d2d 24 * ==========================================================================================================================
rajathr 0:34ee385f4d2d 25 * NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description
rajathr 0:34ee385f4d2d 26 * ==========================================================================================================================
rajathr 0:34ee385f4d2d 27 * NVIC_PriorityGroup_0_MORT | 0 | 0-15 | 0 bits for pre-emption priority
rajathr 0:34ee385f4d2d 28 * | | | 4 bits for subpriority
rajathr 0:34ee385f4d2d 29 * --------------------------------------------------------------------------------------------------------------------------
rajathr 0:34ee385f4d2d 30 * NVIC_PriorityGroup_1_MORT | 0-1 | 0-7 | 1 bits for pre-emption priority
rajathr 0:34ee385f4d2d 31 * | | | 3 bits for subpriority
rajathr 0:34ee385f4d2d 32 * --------------------------------------------------------------------------------------------------------------------------
rajathr 0:34ee385f4d2d 33 * NVIC_PriorityGroup_2_MORT | 0-3 | 0-3 | 2 bits for pre-emption priority
rajathr 0:34ee385f4d2d 34 * | | | 2 bits for subpriority
rajathr 0:34ee385f4d2d 35 * --------------------------------------------------------------------------------------------------------------------------
rajathr 0:34ee385f4d2d 36 * NVIC_PriorityGroup_3_MORT | 0-7 | 0-1 | 3 bits for pre-emption priority
rajathr 0:34ee385f4d2d 37 * | | | 1 bits for subpriority
rajathr 0:34ee385f4d2d 38 * --------------------------------------------------------------------------------------------------------------------------
rajathr 0:34ee385f4d2d 39 * NVIC_PriorityGroup_4_MORT | 0-15 | 0 | 4 bits for pre-emption priority
rajathr 0:34ee385f4d2d 40 * | | | 0 bits for subpriority
rajathr 0:34ee385f4d2d 41 * ==========================================================================================================================
rajathr 0:34ee385f4d2d 42 *
rajathr 0:34ee385f4d2d 43 * 2. Enable and Configure the priority of the selected IRQ Channels using NVIC_Init_mort()
rajathr 0:34ee385f4d2d 44 *
rajathr 0:34ee385f4d2d 45 * @note When the NVIC_PriorityGroup_0_MORT is selected, IRQ pre-emption is no more possible.
rajathr 0:34ee385f4d2d 46 * The pending IRQ priority will be managed only by the subpriority.
rajathr 0:34ee385f4d2d 47 *
rajathr 0:34ee385f4d2d 48 * @note IRQ priority order (sorted by highest to lowest priority):
rajathr 0:34ee385f4d2d 49 * - Lowest pre-emption priority
rajathr 0:34ee385f4d2d 50 * - Lowest subpriority
rajathr 0:34ee385f4d2d 51 * - Lowest hardware priority (IRQ number)
rajathr 0:34ee385f4d2d 52 *
rajathr 0:34ee385f4d2d 53 * @endverbatim
rajathr 0:34ee385f4d2d 54 *
rajathr 0:34ee385f4d2d 55 ******************************************************************************
rajathr 0:34ee385f4d2d 56 * @attention
rajathr 0:34ee385f4d2d 57 *
rajathr 0:34ee385f4d2d 58 * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
rajathr 0:34ee385f4d2d 59 *
rajathr 0:34ee385f4d2d 60 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
rajathr 0:34ee385f4d2d 61 * You may not use this file except in compliance with the License.
rajathr 0:34ee385f4d2d 62 * You may obtain a copy of the License at:
rajathr 0:34ee385f4d2d 63 *
rajathr 0:34ee385f4d2d 64 * http://www.st.com/software_license_agreement_liberty_v2
rajathr 0:34ee385f4d2d 65 *
rajathr 0:34ee385f4d2d 66 * Unless required by applicable law or agreed to in writing, software
rajathr 0:34ee385f4d2d 67 * distributed under the License is distributed on an "AS IS" BASIS,
rajathr 0:34ee385f4d2d 68 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
rajathr 0:34ee385f4d2d 69 * See the License for the specific language governing permissions and
rajathr 0:34ee385f4d2d 70 * limitations under the License.
rajathr 0:34ee385f4d2d 71 *
rajathr 0:34ee385f4d2d 72 ******************************************************************************
rajathr 0:34ee385f4d2d 73 */
rajathr 0:34ee385f4d2d 74
rajathr 0:34ee385f4d2d 75 /* Includes ------------------------------------------------------------------*/
rajathr 0:34ee385f4d2d 76 #include "misc_mort.h"
rajathr 0:34ee385f4d2d 77
rajathr 0:34ee385f4d2d 78 /** @addtogroup STM32F4xx_StdPeriph_Driver
rajathr 0:34ee385f4d2d 79 * @{
rajathr 0:34ee385f4d2d 80 */
rajathr 0:34ee385f4d2d 81
rajathr 0:34ee385f4d2d 82 /** @defgroup MISC
rajathr 0:34ee385f4d2d 83 * @brief MISC driver modules
rajathr 0:34ee385f4d2d 84 * @{
rajathr 0:34ee385f4d2d 85 */
rajathr 0:34ee385f4d2d 86
rajathr 0:34ee385f4d2d 87 /* Private typedef -----------------------------------------------------------*/
rajathr 0:34ee385f4d2d 88 /* Private define ------------------------------------------------------------*/
rajathr 0:34ee385f4d2d 89 #define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000)
rajathr 0:34ee385f4d2d 90
rajathr 0:34ee385f4d2d 91 /* Private macro -------------------------------------------------------------*/
rajathr 0:34ee385f4d2d 92 /* Private variables ---------------------------------------------------------*/
rajathr 0:34ee385f4d2d 93 /* Private function prototypes -----------------------------------------------*/
rajathr 0:34ee385f4d2d 94 /* Private functions ---------------------------------------------------------*/
rajathr 0:34ee385f4d2d 95
rajathr 0:34ee385f4d2d 96 /** @defgroup MISC_Private_Functions
rajathr 0:34ee385f4d2d 97 * @{
rajathr 0:34ee385f4d2d 98 */
rajathr 0:34ee385f4d2d 99
rajathr 0:34ee385f4d2d 100 /**
rajathr 0:34ee385f4d2d 101 * @brief Configures the priority grouping: pre-emption priority and subpriority.
rajathr 0:34ee385f4d2d 102 * @param NVIC_PriorityGroup: specifies the priority grouping bits length.
rajathr 0:34ee385f4d2d 103 * This parameter can be one of the following values:
rajathr 0:34ee385f4d2d 104 * @arg NVIC_PriorityGroup_0_MORT: 0 bits for pre-emption priority
rajathr 0:34ee385f4d2d 105 * 4 bits for subpriority
rajathr 0:34ee385f4d2d 106 * @arg NVIC_PriorityGroup_1_MORT: 1 bits for pre-emption priority
rajathr 0:34ee385f4d2d 107 * 3 bits for subpriority
rajathr 0:34ee385f4d2d 108 * @arg NVIC_PriorityGroup_2_MORT: 2 bits for pre-emption priority
rajathr 0:34ee385f4d2d 109 * 2 bits for subpriority
rajathr 0:34ee385f4d2d 110 * @arg NVIC_PriorityGroup_3_MORT: 3 bits for pre-emption priority
rajathr 0:34ee385f4d2d 111 * 1 bits for subpriority
rajathr 0:34ee385f4d2d 112 * @arg NVIC_PriorityGroup_4_MORT: 4 bits for pre-emption priority
rajathr 0:34ee385f4d2d 113 * 0 bits for subpriority
rajathr 0:34ee385f4d2d 114 * @note When the NVIC_PriorityGroup_0_MORT is selected, IRQ pre-emption is no more possible.
rajathr 0:34ee385f4d2d 115 * The pending IRQ priority will be managed only by the subpriority.
rajathr 0:34ee385f4d2d 116 * @retval None
rajathr 0:34ee385f4d2d 117 */
rajathr 0:34ee385f4d2d 118 void NVIC_PriorityGroupConfig_mort(uint32_t NVIC_PriorityGroup)
rajathr 0:34ee385f4d2d 119 {
rajathr 0:34ee385f4d2d 120 /* Check the parameters */
rajathr 0:34ee385f4d2d 121 assert_param(IS_NVIC_PRIORITY_GROUP_MORT(NVIC_PriorityGroup));
rajathr 0:34ee385f4d2d 122
rajathr 0:34ee385f4d2d 123 /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
rajathr 0:34ee385f4d2d 124 SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
rajathr 0:34ee385f4d2d 125 }
rajathr 0:34ee385f4d2d 126
rajathr 0:34ee385f4d2d 127 /**
rajathr 0:34ee385f4d2d 128 * @brief Initializes the NVIC peripheral according to the specified
rajathr 0:34ee385f4d2d 129 * parameters in the NVIC_InitStruct.
rajathr 0:34ee385f4d2d 130 * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig_mort()
rajathr 0:34ee385f4d2d 131 * function should be called before.
rajathr 0:34ee385f4d2d 132 * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef_mort structure that contains
rajathr 0:34ee385f4d2d 133 * the configuration information for the specified NVIC peripheral.
rajathr 0:34ee385f4d2d 134 * @retval None
rajathr 0:34ee385f4d2d 135 */
rajathr 0:34ee385f4d2d 136 void NVIC_Init_mort(NVIC_InitTypeDef_mort* NVIC_InitStruct)
rajathr 0:34ee385f4d2d 137 {
rajathr 0:34ee385f4d2d 138 uint8_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
rajathr 0:34ee385f4d2d 139
rajathr 0:34ee385f4d2d 140 /* Check the parameters */
rajathr 0:34ee385f4d2d 141 assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
rajathr 0:34ee385f4d2d 142 assert_param(IS_NVIC_PREEMPTION_PRIORITY_MORT(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));
rajathr 0:34ee385f4d2d 143 assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
rajathr 0:34ee385f4d2d 144
rajathr 0:34ee385f4d2d 145 if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
rajathr 0:34ee385f4d2d 146 {
rajathr 0:34ee385f4d2d 147 /* Compute the Corresponding IRQ Priority --------------------------------*/
rajathr 0:34ee385f4d2d 148 tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
rajathr 0:34ee385f4d2d 149 tmppre = (0x4 - tmppriority);
rajathr 0:34ee385f4d2d 150 tmpsub = tmpsub >> tmppriority;
rajathr 0:34ee385f4d2d 151
rajathr 0:34ee385f4d2d 152 tmppriority = NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
rajathr 0:34ee385f4d2d 153 tmppriority |= (uint8_t)(NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub);
rajathr 0:34ee385f4d2d 154
rajathr 0:34ee385f4d2d 155 tmppriority = tmppriority << 0x04;
rajathr 0:34ee385f4d2d 156
rajathr 0:34ee385f4d2d 157 NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
rajathr 0:34ee385f4d2d 158
rajathr 0:34ee385f4d2d 159 /* Enable the Selected IRQ Channels --------------------------------------*/
rajathr 0:34ee385f4d2d 160 NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
rajathr 0:34ee385f4d2d 161 (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
rajathr 0:34ee385f4d2d 162 }
rajathr 0:34ee385f4d2d 163 else
rajathr 0:34ee385f4d2d 164 {
rajathr 0:34ee385f4d2d 165 /* Disable the Selected IRQ Channels -------------------------------------*/
rajathr 0:34ee385f4d2d 166 NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
rajathr 0:34ee385f4d2d 167 (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
rajathr 0:34ee385f4d2d 168 }
rajathr 0:34ee385f4d2d 169 }
rajathr 0:34ee385f4d2d 170
rajathr 0:34ee385f4d2d 171 /**
rajathr 0:34ee385f4d2d 172 * @brief Sets the vector table location and Offset.
rajathr 0:34ee385f4d2d 173 * @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
rajathr 0:34ee385f4d2d 174 * This parameter can be one of the following values:
rajathr 0:34ee385f4d2d 175 * @arg NVIC_VectTab_RAM_MORT: Vector Table in internal SRAM.
rajathr 0:34ee385f4d2d 176 * @arg NVIC_VectTab_FLASH_MORT: Vector Table in internal FLASH.
rajathr 0:34ee385f4d2d 177 * @param Offset: Vector Table base offset field. This value must be a multiple of 0x200.
rajathr 0:34ee385f4d2d 178 * @retval None
rajathr 0:34ee385f4d2d 179 */
rajathr 0:34ee385f4d2d 180 void NVIC_SetVectorTable_mort(uint32_t NVIC_VectTab, uint32_t Offset)
rajathr 0:34ee385f4d2d 181 {
rajathr 0:34ee385f4d2d 182 /* Check the parameters */
rajathr 0:34ee385f4d2d 183 assert_param(IS_NVIC_VECTTAB_MORT(NVIC_VectTab));
rajathr 0:34ee385f4d2d 184 assert_param(IS_NVIC_OFFSET_MORT(Offset));
rajathr 0:34ee385f4d2d 185
rajathr 0:34ee385f4d2d 186 SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
rajathr 0:34ee385f4d2d 187 }
rajathr 0:34ee385f4d2d 188
rajathr 0:34ee385f4d2d 189 /**
rajathr 0:34ee385f4d2d 190 * @brief Selects the condition for the system to enter low power mode.
rajathr 0:34ee385f4d2d 191 * @param LowPowerMode: Specifies the new mode for the system to enter low power mode.
rajathr 0:34ee385f4d2d 192 * This parameter can be one of the following values:
rajathr 0:34ee385f4d2d 193 * @arg NVIC_LP_SEVONPEND_MORT: Low Power SEV on Pend.
rajathr 0:34ee385f4d2d 194 * @arg NVIC_LP_SLEEPDEEP_MORT: Low Power DEEPSLEEP request.
rajathr 0:34ee385f4d2d 195 * @arg NVIC_LP_SLEEPONEXIT_MORT: Low Power Sleep on Exit.
rajathr 0:34ee385f4d2d 196 * @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
rajathr 0:34ee385f4d2d 197 * @retval None
rajathr 0:34ee385f4d2d 198 */
rajathr 0:34ee385f4d2d 199 void NVIC_SystemLPConfig_mort(uint8_t LowPowerMode, FunctionalState NewState)
rajathr 0:34ee385f4d2d 200 {
rajathr 0:34ee385f4d2d 201 /* Check the parameters */
rajathr 0:34ee385f4d2d 202 assert_param(IS_NVIC_LP_MORT(LowPowerMode));
rajathr 0:34ee385f4d2d 203 assert_param(IS_FUNCTIONAL_STATE(NewState));
rajathr 0:34ee385f4d2d 204
rajathr 0:34ee385f4d2d 205 if (NewState != DISABLE)
rajathr 0:34ee385f4d2d 206 {
rajathr 0:34ee385f4d2d 207 SCB->SCR |= LowPowerMode;
rajathr 0:34ee385f4d2d 208 }
rajathr 0:34ee385f4d2d 209 else
rajathr 0:34ee385f4d2d 210 {
rajathr 0:34ee385f4d2d 211 SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
rajathr 0:34ee385f4d2d 212 }
rajathr 0:34ee385f4d2d 213 }
rajathr 0:34ee385f4d2d 214
rajathr 0:34ee385f4d2d 215 /**
rajathr 0:34ee385f4d2d 216 * @brief Configures the SysTick clock source.
rajathr 0:34ee385f4d2d 217 * @param SysTick_CLKSource: specifies the SysTick clock source.
rajathr 0:34ee385f4d2d 218 * This parameter can be one of the following values:
rajathr 0:34ee385f4d2d 219 * @arg SysTick_CLKSource_HCLK_Div8_MORT: AHB clock divided by 8 selected as SysTick clock source.
rajathr 0:34ee385f4d2d 220 * @arg SysTick_CLKSource_HCLK_MORT: AHB clock selected as SysTick clock source.
rajathr 0:34ee385f4d2d 221 * @retval None
rajathr 0:34ee385f4d2d 222 */
rajathr 0:34ee385f4d2d 223 void SysTick_CLKSourceConfig_mort(uint32_t SysTick_CLKSource)
rajathr 0:34ee385f4d2d 224 {
rajathr 0:34ee385f4d2d 225 /* Check the parameters */
rajathr 0:34ee385f4d2d 226 assert_param(IS_SYSTICK_CLK_SOURCE_MORT(SysTick_CLKSource));
rajathr 0:34ee385f4d2d 227 if (SysTick_CLKSource == SysTick_CLKSource_HCLK_MORT)
rajathr 0:34ee385f4d2d 228 {
rajathr 0:34ee385f4d2d 229 SysTick->CTRL |= SysTick_CLKSource_HCLK_MORT;
rajathr 0:34ee385f4d2d 230 }
rajathr 0:34ee385f4d2d 231 else
rajathr 0:34ee385f4d2d 232 {
rajathr 0:34ee385f4d2d 233 SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8_MORT;
rajathr 0:34ee385f4d2d 234 }
rajathr 0:34ee385f4d2d 235 }
rajathr 0:34ee385f4d2d 236
rajathr 0:34ee385f4d2d 237 /**
rajathr 0:34ee385f4d2d 238 * @}
rajathr 0:34ee385f4d2d 239 */
rajathr 0:34ee385f4d2d 240
rajathr 0:34ee385f4d2d 241 /**
rajathr 0:34ee385f4d2d 242 * @}
rajathr 0:34ee385f4d2d 243 */
rajathr 0:34ee385f4d2d 244
rajathr 0:34ee385f4d2d 245 /**
rajathr 0:34ee385f4d2d 246 * @}
rajathr 0:34ee385f4d2d 247 */
rajathr 0:34ee385f4d2d 248
rajathr 0:34ee385f4d2d 249 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
rajathr 0:34ee385f4d2d 250
rajathr 0:34ee385f4d2d 251
rajathr 0:34ee385f4d2d 252
rajathr 0:34ee385f4d2d 253
rajathr 0:34ee385f4d2d 254