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Dependencies:   mbed

gpio.c@0:34ee385f4d2d, 2021-10-23 (annotated)

Committer:
rajathr
Date:
Sat Oct 23 05:49:09 2021 +0000
Revision:
0:34ee385f4d2d
At 23rd Oct 21 - All Code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rajathr 0:34ee385f4d2d 1 #include "gpio.h"
rajathr 0:34ee385f4d2d 2 #include "main_Lec9.h"
rajathr 0:34ee385f4d2d 3 #include "stm32f4xx_rcc_mort.h"
rajathr 0:34ee385f4d2d 4
rajathr 0:34ee385f4d2d 5
rajathr 0:34ee385f4d2d 6 /* Below are defined Address of Port B and corresponding registers*/
rajathr 0:34ee385f4d2d 7 #define PORTB_BASE_ADDRESS ((uint32_t)0x40020400)
rajathr 0:34ee385f4d2d 8 #define PORTB_MODER_REGISTER (PORTB_BASE_ADDRESS + 0x00)
rajathr 0:34ee385f4d2d 9 #define PORTB_OTYPER_REGISTER (PORTB_BASE_ADDRESS + 0x04)
rajathr 0:34ee385f4d2d 10 #define PORTB_OSPEEDR_REGISTER (PORTB_BASE_ADDRESS + 0x08)
rajathr 0:34ee385f4d2d 11 #define PORTB_PUPDR_REGISTER (PORTB_BASE_ADDRESS + 0x0C)
rajathr 0:34ee385f4d2d 12 #define PORTB_IDR_REGISTER (PORTB_BASE_ADDRESS + 0x10)
rajathr 0:34ee385f4d2d 13 #define PORTB_ODR_REGISTER (PORTB_BASE_ADDRESS + 0x14)
rajathr 0:34ee385f4d2d 14 #define PORTB_AFR1_REGISTER (PORTB_BASE_ADDRESS + 0x20)
rajathr 0:34ee385f4d2d 15
rajathr 0:34ee385f4d2d 16 /* Below are defined Address of Port C and corresponding registers*/
rajathr 0:34ee385f4d2d 17 #define PORTC_BASE_ADDRESS ((uint32_t)0x40020800)
rajathr 0:34ee385f4d2d 18 #define PORTC_MODER_REGISTER (PORTC_BASE_ADDRESS + 0x00)
rajathr 0:34ee385f4d2d 19 #define PORTC_OTYPER_REGISTER (PORTC_BASE_ADDRESS + 0x04)
rajathr 0:34ee385f4d2d 20 #define PORTC_OSPEEDR_REGISTER (PORTC_BASE_ADDRESS + 0x08)
rajathr 0:34ee385f4d2d 21 #define PORTC_PUPDR_REGISTER (PORTC_BASE_ADDRESS + 0x0C)
rajathr 0:34ee385f4d2d 22 #define PORTC_IDR_REGISTER (PORTC_BASE_ADDRESS + 0x10)
rajathr 0:34ee385f4d2d 23 #define PORTC_ODR_REGISTER (PORTC_BASE_ADDRESS + 0x14)
rajathr 0:34ee385f4d2d 24 #define PORTC_AFR1_REGISTER (PORTC_BASE_ADDRESS + 0x20)
rajathr 0:34ee385f4d2d 25
rajathr 0:34ee385f4d2d 26 void InitPortBPin0asOutput(void)
rajathr 0:34ee385f4d2d 27 {
rajathr 0:34ee385f4d2d 28 uint32_t *reg; /*Define Pointer*/
rajathr 0:34ee385f4d2d 29 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); /* Enable the clock */
rajathr 0:34ee385f4d2d 30
rajathr 0:34ee385f4d2d 31 reg = (uint32_t *)PORTB_MODER_REGISTER;
rajathr 0:34ee385f4d2d 32 *reg = *reg & (~((uint32_t)0x03)); /*Clear last two bits of Moder Register*/
rajathr 0:34ee385f4d2d 33 *reg = *reg | ((uint32_t)0x01); /* Set the last two pins corresponding to Pin0 as Output Mode - 01 */
rajathr 0:34ee385f4d2d 34
rajathr 0:34ee385f4d2d 35 reg = (uint32_t *)PORTB_OTYPER_REGISTER;
rajathr 0:34ee385f4d2d 36 *reg = *reg & (~((uint32_t)0x01)); /* Clear the last bit of OTYPER REGISTER*/
rajathr 0:34ee385f4d2d 37 *reg = *reg | ((uint32_t)0x00);/*Statement is to set the OTYPER REGISTER TO 0 - Push Pull Type*/
rajathr 0:34ee385f4d2d 38
rajathr 0:34ee385f4d2d 39 reg = (uint32_t *)PORTB_PUPDR_REGISTER;
rajathr 0:34ee385f4d2d 40 *reg = *reg & (~((uint32_t)0x03)); /* Clear the last two bits of PUPDR REGISTER*/
rajathr 0:34ee385f4d2d 41 *reg = *reg | ((uint32_t)0x00);/*Statement is to set the PUPDR REGISTER TO 00 - No Pull Up No Pull Down Type*/
rajathr 0:34ee385f4d2d 42
rajathr 0:34ee385f4d2d 43 //reg=(uint32_t *)PORTB_OSPEEDR_REGISTER;
rajathr 0:34ee385f4d2d 44 //*reg=*reg&(~((uint32_t)0x11)); /* Clear the last two bits of OSPEEDR REGISTER*/
rajathr 0:34ee385f4d2d 45 //*reg=*reg|((uint32_t)0x11); /* Set the last two bits of OSPEEDR REGISTER to High Speed*/
rajathr 0:34ee385f4d2d 46
rajathr 0:34ee385f4d2d 47 reg = (uint32_t *)PORTB_ODR_REGISTER;
rajathr 0:34ee385f4d2d 48 *reg = *reg | ((uint32_t)0x01); /* Setting the ODR REGISTER TO HIGH TO START WITH - Last bit is 1*/
rajathr 0:34ee385f4d2d 49 }
rajathr 0:34ee385f4d2d 50
rajathr 0:34ee385f4d2d 51
rajathr 0:34ee385f4d2d 52
rajathr 0:34ee385f4d2d 53 void toggleGPIOB0(void)
rajathr 0:34ee385f4d2d 54 {
rajathr 0:34ee385f4d2d 55 uint32_t value;
rajathr 0:34ee385f4d2d 56 uint32_t *reg; /* Defining the variables*/
rajathr 0:34ee385f4d2d 57
rajathr 0:34ee385f4d2d 58 reg = (uint32_t *)PORTB_ODR_REGISTER; /*Initializing the current value of ODR REGISTER*/
rajathr 0:34ee385f4d2d 59 value = *reg & ((uint32_t)0x1); /* Reading the value of last bit of current ODR REGISTER - Stored in reg*/
rajathr 0:34ee385f4d2d 60
rajathr 0:34ee385f4d2d 61 if (value > 0)
rajathr 0:34ee385f4d2d 62 {
rajathr 0:34ee385f4d2d 63 /* The bit is high initially*/
rajathr 0:34ee385f4d2d 64 /*Need to set it to low now*/
rajathr 0:34ee385f4d2d 65 *reg = *reg & (~((uint32_t)0x1));
rajathr 0:34ee385f4d2d 66 }
rajathr 0:34ee385f4d2d 67
rajathr 0:34ee385f4d2d 68 else
rajathr 0:34ee385f4d2d 69 {
rajathr 0:34ee385f4d2d 70 /* The bit is low initially*/
rajathr 0:34ee385f4d2d 71 /* Need to set it to high now*/
rajathr 0:34ee385f4d2d 72 *reg = *reg | ((uint32_t)0x01);
rajathr 0:34ee385f4d2d 73 }
rajathr 0:34ee385f4d2d 74 }
rajathr 0:34ee385f4d2d 75
rajathr 0:34ee385f4d2d 76
rajathr 0:34ee385f4d2d 77
rajathr 0:34ee385f4d2d 78
rajathr 0:34ee385f4d2d 79 void InitGPIOBPin0asOutputCompare(void)
rajathr 0:34ee385f4d2d 80 {
rajathr 0:34ee385f4d2d 81 uint32_t *reg; //Initialize register pointer variable
rajathr 0:34ee385f4d2d 82
rajathr 0:34ee385f4d2d 83 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); /* Enable the clock */
rajathr 0:34ee385f4d2d 84
rajathr 0:34ee385f4d2d 85 reg = (uint32_t *)PORTB_MODER_REGISTER;
rajathr 0:34ee385f4d2d 86 *reg = *reg & (~((uint32_t)0x03)); //Clear last two bits of MODER REGISTER
rajathr 0:34ee385f4d2d 87 *reg = *reg | ((uint32_t)0b10); //Write 10 to last two bits of MODER REGISTER
rajathr 0:34ee385f4d2d 88
rajathr 0:34ee385f4d2d 89 reg = (uint32_t *)PORTB_OTYPER_REGISTER;
rajathr 0:34ee385f4d2d 90 *reg = *reg & (~((uint32_t)0x01)); //Clear last bit of OTYPER REGISTER
rajathr 0:34ee385f4d2d 91 *reg = *reg | ((uint32_t)0x00); //Setting 0 to last bit of OTYPER REGISTER
rajathr 0:34ee385f4d2d 92
rajathr 0:34ee385f4d2d 93 reg = (uint32_t *)PORTB_PUPDR_REGISTER;
rajathr 0:34ee385f4d2d 94 *reg = *reg & (~((uint32_t)0x03)); //Clear last two bits of PUPDR REGISTER - NO PULL UP/DOWN
rajathr 0:34ee385f4d2d 95
rajathr 0:34ee385f4d2d 96 //reg = (uint32_t *)PORTB_OSPEEDR_REGISTER;
rajathr 0:34ee385f4d2d 97 //*reg = *reg & (~((uint32_t)0x03)); //Clear last two bits of OSPEEDR REGISTER
rajathr 0:34ee385f4d2d 98 //*reg = *reg | ((uint32_t)0x03); //Setting of 11 to last two bits of OSPEEDR REGISTER - HIGH SPEED
rajathr 0:34ee385f4d2d 99
rajathr 0:34ee385f4d2d 100 reg = (uint32_t *)PORTB_AFR1_REGISTER;
rajathr 0:34ee385f4d2d 101 *reg = *reg & (~((uint32_t)0xF)); //Clear last four bits of AFRL0 - GPIOB_AFRL REGISTER
rajathr 0:34ee385f4d2d 102 *reg=*reg|((uint32_t)0x2); //Set last four digits of AFRL0 to 0010 - AF2 Alternate Function
rajathr 0:34ee385f4d2d 103 }
rajathr 0:34ee385f4d2d 104
rajathr 0:34ee385f4d2d 105
rajathr 0:34ee385f4d2d 106
rajathr 0:34ee385f4d2d 107 void InitGPIOCPin6asInputCapture(void)
rajathr 0:34ee385f4d2d 108 {
rajathr 0:34ee385f4d2d 109 uint32_t *reg; //Initialize register pointer variable
rajathr 0:34ee385f4d2d 110 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); /* Enable the clock */
rajathr 0:34ee385f4d2d 111
rajathr 0:34ee385f4d2d 112 reg = (uint32_t *)PORTC_MODER_REGISTER;
rajathr 0:34ee385f4d2d 113 *reg = *reg & (~((uint32_t)0x3000)); //Clear last two bits of MODER REGISTER
rajathr 0:34ee385f4d2d 114 *reg = *reg | ((uint32_t)0x2000); //Write 10 to last two bits of MODER REGISTER
rajathr 0:34ee385f4d2d 115
rajathr 0:34ee385f4d2d 116 reg = (uint32_t *)PORTC_OTYPER_REGISTER;
rajathr 0:34ee385f4d2d 117 *reg = *reg & (~((uint32_t)0x40)); //Clear last bit of OTYPER REGISTER
rajathr 0:34ee385f4d2d 118 *reg = *reg | ((uint32_t)0x00); //Setting 0 to last bit of OTYPER REGISTER
rajathr 0:34ee385f4d2d 119
rajathr 0:34ee385f4d2d 120 reg = (uint32_t *)PORTC_OSPEEDR_REGISTER;
rajathr 0:34ee385f4d2d 121 *reg = *reg & (~((uint32_t)0x3000)); //Clear last two bits of OSPEEDR REGISTER
rajathr 0:34ee385f4d2d 122 *reg = *reg | ((uint32_t)0x3000); //Setting of 11 to last two bits of OSPEEDR REGISTER - HIGH SPEED
rajathr 0:34ee385f4d2d 123
rajathr 0:34ee385f4d2d 124 reg = (uint32_t *)PORTC_PUPDR_REGISTER;
rajathr 0:34ee385f4d2d 125 *reg = *reg & (~((uint32_t)0x3000)); //Clear last two bits of PUPDR REGISTER - NO PULL UP/DOWN
rajathr 0:34ee385f4d2d 126 *reg = *reg | 0x00; //Setting two bits of PUPDR REGISTER - NO PULL UP/DOWN
rajathr 0:34ee385f4d2d 127
rajathr 0:34ee385f4d2d 128 reg = (uint32_t *)PORTC_AFR1_REGISTER;
rajathr 0:34ee385f4d2d 129 *reg= *reg & (~((uint32_t)0xF000000)); //Clear last four bits of AFRL0 - GPIOB_AFRL REGISTER
rajathr 0:34ee385f4d2d 130 *reg= *reg | ((uint32_t)0x2000000); //Set last four digits of AFRL0 to 0010 - AF2 Alternate Function
rajathr 0:34ee385f4d2d 131 }
rajathr 0:34ee385f4d2d 132
rajathr 0:34ee385f4d2d 133 void InitGPIOBPin0asPWMMode1(void)
rajathr 0:34ee385f4d2d 134 {
rajathr 0:34ee385f4d2d 135 uint32_t *reg; //Initialize register pointer variable
rajathr 0:34ee385f4d2d 136
rajathr 0:34ee385f4d2d 137 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); /* Enable the clock */
rajathr 0:34ee385f4d2d 138
rajathr 0:34ee385f4d2d 139 reg = (uint32_t *)PORTB_MODER_REGISTER;
rajathr 0:34ee385f4d2d 140 *reg = *reg & (~((uint32_t)0x03)); //Clear last two bits of MODER REGISTER
rajathr 0:34ee385f4d2d 141 *reg = *reg | ((uint32_t)0b10); //Write 10 to last two bits of MODER REGISTER
rajathr 0:34ee385f4d2d 142
rajathr 0:34ee385f4d2d 143 reg = (uint32_t *)PORTB_OTYPER_REGISTER;
rajathr 0:34ee385f4d2d 144 *reg = *reg & (~((uint32_t)0x01)); //Clear last bit of OTYPER REGISTER
rajathr 0:34ee385f4d2d 145 *reg = *reg | ((uint32_t)0x00); //Setting 0 to last bit of OTYPER REGISTER
rajathr 0:34ee385f4d2d 146
rajathr 0:34ee385f4d2d 147 reg = (uint32_t *)PORTB_PUPDR_REGISTER;
rajathr 0:34ee385f4d2d 148 *reg = *reg & (~((uint32_t)0x03)); //Clear last two bits of PUPDR REGISTER - NO PULL UP/DOWN
rajathr 0:34ee385f4d2d 149
rajathr 0:34ee385f4d2d 150 reg = (uint32_t *)PORTB_OSPEEDR_REGISTER;
rajathr 0:34ee385f4d2d 151 *reg = *reg & (~((uint32_t)0x03)); //Clear last two bits of OSPEEDR REGISTER
rajathr 0:34ee385f4d2d 152 *reg = *reg | ((uint32_t)0x03); //Setting of 11 to last two bits of OSPEEDR REGISTER - HIGH SPEED
rajathr 0:34ee385f4d2d 153
rajathr 0:34ee385f4d2d 154 reg = (uint32_t *)PORTB_AFR1_REGISTER;
rajathr 0:34ee385f4d2d 155 *reg = *reg & (~((uint32_t)0xF)); //Clear last four bits of AFRL0 - GPIOB_AFRL REGISTER
rajathr 0:34ee385f4d2d 156 *reg=*reg|((uint32_t)0x2); //Set last four digits of AFRL0 to 0010 - AF2 Alternate Function
rajathr 0:34ee385f4d2d 157 }
rajathr 0:34ee385f4d2d 158
rajathr 0:34ee385f4d2d 159 void setGPIOB0( void )
rajathr 0:34ee385f4d2d 160 {
rajathr 0:34ee385f4d2d 161 uint32_t * reg;
rajathr 0:34ee385f4d2d 162 reg = (uint32_t *)PORTB_ODR_REGISTER;
rajathr 0:34ee385f4d2d 163 *reg = *reg | 0b01;
rajathr 0:34ee385f4d2d 164 }
rajathr 0:34ee385f4d2d 165
rajathr 0:34ee385f4d2d 166 void clearGPIOB0( void )
rajathr 0:34ee385f4d2d 167 {
rajathr 0:34ee385f4d2d 168 uint32_t * reg;
rajathr 0:34ee385f4d2d 169 reg = (uint32_t *)PORTB_ODR_REGISTER;
rajathr 0:34ee385f4d2d 170 *reg = *reg & (~(uint32_t)0b01);
rajathr 0:34ee385f4d2d 171 }
rajathr 0:34ee385f4d2d 172
rajathr 0:34ee385f4d2d 173 void initGpioC6AsInput( void )
rajathr 0:34ee385f4d2d 174 {
rajathr 0:34ee385f4d2d 175 uint32_t * reg;
rajathr 0:34ee385f4d2d 176 /* GPIOC Peripheral clock enable */
rajathr 0:34ee385f4d2d 177 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
rajathr 0:34ee385f4d2d 178 /* GPIOC Pin 6 as input*/
rajathr 0:34ee385f4d2d 179 reg = (uint32_t *)PORTC_MODER_REGISTER;
rajathr 0:34ee385f4d2d 180 *reg = *reg & (~((uint32_t)0x3000));
rajathr 0:34ee385f4d2d 181 *reg= *reg | 0x0000;
rajathr 0:34ee385f4d2d 182 /*PUSH-PULL Pin*/
rajathr 0:34ee385f4d2d 183 reg = (uint32_t *)PORTC_OTYPER_REGISTER;
rajathr 0:34ee385f4d2d 184 *reg = *reg & (~((uint32_t)0x40));
rajathr 0:34ee385f4d2d 185 *reg = *reg | 0x00;
rajathr 0:34ee385f4d2d 186 /*GPIOC pin 6 high speed */
rajathr 0:34ee385f4d2d 187 reg = (uint32_t *)PORTC_OSPEEDR_REGISTER;
rajathr 0:34ee385f4d2d 188 *reg= *reg| 0x3000;
rajathr 0:34ee385f4d2d 189 /*Configure pulled-down*/
rajathr 0:34ee385f4d2d 190 reg = (uint32_t *)PORTC_PUPDR_REGISTER;
rajathr 0:34ee385f4d2d 191 *reg = *reg & (~((uint32_t)0x3000));
rajathr 0:34ee385f4d2d 192 *reg= *reg | 0x2000;
rajathr 0:34ee385f4d2d 193 }
rajathr 0:34ee385f4d2d 194