Diff: hardware_dma_controller.c

Revision:

1:c125f4e65df7

Parent:

0:716b93ab9a58

--- a/hardware_dma_controller.c	Fri Oct 29 20:56:20 2021 +0000
+++ b/hardware_dma_controller.c	Wed Nov 03 05:31:26 2021 +0000
@@ -26,14 +26,20 @@
 #define DMA_SxCR_DIR_PERTOMEM           0
 #define DMA_SxCR_STREAM_ENABLE          1
 
-uint16_t adcDmaDataStorageBuffer[3]; //Variable Definition to store read values
-uint16_t adcDmaDataStorageBuffer[1]; //Variable Definition to store read value
+
+#define ADC_REGISTER_BASE_ADDRESS   ((uint32_t)0x40012000)
+#define ADC_3_BASE_ADDRESS          (ADC_REGISTER_BASE_ADDRESS + 0x200)
+#define ADC_3_DR_REGISTER           (ADC_3_BASE_ADDRESS + 0x4C)
+
+
+uint16_t adcDmaDataStorageBuffer_3_Channel[3]; //Variable Definition to store read values
+uint16_t adcDmaDataStorageBuffer_1_Channel[1]; //Variable Definition to store read value
 
 
 //FUNCTION GIVEN BY PROFESSOR TO SETUP DMA TO READ VALUES FROM 3 PINS
 void initDMAForAdc3_1Channel(void)
 {
-    uint32_t reg;
+    uint32_t * reg;
     RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); /* Enable the clock */
     
     // Configure Stream 0 to use Channel 2 - ADC3
@@ -50,7 +56,7 @@
     
     //We will transfer to the adcDmaDataStorageBuffer we created
     reg = (uint32_t *)DMA2_S0M0AR_REGISTER;
-    *reg = (uint32_t)&adcDmaDataStorageBuffer[0]; //QUESTION - WHY IS THIS ZERO??? DIDNT UNDERSTAND THIS STATEMENT
+    *reg = (uint32_t)&adcDmaDataStorageBuffer_1_Channel[0]; //QUESTION - WHY IS THIS ZERO??? DIDNT UNDERSTAND THIS STATEMENT
     
 }
 
@@ -59,7 +65,7 @@
 //FUNCTION GIVEN BY PROFESSOR TO SETUP DMA TO READ VALUES FROM 3 PINS
 void initDMAForAdc3_3Channels(void)
 {
-    uint32_t reg;
+    uint32_t * reg;
     RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); /* Enable the clock */
     
     // Configure Stream 0 to use Channel 2 (ADC3)
@@ -72,11 +78,11 @@
     
     //We will transfer from the ADC3 Data Register
     reg = (uint32_t *)DMA2_S0PAR_REGISTER;
-    *reg = ADC_3_DR_REGISTER; //THIS FUNCTION IS NOT DETECTED
+    *reg = ADC_3_DR_REGISTER; //THIS FUNCTION IS DETECTED
     
     //We will transfer to the adcDmaDataStorageBuffer we just created
     reg = (uint32_t *)DMA2_S0M0AR_REGISTER;
-    *reg = (uint32_t)& adcDmaDataStorageBuffer[0];
+    *reg = (uint32_t)& adcDmaDataStorageBuffer_3_Channel[0];
     
 }
 
@@ -97,12 +103,17 @@
 
 
 
-uint16_t returnADC3StoredValue(uint8_t index)
+uint16_t returnADC3StoredValue3Channel(uint8_t index)
 {
-    return adcDmaDataStorageBuffer[index];
+    return adcDmaDataStorageBuffer_3_Channel[index];
 }
     
     
+uint16_t returnADC3StoredValue1Channel(uint8_t index)
+{
+    return adcDmaDataStorageBuffer_1_Channel[index];
+}
+