Rajath Ravi
/
ADC_DMA_POST_LEC12
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stm32f4xx_gpio_mort.h@0:716b93ab9a58, 2021-10-29 (annotated)
- Committer:
- rajathr
- Date:
- Fri Oct 29 20:56:20 2021 +0000
- Revision:
- 0:716b93ab9a58
AS ON 29TH OCT AT 5PM
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| rajathr | 0:716b93ab9a58 | 1 | /** |
| rajathr | 0:716b93ab9a58 | 2 | ****************************************************************************** |
| rajathr | 0:716b93ab9a58 | 3 | * @file stm32f4xx_gpio.h |
| rajathr | 0:716b93ab9a58 | 4 | * @author MCD Application Team |
| rajathr | 0:716b93ab9a58 | 5 | * @version V1.8.0 |
| rajathr | 0:716b93ab9a58 | 6 | * @date 04-November-2016 |
| rajathr | 0:716b93ab9a58 | 7 | * @brief This file contains all the functions prototypes for the GPIO firmware |
| rajathr | 0:716b93ab9a58 | 8 | * library. |
| rajathr | 0:716b93ab9a58 | 9 | ****************************************************************************** |
| rajathr | 0:716b93ab9a58 | 10 | * @attention |
| rajathr | 0:716b93ab9a58 | 11 | * |
| rajathr | 0:716b93ab9a58 | 12 | * <h2><center>© COPYRIGHT 2016 STMicroelectronics</center></h2> |
| rajathr | 0:716b93ab9a58 | 13 | * |
| rajathr | 0:716b93ab9a58 | 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); |
| rajathr | 0:716b93ab9a58 | 15 | * You may not use this file except in compliance with the License. |
| rajathr | 0:716b93ab9a58 | 16 | * You may obtain a copy of the License at: |
| rajathr | 0:716b93ab9a58 | 17 | * |
| rajathr | 0:716b93ab9a58 | 18 | * http://www.st.com/software_license_agreement_liberty_v2 |
| rajathr | 0:716b93ab9a58 | 19 | * |
| rajathr | 0:716b93ab9a58 | 20 | * Unless required by applicable law or agreed to in writing, software |
| rajathr | 0:716b93ab9a58 | 21 | * distributed under the License is distributed on an "AS IS" BASIS, |
| rajathr | 0:716b93ab9a58 | 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| rajathr | 0:716b93ab9a58 | 23 | * See the License for the specific language governing permissions and |
| rajathr | 0:716b93ab9a58 | 24 | * limitations under the License. |
| rajathr | 0:716b93ab9a58 | 25 | * |
| rajathr | 0:716b93ab9a58 | 26 | ****************************************************************************** |
| rajathr | 0:716b93ab9a58 | 27 | */ |
| rajathr | 0:716b93ab9a58 | 28 | |
| rajathr | 0:716b93ab9a58 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| rajathr | 0:716b93ab9a58 | 30 | #ifndef __STM32F4xx_GPIO_H_MORT |
| rajathr | 0:716b93ab9a58 | 31 | #define __STM32F4xx_GPIO_H_MORT |
| rajathr | 0:716b93ab9a58 | 32 | |
| rajathr | 0:716b93ab9a58 | 33 | #ifdef __cplusplus |
| rajathr | 0:716b93ab9a58 | 34 | extern "C" { |
| rajathr | 0:716b93ab9a58 | 35 | #endif |
| rajathr | 0:716b93ab9a58 | 36 | |
| rajathr | 0:716b93ab9a58 | 37 | /* Includes ------------------------------------------------------------------*/ |
| rajathr | 0:716b93ab9a58 | 38 | #include "stm32f4xx_mort2.h" |
| rajathr | 0:716b93ab9a58 | 39 | |
| rajathr | 0:716b93ab9a58 | 40 | /** @addtogroup STM32F4xx_StdPeriph_Driver |
| rajathr | 0:716b93ab9a58 | 41 | * @{ |
| rajathr | 0:716b93ab9a58 | 42 | */ |
| rajathr | 0:716b93ab9a58 | 43 | |
| rajathr | 0:716b93ab9a58 | 44 | /** @addtogroup GPIO |
| rajathr | 0:716b93ab9a58 | 45 | * @{ |
| rajathr | 0:716b93ab9a58 | 46 | */ |
| rajathr | 0:716b93ab9a58 | 47 | |
| rajathr | 0:716b93ab9a58 | 48 | /* Exported types ------------------------------------------------------------*/ |
| rajathr | 0:716b93ab9a58 | 49 | |
| rajathr | 0:716b93ab9a58 | 50 | #define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \ |
| rajathr | 0:716b93ab9a58 | 51 | ((PERIPH) == GPIOB) || \ |
| rajathr | 0:716b93ab9a58 | 52 | ((PERIPH) == GPIOC) || \ |
| rajathr | 0:716b93ab9a58 | 53 | ((PERIPH) == GPIOD) || \ |
| rajathr | 0:716b93ab9a58 | 54 | ((PERIPH) == GPIOE) || \ |
| rajathr | 0:716b93ab9a58 | 55 | ((PERIPH) == GPIOF) || \ |
| rajathr | 0:716b93ab9a58 | 56 | ((PERIPH) == GPIOG) || \ |
| rajathr | 0:716b93ab9a58 | 57 | ((PERIPH) == GPIOH) || \ |
| rajathr | 0:716b93ab9a58 | 58 | ((PERIPH) == GPIOI) || \ |
| rajathr | 0:716b93ab9a58 | 59 | ((PERIPH) == GPIOJ) || \ |
| rajathr | 0:716b93ab9a58 | 60 | ((PERIPH) == GPIOK)) |
| rajathr | 0:716b93ab9a58 | 61 | |
| rajathr | 0:716b93ab9a58 | 62 | /** |
| rajathr | 0:716b93ab9a58 | 63 | * @brief GPIO Configuration Mode enumeration |
| rajathr | 0:716b93ab9a58 | 64 | */ |
| rajathr | 0:716b93ab9a58 | 65 | typedef enum |
| rajathr | 0:716b93ab9a58 | 66 | { |
| rajathr | 0:716b93ab9a58 | 67 | GPIO_Mode_IN = 0x00, /*!< GPIO Input Mode */ |
| rajathr | 0:716b93ab9a58 | 68 | GPIO_Mode_OUT = 0x01, /*!< GPIO Output Mode */ |
| rajathr | 0:716b93ab9a58 | 69 | GPIO_Mode_AF = 0x02, /*!< GPIO Alternate function Mode */ |
| rajathr | 0:716b93ab9a58 | 70 | GPIO_Mode_AN = 0x03 /*!< GPIO Analog Mode */ |
| rajathr | 0:716b93ab9a58 | 71 | }GPIOMode_TypeDef_mort; |
| rajathr | 0:716b93ab9a58 | 72 | #define IS_GPIO_MODE_MORT(MODE) (((MODE) == GPIO_Mode_IN) || ((MODE) == GPIO_Mode_OUT) || \ |
| rajathr | 0:716b93ab9a58 | 73 | ((MODE) == GPIO_Mode_AF)|| ((MODE) == GPIO_Mode_AN)) |
| rajathr | 0:716b93ab9a58 | 74 | |
| rajathr | 0:716b93ab9a58 | 75 | /** |
| rajathr | 0:716b93ab9a58 | 76 | * @brief GPIO Output type enumeration |
| rajathr | 0:716b93ab9a58 | 77 | */ |
| rajathr | 0:716b93ab9a58 | 78 | typedef enum |
| rajathr | 0:716b93ab9a58 | 79 | { |
| rajathr | 0:716b93ab9a58 | 80 | GPIO_OType_PP = 0x00, |
| rajathr | 0:716b93ab9a58 | 81 | GPIO_OType_OD = 0x01 |
| rajathr | 0:716b93ab9a58 | 82 | }GPIOOType_TypeDef_mort; |
| rajathr | 0:716b93ab9a58 | 83 | #define IS_GPIO_OTYPE(OTYPE) (((OTYPE) == GPIO_OType_PP) || ((OTYPE) == GPIO_OType_OD)) |
| rajathr | 0:716b93ab9a58 | 84 | |
| rajathr | 0:716b93ab9a58 | 85 | |
| rajathr | 0:716b93ab9a58 | 86 | /** |
| rajathr | 0:716b93ab9a58 | 87 | * @brief GPIO Output Maximum frequency enumeration |
| rajathr | 0:716b93ab9a58 | 88 | */ |
| rajathr | 0:716b93ab9a58 | 89 | typedef enum |
| rajathr | 0:716b93ab9a58 | 90 | { |
| rajathr | 0:716b93ab9a58 | 91 | GPIO_Low_Speed = 0x00, /*!< Low speed */ |
| rajathr | 0:716b93ab9a58 | 92 | GPIO_Medium_Speed = 0x01, /*!< Medium speed */ |
| rajathr | 0:716b93ab9a58 | 93 | GPIO_Fast_Speed = 0x02, /*!< Fast speed */ |
| rajathr | 0:716b93ab9a58 | 94 | GPIO_High_Speed = 0x03 /*!< High speed */ |
| rajathr | 0:716b93ab9a58 | 95 | }GPIOSpeed_TypeDef_mort; |
| rajathr | 0:716b93ab9a58 | 96 | |
| rajathr | 0:716b93ab9a58 | 97 | /* Add legacy definition */ |
| rajathr | 0:716b93ab9a58 | 98 | #define GPIO_Speed_2MHz GPIO_Low_Speed |
| rajathr | 0:716b93ab9a58 | 99 | #define GPIO_Speed_25MHz GPIO_Medium_Speed |
| rajathr | 0:716b93ab9a58 | 100 | #define GPIO_Speed_50MHz GPIO_Fast_Speed |
| rajathr | 0:716b93ab9a58 | 101 | #define GPIO_Speed_100MHz GPIO_High_Speed |
| rajathr | 0:716b93ab9a58 | 102 | |
| rajathr | 0:716b93ab9a58 | 103 | #define IS_GPIO_SPEED_MORT(SPEED) (((SPEED) == GPIO_Low_Speed) || ((SPEED) == GPIO_Medium_Speed) || \ |
| rajathr | 0:716b93ab9a58 | 104 | ((SPEED) == GPIO_Fast_Speed)|| ((SPEED) == GPIO_High_Speed)) |
| rajathr | 0:716b93ab9a58 | 105 | |
| rajathr | 0:716b93ab9a58 | 106 | /** |
| rajathr | 0:716b93ab9a58 | 107 | * @brief GPIO Configuration PullUp PullDown enumeration |
| rajathr | 0:716b93ab9a58 | 108 | */ |
| rajathr | 0:716b93ab9a58 | 109 | typedef enum |
| rajathr | 0:716b93ab9a58 | 110 | { |
| rajathr | 0:716b93ab9a58 | 111 | GPIO_PuPd_NOPULL = 0x00, |
| rajathr | 0:716b93ab9a58 | 112 | GPIO_PuPd_UP = 0x01, |
| rajathr | 0:716b93ab9a58 | 113 | GPIO_PuPd_DOWN = 0x02 |
| rajathr | 0:716b93ab9a58 | 114 | }GPIOPuPd_TypeDef_mort; |
| rajathr | 0:716b93ab9a58 | 115 | #define IS_GPIO_PUPD(PUPD) (((PUPD) == GPIO_PuPd_NOPULL) || ((PUPD) == GPIO_PuPd_UP) || \ |
| rajathr | 0:716b93ab9a58 | 116 | ((PUPD) == GPIO_PuPd_DOWN)) |
| rajathr | 0:716b93ab9a58 | 117 | |
| rajathr | 0:716b93ab9a58 | 118 | /** |
| rajathr | 0:716b93ab9a58 | 119 | * @brief GPIO Bit SET and Bit RESET enumeration |
| rajathr | 0:716b93ab9a58 | 120 | */ |
| rajathr | 0:716b93ab9a58 | 121 | typedef enum |
| rajathr | 0:716b93ab9a58 | 122 | { |
| rajathr | 0:716b93ab9a58 | 123 | Bit_RESET = 0, |
| rajathr | 0:716b93ab9a58 | 124 | Bit_SET |
| rajathr | 0:716b93ab9a58 | 125 | }BitAction; |
| rajathr | 0:716b93ab9a58 | 126 | #define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET)) |
| rajathr | 0:716b93ab9a58 | 127 | |
| rajathr | 0:716b93ab9a58 | 128 | |
| rajathr | 0:716b93ab9a58 | 129 | /** |
| rajathr | 0:716b93ab9a58 | 130 | * @brief GPIO Init structure definition |
| rajathr | 0:716b93ab9a58 | 131 | */ |
| rajathr | 0:716b93ab9a58 | 132 | typedef struct |
| rajathr | 0:716b93ab9a58 | 133 | { |
| rajathr | 0:716b93ab9a58 | 134 | uint32_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured. |
| rajathr | 0:716b93ab9a58 | 135 | This parameter can be any value of @ref GPIO_pins_define */ |
| rajathr | 0:716b93ab9a58 | 136 | |
| rajathr | 0:716b93ab9a58 | 137 | GPIOMode_TypeDef_mort GPIO_Mode; /*!< Specifies the operating mode for the selected pins. |
| rajathr | 0:716b93ab9a58 | 138 | This parameter can be a value of @ref GPIOMode_TypeDef */ |
| rajathr | 0:716b93ab9a58 | 139 | |
| rajathr | 0:716b93ab9a58 | 140 | GPIOSpeed_TypeDef_mort GPIO_Speed; /*!< Specifies the speed for the selected pins. |
| rajathr | 0:716b93ab9a58 | 141 | This parameter can be a value of @ref GPIOSpeed_TypeDef */ |
| rajathr | 0:716b93ab9a58 | 142 | |
| rajathr | 0:716b93ab9a58 | 143 | GPIOOType_TypeDef_mort GPIO_OType; /*!< Specifies the operating output type for the selected pins. |
| rajathr | 0:716b93ab9a58 | 144 | This parameter can be a value of @ref GPIOOType_TypeDef */ |
| rajathr | 0:716b93ab9a58 | 145 | |
| rajathr | 0:716b93ab9a58 | 146 | GPIOPuPd_TypeDef_mort GPIO_PuPd; /*!< Specifies the operating Pull-up/Pull down for the selected pins. |
| rajathr | 0:716b93ab9a58 | 147 | This parameter can be a value of @ref GPIOPuPd_TypeDef */ |
| rajathr | 0:716b93ab9a58 | 148 | }GPIO_InitTypeDef_mort; |
| rajathr | 0:716b93ab9a58 | 149 | |
| rajathr | 0:716b93ab9a58 | 150 | /* Exported constants --------------------------------------------------------*/ |
| rajathr | 0:716b93ab9a58 | 151 | |
| rajathr | 0:716b93ab9a58 | 152 | /** @defgroup GPIO_Exported_Constants |
| rajathr | 0:716b93ab9a58 | 153 | * @{ |
| rajathr | 0:716b93ab9a58 | 154 | */ |
| rajathr | 0:716b93ab9a58 | 155 | |
| rajathr | 0:716b93ab9a58 | 156 | /** @defgroup GPIO_pins_define |
| rajathr | 0:716b93ab9a58 | 157 | * @{ |
| rajathr | 0:716b93ab9a58 | 158 | */ |
| rajathr | 0:716b93ab9a58 | 159 | #define GPIO_Pin_0 ((uint16_t)0x0001) /* Pin 0 selected */ |
| rajathr | 0:716b93ab9a58 | 160 | #define GPIO_Pin_1 ((uint16_t)0x0002) /* Pin 1 selected */ |
| rajathr | 0:716b93ab9a58 | 161 | #define GPIO_Pin_2 ((uint16_t)0x0004) /* Pin 2 selected */ |
| rajathr | 0:716b93ab9a58 | 162 | #define GPIO_Pin_3 ((uint16_t)0x0008) /* Pin 3 selected */ |
| rajathr | 0:716b93ab9a58 | 163 | #define GPIO_Pin_4 ((uint16_t)0x0010) /* Pin 4 selected */ |
| rajathr | 0:716b93ab9a58 | 164 | #define GPIO_Pin_5 ((uint16_t)0x0020) /* Pin 5 selected */ |
| rajathr | 0:716b93ab9a58 | 165 | #define GPIO_Pin_6 ((uint16_t)0x0040) /* Pin 6 selected */ |
| rajathr | 0:716b93ab9a58 | 166 | #define GPIO_Pin_7 ((uint16_t)0x0080) /* Pin 7 selected */ |
| rajathr | 0:716b93ab9a58 | 167 | #define GPIO_Pin_8 ((uint16_t)0x0100) /* Pin 8 selected */ |
| rajathr | 0:716b93ab9a58 | 168 | #define GPIO_Pin_9 ((uint16_t)0x0200) /* Pin 9 selected */ |
| rajathr | 0:716b93ab9a58 | 169 | #define GPIO_Pin_10 ((uint16_t)0x0400) /* Pin 10 selected */ |
| rajathr | 0:716b93ab9a58 | 170 | #define GPIO_Pin_11 ((uint16_t)0x0800) /* Pin 11 selected */ |
| rajathr | 0:716b93ab9a58 | 171 | #define GPIO_Pin_12 ((uint16_t)0x1000) /* Pin 12 selected */ |
| rajathr | 0:716b93ab9a58 | 172 | #define GPIO_Pin_13 ((uint16_t)0x2000) /* Pin 13 selected */ |
| rajathr | 0:716b93ab9a58 | 173 | #define GPIO_Pin_14 ((uint16_t)0x4000) /* Pin 14 selected */ |
| rajathr | 0:716b93ab9a58 | 174 | #define GPIO_Pin_15 ((uint16_t)0x8000) /* Pin 15 selected */ |
| rajathr | 0:716b93ab9a58 | 175 | #define GPIO_Pin_All ((uint16_t)0xFFFF) /* All pins selected */ |
| rajathr | 0:716b93ab9a58 | 176 | |
| rajathr | 0:716b93ab9a58 | 177 | #define GPIO_PIN_MASK_MORT ((uint32_t)0x0000FFFF) /* PIN mask for assert test */ |
| rajathr | 0:716b93ab9a58 | 178 | #define IS_GPIO_PIN_MORT(PIN) (((PIN) & GPIO_PIN_MASK_MORT ) != (uint32_t)0x00) |
| rajathr | 0:716b93ab9a58 | 179 | #define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \ |
| rajathr | 0:716b93ab9a58 | 180 | ((PIN) == GPIO_Pin_1) || \ |
| rajathr | 0:716b93ab9a58 | 181 | ((PIN) == GPIO_Pin_2) || \ |
| rajathr | 0:716b93ab9a58 | 182 | ((PIN) == GPIO_Pin_3) || \ |
| rajathr | 0:716b93ab9a58 | 183 | ((PIN) == GPIO_Pin_4) || \ |
| rajathr | 0:716b93ab9a58 | 184 | ((PIN) == GPIO_Pin_5) || \ |
| rajathr | 0:716b93ab9a58 | 185 | ((PIN) == GPIO_Pin_6) || \ |
| rajathr | 0:716b93ab9a58 | 186 | ((PIN) == GPIO_Pin_7) || \ |
| rajathr | 0:716b93ab9a58 | 187 | ((PIN) == GPIO_Pin_8) || \ |
| rajathr | 0:716b93ab9a58 | 188 | ((PIN) == GPIO_Pin_9) || \ |
| rajathr | 0:716b93ab9a58 | 189 | ((PIN) == GPIO_Pin_10) || \ |
| rajathr | 0:716b93ab9a58 | 190 | ((PIN) == GPIO_Pin_11) || \ |
| rajathr | 0:716b93ab9a58 | 191 | ((PIN) == GPIO_Pin_12) || \ |
| rajathr | 0:716b93ab9a58 | 192 | ((PIN) == GPIO_Pin_13) || \ |
| rajathr | 0:716b93ab9a58 | 193 | ((PIN) == GPIO_Pin_14) || \ |
| rajathr | 0:716b93ab9a58 | 194 | ((PIN) == GPIO_Pin_15)) |
| rajathr | 0:716b93ab9a58 | 195 | /** |
| rajathr | 0:716b93ab9a58 | 196 | * @} |
| rajathr | 0:716b93ab9a58 | 197 | */ |
| rajathr | 0:716b93ab9a58 | 198 | |
| rajathr | 0:716b93ab9a58 | 199 | |
| rajathr | 0:716b93ab9a58 | 200 | /** @defgroup GPIO_Pin_sources |
| rajathr | 0:716b93ab9a58 | 201 | * @{ |
| rajathr | 0:716b93ab9a58 | 202 | */ |
| rajathr | 0:716b93ab9a58 | 203 | #define GPIO_PinSource0 ((uint8_t)0x00) |
| rajathr | 0:716b93ab9a58 | 204 | #define GPIO_PinSource1 ((uint8_t)0x01) |
| rajathr | 0:716b93ab9a58 | 205 | #define GPIO_PinSource2 ((uint8_t)0x02) |
| rajathr | 0:716b93ab9a58 | 206 | #define GPIO_PinSource3 ((uint8_t)0x03) |
| rajathr | 0:716b93ab9a58 | 207 | #define GPIO_PinSource4 ((uint8_t)0x04) |
| rajathr | 0:716b93ab9a58 | 208 | #define GPIO_PinSource5 ((uint8_t)0x05) |
| rajathr | 0:716b93ab9a58 | 209 | #define GPIO_PinSource6 ((uint8_t)0x06) |
| rajathr | 0:716b93ab9a58 | 210 | #define GPIO_PinSource7 ((uint8_t)0x07) |
| rajathr | 0:716b93ab9a58 | 211 | #define GPIO_PinSource8 ((uint8_t)0x08) |
| rajathr | 0:716b93ab9a58 | 212 | #define GPIO_PinSource9 ((uint8_t)0x09) |
| rajathr | 0:716b93ab9a58 | 213 | #define GPIO_PinSource10 ((uint8_t)0x0A) |
| rajathr | 0:716b93ab9a58 | 214 | #define GPIO_PinSource11 ((uint8_t)0x0B) |
| rajathr | 0:716b93ab9a58 | 215 | #define GPIO_PinSource12 ((uint8_t)0x0C) |
| rajathr | 0:716b93ab9a58 | 216 | #define GPIO_PinSource13 ((uint8_t)0x0D) |
| rajathr | 0:716b93ab9a58 | 217 | #define GPIO_PinSource14 ((uint8_t)0x0E) |
| rajathr | 0:716b93ab9a58 | 218 | #define GPIO_PinSource15 ((uint8_t)0x0F) |
| rajathr | 0:716b93ab9a58 | 219 | |
| rajathr | 0:716b93ab9a58 | 220 | #define IS_GPIO_PIN_MORT_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \ |
| rajathr | 0:716b93ab9a58 | 221 | ((PINSOURCE) == GPIO_PinSource1) || \ |
| rajathr | 0:716b93ab9a58 | 222 | ((PINSOURCE) == GPIO_PinSource2) || \ |
| rajathr | 0:716b93ab9a58 | 223 | ((PINSOURCE) == GPIO_PinSource3) || \ |
| rajathr | 0:716b93ab9a58 | 224 | ((PINSOURCE) == GPIO_PinSource4) || \ |
| rajathr | 0:716b93ab9a58 | 225 | ((PINSOURCE) == GPIO_PinSource5) || \ |
| rajathr | 0:716b93ab9a58 | 226 | ((PINSOURCE) == GPIO_PinSource6) || \ |
| rajathr | 0:716b93ab9a58 | 227 | ((PINSOURCE) == GPIO_PinSource7) || \ |
| rajathr | 0:716b93ab9a58 | 228 | ((PINSOURCE) == GPIO_PinSource8) || \ |
| rajathr | 0:716b93ab9a58 | 229 | ((PINSOURCE) == GPIO_PinSource9) || \ |
| rajathr | 0:716b93ab9a58 | 230 | ((PINSOURCE) == GPIO_PinSource10) || \ |
| rajathr | 0:716b93ab9a58 | 231 | ((PINSOURCE) == GPIO_PinSource11) || \ |
| rajathr | 0:716b93ab9a58 | 232 | ((PINSOURCE) == GPIO_PinSource12) || \ |
| rajathr | 0:716b93ab9a58 | 233 | ((PINSOURCE) == GPIO_PinSource13) || \ |
| rajathr | 0:716b93ab9a58 | 234 | ((PINSOURCE) == GPIO_PinSource14) || \ |
| rajathr | 0:716b93ab9a58 | 235 | ((PINSOURCE) == GPIO_PinSource15)) |
| rajathr | 0:716b93ab9a58 | 236 | /** |
| rajathr | 0:716b93ab9a58 | 237 | * @} |
| rajathr | 0:716b93ab9a58 | 238 | */ |
| rajathr | 0:716b93ab9a58 | 239 | |
| rajathr | 0:716b93ab9a58 | 240 | /** @defgroup GPIO_Alternat_function_selection_define |
| rajathr | 0:716b93ab9a58 | 241 | * @{ |
| rajathr | 0:716b93ab9a58 | 242 | */ |
| rajathr | 0:716b93ab9a58 | 243 | /** |
| rajathr | 0:716b93ab9a58 | 244 | * @brief AF 0 selection |
| rajathr | 0:716b93ab9a58 | 245 | */ |
| rajathr | 0:716b93ab9a58 | 246 | #define GPIO_AF_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 247 | #define GPIO_AF_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 248 | #define GPIO_AF_TAMPER ((uint8_t)0x00) /* TAMPER (TAMPER_1 and TAMPER_2) Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 249 | #define GPIO_AF_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 250 | #define GPIO_AF_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 251 | #if defined(STM32F446xx) |
| rajathr | 0:716b93ab9a58 | 252 | #define GPIO_AF0_TIM2 ((uint8_t)0x00) /* TIM2 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 253 | #endif /* STM32F446xx */ |
| rajathr | 0:716b93ab9a58 | 254 | |
| rajathr | 0:716b93ab9a58 | 255 | /** |
| rajathr | 0:716b93ab9a58 | 256 | * @brief AF 1 selection |
| rajathr | 0:716b93ab9a58 | 257 | */ |
| rajathr | 0:716b93ab9a58 | 258 | #define GPIO_AF_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 259 | #define GPIO_AF_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 260 | #if defined(STM32F410xx) || defined(STM32F413_423xx) |
| rajathr | 0:716b93ab9a58 | 261 | #define GPIO_AF_LPTIM ((uint8_t)0x01) /* LPTIM Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 262 | #endif /* STM32F410xx || STM32F413_423xx */ |
| rajathr | 0:716b93ab9a58 | 263 | /** |
| rajathr | 0:716b93ab9a58 | 264 | * @brief AF 2 selection |
| rajathr | 0:716b93ab9a58 | 265 | */ |
| rajathr | 0:716b93ab9a58 | 266 | #define GPIO_AF_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 267 | #define GPIO_AF_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 268 | #define GPIO_AF_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 269 | |
| rajathr | 0:716b93ab9a58 | 270 | /** |
| rajathr | 0:716b93ab9a58 | 271 | * @brief AF 3 selection |
| rajathr | 0:716b93ab9a58 | 272 | */ |
| rajathr | 0:716b93ab9a58 | 273 | #define GPIO_AF_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 274 | #define GPIO_AF_TIM9 ((uint8_t)0x03) /* TIM9 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 275 | #define GPIO_AF_TIM10 ((uint8_t)0x03) /* TIM10 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 276 | #define GPIO_AF_TIM11 ((uint8_t)0x03) /* TIM11 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 277 | #if defined(STM32F446xx) |
| rajathr | 0:716b93ab9a58 | 278 | #define GPIO_AF3_CEC ((uint8_t)0x03) /* CEC Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 279 | #endif /* STM32F446xx */ |
| rajathr | 0:716b93ab9a58 | 280 | #if defined(STM32F413_423xx) |
| rajathr | 0:716b93ab9a58 | 281 | #define GPIO_AF3_DFSDM2 ((uint8_t)0x03) /* DFSDM2 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 282 | #endif /* STM32F413_423xx */ |
| rajathr | 0:716b93ab9a58 | 283 | /** |
| rajathr | 0:716b93ab9a58 | 284 | * @brief AF 4 selection |
| rajathr | 0:716b93ab9a58 | 285 | */ |
| rajathr | 0:716b93ab9a58 | 286 | #define GPIO_AF_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 287 | #define GPIO_AF_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 288 | #define GPIO_AF_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 289 | #if defined(STM32F446xx) |
| rajathr | 0:716b93ab9a58 | 290 | #define GPIO_AF4_CEC ((uint8_t)0x04) /* CEC Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 291 | #endif /* STM32F446xx */ |
| rajathr | 0:716b93ab9a58 | 292 | #if defined(STM32F410xx) || defined(STM32F412xG) || defined(STM32F413_423xx) || defined(STM32F446xx) |
| rajathr | 0:716b93ab9a58 | 293 | #define GPIO_AF_FMPI2C ((uint8_t)0x04) /* FMPI2C Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 294 | #endif /* STM32F410xx || STM32F446xx */ |
| rajathr | 0:716b93ab9a58 | 295 | |
| rajathr | 0:716b93ab9a58 | 296 | /** |
| rajathr | 0:716b93ab9a58 | 297 | * @brief AF 5 selection |
| rajathr | 0:716b93ab9a58 | 298 | */ |
| rajathr | 0:716b93ab9a58 | 299 | #define GPIO_AF_SPI1 ((uint8_t)0x05) /* SPI1/I2S1 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 300 | #define GPIO_AF_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 301 | #define GPIO_AF5_SPI3 ((uint8_t)0x05) /* SPI3/I2S3 Alternate Function mapping (Only for STM32F411xE and STM32F413_423xx Devices) */ |
| rajathr | 0:716b93ab9a58 | 302 | #define GPIO_AF_SPI4 ((uint8_t)0x05) /* SPI4/I2S4 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 303 | #define GPIO_AF_SPI5 ((uint8_t)0x05) /* SPI5 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 304 | #define GPIO_AF_SPI6 ((uint8_t)0x05) /* SPI6 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 305 | |
| rajathr | 0:716b93ab9a58 | 306 | /** |
| rajathr | 0:716b93ab9a58 | 307 | * @brief AF 6 selection |
| rajathr | 0:716b93ab9a58 | 308 | */ |
| rajathr | 0:716b93ab9a58 | 309 | #define GPIO_AF_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 310 | #define GPIO_AF6_SPI1 ((uint8_t)0x06) /* SPI1 Alternate Function mapping (Only for STM32F410xx Devices) */ |
| rajathr | 0:716b93ab9a58 | 311 | #define GPIO_AF6_SPI2 ((uint8_t)0x06) /* SPI2 Alternate Function mapping (Only for STM32F410xx/STM32F411xE Devices) */ |
| rajathr | 0:716b93ab9a58 | 312 | #define GPIO_AF6_SPI4 ((uint8_t)0x06) /* SPI4 Alternate Function mapping (Only for STM32F411xE Devices) */ |
| rajathr | 0:716b93ab9a58 | 313 | #define GPIO_AF6_SPI5 ((uint8_t)0x06) /* SPI5 Alternate Function mapping (Only for STM32F410xx/STM32F411xE Devices) */ |
| rajathr | 0:716b93ab9a58 | 314 | #define GPIO_AF_SAI1 ((uint8_t)0x06) /* SAI1 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 315 | #define GPIO_AF_I2S2ext ((uint8_t)0x06) /* I2S2ext_SD Alternate Function mapping (only for STM32F412xG and STM32F413_423xx Devices) */ |
| rajathr | 0:716b93ab9a58 | 316 | #if defined(STM32F412xG) || defined(STM32F413_423xx) |
| rajathr | 0:716b93ab9a58 | 317 | #define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 318 | #endif /* STM32F412xG || STM32F413_423xx */ |
| rajathr | 0:716b93ab9a58 | 319 | #if defined(STM32F413_423xx) |
| rajathr | 0:716b93ab9a58 | 320 | #define GPIO_AF6_DFSDM2 ((uint8_t)0x06) /* DFSDM2 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 321 | #endif /* STM32F413_423xx */ |
| rajathr | 0:716b93ab9a58 | 322 | |
| rajathr | 0:716b93ab9a58 | 323 | /** |
| rajathr | 0:716b93ab9a58 | 324 | * @brief AF 7 selection |
| rajathr | 0:716b93ab9a58 | 325 | */ |
| rajathr | 0:716b93ab9a58 | 326 | #define GPIO_AF_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 327 | #define GPIO_AF_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 328 | #define GPIO_AF_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 329 | #define GPIO_AF7_SPI3 ((uint8_t)0x07) /* SPI3/I2S3ext Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 330 | #if defined(STM32F413_423xx) |
| rajathr | 0:716b93ab9a58 | 331 | #define GPIO_AF7_DFSDM2 ((uint8_t)0x07) /* DFSDM2 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 332 | #define GPIO_AF7_SAI1 ((uint8_t)0x07) /* SAI1 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 333 | #endif /* STM32F413_423xx */ |
| rajathr | 0:716b93ab9a58 | 334 | |
| rajathr | 0:716b93ab9a58 | 335 | /** |
| rajathr | 0:716b93ab9a58 | 336 | * @brief AF 7 selection Legacy |
| rajathr | 0:716b93ab9a58 | 337 | */ |
| rajathr | 0:716b93ab9a58 | 338 | #define GPIO_AF_I2S3ext GPIO_AF7_SPI3 |
| rajathr | 0:716b93ab9a58 | 339 | |
| rajathr | 0:716b93ab9a58 | 340 | /** |
| rajathr | 0:716b93ab9a58 | 341 | * @brief AF 8 selection |
| rajathr | 0:716b93ab9a58 | 342 | */ |
| rajathr | 0:716b93ab9a58 | 343 | #define GPIO_AF_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 344 | #define GPIO_AF_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 345 | #define GPIO_AF_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 346 | #define GPIO_AF_UART7 ((uint8_t)0x08) /* UART7 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 347 | #define GPIO_AF_UART8 ((uint8_t)0x08) /* UART8 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 348 | #if defined(STM32F412xG) || defined(STM32F413_423xx) |
| rajathr | 0:716b93ab9a58 | 349 | #define GPIO_AF8_USART3 ((uint8_t)0x08) /* USART3 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 350 | #define GPIO_AF8_DFSDM1 ((uint8_t)0x08) /* DFSDM Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 351 | #define GPIO_AF8_CAN1 ((uint8_t)0x08) /* CAN1 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 352 | #endif /* STM32F412xG || STM32F413_423xx */ |
| rajathr | 0:716b93ab9a58 | 353 | #if defined(STM32F446xx) |
| rajathr | 0:716b93ab9a58 | 354 | #define GPIO_AF8_SAI2 ((uint8_t)0x08) /* SAI2 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 355 | #define GPIO_AF_SPDIF ((uint8_t)0x08) /* SPDIF Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 356 | #endif /* STM32F446xx */ |
| rajathr | 0:716b93ab9a58 | 357 | |
| rajathr | 0:716b93ab9a58 | 358 | /** |
| rajathr | 0:716b93ab9a58 | 359 | * @brief AF 9 selection |
| rajathr | 0:716b93ab9a58 | 360 | */ |
| rajathr | 0:716b93ab9a58 | 361 | #define GPIO_AF_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 362 | #define GPIO_AF_CAN2 ((uint8_t)0x09) /* CAN2 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 363 | #define GPIO_AF_TIM12 ((uint8_t)0x09) /* TIM12 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 364 | #define GPIO_AF_TIM13 ((uint8_t)0x09) /* TIM13 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 365 | #define GPIO_AF_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 366 | #define GPIO_AF9_I2C2 ((uint8_t)0x09) /* I2C2 Alternate Function mapping (Only for STM32F401xx/STM32F410xx/STM32F411xE/STM32F412xG/STM32F413_423xx Devices) */ |
| rajathr | 0:716b93ab9a58 | 367 | #define GPIO_AF9_I2C3 ((uint8_t)0x09) /* I2C3 Alternate Function mapping (Only for STM32F401xx/STM32F411xE/STM32F412xG and STM32F413_423xx Devices) */ |
| rajathr | 0:716b93ab9a58 | 368 | #if defined(STM32F446xx) |
| rajathr | 0:716b93ab9a58 | 369 | #define GPIO_AF9_SAI2 ((uint8_t)0x09) /* SAI2 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 370 | #endif /* STM32F446xx */ |
| rajathr | 0:716b93ab9a58 | 371 | #define GPIO_AF9_LTDC ((uint8_t)0x09) /* LTDC Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 372 | #if defined(STM32F412xG) || defined(STM32F413_423xx) || defined(STM32F446xx) || defined(STM32F469_479xx) |
| rajathr | 0:716b93ab9a58 | 373 | #define GPIO_AF9_QUADSPI ((uint8_t)0x09) /* QuadSPI Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 374 | #endif /* STM32F412xG || STM32F413_423xx || STM32F446xx || STM32F469_479xx */ |
| rajathr | 0:716b93ab9a58 | 375 | #if defined(STM32F410xx) || defined(STM32F412xG) || defined(STM32F413_423xx) |
| rajathr | 0:716b93ab9a58 | 376 | #define GPIO_AF9_FMPI2C ((uint8_t)0x09) /* FMPI2C Alternate Function mapping (Only for STM32F410xx Devices) */ |
| rajathr | 0:716b93ab9a58 | 377 | #endif /* STM32F410xx || STM32F412xG || STM32F413_423xx */ |
| rajathr | 0:716b93ab9a58 | 378 | |
| rajathr | 0:716b93ab9a58 | 379 | /** |
| rajathr | 0:716b93ab9a58 | 380 | * @brief AF 10 selection |
| rajathr | 0:716b93ab9a58 | 381 | */ |
| rajathr | 0:716b93ab9a58 | 382 | #define GPIO_AF_OTG_FS ((uint8_t)0xA) /* OTG_FS Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 383 | #define GPIO_AF_OTG_HS ((uint8_t)0xA) /* OTG_HS Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 384 | #if defined(STM32F446xx) |
| rajathr | 0:716b93ab9a58 | 385 | #define GPIO_AF10_SAI2 ((uint8_t)0x0A) /* SAI2 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 386 | #endif /* STM32F446xx */ |
| rajathr | 0:716b93ab9a58 | 387 | #if defined(STM32F412xG) || defined(STM32F413_423xx) || defined(STM32F446xx) || defined(STM32F469_479xx) |
| rajathr | 0:716b93ab9a58 | 388 | #define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QuadSPI Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 389 | #endif /* STM32F412xG || STM32F413_423xx || STM32F446xx || STM32F469_479xx */ |
| rajathr | 0:716b93ab9a58 | 390 | #if defined(STM32F412xG) || defined(STM32F413_423xx) |
| rajathr | 0:716b93ab9a58 | 391 | #define GPIO_AF10_FMC ((uint8_t)0xA) /* FMC Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 392 | #define GPIO_AF10_DFSDM1 ((uint8_t)0xA) /* DFSDM Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 393 | #endif /* STM32F412xG || STM32F413_423xx */ |
| rajathr | 0:716b93ab9a58 | 394 | #if defined(STM32F413_423xx) |
| rajathr | 0:716b93ab9a58 | 395 | #define GPIO_AF10_DFSDM2 ((uint8_t)0x0A) /* DFSDM2 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 396 | #define GPIO_AF10_SAI1 ((uint8_t)0x0A) /* SAI1 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 397 | #endif /* STM32F413_423xx */ |
| rajathr | 0:716b93ab9a58 | 398 | /** |
| rajathr | 0:716b93ab9a58 | 399 | * @brief AF 11 selection |
| rajathr | 0:716b93ab9a58 | 400 | */ |
| rajathr | 0:716b93ab9a58 | 401 | #define GPIO_AF_ETH ((uint8_t)0x0B) /* ETHERNET Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 402 | #if defined(STM32F413_423xx) |
| rajathr | 0:716b93ab9a58 | 403 | #define GPIO_AF11_UART4 ((uint8_t)0x0B) /* UART4 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 404 | #define GPIO_AF11_UART5 ((uint8_t)0x0B) /* UART5 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 405 | #define GPIO_AF11_UART9 ((uint8_t)0x0B) /* UART9 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 406 | #define GPIO_AF11_UART10 ((uint8_t)0x0B) /* UART10 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 407 | #define GPIO_AF11_CAN3 ((uint8_t)0x0B) /* CAN3 Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 408 | #endif /* STM32F413_423xx */ |
| rajathr | 0:716b93ab9a58 | 409 | |
| rajathr | 0:716b93ab9a58 | 410 | /** |
| rajathr | 0:716b93ab9a58 | 411 | * @brief AF 12 selection |
| rajathr | 0:716b93ab9a58 | 412 | */ |
| rajathr | 0:716b93ab9a58 | 413 | #if defined(STM32F40_41xxx) || defined(STM32F412xG) || defined(STM32F413_423xx) |
| rajathr | 0:716b93ab9a58 | 414 | #define GPIO_AF_FSMC ((uint8_t)0xC) /* FSMC Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 415 | #endif /* STM32F40_41xxx || STM32F412xG || STM32F413_423xx */ |
| rajathr | 0:716b93ab9a58 | 416 | |
| rajathr | 0:716b93ab9a58 | 417 | #if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx) || defined(STM32F469_479xx) |
| rajathr | 0:716b93ab9a58 | 418 | #define GPIO_AF_FMC ((uint8_t)0xC) /* FMC Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 419 | #endif /* STM32F427_437xx || STM32F429_439xx || STM32F446xx || STM32F469_479xx */ |
| rajathr | 0:716b93ab9a58 | 420 | |
| rajathr | 0:716b93ab9a58 | 421 | #define GPIO_AF_OTG_HS_FS ((uint8_t)0xC) /* OTG HS configured in FS, Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 422 | #define GPIO_AF_SDIO ((uint8_t)0xC) /* SDIO Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 423 | |
| rajathr | 0:716b93ab9a58 | 424 | /** |
| rajathr | 0:716b93ab9a58 | 425 | * @brief AF 13 selection |
| rajathr | 0:716b93ab9a58 | 426 | */ |
| rajathr | 0:716b93ab9a58 | 427 | #define GPIO_AF_DCMI ((uint8_t)0x0D) /* DCMI Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 428 | #if defined(STM32F469_479xx) |
| rajathr | 0:716b93ab9a58 | 429 | #define GPIO_AF_DSI ((uint8_t)0x0D) /* DSI Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 430 | #endif /* STM32F469_479xx */ |
| rajathr | 0:716b93ab9a58 | 431 | /** |
| rajathr | 0:716b93ab9a58 | 432 | * @brief AF 14 selection |
| rajathr | 0:716b93ab9a58 | 433 | */ |
| rajathr | 0:716b93ab9a58 | 434 | #define GPIO_AF_LTDC ((uint8_t)0x0E) /* LCD-TFT Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 435 | #if defined(STM32F413_423xx) |
| rajathr | 0:716b93ab9a58 | 436 | #define GPIO_AF14_RNG ((uint8_t)0x0E) /* RNG Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 437 | #endif /* STM32F413_423xx */ |
| rajathr | 0:716b93ab9a58 | 438 | |
| rajathr | 0:716b93ab9a58 | 439 | /** |
| rajathr | 0:716b93ab9a58 | 440 | * @brief AF 15 selection |
| rajathr | 0:716b93ab9a58 | 441 | */ |
| rajathr | 0:716b93ab9a58 | 442 | #define GPIO_AF_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */ |
| rajathr | 0:716b93ab9a58 | 443 | |
| rajathr | 0:716b93ab9a58 | 444 | #if defined(STM32F40_41xxx) |
| rajathr | 0:716b93ab9a58 | 445 | #define IS_GPIO_AF_MORT(AF) (((AF) == GPIO_AF_RTC_50Hz) || ((AF) == GPIO_AF_TIM14) || \ |
| rajathr | 0:716b93ab9a58 | 446 | ((AF) == GPIO_AF_MCO) || ((AF) == GPIO_AF_TAMPER) || \ |
| rajathr | 0:716b93ab9a58 | 447 | ((AF) == GPIO_AF_SWJ) || ((AF) == GPIO_AF_TRACE) || \ |
| rajathr | 0:716b93ab9a58 | 448 | ((AF) == GPIO_AF_TIM1) || ((AF) == GPIO_AF_TIM2) || \ |
| rajathr | 0:716b93ab9a58 | 449 | ((AF) == GPIO_AF_TIM3) || ((AF) == GPIO_AF_TIM4) || \ |
| rajathr | 0:716b93ab9a58 | 450 | ((AF) == GPIO_AF_TIM5) || ((AF) == GPIO_AF_TIM8) || \ |
| rajathr | 0:716b93ab9a58 | 451 | ((AF) == GPIO_AF_I2C1) || ((AF) == GPIO_AF_I2C2) || \ |
| rajathr | 0:716b93ab9a58 | 452 | ((AF) == GPIO_AF_I2C3) || ((AF) == GPIO_AF_SPI1) || \ |
| rajathr | 0:716b93ab9a58 | 453 | ((AF) == GPIO_AF_SPI2) || ((AF) == GPIO_AF_TIM13) || \ |
| rajathr | 0:716b93ab9a58 | 454 | ((AF) == GPIO_AF_SPI3) || ((AF) == GPIO_AF_TIM14) || \ |
| rajathr | 0:716b93ab9a58 | 455 | ((AF) == GPIO_AF_USART1) || ((AF) == GPIO_AF_USART2) || \ |
| rajathr | 0:716b93ab9a58 | 456 | ((AF) == GPIO_AF_USART3) || ((AF) == GPIO_AF_UART4) || \ |
| rajathr | 0:716b93ab9a58 | 457 | ((AF) == GPIO_AF_UART5) || ((AF) == GPIO_AF_USART6) || \ |
| rajathr | 0:716b93ab9a58 | 458 | ((AF) == GPIO_AF_CAN1) || ((AF) == GPIO_AF_CAN2) || \ |
| rajathr | 0:716b93ab9a58 | 459 | ((AF) == GPIO_AF_OTG_FS) || ((AF) == GPIO_AF_OTG_HS) || \ |
| rajathr | 0:716b93ab9a58 | 460 | ((AF) == GPIO_AF_ETH) || ((AF) == GPIO_AF_OTG_HS_FS) || \ |
| rajathr | 0:716b93ab9a58 | 461 | ((AF) == GPIO_AF_SDIO) || ((AF) == GPIO_AF_DCMI) || \ |
| rajathr | 0:716b93ab9a58 | 462 | ((AF) == GPIO_AF_EVENTOUT) || ((AF) == GPIO_AF_FSMC)) |
| rajathr | 0:716b93ab9a58 | 463 | #endif /* STM32F40_41xxx */ |
| rajathr | 0:716b93ab9a58 | 464 | |
| rajathr | 0:716b93ab9a58 | 465 | #if defined(STM32F401xx) |
| rajathr | 0:716b93ab9a58 | 466 | #define IS_GPIO_AF_MORT(AF) (((AF) == GPIO_AF_RTC_50Hz) || ((AF) == GPIO_AF_TIM14) || \ |
| rajathr | 0:716b93ab9a58 | 467 | ((AF) == GPIO_AF_MCO) || ((AF) == GPIO_AF_TAMPER) || \ |
| rajathr | 0:716b93ab9a58 | 468 | ((AF) == GPIO_AF_SWJ) || ((AF) == GPIO_AF_TRACE) || \ |
| rajathr | 0:716b93ab9a58 | 469 | ((AF) == GPIO_AF_TIM1) || ((AF) == GPIO_AF_TIM2) || \ |
| rajathr | 0:716b93ab9a58 | 470 | ((AF) == GPIO_AF_TIM3) || ((AF) == GPIO_AF_TIM4) || \ |
| rajathr | 0:716b93ab9a58 | 471 | ((AF) == GPIO_AF_TIM5) || ((AF) == GPIO_AF_TIM8) || \ |
| rajathr | 0:716b93ab9a58 | 472 | ((AF) == GPIO_AF_I2C1) || ((AF) == GPIO_AF_I2C2) || \ |
| rajathr | 0:716b93ab9a58 | 473 | ((AF) == GPIO_AF_I2C3) || ((AF) == GPIO_AF_SPI1) || \ |
| rajathr | 0:716b93ab9a58 | 474 | ((AF) == GPIO_AF_SPI2) || ((AF) == GPIO_AF_TIM13) || \ |
| rajathr | 0:716b93ab9a58 | 475 | ((AF) == GPIO_AF_SPI3) || ((AF) == GPIO_AF_TIM14) || \ |
| rajathr | 0:716b93ab9a58 | 476 | ((AF) == GPIO_AF_USART1) || ((AF) == GPIO_AF_USART2) || \ |
| rajathr | 0:716b93ab9a58 | 477 | ((AF) == GPIO_AF_SDIO) || ((AF) == GPIO_AF_USART6) || \ |
| rajathr | 0:716b93ab9a58 | 478 | ((AF) == GPIO_AF_OTG_FS) || ((AF) == GPIO_AF_OTG_HS) || \ |
| rajathr | 0:716b93ab9a58 | 479 | ((AF) == GPIO_AF_EVENTOUT) || ((AF) == GPIO_AF_SPI4)) |
| rajathr | 0:716b93ab9a58 | 480 | #endif /* STM32F401xx */ |
| rajathr | 0:716b93ab9a58 | 481 | |
| rajathr | 0:716b93ab9a58 | 482 | #if defined(STM32F411xE) |
| rajathr | 0:716b93ab9a58 | 483 | #define IS_GPIO_AF_MORT(AF) (((AF) < 16) && ((AF) != 11) && ((AF) != 13) && ((AF) != 14)) |
| rajathr | 0:716b93ab9a58 | 484 | #endif /* STM32F411xE */ |
| rajathr | 0:716b93ab9a58 | 485 | |
| rajathr | 0:716b93ab9a58 | 486 | #if defined(STM32F410xx) |
| rajathr | 0:716b93ab9a58 | 487 | #define IS_GPIO_AF_MORT(AF) (((AF) < 10) || ((AF) == 15)) |
| rajathr | 0:716b93ab9a58 | 488 | #endif /* STM32F410xx */ |
| rajathr | 0:716b93ab9a58 | 489 | |
| rajathr | 0:716b93ab9a58 | 490 | #if defined(STM32F427_437xx) || defined(STM32F429_439xx) |
| rajathr | 0:716b93ab9a58 | 491 | #define IS_GPIO_AF_MORT(AF) (((AF) == GPIO_AF_RTC_50Hz) || ((AF) == GPIO_AF_TIM14) || \ |
| rajathr | 0:716b93ab9a58 | 492 | ((AF) == GPIO_AF_MCO) || ((AF) == GPIO_AF_TAMPER) || \ |
| rajathr | 0:716b93ab9a58 | 493 | ((AF) == GPIO_AF_SWJ) || ((AF) == GPIO_AF_TRACE) || \ |
| rajathr | 0:716b93ab9a58 | 494 | ((AF) == GPIO_AF_TIM1) || ((AF) == GPIO_AF_TIM2) || \ |
| rajathr | 0:716b93ab9a58 | 495 | ((AF) == GPIO_AF_TIM3) || ((AF) == GPIO_AF_TIM4) || \ |
| rajathr | 0:716b93ab9a58 | 496 | ((AF) == GPIO_AF_TIM5) || ((AF) == GPIO_AF_TIM8) || \ |
| rajathr | 0:716b93ab9a58 | 497 | ((AF) == GPIO_AF_I2C1) || ((AF) == GPIO_AF_I2C2) || \ |
| rajathr | 0:716b93ab9a58 | 498 | ((AF) == GPIO_AF_I2C3) || ((AF) == GPIO_AF_SPI1) || \ |
| rajathr | 0:716b93ab9a58 | 499 | ((AF) == GPIO_AF_SPI2) || ((AF) == GPIO_AF_TIM13) || \ |
| rajathr | 0:716b93ab9a58 | 500 | ((AF) == GPIO_AF_SPI3) || ((AF) == GPIO_AF_TIM14) || \ |
| rajathr | 0:716b93ab9a58 | 501 | ((AF) == GPIO_AF_USART1) || ((AF) == GPIO_AF_USART2) || \ |
| rajathr | 0:716b93ab9a58 | 502 | ((AF) == GPIO_AF_USART3) || ((AF) == GPIO_AF_UART4) || \ |
| rajathr | 0:716b93ab9a58 | 503 | ((AF) == GPIO_AF_UART5) || ((AF) == GPIO_AF_USART6) || \ |
| rajathr | 0:716b93ab9a58 | 504 | ((AF) == GPIO_AF_CAN1) || ((AF) == GPIO_AF_CAN2) || \ |
| rajathr | 0:716b93ab9a58 | 505 | ((AF) == GPIO_AF_OTG_FS) || ((AF) == GPIO_AF_OTG_HS) || \ |
| rajathr | 0:716b93ab9a58 | 506 | ((AF) == GPIO_AF_ETH) || ((AF) == GPIO_AF_OTG_HS_FS) || \ |
| rajathr | 0:716b93ab9a58 | 507 | ((AF) == GPIO_AF_SDIO) || ((AF) == GPIO_AF_DCMI) || \ |
| rajathr | 0:716b93ab9a58 | 508 | ((AF) == GPIO_AF_EVENTOUT) || ((AF) == GPIO_AF_SPI4) || \ |
| rajathr | 0:716b93ab9a58 | 509 | ((AF) == GPIO_AF_SPI5) || ((AF) == GPIO_AF_SPI6) || \ |
| rajathr | 0:716b93ab9a58 | 510 | ((AF) == GPIO_AF_UART7) || ((AF) == GPIO_AF_UART8) || \ |
| rajathr | 0:716b93ab9a58 | 511 | ((AF) == GPIO_AF_FMC) || ((AF) == GPIO_AF_SAI1) || \ |
| rajathr | 0:716b93ab9a58 | 512 | ((AF) == GPIO_AF_LTDC)) |
| rajathr | 0:716b93ab9a58 | 513 | #endif /* STM32F427_437xx || STM32F429_439xx */ |
| rajathr | 0:716b93ab9a58 | 514 | |
| rajathr | 0:716b93ab9a58 | 515 | #if defined(STM32F412xG) |
| rajathr | 0:716b93ab9a58 | 516 | #define IS_GPIO_AF_MORT(AF) (((AF) < 16) && ((AF) != 11) && ((AF) != 14)) |
| rajathr | 0:716b93ab9a58 | 517 | #endif /* STM32F412xG */ |
| rajathr | 0:716b93ab9a58 | 518 | |
| rajathr | 0:716b93ab9a58 | 519 | #if defined(STM32F413_423xx) |
| rajathr | 0:716b93ab9a58 | 520 | #define IS_GPIO_AF_MORT(AF) (((AF) < 16) && ((AF) != 13)) |
| rajathr | 0:716b93ab9a58 | 521 | #endif /* STM32F413_423xx */ |
| rajathr | 0:716b93ab9a58 | 522 | |
| rajathr | 0:716b93ab9a58 | 523 | #if defined(STM32F446xx) |
| rajathr | 0:716b93ab9a58 | 524 | #define IS_GPIO_AF_MORT(AF) (((AF) < 16) && ((AF) != 11) && ((AF) != 14)) |
| rajathr | 0:716b93ab9a58 | 525 | #endif /* STM32F446xx */ |
| rajathr | 0:716b93ab9a58 | 526 | |
| rajathr | 0:716b93ab9a58 | 527 | #if defined(STM32F469_479xx) |
| rajathr | 0:716b93ab9a58 | 528 | #define IS_GPIO_AF_MORT(AF) ((AF) < 16) |
| rajathr | 0:716b93ab9a58 | 529 | #endif /* STM32F469_479xx */ |
| rajathr | 0:716b93ab9a58 | 530 | |
| rajathr | 0:716b93ab9a58 | 531 | /** |
| rajathr | 0:716b93ab9a58 | 532 | * @} |
| rajathr | 0:716b93ab9a58 | 533 | */ |
| rajathr | 0:716b93ab9a58 | 534 | |
| rajathr | 0:716b93ab9a58 | 535 | /** @defgroup GPIO_Legacy |
| rajathr | 0:716b93ab9a58 | 536 | * @{ |
| rajathr | 0:716b93ab9a58 | 537 | */ |
| rajathr | 0:716b93ab9a58 | 538 | |
| rajathr | 0:716b93ab9a58 | 539 | #define GPIO_Mode_AIN GPIO_Mode_AN |
| rajathr | 0:716b93ab9a58 | 540 | |
| rajathr | 0:716b93ab9a58 | 541 | #define GPIO_AF_OTG1_FS GPIO_AF_OTG_FS |
| rajathr | 0:716b93ab9a58 | 542 | #define GPIO_AF_OTG2_HS GPIO_AF_OTG_HS |
| rajathr | 0:716b93ab9a58 | 543 | #define GPIO_AF_OTG2_FS GPIO_AF_OTG_HS_FS |
| rajathr | 0:716b93ab9a58 | 544 | |
| rajathr | 0:716b93ab9a58 | 545 | /** |
| rajathr | 0:716b93ab9a58 | 546 | * @} |
| rajathr | 0:716b93ab9a58 | 547 | */ |
| rajathr | 0:716b93ab9a58 | 548 | |
| rajathr | 0:716b93ab9a58 | 549 | /** |
| rajathr | 0:716b93ab9a58 | 550 | * @} |
| rajathr | 0:716b93ab9a58 | 551 | */ |
| rajathr | 0:716b93ab9a58 | 552 | |
| rajathr | 0:716b93ab9a58 | 553 | /* Exported macro ------------------------------------------------------------*/ |
| rajathr | 0:716b93ab9a58 | 554 | /* Exported functions --------------------------------------------------------*/ |
| rajathr | 0:716b93ab9a58 | 555 | |
| rajathr | 0:716b93ab9a58 | 556 | /* Function used to set the GPIO configuration to the default reset state ****/ |
| rajathr | 0:716b93ab9a58 | 557 | void GPIO_DeInit_mort(GPIO_TypeDef_mort* GPIOx); |
| rajathr | 0:716b93ab9a58 | 558 | |
| rajathr | 0:716b93ab9a58 | 559 | /* Initialization and Configuration functions *********************************/ |
| rajathr | 0:716b93ab9a58 | 560 | void GPIO_Init_mort(GPIO_TypeDef_mort* GPIOx, GPIO_InitTypeDef_mort* GPIO_InitStruct); |
| rajathr | 0:716b93ab9a58 | 561 | void GPIO_StructInit_mort(GPIO_InitTypeDef_mort* GPIO_InitStruct); |
| rajathr | 0:716b93ab9a58 | 562 | void GPIO_PinLockConfig_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin); |
| rajathr | 0:716b93ab9a58 | 563 | |
| rajathr | 0:716b93ab9a58 | 564 | /* GPIO Read and Write functions **********************************************/ |
| rajathr | 0:716b93ab9a58 | 565 | uint8_t GPIO_ReadInputDataBit_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin); |
| rajathr | 0:716b93ab9a58 | 566 | uint16_t GPIO_ReadInputData_mort(GPIO_TypeDef_mort* GPIOx); |
| rajathr | 0:716b93ab9a58 | 567 | uint8_t GPIO_ReadOutputDataBit_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin); |
| rajathr | 0:716b93ab9a58 | 568 | uint16_t GPIO_ReadOutputData_mort(GPIO_TypeDef_mort* GPIOx); |
| rajathr | 0:716b93ab9a58 | 569 | void GPIO_SetBits_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin); |
| rajathr | 0:716b93ab9a58 | 570 | void GPIO_ResetBits_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin); |
| rajathr | 0:716b93ab9a58 | 571 | void GPIO_WriteBit_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin, BitAction BitVal); |
| rajathr | 0:716b93ab9a58 | 572 | void GPIO_Write_mort(GPIO_TypeDef_mort* GPIOx, uint16_t PortVal); |
| rajathr | 0:716b93ab9a58 | 573 | void GPIO_ToggleBits_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_Pin); |
| rajathr | 0:716b93ab9a58 | 574 | |
| rajathr | 0:716b93ab9a58 | 575 | /* GPIO Alternate functions configuration function ****************************/ |
| rajathr | 0:716b93ab9a58 | 576 | void GPIO_PinAFConfig_mort(GPIO_TypeDef_mort* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF); |
| rajathr | 0:716b93ab9a58 | 577 | |
| rajathr | 0:716b93ab9a58 | 578 | #ifdef __cplusplus |
| rajathr | 0:716b93ab9a58 | 579 | } |
| rajathr | 0:716b93ab9a58 | 580 | #endif |
| rajathr | 0:716b93ab9a58 | 581 | |
| rajathr | 0:716b93ab9a58 | 582 | #endif /*__STM32F4xx_GPIO_H */ |
| rajathr | 0:716b93ab9a58 | 583 | |
| rajathr | 0:716b93ab9a58 | 584 | /** |
| rajathr | 0:716b93ab9a58 | 585 | * @} |
| rajathr | 0:716b93ab9a58 | 586 | */ |
| rajathr | 0:716b93ab9a58 | 587 | |
| rajathr | 0:716b93ab9a58 | 588 | /** |
| rajathr | 0:716b93ab9a58 | 589 | * @} |
| rajathr | 0:716b93ab9a58 | 590 | */ |
| rajathr | 0:716b93ab9a58 | 591 | |
| rajathr | 0:716b93ab9a58 | 592 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
| rajathr | 0:716b93ab9a58 | 593 | |
| rajathr | 0:716b93ab9a58 | 594 | |
| rajathr | 0:716b93ab9a58 | 595 | |
| rajathr | 0:716b93ab9a58 | 596 | |
| rajathr | 0:716b93ab9a58 | 597 |