![](/media/cache/img/default_profile.jpg.50x50_q85.jpg)
i2c testing for integration
Fork of pcb_test_v1_1_1 by
beacon.cpp
- Committer:
- sakthipriya
- Date:
- 2015-04-07
- Revision:
- 0:e91ee0e99213
- Child:
- 1:bbddd1763652
File content as of revision 0:e91ee0e99213:
//switch off the sync!!!!!!! //switch off the preamble!!!!!!! /*for crc in tx: regIrq2(0x28) : regpacketconfig 1(0x37) : set crc detection/calc. on : | 0x10 crcautoclearoff : | 0x08 for data whitening : regpacketconfig 1(0x37) :| 0x40 for */ // 6CC000 for 435 MHz //set all values as FF for checking on spectrum analyzer #include "beacon.h" #include "HK.h" Serial chavan(USBTX, USBRX); // tx, rx SPI spi(PIN2,PIN1,PIN3); // mosi, miso, sclk DigitalOut cs_bar(PIN6); //slave select or chip select //InterruptIn button(p9); //#define TIMES 16 //Timer t; /*void interrupt_func() { chavan.printf("INTERRUPT_FUNC TRIGGERED\n wait for 3 secs\n"); wait(3); }*/ extern ShortBeacy Shortbeacon; void writereg(uint8_t reg,uint8_t val) { cs_bar = 0; spi.write(reg | 0x80); spi.write(val); cs_bar = 1; } uint8_t readreg(uint8_t reg) { uint8_t val; cs_bar = 0; spi.write(reg & ~0x80); val = spi.write(0); cs_bar = 1; return val; } void FUNC_BEA() { //button.rise(&interrupt_func); //interrupt enabled ( rising edge of pin 9) printf("\n\rBeacon function entered\n\r"); wait(0.02); //takes 10 ms for POR event + 10ms for safety uint8_t byte_counter = 0; /*struct Short_beacon{ uint8_t Voltage[1]; uint8_t AngularSpeed[2]; uint8_t SubsystemStatus[1]; uint8_t Temp[3]; uint8_t ErrorFlag[1]; }Shortbeacon = { {0x22}, {0x22, 0x33} , {0x00},{0x00,0x00,0x00}, {0xFE} }; */ //filling hk data //ShortBeacon Shortbeacon; uint8_t short_beacon[] = { 0xAB, 0x8A, 0xE2, 0xBB, 0xB8, 0xA2, 0x8E,Shortbeacon.Voltage[0],Shortbeacon.AngularSpeed[0], Shortbeacon.AngularSpeed[1],Shortbeacon.SubsystemStatus[0],Shortbeacon.Temp[0],Shortbeacon.Temp[1],Shortbeacon.Temp[2],Shortbeacon.ErrorFlag[0]}; //mask //uint8_t mask[] = {0x80, 0x40, 0x20,0x10,0x8,0x4,0x2,0x1}; for(int i = 0; i < 15 ; i++) { chavan.printf("0x%X\n\r",(short_beacon[i])); } spi.format(8,0); spi.frequency(10000000); //10MHz SCLK frequency(its max for rfm69hcw) cs_bar = 1; // Chip must be deselected //initialization //Common configuration registers writereg(0x01,0x04); //sequencer on,standby mode writereg(0x02,0x08); //packet-mode used , ook modultion , no dc-shaping writereg(0x03,0x68); //1200bps datarate writereg(0x04,0x2B); //1200bps datarate writereg(0x07,0x6C); //Frequency MSB writereg(0x08,0xC0); //Frequency MID writereg(0x09,0x00); //Frequency LSB ....6C C0 00 for 435 MHZ //Transmitter registers // RegPaLevel(default +13 dBm) //IRQ and Pin Mapping Registers //no DIO mapped yet //regirq1(0x27): modeready (8th bit) will be checked for interrupts //regIrq2(0x28): fifothresh (5th bit) ,packetsent(3rd bit) will be checked for interrupts //Packet Engine Registers writereg(0x2C,0x00); //set preamble writereg(0x2D,0x0A); //set preamble writereg(0x2E,0x80); //sync off writereg(0x2F,0x5E); //sync word 1 writereg(0x37,0x08 | 0x40);// | 0x10); //packetconfig1, 0x40 for data whitening (only for testing) writereg(0x38,0x00); //payload length = 0 ... unlimited payload mode writereg(0x3C,0xB0); //fifothresh = 48 because we want it cleared once its 40!!!! //Initialization complete //while(chavan.getc() == 't'){ //t.start(); //Filling Data into FIFO 64 BYTES : eff.32 bits = 4bytes //fread cs_bar = 0; spi.write(0x80);//fifo write access for(byte_counter=0 ; byte_counter<4; byte_counter++) { for(int i=7; i>=0 ; i--) { if((short_beacon[byte_counter] & (uint8_t) pow(2.0,i))!=0) //if((short_beacon[byte_counter] & mask[i]) != 0) { spi.write(0xFF); spi.write(0xFF); } else { spi.write(0x00); spi.write(0x00); } } } cs_bar = 1; //cs_bar //Check for fifoThresh printf("\n\rfor loop executed\n\r"); while((readreg(0x28) & 0x20) != 0x20); printf("\n\rwhile loop executed\n\r"); //Highpower settings writereg(0x11,0x7F); //RegPalevel (20db) //~ writereg(0x13,0x0F); //RegOCP writereg(0x5A,0x5D); //RegTestPa1 writereg(0x5C,0x7C); //RegTestPa2 //Set to Tx mode writereg(0x01,0x0C); printf("\n\rpre 2nd while loop\n\r"); //Check for fifoThresh while((readreg(0x28) & 0x20) != 0x00); printf("\n\r2nd while loop executed\n\r"); while(byte_counter!=15){ //writing again cs_bar = 0; spi.write(0x80); for(int i=7; i>=0 ;i--) { if((short_beacon[byte_counter] & (uint8_t) pow(2.0,i))!=0) //if((short_beacon[byte_counter] & mask[i]) != 0) { spi.write(0xFF); spi.write(0xFF); } else { spi.write(0x00); spi.write(0x00); } } cs_bar = 1; byte_counter++; //Check for fifoThresh while((readreg(0x28) & 0x20) != 0x00); } printf("\n\r3rd big while loop executed\n\r"); //wait for packet sent bit to fire while((readreg(0x28) & 0x08) != 0x08); printf("\n\r4th while loop executed\n\r"); //chavan.printf("packet sent!!! \n\r"); //Switch back to Standby Mode writereg(0x01,0x04); //Lowpowermode writereg(0x11,0x9F); //RegPalevel (13db) writereg(0x13,0x1A); //RegOCP writereg(0x5A,0x55); //RegTestPa1(setting PA_BOOST on RFIO) writereg(0x5C,0x70); //RegTestPa2(setting PA_BOOST on RFIO) //wait for modeready while((readreg(0x27)&0x80)!=0x80); //t.stop(); //chavan.printf(" time taken to init + transmit = %f \n", t.read()) ; //} printf("\n\rBeacon function exiting\n\r"); }