David DiCarlo / mbed-src-KL05Z-smart-sensor

Fork of mbed for KL05Z based smart sensor which has no crystal on the board, so MCG FEI mode is required.

Dependents:   smart-sensor-KL05Z-debug

Fork of mbed-src by Ermanno Brusadin

api/SPI.h@1:da408b460382, 2018-01-29 (annotated)

Committer:
r14793
Date:
Mon Jan 29 15:38:37 2018 +0000
Revision:
1:da408b460382
Parent:
0:0a673c671a56 
changed KL05 MCG mode to FEI for smart sensor boards (no crystal)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ebrus 0:0a673c671a56 1 /* mbed Microcontroller Library
ebrus 0:0a673c671a56 2 * Copyright (c) 2006-2013 ARM Limited
ebrus 0:0a673c671a56 3 *
ebrus 0:0a673c671a56 4 * Licensed under the Apache License, Version 2.0 (the "License");
ebrus 0:0a673c671a56 5 * you may not use this file except in compliance with the License.
ebrus 0:0a673c671a56 6 * You may obtain a copy of the License at
ebrus 0:0a673c671a56 7 *
ebrus 0:0a673c671a56 8 * http://www.apache.org/licenses/LICENSE-2.0
ebrus 0:0a673c671a56 9 *
ebrus 0:0a673c671a56 10 * Unless required by applicable law or agreed to in writing, software
ebrus 0:0a673c671a56 11 * distributed under the License is distributed on an "AS IS" BASIS,
ebrus 0:0a673c671a56 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ebrus 0:0a673c671a56 13 * See the License for the specific language governing permissions and
ebrus 0:0a673c671a56 14 * limitations under the License.
ebrus 0:0a673c671a56 15 */
ebrus 0:0a673c671a56 16 #ifndef MBED_SPI_H
ebrus 0:0a673c671a56 17 #define MBED_SPI_H
ebrus 0:0a673c671a56 18
ebrus 0:0a673c671a56 19 #include "platform.h"
ebrus 0:0a673c671a56 20
ebrus 0:0a673c671a56 21 #if DEVICE_SPI
ebrus 0:0a673c671a56 22
ebrus 0:0a673c671a56 23 #include "spi_api.h"
ebrus 0:0a673c671a56 24
ebrus 0:0a673c671a56 25 namespace mbed {
ebrus 0:0a673c671a56 26
ebrus 0:0a673c671a56 27 /** A SPI Master, used for communicating with SPI slave devices
ebrus 0:0a673c671a56 28 *
ebrus 0:0a673c671a56 29 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
ebrus 0:0a673c671a56 30 *
ebrus 0:0a673c671a56 31 * Most SPI devices will also require Chip Select and Reset signals. These
ebrus 0:0a673c671a56 32 * can be controlled using <DigitalOut> pins
ebrus 0:0a673c671a56 33 *
ebrus 0:0a673c671a56 34 * Example:
ebrus 0:0a673c671a56 35 * @code
ebrus 0:0a673c671a56 36 * // Send a byte to a SPI slave, and record the response
ebrus 0:0a673c671a56 37 *
ebrus 0:0a673c671a56 38 * #include "mbed.h"
ebrus 0:0a673c671a56 39 *
ebrus 0:0a673c671a56 40 * SPI device(p5, p6, p7); // mosi, miso, sclk
ebrus 0:0a673c671a56 41 *
ebrus 0:0a673c671a56 42 * int main() {
ebrus 0:0a673c671a56 43 * int response = device.write(0xFF);
ebrus 0:0a673c671a56 44 * }
ebrus 0:0a673c671a56 45 * @endcode
ebrus 0:0a673c671a56 46 */
ebrus 0:0a673c671a56 47 class SPI {
ebrus 0:0a673c671a56 48
ebrus 0:0a673c671a56 49 public:
ebrus 0:0a673c671a56 50
ebrus 0:0a673c671a56 51 /** Create a SPI master connected to the specified pins
ebrus 0:0a673c671a56 52 *
ebrus 0:0a673c671a56 53 * Pin Options:
ebrus 0:0a673c671a56 54 * (5, 6, 7) or (11, 12, 13)
ebrus 0:0a673c671a56 55 *
ebrus 0:0a673c671a56 56 * mosi or miso can be specfied as NC if not used
ebrus 0:0a673c671a56 57 *
ebrus 0:0a673c671a56 58 * @param mosi SPI Master Out, Slave In pin
ebrus 0:0a673c671a56 59 * @param miso SPI Master In, Slave Out pin
ebrus 0:0a673c671a56 60 * @param sclk SPI Clock pin
ebrus 0:0a673c671a56 61 */
ebrus 0:0a673c671a56 62 SPI(PinName mosi, PinName miso, PinName sclk, PinName _unused=NC);
ebrus 0:0a673c671a56 63
ebrus 0:0a673c671a56 64 /** Configure the data transmission format
ebrus 0:0a673c671a56 65 *
ebrus 0:0a673c671a56 66 * @param bits Number of bits per SPI frame (4 - 16)
ebrus 0:0a673c671a56 67 * @param mode Clock polarity and phase mode (0 - 3)
ebrus 0:0a673c671a56 68 *
ebrus 0:0a673c671a56 69 * @code
ebrus 0:0a673c671a56 70 * mode | POL PHA
ebrus 0:0a673c671a56 71 * -----+--------
ebrus 0:0a673c671a56 72 * 0 | 0 0
ebrus 0:0a673c671a56 73 * 1 | 0 1
ebrus 0:0a673c671a56 74 * 2 | 1 0
ebrus 0:0a673c671a56 75 * 3 | 1 1
ebrus 0:0a673c671a56 76 * @endcode
ebrus 0:0a673c671a56 77 */
ebrus 0:0a673c671a56 78 void format(int bits, int mode = 0);
ebrus 0:0a673c671a56 79
ebrus 0:0a673c671a56 80 /** Set the spi bus clock frequency
ebrus 0:0a673c671a56 81 *
ebrus 0:0a673c671a56 82 * @param hz SCLK frequency in hz (default = 1MHz)
ebrus 0:0a673c671a56 83 */
ebrus 0:0a673c671a56 84 void frequency(int hz = 1000000);
ebrus 0:0a673c671a56 85
ebrus 0:0a673c671a56 86 /** Write to the SPI Slave and return the response
ebrus 0:0a673c671a56 87 *
ebrus 0:0a673c671a56 88 * @param value Data to be sent to the SPI slave
ebrus 0:0a673c671a56 89 *
ebrus 0:0a673c671a56 90 * @returns
ebrus 0:0a673c671a56 91 * Response from the SPI slave
ebrus 0:0a673c671a56 92 */
ebrus 0:0a673c671a56 93 virtual int write(int value);
ebrus 0:0a673c671a56 94
ebrus 0:0a673c671a56 95 public:
ebrus 0:0a673c671a56 96 virtual ~SPI() {
ebrus 0:0a673c671a56 97 }
ebrus 0:0a673c671a56 98
ebrus 0:0a673c671a56 99 protected:
ebrus 0:0a673c671a56 100 spi_t _spi;
ebrus 0:0a673c671a56 101
ebrus 0:0a673c671a56 102 void aquire(void);
ebrus 0:0a673c671a56 103 static SPI *_owner;
ebrus 0:0a673c671a56 104 int _bits;
ebrus 0:0a673c671a56 105 int _mode;
ebrus 0:0a673c671a56 106 int _hz;
ebrus 0:0a673c671a56 107 };
ebrus 0:0a673c671a56 108
ebrus 0:0a673c671a56 109 } // namespace mbed
ebrus 0:0a673c671a56 110
ebrus 0:0a673c671a56 111 #endif
ebrus 0:0a673c671a56 112
ebrus 0:0a673c671a56 113 #endif